Display device and manufacturing method thereof

Abstract

The invention relates to a display device and a method of manufacturing the same. The display device includes an active area and a peripheral area adjacent to the active area, the display device including: a base layer; and a backplane structure including a backplane layer on the base layer, an external via layer on the backplane layer, and an external protection layer on the external via layer, where the external protection layer includes a first external protection layer having a hole exposing the external via layer in the active area and a second external protection layer having a hole exposing the external via layer in the active area. The second outer protective layer has a plurality of trenches in the peripheral region that are recessed toward the outer via layer but do not expose the outer via layer.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0091133 filed in the Korean Intellectual Property Office on July 13, 2023, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] Aspects of some embodiments of the present disclosure relate to a display device and a method of manufacturing the same. Background Art

[0004] In recent years, as interest in information display has increased, research and development of display devices have been continuously conducted.

[0005] The above information disclosed in this Background section is only for enhancement of understanding of the background technology and therefore the information discussed in this Background section does not necessarily constitute prior art. Summary of the invention

[0006] Aspects of some embodiments of the present invention include a display device that can be manufactured with relatively improved reliability and a method of manufacturing the same.

[0007] According to some embodiments of the present invention, a display device includes an active area and a peripheral area adjacent to the active area, and may include: a base layer; and a backplane structure including a backplane layer on the base layer, an external via layer on the backplane layer, and an external protective layer on the external via layer. According to some embodiments, the external protective layer may include a first external protective layer and a second external protective layer, the first external protective layer having holes in the active area that expose the external via layer, and the second external protective layer having a plurality of grooves in the peripheral area that are recessed toward the external via layer but do not expose the external via layer.

[0008] According to some embodiments, the second outer protective layer may overlap the peripheral area and the active area.

[0009] According to some embodiments, the peripheral area may be formed along an edge of the active area.

[0010] According to some embodiments, each of the plurality of trenches may surround at least a portion of the active area.

[0011] According to some embodiments, the effective area may extend in a first direction and in a second direction intersecting the first direction, and each of the plurality of grooves may include a first slit extending in the first direction, a second slit extending in the second direction, and a third slit connecting the first slit and the second slit and having an "L" shape.

[0012] According to some embodiments, the active area may extend in a first direction and in a second direction intersecting the first direction, and each of the plurality of grooves may include a plurality of first grooves arranged in the first direction and a plurality of second grooves arranged in the second direction intersecting the first direction.

[0013] According to some embodiments, the backplate structure may include a first backplate structure. According to some embodiments, the backplate structure may also include a second backplate structure, the second backplate structure is on the base layer and includes a second backplate layer, a lower via layer on the second backplate layer, and a lower protective layer on the lower via layer. According to some embodiments, the base layer may be between the first backplate structure and the second backplate structure, and the lower protective layer may include a first lower protective layer and a second lower protective layer, the first lower protective layer having a hole in the effective area that exposes the lower via layer, and the second lower protective layer including a groove in the peripheral area that is recessed toward the lower via layer but does not expose the lower via layer.

[0014] According to some embodiments, the outer protection layer and the lower protection layer may include an inorganic material, and the outer via layer and the lower via layer may include an organic material.

[0015] According to some embodiments of the present disclosure, in a method for manufacturing a display device, the method includes: manufacturing unit cells each including a backplane structure, each of the unit cells having an active area and a peripheral area adjacent to the active area; forming a support layer in the peripheral area on the backplane structure; forming an ink layer overlapping the active area and in contact with the support layer on the backplane structure; removing the support layer; and separating the unit cells. According to some embodiments, the backplane structure may include an external via layer. According to some embodiments, manufacturing the unit cell may include: forming a first external protective layer on the external via layer in the active area, the first external protective layer having holes exposing the external via layer; and forming a second external protective layer on the external via layer in the peripheral area, the second external protective layer having a plurality of grooves that are recessed toward the external via layer but do not expose the external via layer.

[0016] According to some embodiments, forming the second outer protective layer may include forming a plurality of grooves using a half-tone mask.

[0017] According to some embodiments, the peripheral region may be formed along an edge of the active region, and the second outer protective layer may overlap the peripheral region and the active region.

[0018] According to some embodiments, the support layer may include a protrusion directly on the second outer protective layer and protruding toward the outer via layer to fill the groove.

[0019] According to some embodiments, a height of the ink layer from an upper surface of the first outer protective layer may be lower than a height of the support layer from an upper surface of the second outer protective layer.

[0020] According to some embodiments, removing the support layer may include arranging a fixing member to overlap the ink layer so that the ink layer is not separated from the first outer protective layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The accompanying drawings are included to provide a further understanding of embodiments according to the present disclosure and are incorporated into and constitute a part of this specification. The accompanying drawings illustrate aspects of some embodiments of the present disclosure and together with the description serve to explain aspects of some embodiments of the present disclosure.

[0022] Figure 1 is a plan view showing a display device according to some embodiments.

[0023] Figure 2 It is shown Figure 1 A plan view of one of the pixels.

[0024] Figure 3 is a diagram showing a method of performing a Figure 2 A cross-sectional view of a pixel taken along line CC'.

[0025] Figure 4 According to some embodiments Figure 3 A cross-sectional view of a portion of the first backplane layer.

[0026] Figure 5 It is along Figure 1 A cross-sectional view taken along line AA'.

[0027] Figure 6 It is along Figure 1 A cross-sectional view taken along line BB'.

[0028] Figure 7 is a flowchart illustrating a method of manufacturing a display device according to some embodiments of the present invention.

[0029] Figure 8 is a diagram showing that according to some embodiments Figure 7 A plan view of a cell in operation S710.

[0030] Fig. 9 According to some embodiments, Figure 8 A cross-sectional view taken along line II'.

[0031] Fig.10 According to some embodiments Figure 7 In operation S720, Figure 8A cross-sectional view taken along line II'.

[0032] Fig.11 is a diagram showing that according to some embodiments Figure 7 A plan view of a cell in operation S720.

[0033] Fig.12 is a flowchart illustrating a method of manufacturing a display device according to some embodiments of the present invention.

[0034] Fig.13 is a diagram showing that according to some embodiments Fig.12 A plan view of a cell in operation S1210.

[0035] Fig.14 and Fig.15 It is along Fig.13 A cross-sectional view taken along line II-II' of FIG. 1 is used to explain the structure of the present invention according to some embodiments. Fig.12 Operation S1210 of the manufacturing method.

[0036] Fig.16 According to some embodiments Fig.12 In operations S1220 and S1230, Fig.13 A cross-sectional view taken along line II-II'.

[0037] Fig.17 According to some embodiments Fig.12 In operation S1250, Fig.13 A cross-sectional view taken along line II-II'.

[0038] Fig.18 According to some embodiments Fig.12 After removing the ink layer in operation S1260, Fig.13 A cross-sectional view of the display device taken along line II-II'.

[0039] Fig.19 is a diagram showing that according to some embodiments Fig.13 A plan view of the trench in area A1.

[0040] Fig. 20 is a diagram showing that according to some embodiments Fig.13 A plan view of the trench in area A1.

[0041] Fig.21 is a block diagram illustrating an electronic device according to some embodiments of the present invention. DETAILED DESCRIPTION

[0042] Hereinafter, aspects of some embodiments of the present disclosure are described in detail with reference to the accompanying drawings. It should be noted that in the following description, only the parts necessary for understanding the operation according to the present disclosure are described, and the description of other parts is omitted so as not to obscure the subject matter of the present disclosure. In addition, the present disclosure can be implemented in other forms, and is not limited to the embodiments described herein. However, the embodiments described herein are provided to describe in sufficient detail so that the technical spirit of the present disclosure can be easily implemented by a technician in the field to which the present disclosure belongs.

[0043] Throughout the specification, when a part is "connected" to another part, the situation includes not only the situation that the part is "directly connected" to another part, but also the situation that the part is "indirectly connected" to another part and another element is inserted between them. The terms used in this article are used to describe specific embodiments and are not intended to limit the present disclosure. Throughout the specification, when a specific part "includes" a component, unless otherwise specified, the situation means that the part may further include another component without excluding another component. "At least any one of X, Y and Z" and "at least any one selected from the group consisting of X, Y and Z" can be interpreted as any combination of one X, one Y, one Z, or two or more of X, Y and Z (for example, XYZ, XYY, YZ and ZZ). Here, "and / or" includes all combinations of one or more of the corresponding configurations.

[0044] Here, terms such as first and second can be used to describe various components, but these components are not limited to these terms. These terms are used to distinguish one component from another component. Therefore, without departing from the scope disclosed herein, a first component can represent a second component.

[0045] Spatially relative terms such as "below", "above" etc. may be used for descriptive purposes to describe the relationship between an element or feature and another (or some) element or feature as shown in the drawings. In addition to the directions depicted in the drawings, spatially relative terms are intended to include other directions in use, operation and / or manufacture. For example, when the device shown in the figure is turned upside down, the element depicted as being positioned "below" other elements or features is positioned in the direction "above" other elements or features. Therefore, in the present disclosure, the term "below" may include both upper and lower directions. In addition, the device may face other directions (e.g., rotated 90 degrees or in other directions), and therefore, the spatially relative terms used in this article are interpreted according to them.

[0046] Various embodiments are described with reference to the accompanying drawings which schematically illustrate ideal embodiments. Therefore, it will be expected that the shapes may vary depending on, for example, tolerances and / or manufacturing techniques. Therefore, the embodiments disclosed herein should not be construed as limited to the specific shapes shown, and should be construed to include variations in shape that occur, for example, due to manufacturing. As described above, the shapes shown in the accompanying drawings may not represent the actual shapes of areas of the device, and the embodiments presented are not limited thereto.

[0047] Figure 1 is a plan view showing a display device according to some embodiments.

[0048] refer to Figure 1 , the display device 10 may be configured to output light information. For example, the display device 10 may be a device that shows a moving image or a still image. The display device 10 may be used as a display screen for various products such as a television, a laptop computer, a monitor, a billboard, or an Internet of Things (IOT) device, and a portable electronic device such as a mobile phone, a smart phone, a tablet personal computer, a smart watch, a watch phone, a mobile communication terminal, an electronic notebook computer, an electronic book, a portable multimedia player (PMP), a navigator, or an ultra mobile PC (UMPC). However, the application field of the display device 10 is not limited to a specific example.

[0049] The display device 10 may be formed of a rectangular flat plate having long sides in a first direction DR1 and short sides in a second direction DR2 intersecting the first direction DR1. The corner portion where the long side of the first direction DR1 and the short side of the second direction DR2 intersect may be formed to be rounded to have a curvature (e.g., a set or predetermined curvature), or to be formed at a right angle. The planar shape of the display device 10 is not limited to a quadrilateral, and may be formed in a polygonal, circular, or elliptical shape. The display device 10 may be formed to be flat, but is not limited thereto. For example, the display device 10 may include a curved portion formed at the left and right ends and having a constant curvature or a varying curvature. In addition, the display device 10 may be formed to be flexible so as to be bent, folded, or curled.

[0050] The display device 10 may include an active area AA and a peripheral area PA. The display device 10 may include a peripheral cover area PFA. The display device 10 may include a pad area PDA.

[0051] The active area AA may be an area where pixels PX are located. The active area AA may be a display area. The active area AA may be an area where light emitting elements LE are located (refer to Figure 3 For example, when viewed on a plane, the active area AA may overlap with the pixel PX (or the light emitting element LE).

[0052] The peripheral area PA may include an area other than the active area AA. The peripheral area PA may be an area in which no pixel PX is located. Wiring and pads PAD electrically connected to the pixel PX may be located in the peripheral area PA. The peripheral area PA may be a non-display area. The peripheral area PA may include a pad area PDA in which the pads PAD are located.

[0053] The display device 10 may include a pad PAD located in the pad area PDA. The pad PAD may be located at one side of the active area AA. However, the present disclosure is not particularly limited.

[0054] The peripheral coverage area PFA may include a portion of the peripheral area PA. The peripheral coverage area PFA may be formed on the periphery of the display device 10. The peripheral coverage area PFA may have a width equal to the coverage length L from the edge of the display device 10. The peripheral coverage area PFA may overlap with the pad area PDA. According to some embodiments, the coverage length L may be 800 μm or less. For example, the coverage length L may be 100 μm or greater and 800 μm or less. In another example, the coverage length L may be 500 μm or less. However, the present disclosure is not necessarily limited to this.

[0055] The peripheral coverage area PFA may include a portion of the active area AA. For example, when viewed on a plane, the peripheral coverage area PFA may overlap with the pixel PX. When viewed on a plane, the peripheral coverage area PFA may overlap with the light emitting element LE.

[0056] The peripheral cover area PFA may be formed along the edge of the display device 10. The peripheral cover area PFA may overlap the outermost edge of the display device 10.

[0057] The peripheral covering area PFA may be positioned with a second outer protective layer OPVX2 covering the entire peripheral area PA (see Figure 5 ) area. Further details related thereto will be described later.

[0058] The display device 10 may further include pixels PX, scan lines extending in the first direction DR1, and data lines extending in the second direction DR2 to display an image. The pixels PX may be arranged in a matrix in the first direction DR1 and the second direction DR2.

[0059] Figure 2 It is shown Figure 1 A plan view of one of the pixels.

[0060] refer to Figure 2 , the pixel PX may include a plurality of sub-pixels SPX1 , SPX2 , and SPX3 . Figure 2A case in which the pixel PX includes three sub-pixels SPX1 , SPX2 , and SPX3 , ie, a first sub-pixel SPX1 , a second sub-pixel SPX2 , and a third sub-pixel SPX3 , is illustrated as an example, but embodiments of the present disclosure are not limited thereto.

[0061] The first subpixel SPX1 , the second subpixel SPX2 , and the third subpixel SPX3 may be connected to one data line among the data lines and at least one scan line among the scan lines.

[0062] Each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may have a rectangular, square, or diamond planar shape. Figure 2 As shown, each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may have a rectangular planar shape having a short side in the first direction DR1 and a long side in the second direction DR2. Alternatively, according to some embodiments, each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may have a square or diamond planar shape including sides having the same length in the first direction DR1 and the second direction DR2.

[0063] The first, second and third subpixels SPX1, SPX2 and SPX3 may be arranged in the first direction DR1. Alternatively, one of the second and third subpixels SPX2 and SPX3 may be arranged in the first direction DR1 with the first subpixel SPX1 and the other may be arranged in the second direction DR2 with the first subpixel SPX1.

[0064] Alternatively, one of the first subpixel SPX1 and the third subpixel SPX3 may be arranged in the first direction DR1 with the second subpixel SPX2, and the other may be arranged in the second direction DR2 with the second subpixel SPX2. Alternatively, one of the first subpixel SPX1 and the second subpixel SPX2 may be arranged in the first direction DR1 with the third subpixel SPX3, and the other may be arranged in the second direction DR2 with the third subpixel SPX3.

[0065] The first subpixel SPX1 may emit a first light, the second subpixel SPX2 may emit a second light, and the third subpixel SPX3 may emit a third light. Here, the first light may be light in a red wavelength band, the second light may be light in a green wavelength band, and the third light may be light in a blue wavelength band. The red wavelength band may be a wavelength band of about 600nm to 750nm, the green wavelength band may be a wavelength band of about 480nm to 560nm, and the blue wavelength band may be a wavelength band of about 370nm to 460nm, but embodiments of the present disclosure are not limited thereto.

[0066] Each of the first subpixel SPX1 , the second subpixel SPX2 , and the third subpixel SPX3 may include a light emitting element LE configured to emit light.

[0067] The light emitting element LE may be provided in various forms. For example, the light emitting element LE may be an inorganic light emitting element including an inorganic material. According to some embodiments, the light emitting element LE may be an organic light emitting diode (OLED). However, the present disclosure is not limited to a specific example. Hereinafter, for ease of description, an embodiment in which the light emitting element LE is an inorganic light emitting element including an inorganic semiconductor and is a flip-chip micro LED (light emitting diode) will be described as an example.

[0068] like Figure 2 As shown, the area of ​​the first sub-pixel SPX1, the area of ​​the second sub-pixel SPX2, and the area of ​​the third sub-pixel SPX3 may be substantially the same, but the embodiments of the present disclosure are not limited thereto. At least one of the area of ​​the first sub-pixel SPX1, the area of ​​the second sub-pixel SPX2, and the area of ​​the third sub-pixel SPX3 may be different from the other. Alternatively, two of the area of ​​the first sub-pixel SPX1, the area of ​​the second sub-pixel SPX2, and the area of ​​the third sub-pixel SPX3 may be substantially the same, and the other may be different from the two. Alternatively, the area of ​​the first sub-pixel SPX1, the area of ​​the second sub-pixel SPX2, and the area of ​​the third sub-pixel SPX3 may be different from each other.

[0069] Figure 3 is a diagram showing a method of performing a Figure 2 A cross-sectional view of an example of a cross-section of a pixel taken along line CC'. Figure 3 It can be shown schematically Figure 1 1 is a cross-sectional structure of the display device 10 in the active area AA.

[0070] refer to Figure 3 , the display device 10 may include a base layer BSL, a back panel structure BP and a light emitting element layer EML.

[0071] The base layer BSL may be a base substrate or a base member for supporting the display device 10. The base layer BSL may be a rigid substrate made of glass. Alternatively, the base layer BSL may be a flexible substrate that can be bent, folded, or curled. In this case, the substrate may include an insulating material such as a polymer resin (eg, polyimide).

[0072] The backplane structure BP may include a substrate, metal layers for forming pixel circuits and wirings, and insulating layers between the metal layers.

[0073] The back plate structure BP may include a first back plate structure BP1 including a pixel circuit for driving the light emitting element LE and a second back plate structure BP2 including a wiring electrically connected to the driving circuit unit FPCB.

[0074] The pixel circuit may include a thin film transistor. The pixel circuit may further include a storage capacitor. The pixel circuit may be electrically connected to the light emitting element LE to provide an electrical signal so that the light emitting element LE emits light.

[0075] The first backplane structure BP1 may be located between the base layer BSL and the light emitting element layer EML. The second backplane structure BP2 may be located on the rear surface of the base layer BSL. According to some embodiments, the wiring formed on the second backplane structure BP2 may electrically connect the driving circuit unit FPCB and the pad PAD. For example, the second backplane structure BP2 may include wiring for electrically connecting the driving circuit unit FPCB and the pad PAD.

[0076] The light emitting element layer EML may be located on the backplane structure BP (e.g., the first backplane structure BP1). The light emitting element layer EML may include a pixel electrode PXE, a common electrode CE, and a light emitting element LE. Each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may include a light emitting element LE connected to the pixel electrode PXE and the common electrode CE. According to some embodiments, the light emitting element LE may include a first light emitting element LE1, a second light emitting element LE2, and a third light emitting element LE3, the first light emitting element LE1 being configured to emit light of a first color and being included in the first sub-pixel SPX1, the second light emitting element LE2 being configured to emit light of a second color and being included in the second sub-pixel SPX2, and the third light emitting element LE3 being configured to emit light of a third color and being included in the third sub-pixel SPX3. The pixel electrode PXE may be referred to as an anode electrode, and the common electrode CE may be referred to as a cathode electrode.

[0077] The pixel electrode PXE and the common electrode CE may be located on the backplane structure BP. Each of the pixel electrodes PXE may be electrically connected to the thin film transistor of the backplane structure BP. Therefore, a pixel voltage or an anode voltage controlled by the thin film transistor may be applied to the pixel electrode PXE.

[0078] Each of the common electrodes CE may be electrically connected to a power line formed on the back plate structure BP. Therefore, one power voltage of the power line may be applied to the common electrodes CE.

[0079] The pixel electrode PXE and the common electrode CE may include a metal material having high reflectivity, such as a laminated structure of aluminum and titanium (Ti / Al / Ti), a laminated structure of aluminum and ITO (ITO / Al / ITO), an APC alloy, and a laminated structure of an APC alloy and ITO (ITO / APC / ITO). The APC alloy may be an alloy of silver (Ag), palladium (Pd), and copper (Cu).

[0080] exist Figure 3 , an embodiment in which each of the light emitting elements LE is a flip chip type micro LED is shown as an example, in which the first contact electrode CTE1 and the second contact electrode CTE2 are arranged to face the pixel electrode PXE and the common electrode CE. However, the shape of the light emitting element LE is not necessarily limited thereto.

[0081] The light emitting element LE may include an inorganic material such as GaN. The light emitting element LE may have a length of several micrometers to hundreds of micrometers in each of the first direction DR1, the second direction DR2, and the third direction DR3. For example, the light emitting element LE may have a length of about 100 μm or less in each of the first direction DR1, the second direction DR2, and the third direction DR3.

[0082] Each of the light emitting elements LE may be a light emitting structure including an n-type semiconductor NSEM, an active layer MQW, a p-type semiconductor PSEM, a first contact electrode CTE1, and a second contact electrode CTE2.

[0083] A portion of the n-type semiconductor NSEM may be located on the active layer MQW. A portion of the n-type semiconductor NSEM may be located on the second contact electrode CTE2. According to some embodiments, one surface of the n-type semiconductor NSEM may face the display surface. The n-type semiconductor NSEM may be made of GaN doped with an n-type conductive dopant such as Si, Ge, Se, or Sn. However, the present disclosure is not necessarily limited thereto.

[0084] The active layer MQW may be located on a portion of one surface of the n-type semiconductor NSEM. The active layer MQW may be interposed between the n-type semiconductor NSEM and the p-type semiconductor PSEM. The active layer MQW may include a material having a single quantum well structure or a multiple quantum well structure. When the active layer MQW includes a material having a multiple quantum well structure, it may have a structure in which a plurality of well layers and barrier layers are alternately stacked. In this case, the well layer may be formed of InGaN, and the barrier layer may be formed of GaN or AlGaN, but the present disclosure is not limited thereto. Alternatively, the active layer MQW may have a structure in which a semiconductor material having a high energy band gap and a semiconductor material having a low energy band gap are alternately stacked. Alternatively, the active layer MQW may include a Group III to Group V semiconductor material, depending on the wavelength range of the emitted light.

[0085] The p-type semiconductor PSEM may be located on one surface of the active layer MQW. The p-type semiconductor PSEM may be made of GaN doped with a p-type conductive dopant such as Mg, Zn, Ca, or Ba. However, the present disclosure is not necessarily limited thereto.

[0086] The first contact electrode CTE1 may be located on the p-type semiconductor PSEM, and the second contact electrode CTE2 may be located on another portion of one surface of the n-type semiconductor NSEM. Another portion of one surface of the n-type semiconductor NSEM on which the second contact electrode CTE2 is located may be arranged to be spaced apart from a portion of one surface of the n-type semiconductor NSEM on which the active layer MQW is located.

[0087] The first contact electrode CTE1 and the pixel electrode PXE may be adhered to each other by a conductive adhesive member such as an anisotropic conductive film (ACF) or an anisotropic conductive paste (ACP). Alternatively, the first contact electrode CTE1 and the pixel electrode PXE may be bonded to each other by a welding process.

[0088] Meanwhile, a bank BNK covering edges of the pixel electrode PXE and the common electrode CE may be located on the backplane structure BP. The bank BNK may be formed of an organic layer such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0089] The insulating layer INS may be located on the bank BNK. The insulating layer INS may cover the edge of the pixel electrode PXE and the edge of the common electrode CE. The insulating layer INS may be formed of an inorganic layer such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0090] Figure 4 It is shown Figure 3 An example cross-sectional view of a portion of a first backplane layer.

[0091] refer to Figure 4 , the first backplane structure BP1 may be located on the base layer BSL, and may include a first backplane layer LBPL and an outer structure located on the first backplane layer LBPL.

[0092] The first back-plate layer LBPL may include a conductive layer and an insulating layer between an outer structure of the first back-plate structure BP1 and the base layer BSL.

[0093] The first backplane layer LBPL may have a shape that remains after at least a portion of a structure in which a lower auxiliary electrode layer BML, a buffer layer BFL, an active layer ACT, a first gate insulating layer GI1, a first gate electrode layer GAT1, a second gate insulating layer GI2, a second gate electrode layer GAT2, an interlayer insulating layer ILD, a first interlayer conductive layer SD1, a first via layer VIA1, a first protective layer PVX1, a second interlayer conductive layer SD2, a second via layer VIA2, a second protective layer PVX2, a third interlayer conductive layer SD3, a third via layer VIA3, and a third protective layer PVX3 are sequentially stacked is patterned.

[0094] For example, the electrode layer may be patterned into a single structure to form a pixel circuit. For example, a portion of the active layer ACT, a portion of the first gate electrode layer GAT1, and a portion of the first interlayer conductive layer SD1 may form a driving transistor.

[0095] According to some embodiments, the buffer layer BFL, the first gate insulating layer GI1, the second gate insulating layer GI2, the interlayer insulating layer ILD, and the first to third protective layers PVX1 to PVX3 may include inorganic materials. According to some embodiments, each of the first to third protective layers PVX1 to PVX3 may form a hole exposing a via layer located thereunder. For example, the first protective layer PVX1 may form a hole exposing the first via layer VIA1, the second protective layer PVX2 may form a hole exposing the second via layer VIA2, and the third protective layer PVX3 may form a hole exposing the third via layer VIA3. For example, each of the holes may form an exhaust path for discharging gas in the backplane structure BP during a manufacturing process.

[0096] According to some embodiments, the active layer ACT may include a semiconductor. For example, the active layer ACT may include at least one selected from the group consisting of polysilicon, low temperature polysilicon (LTPS), amorphous silicon, and an oxide semiconductor.

[0097] According to some embodiments, the first to third via layers VIA1 to VIA3 may include an organic material.

[0098] According to some embodiments, the lower auxiliary electrode layer BML, the first and second gate electrode layers GAT1 and GAT2 , and the first to third interlayer conductive layers SD1 to SD3 may include a conductive material.

[0099] The number and material of the conductive layer and the insulating layer forming the first back plate layer LBPL are not particularly limited to the above examples, and the number and material of the conductive layer and the insulating layer may be variously changed.

[0100] The external structure positioned on the first backplane layer LBPL may include a fourth interlayer conductive layer SD4 and a connecting conductive layer CL.

[0101] According to some embodiments, the fourth interlayer conductive layer SD4 and the connection conductive layer CL may include a conductive material. According to some embodiments, the connection conductive layer CL may include a transparent electrode (eg, indium tin oxide (ITO)), but the present disclosure is not limited thereto.

[0102] The fourth via layer VIA4 may be located on the third protective layer PVX3. The fourth via layer VIA4 may include an organic material. The fourth via layer VIA4 may be configured to connect the reference Figure 5 The external via layer OVIA described. Thus, the first backplane structure BP1 may include the external via layer OVIA located on the first backplane layer LBPL. The external via layer OVIA may cover the components below the external via layer OVIA.

[0103] The fourth protective layer PVX4 may be located on the fourth via layer VIA4. The fourth protective layer PVX4 may cover the fourth via layer VIA4. The fourth protective layer PVX4 may expose a portion of the connecting conductive layer CL while partially covering the connecting conductive layer CL. The fourth protective layer PVX4 may include an inorganic material. The fourth protective layer PVX4 may be provided as Figure 5 External protective layer OPVX.

[0104] According to some embodiments, the organic material may include at least one selected from the group consisting of acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, polyester resin, polyphenylene sulfide resin, and benzocyclobutene. However, the present disclosure is not limited thereto.

[0105] According to some embodiments, the inorganic material may include a material selected from silicon nitride (SiN x ), aluminum nitride (AlN x ), titanium nitride (TiN x ), silicon oxide (SiO x ), aluminum oxide (AlO x ), titanium oxide (TiO x ), Silicon Oxycarbide (SiO x C y ) and silicon oxynitride (SiO x N y ) is at least one of the group consisting of. However, the present disclosure is not limited thereto.

[0106] Figure 5 It is along Figure 1 A cross-sectional view taken along line AA'. Figure 5 An area adjacent to an edge of the display device 10 is schematically shown. Figure 5 The base layer BSL and the back plane structure BP are shown, but the light emitting element layer EML is not shown for convenience of description.

[0107] refer to Figure 5 , a first backplane structure BP1 including a first backplane layer LBPL may be formed on one surface of the base layer BSL, and a second backplane structure BP2 including a second backplane layer DBPL may be formed on the other surface of the base layer BSL.

[0108] The external via layer OVIA may be located on the first backplane layer LBPL. The external protection layer OPVX may be located on the external via layer OVIA.

[0109] The external via layer OVIA may be arranged throughout the peripheral area PA and the active area AA. For example, when viewed on a plane defined in the first direction DR1 and the second direction DR2, the external via layer OVIA may overlap the peripheral area PA. When viewed on a plane, the external via layer OVIA may overlap the active area AA.

[0110] The external via layer OVIA may include an organic material, and a gas generated within the first back plate structure BP1 may pass through the external via layer OVIA.

[0111] The external via layer OVIA may be exposed through the hole BH. For example, in a region corresponding to the hole BH, the external via layer OVIA may not be covered by the external protection layer OPVX. According to some embodiments, the hole BH may be an exhaust path through which gas is exhausted.

[0112] The external protection layer OPVX may be located on the external via layer OVIA. The external protection layer OPVX may include a first external protection layer OPVX1 and a second external protection layer OPVX2.

[0113] The first outer protective layer OPVX1 and the second outer protective layer OPVX2 may be spaced apart from each other. For example, a separation line SL that separates the positions of the first outer protective layer OPVX1 and the second outer protective layer OPVX2 may overlap the active area AA.

[0114] The first external protective layer OPVX1 may be located in the active area AA. The first external protective layer OPVX1 may not be located in the peripheral area PA. The first external protective layer OPVX1 may expose the external via layer OVIA in the active area AA. For example, the first external protective layer OPVX1 may form a hole BH. The first external protective layer OPVX1 may expose the external via layer OVIA through the hole BH in the active area AA.

[0115] The hole BH may include a plurality of holes. The hole BH may have one or more shapes selected from the group consisting of a circular shape, an elliptical shape, and a polygonal shape. The shape and arrangement structure of the hole BH are not particularly limited.

[0116] At least a portion of the second external protective layer OPVX2 may be located in the peripheral area PA, and at least another portion of the second external protective layer OPVX2 may be located in the active area AA. For example, when viewed on a plane, the second external protective layer OPVX2 may overlap with the peripheral area PA. When viewed on a plane, the second external protective layer OPVX2 may overlap with the active area AA. The second external protective layer OPVX2 may include a main body portion located in the peripheral area PA and an extension portion extending from the main body portion and located in the active area AA. According to some embodiments, the extension portion of the second external protective layer OPVX2 may be spaced apart from the first external protective layer OPVX1, and the hole BH is inserted between them.

[0117] The lower via layer DVIA may be located on the second backplane layer DBPL. The lower protection layer DPVX may be located on the lower via layer DVIA. In some embodiments, the lower via layer DVIA may be formed of substantially the same material as the outer via layer OVIA, and the lower protection layer DPVX may be formed of substantially the same material as the outer protection layer OPVX.

[0118] The lower via layer DVIA may be positioned to extend over the peripheral area PA and the active area AA. For example, when viewed on a plane defined in the first direction DR1 and the second direction DR2, the lower via layer DVIA may overlap the peripheral area PA. When viewed on a plane defined by the first direction DR1 and the second direction DR2, the lower via layer DVIA may overlap the active area AA. The lower via layer DVIA may include an organic material, and a gas generated within the second backplane structure BP2 may pass through the lower via layer DVIA.

[0119] The lower via layer DVIA may be exposed through the hole BH of the lower protection layer DPVX. According to some embodiments, the hole BH may be, for example, an exhaust path through which a gas generated during a manufacturing process is exhausted.

[0120] The lower protection layer DPVX may be located on the lower via layer DVIA. The lower protection layer DPVX may include a first lower protection layer DPVX1 and a second lower protection layer DPVX2.

[0121] The first lower protective layer DPVX1 and the second lower protective layer DPVX2 may be spaced apart from each other. For example, a separation line SL at a position where the first lower protective layer DPVX1 and the second lower protective layer DPVX2 are separated may overlap the active area AA.

[0122] The first lower protective layer DPVX1 may be located in the active area AA. The first lower protective layer DPVX1 may not be located in the peripheral area PA. The first lower protective layer DPVX1 may expose the lower via layer DVIA in the active area AA. For example, the first lower protective layer DPVX1 may have a hole BH. The first lower protective layer DPVX1 may expose the lower via layer DVIA through the hole BH in the active area AA.

[0123] The holes BH may have one or more shapes selected from the group consisting of a circular shape, an elliptical shape, and a polygonal shape. The shape and arrangement structure of the holes BH are not particularly limited.

[0124] At least a portion of the second lower protective layer DPVX2 may be located in the peripheral area PA, and at least another portion of the second lower protective layer DPVX2 may be located in the active area AA. For example, when viewed on a plane, the second lower protective layer DPVX2 may overlap with the peripheral area PA. When viewed on a plane, the second lower protective layer DPVX2 may further overlap with the active area AA. The second lower protective layer DPVX2 may include a main body portion located in the peripheral area PA and an extension portion extending from the main body portion and located in the active area AA. According to some embodiments, the extension portion of the second lower protective layer DPVX2 may be spaced apart from the first lower protective layer DPVX1, and the hole BH is inserted between them.

[0125] According to some embodiments, the second outer protective layer OPVX2 and the second lower protective layer DPVX2 may completely cover the peripheral area PA. Each of the second outer protective layer OPVX2 and the second lower protective layer DPVX2 may not expose the outer via layer OVIA or the lower via layer DVIA in the peripheral area PA. For example, each of the second outer protective layer OPVX2 and the second lower protective layer DPVX2 may completely cover the outer via layer OVIA or the lower via layer DVIA in the peripheral area PA. Therefore, in the manufacturing process of the display device 10, the residual risk of process residues in the peripheral area PA can be prevented. Details related to this will be referred to later. Fig.10 Give a description.

[0126] Figure 6 It is along Figure 1 A cross-sectional view taken along line BB'. Figure 6 A region adjacent to an edge of the display device 10 may be schematically illustrated. Figure 6 Some structures of the base layer BSL and the back plane structure BP are shown, but the light emitting element layer EML is not shown for convenience of description.

[0127] refer to Figure 6, the first back plate structure BP1 may include a pad PAD and a pad insulating layer PINS.

[0128] The pad PAD may be electrically connected to a wiring (e.g., a data line) of the display device 10. The wiring may be formed by one or more of the conductive layers used to form the first backplane structure BP1. The pad PAD may include one or more layers. The pad PAD may be formed by one or more of the conductive layers used to form the first backplane structure BP1. However, the present disclosure is not limited to a specific example.

[0129] The pad PAD may be located on any layer of the first back plate structure BP1 and may be covered by the pad insulating layer PINS. The pad insulating layer PINS may expose a portion of the pad PAD, and the pad PAD and the first pad connection line PCL1 may be electrically connected to each other at the exposed portion. The first pad connection line PCL1 may be a side wiring.

[0130] A portion of the first pad connection line PCL1 may be located on the rear surface of the base layer BSL and may be formed in the second back plate structure BP2. The first pad connection line PCL1 may be electrically connected to the second pad connection line PCL2 formed in the second back plate structure BP2.

[0131] The second back plate structure BP2 may include a first pad protection layer PPVX1, a pad via layer PVIA, and a second pad protection layer PPVX2. The second back plate structure BP2 may include a second pad connection line PCL2.

[0132] The second pad connection line PCL2 may be located on the first pad protection layer PPVX1 and electrically connect the first pad connection line PCL1 and the driving circuit unit FPCB. For example, a portion of the second pad connection line PCL2 may be electrically connected to the first pad connection line PCL1, and another portion of the second pad connection line PCL2 may be electrically connected to the driving circuit unit FPCB through the conductive adhesive member CAM.

[0133] The first pad protection layer PPVX1 may be located on the rear surface of the base layer BSL and may include an inorganic material. The pad via layer PVIA may be located on the first pad protection layer PPVX1 and may include an organic material. The second pad protection layer PPVX2 may be located on the pad via layer PVIA and may include an inorganic material.

[0134] The conductive adhesive member CAM may be an anisotropic conductive film or an anisotropic conductive paste. The driving circuit unit FPCB may include a flexible circuit board. The driving circuit unit FPCB may include a source driving circuit for supplying a data voltage to the data line.

[0135] Figure 7is a flowchart illustrating a method of manufacturing a display device according to some embodiments of the present invention. Figure 8 It is shown Figure 7 A plan view of a cell in operation S710. Fig. 9 It is along Figure 8 A cross-sectional view taken along line II'. Fig.10 is Figure 7 In operation S720, Figure 8 A cross-sectional view taken along line II'. Fig.11 It is shown Figure 7 A plan view of a cell in operation S720. Figure 8 The line I-I' can correspond to Figure 1 The line A-A'.

[0136] According to some embodiments, the back plate structure BP may be formed on Figure 5 The structure on one surface and / or another surface of the base layer BSL in the display device 10. For example, the backplane structure BP may represent Figure 5 The first back plate structure BP1 and / or the second back plate structure BP2.

[0137] refer to Figure 7 According to some embodiments, a method of manufacturing the display device 10 may include manufacturing unit cells each including a backplane structure (S710), forming an ink layer (S720), separating the unit cells (S730), and removing the ink layer (S740).

[0138] refer to Figure 7 and Figure 8 In operation S710, unit cells CEL may be formed (or defined) on a mother substrate MG. Each of the unit cells CEL may include a back plate structure BP. The mother substrate MG may be a base layer BSL of the back plate structure BP for each unit cell CEL.

[0139] According to some embodiments, the mother substrate MG may include a base layer BSL for forming a cell CEL. The mother substrate MG may be a component for simultaneously manufacturing two or more display devices. According to some embodiments, the mother substrate MG may be separated to form a base layer BSL for each cell CEL. Each of the cell CELs may correspond to Figure 1 For example, Figure 1 A display device can be manufactured by each of the cell CEL.

[0140] The cells CEL may include a first cell C1, a second cell C2, a third cell C3, and a fourth cell C4. The number of the cells CEL is not particularly limited.

[0141] refer to Fig. 9 Joint Figure 7 and Figure 8 , a back plate structure BP may be formed on the base layer BSL. The back plate structure BP may include a patterned conductive layer and an insulating layer. The conductive layer and the insulating layer may be formed by a known patterning process (eg, a photolithography process, etc.) using a mask.

[0142] In this operation, a first backplane layer LBPL may be formed on the base layer BSL, and an external via layer OVIA may be formed on the first backplane layer LBPL. In addition, a first external protective layer OPVX1 and a second external protective layer OPVX2 may be patterned on the external via layer OVIA.

[0143] In this operation, the outer protective layer OPVX may form a hole BH exposing the outer via layer OVIA. In this case, the hole BH may be formed in the inner area IA without being located in the peripheral area PA. Here, the inner area IA may be a region defined as an active area AA when the light emitting element LE is formed in a subsequent process.

[0144] In this operation, the second external protective layer OPVX2 may be patterned from the peripheral area PA to the internal area IA. Thus, a peripheral coverage area PFA may be defined. In this case, the second external protective layer OPVX2 may completely cover the peripheral area PA, and holes BH may not be formed in the peripheral area PA. According to some embodiments, the peripheral area PA may correspond to an edge area of ​​each cell CEL. For example, the peripheral area PA may include an area between the cell CELs, and may be the outermost area of ​​each cell CEL. Holes BH may not be formed in the edge area of ​​each cell CEL. For example, holes BH may not be formed in the area between adjacent cell CELs, and holes BH may not be formed in the outermost area of ​​each cell CEL.

[0145] Next, refer to Figure 7 , Fig.10 and Fig.11 , in operation S720 , an ink layer INK may be formed on the outer via layer OVIA and the outer protection layer OPVX.

[0146] In this operation, the ink layer INK may cover the active area AA and the hole BH. In addition, the ink layer INK may cover a portion of the peripheral area PA. When viewed on a plane, the ink layer INK may overlap the active area AA and the peripheral area PA. When viewed on a plane, the ink layer INK may overlap the peripheral cover area PFA.

[0147] The area where the ink layer INK is located can be defined as an ink area INKA. Fig.11In the embodiment, the ink area INKA may cover each cell CEL and may have an area larger than each cell CEL.

[0148] The ink area INKA may be determined based on the end portion EP of the ink layer INK. The end portion EP of the ink layer INK may be located within the peripheral area PA. In this case, the end portion EP of the ink layer INK may be in contact with the second outer protective layer OPVX2. The end portion EP may represent the outermost portion of the ink layer INK based on the direction from the inner area IA to the peripheral area PA.

[0149] When a hole is formed in the peripheral area PA, the end portion EP of the ink layer INK may be adjacent to the hole formed in the peripheral area PA. In this case, a portion of the ink layer INK may be broken around the end portion EP due to an operational difference in the surface caused by the hole. When a portion of the ink layer INK is broken, the broken portion of the ink layer INK may remain even after the manufacturing process, which may reduce the visibility of the display device 10. On the other hand, according to some embodiments of the present invention, the end portion EP of the ink layer INK may be formed to extend to the peripheral area PA, and the second outer protective layer OPVX2 that completely covers the peripheral area PA may not have a hole BH. Therefore, the ink layer INK may extend to its end portion EP without interruption. Therefore, the visibility of the display device 10 can be improved.

[0150] In this operation, the ink layer INK may not contact the external via layer OVIA in the peripheral area PA. For example, the ink layer INK may be separated from the external via layer OVIA in the peripheral area PA by the second external protection layer OPVX2.

[0151] In this operation, the ink layer INK may contact the external via layer OVIA in the active area AA. For example, the ink layer INK may contact the external via layer OVIA at the hole BH in the active area AA.

[0152] According to some embodiments, the ink layer INK may be a protective layer to protect the internal structure of the cell CEL when the cell CEL is separated in a subsequent process. According to some embodiments, the ink layer INK may include an acrylic material. For example, the ink layer INK may include an acrylic oligomer. However, the present disclosure is not necessarily limited thereto, and the ink layer INK may include various oligomers, etc.

[0153] refer to Figure 7 In operation S730, the cell CEL on the mother substrate MG may be separated to form a separated display panel.

[0154] In this operation, the unit cells CEL on the mother substrate MG may be cut. For example, in this operation, a scribing process may be performed to separate the unit cells CEL. However, the present disclosure is not necessarily limited to the above-described example, and various processes may be applied to cut the unit cells CEL in this operation.

[0155] In this operation, the second outer protective layer OPVX2 formed in the cell CEL may be cut. According to some embodiments, the second outer protective layer OPVX2 may be cut, but the first outer protective layer OPVX1 may not be cut.

[0156] According to some embodiments, the position of the cutting line where the cutting process is performed may be formed in the peripheral area PA between the cells CEL. According to some embodiments, the cutting line on which the cutting process is performed may not overlap the ink layer INK when viewed on a plane.

[0157] In operation S740, the ink layer INK may be removed. The ink layer INK may be removed by various methods.

[0158] The process performed in this operation may be referred to as a lift-off process. In this operation, the ink layer INK may be removed to expose the outer protection layer OPVX, and the outer via layer OVIA may be exposed in the hole BH.

[0159] In some embodiments, after operation S740, a film layer protecting the backplane structure BP may be formed. For example, the film layer may be arranged to cover the outer protective layer OPVX and the outer via layer OVIA. Therefore, the laminated structure including the backplane structure BP manufactured as described above may be safely transferred to a subsequent processing device.

[0160] Fig.12 is a flowchart illustrating a method of manufacturing a display device according to some embodiments of the present invention. Fig.13 It is shown Fig.12 A plan view of a cell in operation S1210. Fig.14 and Fig.15 It is along Fig.13 The sectional view taken along the line II-II' is used to explain Fig.12 Operation S1210 of the manufacturing method. Fig.16 is Fig.12 In operations S1220 and S1230, Fig.13 A cross-sectional view taken along line II-II'. Fig.17 is Fig.12 In operation S1250, Fig.13 A cross-sectional view taken along line II-II'.

[0161] According to some embodiments, the back plate structure BP' may be formed on Figure 5 The structure on one side and / or the other side of the base layer BSL in the display device 10. For example, the backplane structure BP' may represent Figure 5 The first back plate structure BP1 and / or the second back plate structure BP2.

[0162] refer to Fig.12 According to some embodiments, a manufacturing method of the display device 10 may include: manufacturing units each including a backplane structure (S1210), forming a supporting layer in a peripheral area (S1220), forming an ink layer overlapping with an internal area (or an effective area) and contacting the supporting layer (S1230), removing the supporting layer (S1240), separating the units (S1250), and removing the ink layer (S1260).

[0163] Can be similar to Figure 7 Operation S710 is explained Fig.12 Operation S1210.

[0164] refer to Figure 12 to Figure 14 In operation S1210, each of the unit cells CEL may include a back plate structure BP'. The mother substrate MG may be a base layer BSL for the back plate structure BP' of each unit cell CEL.

[0165] The backplane structure BP' may be formed on the base layer BSL. The first backplane layer LBPL may be formed on the base layer BSL, and the external via layer OVIA may be formed on the first backplane layer LBPL. In addition, the first external protective layer OPVX1 and the third external protective layer OPVX3 may be patterned on the external via layer OVIA.

[0166] refer to Fig.14 and Fig.15 , in which the external protective layer OPVX' may form a hole BH exposing the external via layer OVIA. For example, light from the exposure device EM may be irradiated to the external protective layer OPVX'. In this case, the light may pass through the full-tone mask FTM and irradiate a portion of the external protective layer OPVX' corresponding to the first external protective layer OPVX1. Therefore, the hole BH exposing the external via layer OVIA may be formed in a specific area of ​​the first external protective layer OPVX1. In this case, the hole BH may be formed in the internal area IA without being located in the peripheral area PA. Here, the internal area IA may be an area defined as an effective area AA when the light emitting element LE is formed in a subsequent process.

[0167] In addition, the external protective layer OPVX' may form a groove TR that does not expose the external via layer OVIA. For example, light from the exposure device EM may pass through the halftone mask HTM and irradiate the portion of the external protective layer OPVX' corresponding to the third external protective layer OPVX3. In this case, the intensity of the light irradiated to the portion of the external protective layer OPVX' corresponding to the third external protective layer OPVX3 may be adjusted by the halftone mask HTM. Therefore, the intensity of the light irradiated to the portion of the external protective layer OPVX' corresponding to the third external protective layer OPVX3 may be relatively weaker than the intensity of the light irradiated to the portion of the external protective layer OPVX' corresponding to the first external protective layer OPVX1. Therefore, a groove TR that does not expose the external via layer OVIA may be formed in a specific area of ​​the third external protective layer OPVX3. In this case, the groove TR may be formed in the peripheral area PA. The groove TR may be formed in the peripheral cover area PFA.

[0168] like Fig.15 As shown, the trench TR may have an inverted trapezoidal shape in cross section, but the present disclosure is not limited thereto.

[0169] Similar to Fig. 9 The outer protective layer OPVX of the outer protective layer OPVX' may include an inorganic material. For example, the third outer protective layer OPVX3 may include an inorganic material, such as silicon nitride (SiN x ). The external via layer OVIA may include the organic material as described above.

[0170] refer to Fig.12 and Fig.16 In operation S1220, a support layer DAM may be formed on the back plate structure BP'.

[0171] The supporting layer DAM may cover the peripheral area PA, and may cover the trench TR. In addition, the supporting layer DAM may cover the peripheral cover area PFA. When viewed on a plane, the supporting layer DAM may overlap the peripheral area PA and the peripheral cover area PFA.

[0172] In some embodiments, the supporting layer DAM may have a dam shape. For example, the supporting layer DAM may extend in the first direction DR1 and the second direction DR2 along the edge of each cell CEL to surround the corresponding cell.

[0173] According to some embodiments, the area where the support layer DAM is positioned can be defined as the support area DAMA. For example, the support area DAMA can be determined based on the end portion DEP of the support layer DAM. For example, the support area DAMA can be defined as the area from the first end DEP1 located on one side of the support layer DAM to the second end DEP2 located on the other side. The end portion DEP of the support layer DAM can be located in the peripheral area PA. The end portion DEP of the support layer DAM can be located in the peripheral coverage area PFA. Therefore, the support area DAMA can be located in the peripheral coverage area PFA.

[0174] In this operation, the support layer DAM can be preliminarily cured. For example, UV curing can be achieved by irradiating ultraviolet (UV) rays to the support layer DAM. When the ultraviolet rays are irradiated to the support layer DAM, the bonding between the molecules constituting the support layer DAM can be promoted, and thus the support layer DAM can be cured.

[0175] In this operation, the support layer DAM may contact the third outer protection layer OPVX3 in the peripheral area PA. For example, the protrusion PR of the support layer DAM may contact the third outer protection layer OPVX3 through the trench TR. The support layer DAM may not contact the outer via layer OVIA.

[0176] refer to Fig.12 and Fig.16 , when forming the ink layer overlapping the inner region and contacting the support layer (S1230), the ink layer INK' may be formed on the back plate structure BP'.

[0177] The ink layer INK' may cover the active area AA and the hole BH. In addition, the ink layer INK' may cover a portion of the peripheral area PA. When viewed on a plane, the ink layer INK' may overlap the active area AA and the peripheral area PA. When viewed on a plane, the ink layer INK' may overlap the peripheral cover area PFA.

[0178] The ink layer INK' and the support layer DAM can be made of Fig.10 The ink layer INK' and the support layer DAM may be made of the same material. For example, the ink layer INK' and the support layer DAM may include an acrylic material such as an acrylic oligomer.

[0179] In this operation, the ink layer INK' can be cured. For example, UV curing can be achieved by irradiating ultraviolet (UV) rays to the ink layer INK'. In addition, the supporting layer DAM can be cured twice. Therefore, the supporting layer DAM can undergo two curing processes, and the hardness of the supporting layer DAM and the ink layer INK' can be different. This difference in hardness can allow the supporting layer DAM to be easily removed. Details related to this will be described later.

[0180] In this operation, the ink layer INK' may contact the support layer DAM in the peripheral area PA. For example, the ink layer INK' may contact the first end DEP1 in the peripheral area PA. Therefore, the ink layer INK' may completely cover the active area AA and protect the backplane structure BP' included in the active area AA in subsequent processes.

[0181] The ink layer INK' may be supported by the supporting layer DAM. For example, before the ink layer INK' is solidified, the ink layer INK' may flow in the first direction DR1 and / or in the direction opposite to the first direction DR1 in the active area AA due to its fluidity. In this case, the ink layer INK' may be in contact with the supporting layer DAM. For example, the ink layer INK' may be in contact with the first end DEP1 of the supporting layer DAM. Therefore, the ink layer INK' may no longer flow and may be supported by the supporting layer DAM in the first direction DR1.

[0182] In this way, the fluidity of the ink layer INK' can be controlled by providing the support layer DAM, and thus the height of the ink layer INK' can be controlled to be relatively uniform. Fig.10 Compared with the ink layer INK of the support layer DAM, the difference between the highest height IHH and the lowest height ILH of the ink layer INK' may not be large. The highest height IHH may be the length from the upper surface of the external protection layer OPVX' to the most protruding part of the ink layer INK' in the third direction DR3. The lowest height ILH may be the length from the upper surface of the external protection layer OPVX' to the outermost part of the ink layer INK' in the third direction DR3 among the parts where the ink layer INK' contacts the first end DEP1 of the support layer DAM.

[0183] Meanwhile, the fluidity of the supporting layer DAM and the fluidity of the ink layer INK' may be different from each other. For example, the supporting layer DAM and the ink layer INK' may have different degrees of fluidity on a plane. For example, the supporting layer DAM and the ink layer INK' may include an acrylic oligomer, and the fluidity when the supporting layer DAM and the ink layer INK' are in contact with an inorganic material may be lower than the fluidity when the supporting layer DAM and the ink layer INK' are in contact with an organic material. Therefore, the fluidity when the supporting layer DAM is in contact with the third external protective layer OPVX3 may be lower than the fluidity when the ink layer INK' is in contact with the external via layer OVIA.

[0184] Due to the groove TR structure, the support layer DAM may have a relatively lower fluidity than the ink layer INK', and the support layer DAM may flow in a relatively small amount over the outer protective layer OPVX'. For example, when the groove is not formed, the support layer DAM may flow in a relatively large amount over the plane due to the fluidity of the support layer DAM. Therefore, the highest height of the support layer DAM may be lower than the highest height of the ink layer INK'. Therefore, there may be a risk that the support layer DAM cannot stably support the ink layer INK'.

[0185] According to some embodiments of the present invention, the fluidity of the supporting layer DAM can be controlled by including a plurality of slits in the groove TR. The groove TR can have a partition wall that is recessed in a direction opposite to the third direction DR3. The flow of the supporting layer DAM in the first direction DR1 and / or the second direction DR2 can be blocked by the partition wall. Therefore, the fluidity of the supporting layer DAM can be controlled so that the highest height DH of the supporting layer DAM can be higher than the highest height IHH of the ink layer INK'. Finally, the fluidity of the supporting layer DAM can be controlled, and the supporting layer DAM can stably support the ink layer INK'.

[0186] Fig.16 An embodiment in which three grooves TR are provided is shown. However, the embodiment is not limited thereto. The number of grooves TR may be varied within a range capable of controlling the fluidity of the support layer DAM.

[0187] In addition, the area where the ink layer INK' is located can be defined as an ink area INKA'. The ink area INKA' can be determined by the supporting layer DAM. For example, the ink area INKA' can be determined based on the position of the end portion DEP of the supporting layer DAM. For example, the ink area INKA' can be determined based on the position of the first end DEP1 where the supporting layer DAM is located in the peripheral area PA.

[0188] refer to Fig.12 and Fig.17 In operation S1240, the support layer DAM may be removed. For example, the ink layer INK' may not be removed, but only the support layer DAM may be removed. Figure 7 The ink layer INK in the support layer DAM can be removed.

[0189] The supporting layer DAM can be removed using a peelable tape. For example, the peelable tape can be completely attached to the upper surface of the supporting layer DAM. Thereafter, the peelable tape attached to the supporting layer DAM can be pulled in the third direction DR3. Therefore, the supporting layer DAM can be separated from the outer protective layer OPVX' by the peelable tape.

[0190] For example, the peelable tape can apply tension to the supporting layer DAM in the third direction DR3. In this case, the tension can be applied starting from a portion where the adhesion between the supporting layer DAM and the external protective layer OPVX' is relatively weak. For example, the tension can be applied to a portion adjacent to the end portion DEP of the supporting layer DAM. Therefore, the supporting layer DAM can be separated from the external protective layer OPVX' from the portion adjacent to the end portion DEP of the supporting layer DAM, and can be removed.

[0191] In addition, as described above, the hardness of the support layer DAM and the ink layer INK' may be different from each other, and the adhesion between the support layer DAM and the ink layer INK' may be relatively weak compared to the adhesion between the support layer DAM and the outer protective layer OPVX'. Therefore, the support layer DAM may be removed only from the outer protective layer OPVX'.

[0192] In this operation, the fixing member FX may be positioned on the ink layer INK' to remove only the supporting layer DAM. For example, the fixing member FX may be arranged to overlap the ink layer INK'. In the process of removing the supporting layer DAM, since the supporting layer DAM and the ink layer INK' are in contact with each other, there may be a risk that a portion of the ink layer INK' is removed around the first end DEP1 of the supporting layer DAM.

[0193] In this case, the fixing member FX can fix the ink layer INK' so that the ink layer INK' is not separated from the outer protective layer OPVX'. For example, the fixing member FX located on the ink layer INK' can apply a force to the ink layer INK' in a direction opposite to the third direction DR3. According to some embodiments of the present invention, only the support layer DAM can be stably removed.

[0194] The shape and position of the fixing member FX are not limited to the present disclosure as long as it can fix the ink layer INK′. After operation S1240 is completed, the fixing member FX may be removed from the ink layer INK′.

[0195] In operation S1250, the unit cells CEL on the mother substrate MG may be separated to form separate panels. Figure 7 Operation S730 is explained Fig.12 Operation S1250.

[0196] In this operation, the third outer protective layer OPVX3 formed in the cell CEL may be cut. According to some embodiments, the third outer protective layer OPVX3 may be cut, but the first outer protective layer OPVX1 may not be cut.

[0197] According to some embodiments, the cutting line on which the cutting process is performed may be positioned in the peripheral area PA between the cells CEL. For example, the position of the cutting line may be located at Fig.16 When viewed on a plane, a cutting line on which a cutting process is performed may not overlap with the ink layer INK'. Therefore, the ink layer INK' may protect the internal structure of the cell CEL from being cut.

[0198] In operation S1260, the ink layer INK' may be removed. Figure 7 Operation S740 and Fig.12 Operation S1240 is explained Fig.12 Operation S1260. For example, the ink layer INK' may be Fig.16 The supporting layer DAM is removed by the same method, and the method is not limited to a specific example.

[0199] Fig.18 is Fig.12 After removing the ink layer in operation S1260, Fig.13 A cross-sectional view of the display device taken along line II-II'.

[0200] refer to Fig.18 After operation S1260, a film layer FL protecting the back plate structure BP' may be formed. The film layer FL may cover the outer protection layer OPVX' and the outer via layer OVIA.

[0201] According to some embodiments, the film layer FL may include various materials. For example, the film layer FL may include polyimide.

[0202] According to some embodiments, the film layer FL may be a protective member for encapsulating a laminate structure including the backplane structure BP'. For example, with the film layer FL covering the backplane structure BP', the laminate structure including the backplane structure BP' manufactured as described above may be safely transferred to subsequent processing equipment.

[0203] Thereafter, in the backplane structure BP' manufactured as described above, the film layer FL can be removed, and a light-emitting element layer EML including a light-emitting element LE can be provided on the backplane structure BP'. For example, the light-emitting element LE can be located on the backplane structure BP' to form an effective area AA. As described above, the light-emitting element LE can be located in the internal area IA, and the effective area AA can be defined.

[0204] Fig.19 is a diagram showing that according to some embodiments Fig.13 FIG. 1 is a plan view of an example of a groove in area A1.

[0205] refer to Fig.19, the trench TR may extend along the edge of the active area AA in the peripheral area PA. In some embodiments, the trench TR may include a plurality of slits. For example, the trench TR may include a first slit extending in the first direction DR1, a second slit extending in the second direction DR2, and a third slit connecting the first slit and the second slit and having an "L" shape. As described above, Fig.16 The trench TR may be provided as a trench TR having a slit shape.

[0206] Fig. 20 is a diagram showing that according to some embodiments Fig.13 FIG. 1 is a plan view of an example of a groove in area A1.

[0207] refer to Fig. 20 , a plurality of grooves GR may be arranged along the edge of the active area AA in the peripheral area PA. The groove GR may include a plurality of first grooves arranged in the first direction DR1, a plurality of second grooves arranged in the second direction DR2, and a plurality of third grooves surrounding the edge of the ink layer INK' and having an "L" shape. Fig.16 The trench TR may include a groove GR.

[0208] Fig.21 is a block diagram illustrating an electronic device according to an embodiment of the present invention.

[0209] refer to Fig.21 , the electronic device 1000 may include a processor 1010, a memory device 1020, a storage device 1030, an input / output (I / O) device 1040, a power supply unit 1050, and a display device 1060. In this case, the display device 1060 may be Figure 1 The display device 10. In addition, the electronic device 1000 may further include a plurality of ports for communicating with a video card, a sound card, a memory card, a USB device, or other systems.

[0210] The electronic device 1000 may be implemented as a mobile phone, a video phone, a smart pad, a smart watch, a vehicle navigator, a computer display screen, a laptop computer, a head-mounted display device, and the like.

[0211] The processor 1010 may perform specific calculations or tasks. According to some embodiments, the processor 1010 may be a microprocessor, a central processing unit, an application processor, etc. The processor 1010 may be connected to other parts via an address bus, a control bus, a data bus, etc. According to some embodiments, the processor 1010 may also be connected to an expansion bus, such as a peripheral component interconnect (PCI) bus.

[0212] The memory device 1020 may store data required for the operation of the electronic device 1000. For example, the memory device 1020 may include a nonvolatile memory device (such as an erasable programmable read-only memory (EPROM) device, an electrically erasable programmable read-only memory (EEPROM) device, a flash memory device, a phase change random access memory (PRAM) device, a resistive random access memory (RRAM) device, a nano floating gate memory (NFGM) device, a polymer random access memory (PoRAM) device, a magnetic random access memory (MRAM) device, and a ferroelectric random access memory (FRAM) device), and / or a volatile memory device (such as a dynamic random access memory (DRAM) device, a static random access memory (SRAM) device, and a mobile DRAM device).

[0213] The storage device 1030 may include a solid state drive (SSD), a hard disk drive (HDD), a CD-ROM, or the like.

[0214] The input / output device 1040 may include input devices such as a keyboard, a keypad, a touch pad, a touch screen, and a mouse, and output devices such as a speaker and a printer. According to some embodiments, the display device 1060 may be included in the input / output device 1040.

[0215] The power supply part 1050 may provide power required for the operation of the electronic device 1000. For example, the power supply part 1050 may be a power management integrated circuit (PMIC).

[0216] The display device 1060 may display an image corresponding to the visual information of the electronic device 1000. In this case, the display device 1060 may be an organic light emitting display device or a quantum dot light emitting display device, but the present disclosure is not limited thereto. The display device 1060 may be connected to other components via a bus or other communication links. Figure 1 The display device 10 may be provided as a display device 1060 .

[0217] According to an embodiment of the present invention, a display device that can be manufactured with relatively improved reliability and a method of manufacturing the same are provided.

[0218] The effects according to the embodiments are not limited to the above-mentioned contents, and more various other effects are included in this specification.

[0219] Although specific embodiments and implementations have been described herein, other embodiments and modifications may be derived from the above description. Therefore, the spirit and scope of the embodiments according to the present disclosure are not limited to the aforementioned embodiments, but may also be applied to the claims set forth herein, various obvious modifications and equivalents.

Claims

1. A display device comprising an active area and a peripheral area adjacent to the active area, the display device comprising: Base layer; as well as a backplane structure comprising a backplane layer on the base layer, an external via layer on the backplane layer, and an external protective layer on the external via layer, The external protective layer includes a first external protective layer and a second external protective layer, wherein the first external protective layer has holes in the effective area that expose the external via layer, and the second external protective layer has a plurality of grooves in the peripheral area that are recessed toward the external via layer but do not expose the external via layer.

2. The display device according to claim 1, wherein: The second outer protective layer overlaps the peripheral area and the active area.

3. The display device according to claim 2, wherein: The peripheral area is formed along an edge of the active area.

4. The display device according to claim 1, wherein: Each of the plurality of trenches surrounds at least a portion of the active area.

5. The display device according to claim 4, wherein: The active area extends in a first direction and in a second direction intersecting the first direction, and Each of the plurality of grooves includes a first slit extending in the first direction, a second slit extending in the second direction, and a third slit connecting the first slit and the second slit and having an “L” shape.

6. The display device according to claim 4, wherein: The active area extends in a first direction and in a second direction intersecting the first direction, and Each of the plurality of grooves includes a plurality of first grooves arranged in the first direction and a plurality of second grooves arranged in the second direction intersecting the first direction.

7. The display device according to claim 1, wherein: The backplane structure comprises a first backplane structure, The backplane structure further includes a second backplane structure, which is on the base layer and includes a second backplane layer, a lower via layer on the second backplane layer, and a lower protective layer on the lower via layer. wherein the base layer is between the first backplane structure and the second backplane structure, and The lower protective layer includes a first lower protective layer and a second lower protective layer, wherein the first lower protective layer has a hole exposing the lower via layer in the effective area, and the second lower protective layer includes a groove in the peripheral area that is recessed toward the lower via layer but does not expose the lower via layer.

8. The display device according to claim 7, wherein: The outer protective layer and the lower protective layer include inorganic materials, and Wherein, the outer via layer and the lower via layer include organic materials.

9. A method for manufacturing a display device, the method comprising: manufacturing unit cells each including a backplane structure, each of the unit cells having an active area and a peripheral area adjacent to the active area; forming a support layer on the backplane structure in the peripheral region; forming an ink layer on the backplane structure, overlapping the active area and contacting the support layer; removing the support layer; as well as separating the cells, Wherein, the backplane structure includes an external via layer, and Wherein, manufacturing the cell comprises: forming a first external protection layer on the external via layer in the active region, the first external protection layer having holes exposing the external via layer; and A second outer protective layer is formed on the outer via layer in the peripheral region, and the second outer protective layer has a plurality of grooves that are recessed toward the outer via layer but do not expose the outer via layer.

10. The manufacturing method according to claim 9, wherein: Forming the second outer protective layer comprises: The plurality of grooves are formed using a half-tone mask.

11. The manufacturing method according to claim 9, wherein: The peripheral region is formed along an edge of the active region, and Wherein, the second outer protective layer overlaps with the peripheral area and the active area.

12. The manufacturing method according to claim 11, wherein: The support layer includes a protrusion directly on the second outer protection layer and protruding toward the outer via layer to fill the groove.

13. The manufacturing method according to claim 9, wherein: A height of the ink layer from an upper surface of the first outer protective layer is lower than a height of the support layer from an upper surface of the second outer protective layer.

14. The manufacturing method according to claim 9, wherein: Removing the support layer comprises: The fixing member is arranged to overlap the ink layer so that the ink layer is not separated from the first outer protective layer.

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