Electronic device

Abstract

The present disclosure provides an electronic device, comprising: a substrate including an active region and a peripheral region; a common lead disposed corresponding to the peripheral region of the substrate; the scanning line is arranged on the substrate, and in the peripheral area, the scanning line is electrically connected with a first electrostatic discharge wire through a first electrostatic protection circuit; wherein the common lead is electrically separated from the first electrostatic discharge lead, and a first distance is formed between the common lead and the first electrostatic discharge lead in the overlook direction of the substrate, and the first distance is larger than or equal to 1.5 microns (mu m) and smaller than or equal to 12 millimeters (mm).

Description

Technical Field

[0001] The present disclosure provides an electronic device, and more particularly, an electronic device including an electrostatic discharge wire. Background Art

[0002] As science and technology advance, the technology of electronic devices has gradually matured. However, static electricity will inevitably accumulate in the process of manufacturing electronic devices. If the static electricity cannot be discharged in time, when the accumulated static electricity reaches a certain amount, static electricity discharge will occur, which can easily damage the components in the electronic device and cause the electronic device to deteriorate. In addition, in the process of discharging static electricity, there may be disadvantages such as signal interference that affects the quality of electronics.

[0003] Therefore, there is an urgent need to provide an electronic device to improve the above defects. Summary of the invention

[0004] The present disclosure provides an electronic device, characterized in that it includes: a substrate, including an active area and a peripheral area; a common conductor, arranged corresponding to the peripheral area of ​​the substrate; and a scan line, arranged on the substrate, wherein in the peripheral area, the scan line is electrically connected to a first electrostatic release conductor through a first electrostatic protection circuit; wherein the common conductor is electrically separated from the first electrostatic release conductor, and in the top view direction of the substrate, the common conductor and the first electrostatic release conductor have a first distance, and the first distance is greater than or equal to 1.5 micrometers (μm) and less than or equal to 12 millimeters (mm). BRIEF DESCRIPTION OF THE DRAWINGS

[0005] Figure 1 FIG. 4 is a schematic top view of an electronic device according to an embodiment of the present disclosure.

[0006] Figure 2 and Figure 3 They are Figure 1 A partial enlarged view of .

[0007] Figure 4 FIG. 4 is a schematic top view of an electronic device according to an embodiment of the present disclosure.

[0008] Figure 5 and Figure 6 They are Figure 4 A partial enlarged view of .

[0009] Fig. 7A and Figure 7B They are schematic diagrams of an electrostatic protection circuit according to an embodiment of the present disclosure.

[0010] In the above drawings, the meanings of the reference numerals are as follows:

[0011] 1 Common wire

[0012] 11 Part 1

[0013] 12 Part 2

[0014] 13 Part 3

[0015] 14 Part 4

[0016] 2 scan lines

[0017] 2a, 2b line segments

[0018] 21 First line segment

[0019] 22 Second line segment

[0020] Line segments 21a, 21b, 22a, 22b

[0021] 3 Data Line

[0022] 3a, 3b line segments

[0023] 31 First Data Line

[0024] 32 Second data line

[0025] Line segments 31a, 31b, 32a, 32b

[0026] 4-wire

[0027] 4a, 4b line segments

[0028] AA Active Zone

[0029] B surrounding area

[0030] B1 Zone 1

[0031] B2 Second Zone

[0032] B3 Third Zone

[0033] B4 District 4

[0034] C1, C1' first electrostatic protection circuit

[0035] C2, C2', C2-1, C2-2 second electrostatic protection circuit

[0036] C3, C3' the third electrostatic protection circuit

[0037] C4 fourth electrostatic protection circuit

[0038] C5, C5' fifth electrostatic protection circuit

[0039] CE control terminal

[0040] E1, E3 end

[0041] The other end of E2 and E4

[0042] P pixel unit

[0043] R1, R1' first electrostatic discharge conductor

[0044] R2, R2', R2-1, R2-2 second electrostatic discharge conductor

[0045] R3, R3' third electrostatic discharge conductor

[0046] R4 Fourth electrostatic discharge conductor

[0047] Sub substrate

[0048] D1 First distance

[0049] D2 Second distance

[0050] D3 Third Distance

[0051] W1, W2 width

[0052] W3, W4, W5, W6 width

[0053] X first direction

[0054] Y second direction

[0055] Z direction of view DETAILED DESCRIPTION

[0056] The following is an explanation of the implementation of the present disclosure through specific embodiments, and those skilled in the art can easily understand other advantages and effects of the present disclosure from the contents disclosed in this specification. The present disclosure can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified and changed in various ways for different viewpoints and applications without departing from the spirit of the present disclosure.

[0057] It should be noted that, in this document, unless otherwise specified, "having an element" is not limited to having a single element, but may have one or more elements. In addition, the ordinal numbers used in the specification and claims, such as "first" and "second", to modify the elements of the claims, do not themselves imply or represent any previous ordinal numbers of the claimed elements, nor do they represent the order of one claimed element and another claimed element, or the order of the manufacturing method. The use of these ordinals is only used to make a claimed element with a certain name clearly distinguishable from another claimed element with the same name.

[0058] Certain words are used throughout the specification and the claims that follow to refer to specific components. It will be understood by those skilled in the art that electronic equipment manufacturers may refer to the same components by different names. It is not intended herein to distinguish between components that have the same function but different names. In the following specification and claims, words such as "include", "contain", "have" are open-ended words, and therefore should be interpreted as meaning "contain but not limited to..." Therefore, when the terms "include", "contain" and / or "have" are used in the description of the present disclosure, they specify the presence of corresponding features, regions, steps, operations and / or components, but do not exclude the presence of one or more corresponding features, regions, steps, operations and / or components.

[0059] In the text, the terms "about", "approximately", "actually", and "substantially" generally mean within 10%, within 5%, within 3%, within 2%, within 1%, or within 0.5% of a given value or range. The numbers given here are approximate numbers, that is, in the absence of specific instructions for "about", "approximately", "actually", and "substantially", the meanings of "about", "approximately", "actually", and "substantially" can still be implied. In addition, the terms "range from a first value to a second value" and "range between a first value and a second value" mean that the range includes the first value, the second value, and other values ​​therebetween.

[0060] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those skilled in the art to which this disclosure belongs. It is understood that these terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with the background or context of the relevant technology and the present disclosure, and should not be interpreted in an idealized or overly formal manner unless specifically defined herein.

[0061] In addition, relative terms such as "below" or "bottom" and "above" or "top" may be used in the embodiments to describe the relative relationship of one element of the drawings to another element. It is understood that if the device of the drawings is turned upside down, the element described on the "below" side will become the element on the "above" side. When a corresponding component (such as a film layer or region) is referred to as "on another component", it can be directly on the other component, or there can be other components between the two. On the other hand, when a component is referred to as "directly on another component", there is no component between the two. In addition, when a component is referred to as "on another component", the two have an up-and-down relationship in the top-view direction, and this component can be above or below the other component, and this up-and-down relationship depends on the orientation of the device.

[0062] In the present disclosure, the distance and width can be measured by an optical microscope, and the distance and width can be measured by a cross-sectional image in an electron microscope, but the present disclosure is not limited thereto. In addition, any two values ​​or directions used for comparison may have a certain error. If the first value is equal to the second value, it implies that there may be an error of about 10% between the first value and the second value; if the first direction is perpendicular to the second direction, the angle between the first direction and the second direction may be between 80 degrees and 100 degrees; if the first direction is parallel to the second direction, the angle between the first direction and the second direction may be between 0 degrees and 10 degrees.

[0063] It should be noted that the technical solutions provided in the following different embodiments can be replaced, combined or mixed with each other to form another embodiment without violating the spirit of the present disclosure.

[0064] The electronic device disclosed in the present invention may include, for example, a display device, a sensing device, an antenna device, a touch device, a splicing device or other suitable electronic devices, but is not limited thereto. The display device disclosed in the present invention may be a non-self-luminous display device or a self-luminous display device, such as a liquid crystal display (Liquid Crystal Display), a cholesterol liquid crystal display (Cholesteric Liquid Crystal Display), an electrophoretic display (Electro-Phoretic Display), an organic light emitting diode display (organic light emitting diode Display), and a light emitting diode display (light emitting diode Display), but is not limited thereto. The display device may include a light emitting diode, a light conversion layer or other suitable materials, or a combination thereof, but is not limited thereto. The light emitting diode may include, for example, an organic light emitting diode (OLED), a sub-millimeter light emitting diode (mini LED), a micro light emitting diode (micro LED), or a quantum dot light emitting diode (quantum dot LED, which may include QLED, QDLED), but is not limited thereto. The light conversion layer may include a wavelength conversion material and / or a filter material, and the light conversion layer may include, for example, fluorescence, phosphor, quantum dot (QD), other suitable materials or a combination of the above, but not limited thereto. The sensing device may include, for example, a biosensor, a touch sensor, a fingerprint sensor, other suitable sensors or a combination of the above types of sensors. The antenna device may be, for example, a liquid crystal antenna or other types of antenna types, but not limited thereto. The splicing device may include, for example, a splicing display device or a splicing antenna device, but not limited thereto. The electronic device may include an electronic component, and the electronic component may include a passive component, an active component or a combination of the above, such as a capacitor, a resistor, an inductor, a varactor diode, a variable capacitor, a filter, a diode, a transistor, a sensor, a micro-electromechanical system component (MEMS), a chip, etc., but not limited thereto. It should be noted that the electronic device of the present disclosure may be various combinations of the above devices, but not limited thereto.

[0065] Figure 1 FIG. 4 is a schematic top view of an electronic device according to an embodiment of the present disclosure. Figure 2 and Figure 3 They are Figure 1 A partial enlarged view of .

[0066] In one embodiment of the present disclosure, Figure 1 As shown, the electronic device may include: a substrate Sub, including an active area AA and a peripheral area B, the active area AA is adjacent to the peripheral area B, wherein the peripheral area B may include a first area B1 and a second area B2, the first area B1 and the second area B2 are located on two adjacent sides of the active area AA; a common conductor 1, arranged corresponding to the peripheral area B of the substrate Sub, wherein the common conductor 1 includes a first part 11, arranged in the first area B1; and a scan line 2, arranged on the substrate Sub, wherein in the first area B1 of the peripheral area B, the scan line 2 can be electrically connected to a first electrostatic release conductor R1 through a first electrostatic protection circuit C1; wherein the first part 11 of the common conductor 1 is electrically separated from the first electrostatic release conductor R1.

[0067] In one embodiment of the present disclosure, Figure 1 As shown, the electronic device may further include a data line 3, which is arranged on the substrate Sub, wherein in the second area B2 of the peripheral area B, the data line 3 may be electrically connected to a second electrostatic discharge conductor R2 through a second electrostatic protection circuit C2. The common conductor 1 may further include a second portion 12, which is arranged in the second area B2, wherein the second portion 12 of the common conductor 1 is electrically separated from the second electrostatic discharge conductor R2. Through the above design, the electronic device disclosed in the present invention can reduce component damage caused by electrostatic discharge and improve the reliability of the electronic device.

[0068] In more detail, Figure 1 and Figure 2 As shown, in the first area B1 of the peripheral area B, the scan line 2 may include a line segment 2a and a line segment 2b. The scan line may be electrically connected to the first electrostatic protection circuit C1 through the line segment 2a, and electrically connected to the first electrostatic release wire R1 through the line segment 2b, so that the current is conducted to the first electrostatic release wire R1 through the first electrostatic protection circuit C1, thereby achieving the effect of electrostatic discharge, and reducing the damage to the components in the active area AA caused by electrostatic discharge. Similarly, Figure 1 and Figure 3 As shown, in the second area B2 of the peripheral area B, the data line 3 may include a line segment 3a and a line segment 3b. The data line 3 may be electrically connected to the second electrostatic protection circuit C2 through the line segment 3a, and electrically connected to the second electrostatic release conductor R2 through the line segment 3b, thereby conducting the current through the second electrostatic protection circuit C2 to the second electrostatic release conductor R2, thereby achieving the effect of electrostatic discharge, and reducing the damage to components in the active area AA caused by electrostatic discharge.

[0069] In one embodiment of the present disclosure, Figure 2As shown in FIG. 1 , the first electrostatic protection circuit C1 can be disposed between the common wire 1 and the first electrostatic release wire R1, but the present disclosure is not limited thereto. In other embodiments of the present disclosure, although not shown in the figure, the first electrostatic release wire R1 can be disposed between the common wire 1 and the first electrostatic protection circuit C1. Similarly, in one embodiment of the present disclosure, Figure 3 As shown, the second electrostatic discharge wire R2 can be disposed between the common wire 1 and the second electrostatic protection circuit C2; or, the second electrostatic protection circuit C2 can be disposed between the common wire 1 and the second electrostatic discharge wire R2, but the present disclosure is not limited thereto.

[0070] In one embodiment of the present disclosure, Figure 1 As shown, the peripheral area B may also include a third area B3 and a fourth area B4, wherein the third area B3 may be adjacent to the first area B1 and correspond to the second area B2, and the fourth area B4 may be adjacent to the second area B2 and correspond to the first area B1. In one embodiment of the present disclosure, the first area B1 and the fourth area B4 of the peripheral area B may extend along the second direction Y, and the second area B2 and the third area B3 of the peripheral area B may extend along the first direction X, but the present disclosure is not limited thereto. In one embodiment of the present disclosure, the first area B1 may be connected to the second area B2 and form an L-shape, and the third area B3 may be connected to the fourth area B4 and form a mirrored L-shape, but the present disclosure is not limited thereto. In one embodiment of the present disclosure, the first area B1, the second area B2, the third area B3 and the fourth area B4 of the peripheral area B may be connected to each other to form a rectangle, and are arranged around the active area AA, but the present disclosure is not limited thereto. In one embodiment of the present disclosure, in the top-view direction Z of the substrate Sub, the first region B1 of the peripheral region B may be, for example, located on the left side of the active region AA, the second region B2 may be, for example, located on the lower side of the active region AA, the third region B3 may be, for example, located on the upper side of the active region AA, and the fourth region B4 may be, for example, located on the right side of the active region AA, but the present disclosure is not limited to this.

[0071] In one embodiment of the present disclosure, Figure 1As shown, in the fourth area B4 of the peripheral area, the scan line 2 can be electrically connected to the first electrostatic release wire R1' through the first electrostatic protection circuit C1'. In more detail, the two ends of the scan line 2 can be electrically connected to the first electrostatic release wire R1 and R1' through the first electrostatic protection circuit C1 and C1', respectively, so that the effect of electrostatic discharge can be improved. In one embodiment of the present disclosure, in the third area B3 of the peripheral area B, the data line 3 can be electrically connected to the second electrostatic release wire R2' through the second electrostatic protection circuit C2'. In more detail, the two ends of the data line 3 can be electrically connected to the second electrostatic release wire R2 and R2' through the second electrostatic protection circuit C2 and C2', respectively, so that the effect of electrostatic discharge can be improved. It is worth noting that in other embodiments of the present disclosure, the scan line 2 can be selectively electrically connected to the first electrostatic release wire R1 through the first electrostatic protection circuit C1 at one end, and the data line 3 can be selectively electrically connected to the second electrostatic release wire R2 through the second electrostatic protection circuit C2 at one end, so that the effect of electrostatic discharge can also be achieved.

[0072] In one embodiment of the present disclosure, Figure 1 As shown, the scan line 2 may extend along a first direction X, and the data line 3 may extend along a second direction Y, wherein the first direction X is different from the second direction Y. In one embodiment of the present disclosure, the electronic device may include a plurality of scan lines 2 and a plurality of data lines 3, wherein the plurality of scan lines 2 extend along the first direction X, respectively, and the plurality of data lines 3 extend along the second direction Y, respectively, and the plurality of scan lines 2 and the plurality of data lines 3 are interlaced to form a plurality of pixel units P. For example, one pixel unit P may be composed of and controlled by one data line 3 and one scan line 2. In one embodiment of the present disclosure, the first direction X may be, for example, perpendicular to the second direction Y, but the present disclosure is not limited thereto.

[0073] In one embodiment of the present disclosure, Figure 1 As shown, the first electrostatic release conductors R1 and R1' may, for example, extend along the second direction Y; the second electrostatic release conductors R2 and R2' may, for example, extend along the first direction X, but the present disclosure is not limited thereto. In one embodiment of the present disclosure, the first electrostatic release conductors R1 and R1' may be electrically separated from the second electrostatic release conductors R2 and R2', but the present disclosure is not limited thereto. In one embodiment of the present disclosure, although not shown in the figure, the first electrostatic release conductor R1 may be connected to the first electrostatic release conductor R1', and / or the second electrostatic release conductor R2 may be connected to the second electrostatic release conductor R2', but the present disclosure is not limited thereto. In one embodiment of the present disclosure, the electrostatic release conductor may be disposed between the active area AA and the common conductor 1, but the present disclosure is not limited thereto. In other aspects of the present disclosure, the common conductor 1 may be disposed between the electrostatic release conductor and the active area AA. In more detail, as Figure 1As shown, the first electrostatic discharge wire R1 may be disposed between the active area AA and the first portion 11 of the common wire 1 , and the third portion 13 of the common wire 1 may be disposed between the second electrostatic discharge wire R2 ′ and the active area AA, but the disclosure is not limited thereto.

[0074] In one embodiment of the present disclosure, Figure 1 As shown, the first portion 11 of the common wire 1 may extend along the second direction Y, and the second portion 12 of the common wire 1 may extend along the first direction X, wherein the first portion 11 of the common wire 1 may be connected to the second portion 12 to form an L-shape, but the present disclosure is not limited thereto. In one embodiment of the present disclosure, Figure 1 As shown, the common conductive line 1 may include a third portion 13 and a fourth portion 14, the third portion 13 is disposed in the third area B3 of the peripheral area B and extends along the first direction X, and the fourth portion 14 is disposed in the fourth area B4 of the peripheral area B and extends along the second direction Y, wherein the first portion 11, the second portion 12, the third portion 13 and the fourth portion 14 of the common conductive line 1 may be connected to each other and disposed around the active area AA, but the present disclosure is not limited thereto. The first portion 11, the second portion 12, the third portion 13 and the fourth portion 14 of the common conductive line 1 may form a rectangle, a trapezoid or other suitable shapes.

[0075] In one embodiment of the present disclosure, Figure 1 and Figure 2 As shown, in the top-view direction Z of the substrate Sub, the first portion 11 of the common conductor 1 and the first electrostatic release conductor R1 have a first distance D1. The first distance D1 can be greater than or equal to 1.5 microns (μm) and less than or equal to 12 millimeters (mm). In other words, the first distance D1 can be between 1.5μm and 12mm (i.e., 1.5μm≦first distance D1≦12mm).

[0076] In one embodiment of the present disclosure, Figure 1 and Figure 3 As shown, in the top-view direction Z of the substrate Sub, the second portion 12 of the common conductor 1 and the second electrostatic release conductor R2 have a second distance D2. The second distance D2 can be greater than or equal to 1.5 micrometers (μm) and less than or equal to 12 millimeters (mm). In other words, the second distance D2 can be between 1.5μm and 12mm (i.e., 1.5μm≦second distance D2≦12mm).

[0077] In one embodiment of the present disclosure, the first distance D1 and the second distance D2 can be, for example, 1.5 μm, 5 μm, 20 μm, 50 μm, 100 μm, 300 μm, 500 μm, 1 mm, 6 mm, 12 mm, or a range between any two of the above values, but the present disclosure is not limited thereto. When the first distance D1 and / or the second distance D2 conform to the above design, the scan line 2 and / or the data line 3 can discharge static electricity through the independent first electrostatic release conductor R1 and / or the second electrostatic release conductor R2, respectively, thereby reducing the situation where the scan line signal and the data line signal interfere with each other. Here, the "first distance" refers to, for example, the shortest distance between the first portion 11 of the common conductor 1 and the first electrostatic release conductor R1. Similarly, the "second distance" refers to, for example, the shortest distance between the second portion 12 of the common conductor 1 and the second electrostatic release conductor R2.

[0078] In one embodiment of the present disclosure, Figure 1 As shown, in the first area B1 of the peripheral area B, multiple scan lines 2 can be electrically connected to a first electrostatic release conductor R1 through multiple first electrostatic protection circuits C1, respectively. However, in other embodiments of the present disclosure, although not shown in the figure, in the first area B1 of the peripheral area B, multiple scan lines 2 can be electrically connected to multiple first electrostatic release conductors R1 through multiple first electrostatic protection circuits C1, respectively, so as to achieve the effect of electrostatic discharge. In this embodiment, the first distance D1 between the first portion 11 of the common conductor 1 and the first electrostatic release conductor R1 can, for example, refer to the shortest distance between the first electrostatic release conductor R1 closest to the first portion 11 of the common conductor 1 and the first portion 11 of the common conductor 1. Similarly, as Figure 1 As shown, in the second area B2 of the peripheral area B, multiple data lines 3 can be electrically connected to a second electrostatic discharge conductor R2 through multiple second electrostatic protection circuits C2, but in other embodiments of the present disclosure, although not shown in the figure, in the second area B2 of the peripheral area B, multiple data lines 3 can be electrically connected to multiple second electrostatic release conductors R2 through multiple second electrostatic protection circuits C2, thereby achieving the effect of electrostatic discharge. In this embodiment, the second distance D2 between the second portion 12 of the common conductor 1 and the second electrostatic release conductor R2 can, for example, refer to the shortest distance between the second electrostatic release conductor R1 closest to the second portion 12 of the common conductor 1 and the second portion 12 of the common conductor 1.

[0079] In the present disclosure, the material of the substrate Sub may be glass, quartz, sapphire, ceramic, plastic, polycarbonate (PC), polyimide (PI), polypropylene (PP), polyethylene terephthalate (PET), polymethylmethacrylate (PMMA), other suitable materials or combinations of the above materials, but the present disclosure is not limited thereto. In the present disclosure, the same or different materials may be used to form the common conductor 1, the scan line 2 and the data line 3, and suitable materials may each include gold, silver, copper, aluminum, titanium, chromium, nickel, molybdenum, tungsten, indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), indium gallium zinc oxide (IGZO) or combinations of the above, but the present disclosure is not limited thereto. In the present disclosure, the first electrostatic protection circuit C1 and C1' and the second electrostatic protection circuit C2 and C2' may be the same or different from each other, and may each include a diode, a transistor (such as a thin film transistor, a capacitively coupled field effect transistor (CCFET)), etc.) or a combination of the above, but the present disclosure is not limited thereto. In the present disclosure, the same or different materials may be used to form the first electrostatic release conductors R1 and R1' and the second electrostatic release conductors R2 and R2', and suitable materials may each include gold, silver, copper, aluminum, titanium, chromium, nickel, molybdenum, tungsten, indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), indium gallium zinc oxide (IGZO) or a combination of the above, but the present disclosure is not limited thereto.

[0080] In the present disclosure, the width of the electrostatic discharge conductor may be less than or equal to the width of the common conductor. Figure 2 As shown, the width W3 of the first electrostatic discharge conductor R1 may be less than or equal to the width W1 of the first portion 11 of the common conductor 1. Similarly, Figure 3As shown, the width W4 of the second electrostatic discharge conductor R2 may be less than or equal to the width W2 of the second portion 12 of the common conductor 1. In one embodiment of the present disclosure, the width of the common conductor 1 (e.g., the width W1 of the first portion 11 and the width W2 of the second portion 12) may be greater than 4 micrometers (μm) and less than or equal to 8 millimeters (mm), that is, 4μm<width W1≦8mm, and 4μm<width W2≦8mm, for example, the width W1 and the width W2 may be respectively between 10μm and 500μm, 10μm and 1mm, 10μm and 3mm, or 10μm and 8mm, but the present disclosure is not limited thereto. In one embodiment of the present disclosure, the width W3 of the first electrostatic release conductor R1 and the width W4 of the second electrostatic release conductor R2 can each be greater than or equal to 4 microns (μm) and less than 8 millimeters (mm), that is, 4μm≦width W3<8mm, and 4μm≦width W4<8mm. For example, the width W3 and the width W4 can each be between 4μm and 100μm, 4μm and 300μm, 4μm and 500μm, or 4μm and 1mm, but the present disclosure is not limited to this.

[0081] Figure 4 FIG. 4 is a schematic top view of an electronic device according to an embodiment of the present disclosure. Figure 5 and Figure 6 They are Figure 4 Partially enlarged view. Figure 4 Electronic devices and Figure 1 Similar, except for the following differences.

[0082] In one embodiment of the present disclosure, Figure 4 As shown, the common conductive line 1 includes a first portion 11, a second portion 12, a third portion 13 and a fourth portion 14, wherein the first portion 11 is disposed in a first area B1 of the peripheral area B, the second portion 12 is disposed in a second area B2 of the peripheral area B, the third portion 13 is disposed in a third area B3 of the peripheral area B, and the fourth portion 14 is disposed in a fourth area B4 of the peripheral area B. In one embodiment of the present disclosure, as Figure 4 As shown, the first part 11, the third part 13 and the fourth part 14 of the common wire 1 can be connected to each other to form an inverted U shape, and the second part 12 of the common wire 1 can be an inverted U shape. In one embodiment of the present disclosure, the second part 12 of the common wire 1 can be separated from the first part 11, the third part 13 and the fourth part 14, and electrically connected through an additionally provided integrated circuit (IC), a flexible printed circuit (FPC) and other suitable components, but the present disclosure is not limited thereto. In another embodiment of the present disclosure, the first part 11, the second part 12, the third part 13 and the fourth part 14 of the common wire 1 can be connected to each other and arranged around the active area AA, but the present disclosure is not limited thereto.

[0083] In one embodiment of the present disclosure, Figure 4 As shown, the scan line 2 may include a first line segment 21 and a second line segment 22, the first line segment 21 extends along the first direction X, and the second line segment 22 extends along the second direction Y, and the data line 3 extends along the second direction Y. In the top-view direction Z of the substrate Sub, the lengths of the first line segments 21 of the plurality of scan lines 2 may be the same, and the lengths of the second line segments 22 of the plurality of scan lines 2 may be different. In the first area B1 of the peripheral area B, the first line segment 21 of the scan line 2 may be electrically connected to the first electrostatic release conductor R1 through the first electrostatic protection circuit C1, and in the second area B2 of the peripheral area B, the second line segment 22 of the scan line 2 may be electrically connected to a fourth electrostatic release conductor R4 through a fourth electrostatic protection circuit C4. In more detail, as Figure 5 As shown, the first line segment 21 of the scan line 2 can be electrically connected to the first electrostatic protection circuit C1 through the line segment 21a, and electrically connected to the first electrostatic release wire R1 through the line segment 21b, so that the current is conducted to the first electrostatic release wire R1 through the first electrostatic protection circuit C1, thereby achieving the effect of electrostatic discharge. Figure 6 As shown, the second line segment 22 of the scan line 2 can be electrically connected to the fourth electrostatic protection circuit C4 through the line segment 22a, and electrically connected to the fourth electrostatic release wire R4 through the line segment 22b, so that the current is conducted to the fourth electrostatic release wire R4 through the fourth electrostatic protection circuit C4, thereby achieving the effect of electrostatic discharge. In one embodiment of the present disclosure, the first line segment 21 and the second line segment 22 of the scan line 2 are made of different metal layers, so the first line segment 21 of the scan line 2 can be electrically connected to the second line segment 22 of the scan line 2 through a through hole, but the present disclosure is not limited thereto. In one embodiment of the present disclosure, the first line segment 21 and the second line segment 22 of the scan line 2 can be made of the same metal layer.

[0084] In one embodiment of the present disclosure, Figure 4 As shown, in the second area B2 of the peripheral area B, the plurality of data lines 3 can be electrically connected to the plurality of second electrostatic discharge wires R2 through the plurality of second electrostatic protection circuits C2. Figure 4 and Figure 6As shown, the plurality of data lines 3 may include a first data line 31 and a second data line 32, the first data line 31 includes a line segment 31a and a line segment 31b, and the second data line 32 includes a line segment 32a and a line segment 32b. The first data line 31 may be electrically connected to the second electrostatic protection circuit C2-1 through the line segment 31a, and may be electrically connected to the second electrostatic release conductor R2-1 through the line segment 31b, and the second data line 32 may be electrically connected to the second electrostatic protection circuit C2-2 through the line segment 32a, and may be electrically connected to the second electrostatic release conductor R2-2 through the line segment 32b, so that the current is respectively conducted to the second electrostatic release conductors R2-1 and R2-2 through the second electrostatic protection circuits C2-1 and C2-2, so as to achieve the effect of electrostatic discharge. In one embodiment of the present disclosure, the plurality of data lines 3 may be electrically connected to a second electrostatic release conductor R2 through a plurality of second electrostatic protection circuits C2, respectively. For example, the first data line 31 and the second data line 32 may be electrically connected to the same second electrostatic discharge conductor R2 - 1 through the second electrostatic protection circuit C2 - 1 and the second electrostatic protection circuit C2 - 2 , respectively.

[0085] In one embodiment of the present disclosure, Figure 5 As shown in FIG. 1 , the first electrostatic discharge wire R1 can be disposed between the common wire 1 and the first electrostatic protection circuit C1, but the present disclosure is not limited thereto. In other embodiments of the present disclosure, although not shown in the figure, the first electrostatic protection circuit C1 can be disposed between the common wire 1 and the first electrostatic discharge wire R1. Similarly, in one embodiment of the present disclosure, as shown in FIG. Figure 6 As shown, the second electrostatic release wires R2-1 and R2-2 can be respectively arranged between the common wire 1 and the second electrostatic protection circuits C2-1 and C2-2 electrically connected thereto, but the present disclosure is not limited thereto. In other embodiments of the present disclosure, although not shown in the figure, the second electrostatic protection circuits C2-1 and C2-2 can be respectively arranged between the common wire 1 and the second electrostatic release wires R2-1 and R2-2 electrically connected thereto.

[0086] In one embodiment of the present disclosure, Figure 4 and Figure 5 As shown, in the top view direction Z of the substrate Sub, the first portion 11 of the common wire 1 and the first electrostatic discharge wire R1 have a first distance D1, and the first distance D1 may be greater than or equal to 1.5 micrometers (μm) and less than or equal to 12 millimeters (mm) (i.e., 1.5 μm≦first distance D1≦12 mm). In one embodiment of the present disclosure, Figure 4 and Figure 6As shown, in the top view direction Z of the substrate Sub, the second portion 12 of the common conductor 1 and the second electrostatic discharge conductor R2-1 have a second distance D2, and the second distance D2 can be greater than or equal to 1.5 micrometers (μm) and less than or equal to 12 millimeters (mm) (i.e., 1.5μm≦second distance D2≦12mm). When the first distance D1 and / or the second distance D2 meet the above design, the scan line 2 and / or the data line 3 can discharge static electricity through the independent first electrostatic discharge conductor R1 and / or the second electrostatic discharge conductor R2-1, respectively, thereby reducing the situation where the scan line signal and the data line signal interfere with each other.

[0087] In one embodiment of the present disclosure, Figure 4 As shown, the electronic device may further include a wire 4 disposed on the substrate Sub, wherein the wire 4 extends along the second direction Y and is electrically separated from the scan line 2. In the top-view direction Z of the substrate Sub, the wire 4 may be disposed between the first data line 31 and the second data line 32. In an embodiment of the present disclosure, the wire 4 may be opposite to the second line segment 22 of the scan line 2, and in the top-view direction Z of the substrate Sub, the wire 4 and the second line segment 22 of the scan line 2 have a third distance D3, and the third distance D3 may be greater than or equal to 2 micrometers (μm) and less than or equal to 100 micrometers (μm). In other words, the third distance D3 may be between 2μm and 100μm (i.e., 2μm≦third distance D3≦100μm). Further, the third distance D3 may be any value or any numerical range of 2μm, 5μm, 10μm, 20μm, 35μm, 50μm, 70μm, 90μm, and 100μm, but the present disclosure is not limited thereto. When the design of the wire 4 meets the above limitations, the taste effect of the electronic device can be improved. For example, when the electronic device is a display device, the visual effect can be improved. Here, the "wire is opposite to the second line segment of the scan line" means that the wire 4 can overlap with the extension line of the second line segment 22 in the top view direction Z of the substrate Sub.

[0088] In one embodiment of the present disclosure, Figure 4As shown, the first line segments 21 of the plurality of scan lines 2 extend along the first direction X, the plurality of data lines 3 (including the first data line 31 and the second data line 32) extend along the second direction Y, and the first line segments 21 of the plurality of scan lines 2 and the plurality of data lines 3 are interlaced to form a plurality of pixel units P. For example, a pixel unit P may be composed of the first data line 31 and the second data line 32 and the first line segment 21 of a scan line 2, and the active area AA may be formed by the repeated arrangement of a plurality of pixel units P. A pixel unit P may be controlled by one of the first data line 31 and the second data line 32 and the first line segment 21 of a scan line 2. For example, although not shown in the figure, in the second direction Y, the odd-numbered pixel units P are controlled by one of the first data line 31 and the second data line 32 and the first line segment 21 of a scan line 2, and the even-numbered pixel units P are controlled by the other of the first data line 31 and the second data line 32 and the first line segment 21 of a scan line 2, but the present disclosure is not limited thereto. Therefore, in one embodiment of the present disclosure, as Figure 4 As shown, in the top view direction Z of the substrate Sub, the wire 4 overlaps with the pixel unit P, but the present disclosure is not limited thereto. In another embodiment of the present disclosure, the electronic device may not include Figure 4 The second data line 32 is shown, therefore, the pixel unit (not shown) of this embodiment can be composed of and controlled by the first data line 31 and the first line segment 21 of a scan line 2, and the active area AA can be formed by repeatedly arranging a plurality of the above-mentioned pixel units (not shown).

[0089] In one embodiment of the present disclosure, Figure 4 As shown, in the third area B3 of the peripheral area B, the wire 4 can be electrically connected to a third electrostatic discharge wire R3 through a third electrostatic protection circuit C3, so that the current is conducted to the third electrostatic discharge wire R3 through the third electrostatic protection circuit C3, thereby achieving the effect of electrostatic discharge. Figure 4 As shown, in the second area B2 of the peripheral area B, the wire 4 can be electrically connected to a third electrostatic discharge wire R3' through a third electrostatic protection circuit C3'. In more detail, as shown in FIG. Figure 6 As shown, the wire 4 can be electrically connected to the third electrostatic protection circuit C3' through the wire segment 4a, and electrically connected to the third electrostatic release wire R3' through the wire segment 4b, so that the current is conducted to the third electrostatic release wire R3' through the third electrostatic protection circuit C3', thereby achieving the effect of electrostatic discharge. Figure 6 As shown in FIG. 1 , the third electrostatic protection circuit C3' can be arranged between the common wire 1 and the third electrostatic release wire R3', but the present disclosure is not limited thereto. In other embodiments of the present disclosure, although not shown in the figure, the third electrostatic release wire R3' can be arranged between the common wire 1 and the third electrostatic protection circuit C3'. In one embodiment of the present disclosure, Figure 4As shown, the third electrostatic discharge conductor R3 can be electrically connected to the common conductor 1 through a fifth electrostatic protection circuit C5, but the present disclosure is not limited thereto. Figure 4 and Figure 6 As shown, the third electrostatic discharge conductor R3 ′ may be electrically connected to the common conductor 1 through a fifth electrostatic protection circuit C5 ′, but the present disclosure is not limited thereto.

[0090] In the present disclosure, the materials of the substrate Sub, the common conductor 1, the scan line 2 and the data line 3 can be as described above and will not be repeated here. In the present disclosure, the conductor 4 and the second line segment 22 of the scan line 2 can be arranged in the same layer or different layers, and the conductor 4 can be prepared using the same or different materials as the scan line 2. Suitable materials include gold, silver, copper, aluminum, titanium, chromium, nickel, molybdenum, tungsten, indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), indium gallium zinc oxide (IGZO) or a combination of the above, but the present disclosure is not limited thereto. In the present disclosure, the third electrostatic protection circuit C3 and C3', the fourth electrostatic protection circuit C4 and the fifth electrostatic protection circuit C5 and C5' can be the same or different from each other, and can each include a diode, a transistor (such as a thin film transistor, a capacitively coupled field effect transistor (CCFET)), etc.) or a combination of the above, but the present disclosure is not limited thereto. In the present disclosure, the same or different materials can be used to form the third electrostatic release wires R3 and R3' and the fourth electrostatic release wire R4, and suitable materials can each include gold, silver, copper, aluminum, titanium, chromium, nickel, molybdenum, tungsten, indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), indium gallium zinc oxide (IGZO) or a combination of the above, but the present disclosure is not limited thereto.

[0091] In the present disclosure, the width of the electrostatic discharge conductor may be less than or equal to the width of the common conductor. Figure 5 As shown, the width W3 of the first electrostatic discharge conductor R1 may be less than or equal to the width W1 of the first portion 11 of the common conductor 1. Similarly, Figure 4 and Figure 6As shown, the width W4 of the second electrostatic discharge conductors R2-1 and R2-2, the width W5 of the third electrostatic discharge conductor R3', and the width W6 of the fourth electrostatic discharge conductor R4 may be respectively less than or equal to the width W2 of the second portion 12 of the common conductor 1. In an embodiment of the present disclosure, the width of the common conductor 1 (for example, the width W1 of the first portion 11 and the width W2 of the second portion 12) may be greater than 4 micrometers (μm) and less than or equal to 8 millimeters (mm), that is, 4μm<width W1≦8mm, and 4μm<width W2≦8mm, for example, the width W1 and the width W2 may be respectively between 10μm and 500μm, 10μm and 1mm, 10μm and 3mm, or 10μm and 8mm, but the present disclosure is not limited thereto. In an embodiment of the present disclosure, the width W3 of the first electrostatic release conductor R1, the width W4 of the second electrostatic release conductors R2-1 and R2-2, the width W5 of the third electrostatic release conductor R3', and the width W6 of the fourth electrostatic release conductor R4 can each be greater than or equal to 4 microns (μm) and less than 8 millimeters (mm), that is, 4μm≦width (for example, W3, W4, W5 and W6)<8mm, for example, the width W3, the width W4, the width W5 and the width W6 can each be between 4μm and 100μm, 4μm and 300μm, 4μm and 500μm or 4μm and 1mm, but the present disclosure is not limited to this.

[0092] Fig. 7A and Figure 7B They are schematic diagrams of an electrostatic protection circuit according to an embodiment of the present disclosure.

[0093] In one embodiment of the present disclosure, Fig. 7A As shown, the electrostatic protection circuit may include multiple transistors connected in series. Multiple transistors connected in series can be used to release the static charge generated by the electronic device to prevent the accumulation of static charge and damage to the components in the electronic device. Here, the "electrostatic protection circuit" includes any of the first electrostatic protection circuit C1 and C1', the second electrostatic protection circuit C2, C2', C2-1 and C2-2, the third electrostatic protection circuit C3 and C3', the fourth electrostatic protection circuit C4 and the fifth electrostatic protection circuit C5 and C5', which will not be repeated here. In this embodiment, Fig. 7A The electrostatic protection circuit shown takes four transistors connected in series as an example, but the present disclosure is not limited to this. In other embodiments of the present disclosure, the number of transistors connected in series can be adjusted as needed, and the number of transistors in each electrostatic protection circuit can be the same or different.

[0094] In one embodiment of the present disclosure, Fig. 7AAs shown, the control terminals CE of the plurality of transistors are floating, and one terminal E1 of the plurality of transistors connected in series can be electrically connected to the corresponding electrostatic discharge wire, and the other terminal E2 can be electrically connected to the corresponding connection line (e.g., the scan line 2, the data line 3, or the wire 4). More specifically, taking the first electrostatic protection circuit C1 as an example, when the first electrostatic protection circuit C1 has Fig. 7A When the structure shown is Figure 1 and Fig. 7A As shown, one end E1 of the plurality of transistors connected in series may be electrically connected to the first electrostatic discharge wire R1 , and the other end E2 may be electrically connected to the scan line 2 , but the present disclosure is not limited thereto.

[0095] In another embodiment of the present disclosure, Figure 7B As shown, the electrostatic protection circuit may include a back-to-back diode structure. The back-to-back diode has a good electrostatic discharge effect and can prevent the accumulation of static charge from causing damage to the components in the electronic device. Here, the "electrostatic protection circuit" includes any of the aforementioned first electrostatic protection circuits C1 and C1', the second electrostatic protection circuits C2, C2', C2-1 and C2-2, the third electrostatic protection circuits C3 and C3', the fourth electrostatic protection circuit C4, and the fifth electrostatic protection circuits C5 and C5', which will not be repeated here. In this embodiment, Figure 7B The electrostatic protection circuit shown is based on a back-to-back structure of two diodes as an example, but the present disclosure is not limited to this. In other embodiments of the present disclosure, the number of diodes can be adjusted as needed, and the number of diodes in each electrostatic protection circuit can be the same or different.

[0096] In one embodiment of the present disclosure, Figure 7B As shown, one end E3 of the back-to-back diode structure can be electrically connected to the corresponding electrostatic discharge wire, and the other end E4 can be electrically connected to the corresponding connection line (such as the scan line 2, the data line 3 or the wire 4). More specifically, taking the first electrostatic protection circuit C1 as an example, when the first electrostatic protection circuit C1 has Figure 7B When the structure shown is Figure 1 and Figure 7B As shown, one end E3 of the back-to-back diode structure may be electrically connected to the first electrostatic discharge wire R1 , and the other end E4 may be electrically connected to the scan line 2 , but the present disclosure is not limited thereto.

[0097] In addition, although not shown in the figure, in one embodiment of the present disclosure, the electrostatic protection circuit may include Fig. 7A and Figure 7B The structure shown, in more detail, e.g. Fig. 7A One end E1 of the plurality of transistors connected in series can be connected to a corresponding electrostatic discharge conductor (eg Figure 1 The first electrostatic discharge wire R1 is electrically connected to the other end E2. Figure 7B The back-to-back diode structure is electrically connected at one end E3, and Figure 7B The other end E4 of the back-to-back diode structure shown can be connected to a corresponding connection line (eg Figure 1 The scan line 2) shown in FIG. 1 is electrically connected, but the present disclosure is not limited thereto. The present disclosure is provided by, for example, Fig. 7A and Figure 7B The electrostatic protection circuit shown can achieve the effect of electrostatic discharge.

[0098] The above specific embodiments are to be construed as merely illustrative, and not limitative of the remainder of the disclosure in any way whatsoever.

Claims

1. An electronic device, characterized in that: include: a substrate including an active region and a peripheral region; A common conductive line is disposed corresponding to the peripheral region of the substrate; as well as A scan line is disposed on the substrate, wherein in the peripheral area, the scan line is electrically connected to a first electrostatic release wire through a first electrostatic protection circuit; The common conductor is electrically separated from the first electrostatic release conductor, and in the top view direction of the substrate, the common conductor and the first electrostatic release conductor have a first distance, which is greater than or equal to 1.5 micrometers (μm) and less than or equal to 12 millimeters (mm).

2. The electronic device according to claim 1, characterized in that: It also includes a data line, which is arranged on the substrate, wherein in the peripheral area, the data line is electrically connected to a second electrostatic release conductor through a second electrostatic protection circuit, wherein the common conductor is electrically separated from the second electrostatic release conductor.

3. The electronic device according to claim 2, characterized in that: The first electrostatic discharge conductor is electrically separated from the second electrostatic discharge conductor.

4. The electronic device according to claim 2, characterized in that: The scan line includes a first line segment and a second line segment, the first line segment extends along a first direction, the second line segment extends along a second direction, wherein the first direction is different from the second direction, and the data line extends along the second direction.

5. The electronic device according to claim 4, characterized in that: The invention also includes a conductive line disposed on the substrate, wherein the conductive line extends along the second direction, overlaps with an extension line of the second line segment, and is electrically separated from the scan line.

6. The electronic device according to claim 5, characterized in that: In a top-view direction of the substrate, the conductive line and the second line segment of the scan line have a third distance, and the third distance is greater than or equal to 2 micrometers (μm) and less than or equal to 100 micrometers (μm).

7. The electronic device according to claim 5, characterized in that: In the peripheral area, the conductive line is electrically connected to a third electrostatic discharge conductive line through a third electrostatic protection circuit.

8. The electronic device according to claim 7, characterized in that: The third electrostatic discharge conductor is electrically connected to the common conductor.

9. The electronic device according to claim 4, characterized in that: A fourth electrostatic release wire is also included, which is disposed in the peripheral area, wherein the first line segment of the scan line is electrically connected to the first electrostatic release wire, and the second line segment of the scan line is electrically connected to the fourth electrostatic release wire.

10. The electronic device according to claim 1, characterized in that: The width of the first electrostatic discharge conductor is less than or equal to the width of the first portion of the common conductor.

Images