Display panel and display device

Abstract

Provided is a display panel, comprising: a substrate comprising at least one side region and a display region; the pixel units are arranged in the display area, and at least one pixel unit comprises a light emitting diode; the plurality of terminals are arranged on the substrate base plate and are positioned in the side edge area; and the plurality of wires are arranged on the substrate, one end of at least one wire is electrically connected with the terminal, and the other end of the wire is electrically connected with the light emitting diode. The display panel comprises a first conductive layer, a first passivation layer and a second conductive layer which are sequentially arranged on a substrate; the plurality of wires are located in the first conductive layer, the plurality of terminals are located in the second conductive layer, and the orthographic projection of at least one terminal on the substrate falls into the orthographic projection of the first passivation layer on the substrate.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel, a display device, and a method for manufacturing a display panel. Background Art

[0002] Light Emitting Diode (LED) technology has been developed for nearly three decades, and its application scope has been continuously expanded. For example, it can be applied to the display field and used as a backlight source for display devices or as an LED display screen. With the development of technology, sub-millimeter light emitting diodes (Mini LED) and micro LEDs (Micro LED) have gradually become a research hotspot in the field of display technology. For example, Mini LED or Micro LED can be used in the light-emitting module of a liquid crystal display device as a light-emitting element of the light-emitting module.

[0003] The above information disclosed in this section is only for understanding the background of the inventive concept of the present disclosure and therefore the above information may contain information that does not constitute the prior art. Summary of the invention

[0004] In one aspect, a display panel is provided, wherein the display panel comprises: a substrate, the substrate comprising at least one side region and a display region, the at least one side region being closer to the side edge of the substrate than the display region; a plurality of pixel units arranged in the display region, the plurality of pixel units being distributed in an array on the substrate along a first direction and a second direction, at least one of the pixel units comprising a light emitting diode; a plurality of terminals arranged on the substrate and located in the side region, the plurality of terminals being distributed at intervals along the side edge of the substrate; and a plurality of traces arranged on the substrate, at least one of the traces having one end electrically connected to the terminal and the other end electrically connected to the light emitting diode, wherein the display panel comprises: a first conductive layer arranged on the substrate, wherein the plurality of traces are located in the first conductive layer; a first passivation layer arranged on a side of the first conductive layer away from the substrate; and a second conductive layer arranged on a side of the first passivation layer away from the substrate, wherein the terminal is located in the second conductive layer, and wherein an orthographic projection of at least one of the terminals on the substrate falls within an orthographic projection of the first passivation layer on the substrate.

[0005] According to some exemplary embodiments, the first passivation layer includes a plurality of protrusions, and orthographic projections of the plurality of terminals on the base substrate respectively fall within orthographic projections of the plurality of protrusions on the base substrate.

[0006] According to some exemplary embodiments, the multiple terminals include a first terminal, the multiple routings include a first routing, the first routing is used to transmit a ground signal, the first terminal is electrically connected to the first routing; and the orthographic projection of the first terminal on the substrate falls within the orthographic projection of the first passivation layer on the substrate.

[0007] According to some exemplary embodiments, the orthographic projection of the first terminal on the substrate includes a first side edge close to the side edge of the substrate; and the first passivation layer includes a first protrusion, the orthographic projection of the first protrusion on the substrate includes a second side edge close to the side edge of the substrate, the orthographic projection of the first terminal on the substrate falls within the orthographic projection of the first protrusion on the substrate, and in a second direction, the second side edge is closer to the side edge of the substrate than the first side edge, wherein the second direction is perpendicular to the side edge of the substrate.

[0008] According to some exemplary embodiments, a size of an orthographic projection of the first protrusion on the base substrate along a first direction is larger than a size of an orthographic projection of the first terminal on the base substrate along the first direction, wherein the first direction is parallel to a side edge of the base substrate.

[0009] According to some exemplary embodiments, the multiple pixel units respectively include a first light-emitting diode, a second light-emitting diode and a third light-emitting diode, the first light-emitting diode is used to emit light of a first color, the second light-emitting diode is used to emit light of a second color, and the third light-emitting diode is used to emit light of a third color; the multiple routings also include a second routing and a third routing, the second routing is used to transmit a first voltage signal to the second light-emitting diode and the third light-emitting diode, and the third routing is used to transmit a second voltage signal to the first light-emitting diode; and the multiple terminals also include a second terminal and a third terminal, the second terminal is electrically connected to the second routing, and the third terminal is electrically connected to the third routing.

[0010] According to some exemplary embodiments, an orthographic projection of at least one of the second terminal and the third terminal on the substrate falls within an orthographic projection of the first passivation layer on the substrate.

[0011] According to some exemplary embodiments, the orthographic projection of the second terminal on the substrate includes a third side edge close to the side edge of the substrate; and the first passivation layer includes a second protrusion, and the orthographic projection of the second protrusion on the substrate includes a fourth side edge close to the side edge of the substrate, and in the second direction, the fourth side edge is closer to the side edge of the substrate than the third side edge.

[0012] According to some exemplary embodiments, the orthographic projection of the third terminal on the substrate includes a fifth side edge close to the side edge of the substrate; and the first passivation layer includes a third protrusion, the orthographic projection of the third protrusion on the substrate includes a sixth side edge close to the side edge of the substrate, and in the second direction, the sixth side edge is closer to the side edge of the substrate than the fifth side edge.

[0013] According to some exemplary embodiments, an orthographic projection of at least one of the second terminal and the third terminal on the base substrate partially overlaps with an orthographic projection of the first passivation layer on the base substrate.

[0014] According to some exemplary embodiments, the first passivation layer includes a first sub-passivation layer and a second sub-passivation layer, the second sub-passivation layer is located on a side of the first sub-passivation layer away from the base substrate; the display panel also includes a first covering layer, the first covering layer is located between the first sub-passivation layer and the second sub-passivation layer; and the orthographic projection of at least one of the terminals on the base substrate falls within the orthographic projection of each of the first sub-passivation layer and the second sub-passivation layer on the base substrate, and the orthographic projection of at least one of the terminals on the base substrate partially overlaps with the orthographic projection of the first covering layer on the base substrate.

[0015] According to some exemplary embodiments, the display panel also includes a second passivation layer, which is located on a side of the second conductive layer away from the base substrate; and the orthographic projection of the first passivation layer on the base substrate includes a seventh side close to the side edge of the base substrate, and the orthographic projection of the second passivation layer on the base substrate includes an eighth side close to the side edge of the base substrate, and in the second direction, the eighth side is closer to the side edge of the base substrate than the seventh side.

[0016] According to some exemplary embodiments, the second passivation layer includes a third sub-passivation layer and a fourth sub-passivation layer, the fourth sub-passivation layer is located on a side of the third sub-passivation layer away from the base substrate; the display panel also includes a second covering layer, the second covering layer is located between the third sub-passivation layer and the fourth sub-passivation layer; and an orthographic projection of at least one of the terminals on the base substrate partially overlaps with an orthographic projection of the second covering layer on the base substrate.

[0017] According to some exemplary embodiments, the display panel includes a plurality of via holes penetrating the second passivation layer and the second covering layer, the plurality of via holes respectively exposing at least a portion of the plurality of terminals; and an orthographic projection of at least one of the via holes on the base substrate partially overlaps with an orthographic projection of at least one of the protrusions on the base substrate.

[0018] According to some exemplary embodiments, the multiple vias passing through the second passivation layer and the second covering layer include a first via, the orthographic projection of the first via on the base substrate partially overlaps with the orthographic projection of the first protrusion on the base substrate; the display panel also includes a second via passing through the first passivation layer and the first covering layer, the first terminal is electrically connected to the first trace through the second via; and the orthographic projection of the first via on the base substrate and the orthographic projection of the second via on the base substrate are at least partially aligned along a first direction.

[0019] According to some exemplary embodiments, the multiple vias passing through the second passivation layer and the second covering layer include a third via, the orthographic projection of the third via on the base substrate partially overlaps with the orthographic projection of the second protrusion on the base substrate; the display panel also includes a fourth via passing through the first passivation layer and the first covering layer, the second terminal is electrically connected to the second trace through the fourth via; and the orthographic projection of the third via on the base substrate and the orthographic projection of the fourth via on the base substrate are spaced apart along the second direction.

[0020] According to some exemplary embodiments, the multiple vias passing through the second passivation layer and the second covering layer include a fifth via, the orthographic projection of the fifth via on the base substrate partially overlaps with the orthographic projection of the third protrusion on the base substrate; the display panel also includes a sixth via passing through the first passivation layer and the first covering layer, the third terminal is electrically connected to the third trace through the sixth via; and the orthographic projection of the fifth via on the base substrate and the orthographic projection of the sixth via on the base substrate are at least partially aligned along a first direction.

[0021] According to some exemplary embodiments, the orthographic projection of the first passivation layer on the base substrate includes a side edge close to a side edge of the base substrate, and the side edge includes a shape selected from the group consisting of a wall shape, a sawtooth shape, a wave shape, and a continuous broken line shape.

[0022] According to some exemplary embodiments, at least one of the terminals includes a terminal body and a nickel-gold plating layer, the terminal body is located in the second conductive layer, and the nickel-gold plating layer is located on a surface of the terminal body away from the base substrate.

[0023] On the other hand, a display panel is provided, wherein the display panel comprises: a substrate, the substrate comprising at least one side region and a display region, the at least one side region being closer to the side edge of the substrate than the display region; a plurality of pixel units arranged in the display region, the plurality of pixel units being distributed in an array on the substrate, at least one of the pixel units comprising a light emitting diode; a plurality of terminals arranged on the substrate and located in the side region, the plurality of terminals being distributed at intervals along the side edge of the substrate; a plurality of routing lines arranged on the substrate, at least one of the routing lines having one end electrically connected to the terminal and the other end electrically connected to the The light-emitting diode; and a lead arranged on the base substrate, one end of the lead being electrically connected to the terminal, and the lead extending from the terminal toward the side edge of the base substrate, wherein the display panel comprises: a first conductive layer arranged on the base substrate, wherein the multiple traces are located in the first conductive layer; a first passivation layer arranged on a side of the first conductive layer away from the base substrate; and a second conductive layer arranged on a side of the first passivation layer away from the base substrate, wherein the terminal is located in the second conductive layer, and wherein an orthographic projection of at least one of the terminals on the base substrate falls within an orthographic projection of the first passivation layer on the base substrate.

[0024] In yet another aspect, a display device is provided, wherein the display device comprises the display panel as described above. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Other objects and advantages of the present disclosure will be apparent from the following description of the present disclosure with reference to the accompanying drawings and will help to have a comprehensive understanding of the present disclosure.

[0026] Figure 1 is a top view of a display panel according to some exemplary embodiments of the present disclosure;

[0027] Figure 2 is a schematic plan view of a display panel during processing according to some exemplary embodiments of the present disclosure;

[0028] Figure 3 The display panel of some exemplary embodiments of the present disclosure is Figure 2 A cross-sectional view taken along line AA';

[0029] Figure 4 is a partial plan view of a display panel according to some exemplary embodiments of the present disclosure;

[0030] Figure 5 A schematic plan view of a display panel according to another embodiment of the present disclosure is shown, wherein an electrical connection structure of a plurality of pixel units, a plurality of wirings and a plurality of terminals is shown;

[0031] Fig. 6A and Figure 6B shows a schematic plan view of a display panel of some embodiments of the present disclosure, Figure 7 Schematic diagrams of plan views of display panels of other embodiments of the present disclosure are shown, wherein Fig. 6A , Figure 6B and Figure 7 Having different first passivation layer structure designs;

[0032] Figure 8 is a planar structural diagram of a first passivation layer and a first covering layer in some other embodiments of the present disclosure;

[0033] Fig. 9 is a planar structural diagram of a first passivation layer and a second passivation layer in some other embodiments of the present disclosure;

[0034] Fig.10 is a planar structural diagram of a second passivation layer and a second covering layer in some other embodiments of the present disclosure;

[0035] Fig.11 is a schematic plan view of a display panel in some other embodiments of the present disclosure, wherein a plurality of via structures are shown;

[0036] Fig.12 and Fig.13 is a schematic plan view of a display panel in some other embodiments of the present disclosure, wherein Fig.12 and Fig.13 shows the edge structure of the first passivation layer;

[0037] Fig.14 is a cross-sectional view of a display panel at a terminal according to some other embodiments of the present disclosure;

[0038] Fig.15A It is a partial enlarged view of a defective terminal of a display panel; Fig. 15B yes Fig.15A SEM image of the terminal defect shown;

[0039] Fig.16is a SEM image of a terminal in a display panel according to some exemplary embodiments of the present disclosure;

[0040] Fig.17 is a schematic plan view of a display panel according to some other exemplary embodiments of the present disclosure; and

[0041] Fig.18 1 is a schematic plan view of a display panel according to some other embodiments of the present disclosure, wherein at least two small screens are spliced ​​together to form a large display screen. DETAILED DESCRIPTION

[0042] In the following description, for the purpose of explanation, many specific details are set forth to provide a comprehensive understanding of various exemplary embodiments. However, it is apparent that various exemplary embodiments may be implemented without these specific details or with one or more equivalent arrangements. In other cases, well-known structures and devices are shown in block diagram form to avoid making various exemplary embodiments unnecessarily obscure. In addition, various exemplary embodiments may be different, but not necessarily exclusive. For example, the specific shape, configuration, and characteristics of an exemplary embodiment may be used or implemented in another exemplary embodiment without departing from the inventive concept.

[0043] In the accompanying drawings, the size and relative size of the elements may be exaggerated for the purpose of clarity and / or description. Thus, the size and relative size of the individual elements are not necessarily limited to the size and relative size shown in the drawings. When the exemplary embodiments may be implemented differently, the specific process sequence may be performed differently from the described sequence. For example, two processes described in succession may be performed substantially simultaneously or in an order opposite to the described sequence. In addition, the same reference numerals represent the same elements.

[0044] When an element is described as being "on" another element, "connected to" another element or "coupled to" another element, the element may be directly on the other element, directly connected to the other element or directly coupled to the other element, or there may be an intermediate element. However, when an element is described as being "directly on" another element, "directly connected to" another element or "directly coupled to" another element, there is no intermediate element. Other terms and / or expressions used to describe the relationship between elements should be interpreted in a similar manner, for example, "between..." versus "directly between...", "adjacent" versus "directly adjacent" or "on..." versus "directly on...", etc. In addition, the term "connection" may refer to a physical connection, an electrical connection, a communication connection and / or a fluid connection. In addition, the X-axis, the Y-axis and the Z-axis are not limited to the three axes of a rectangular coordinate system, and may be interpreted in a broader sense. For example, the X-axis, the Y-axis and the Z-axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. For the purpose of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z such as XYZ, XY, YZ, and XZ. As used herein, the term "and / or" includes any and all combinations of one or more of the listed associated items.

[0045] It should be understood that, although the terms first, second, etc. may be used herein to describe different elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the scope of the exemplary embodiment, a first element may be named a second element, and similarly, a second element may be named a first element.

[0046] In this article, inorganic light emitting diodes refer to light emitting elements made of inorganic materials, where LED refers to inorganic light emitting elements that are different from OLED. Specifically, inorganic light emitting elements may include sub-millimeter light emitting diodes (Mini Light Emitting Diode, abbreviated as Mini LED in English) and micro light emitting diodes (Micro Light Emitting Diode, abbreviated as Micro LED in English). Among them, micro light emitting diodes (i.e. Micro LED) refer to ultra-small light emitting diodes with a grain size of less than 100 microns, and sub-millimeter light emitting diodes (i.e. Mini LED) refer to small light emitting diodes with a grain size between MicroLED and traditional LED. For example, the grain size of Mini LED can be between 50 and 400 microns.

[0047] With the development of technology, the development momentum of LED display devices is relatively fast. For example, they are gradually being applied to outdoor display and central control large-screen display. In the application scenario of outdoor display, the size of the display screen used is usually large, mainly for users to watch from a distance. The commonly used technology is to splice multiple small screens into a large screen. The inventor has found through research that in order to display narrow gaps or seamless splicing, the size design and spatial layout of the connection wiring are crucial to the imaging effect and stability of the display panel. When the existing display panel is leading out the connection wiring, it is often due to the step difference of the lower film layer of some areas of the lead-out wiring, which leads to corrosion or even fracture of the film layer during the preparation process and subsequent other film layer processes, thereby causing further deviations in the subsequent film layer preparation, resulting in poor connection of the display circuit, and the occurrence of open circuit or short circuit. Based on this, in the process of splicing multiple small screens into a large screen, it is necessary to optimize the design of the lead-out and connection of the wiring, and provide a sufficiently stable electrical connection under the premise of occupying as little space as possible, so as to improve the reliability of the use of the display panel.

[0048] Figure 1 A schematic plan view of a display panel is shown schematically.

[0049] Reference Figure 1 The display panel includes a substrate 1, wherein the substrate 1 includes: at least one display area 2 and a side area 3 and a side edge 4 of the substrate, wherein the side edge 4 of the substrate is parallel to the display area 2 and the side edge 3 of the substrate. Figure 1In the first direction D1 shown, the distance between the side region 3 and the side edge 4 of the substrate is smaller than the distance between the display region 2 and the side edge 4 of the substrate. A plurality of pixel units 5 are arranged in the display region 2, and the plurality of pixel units 5 are distributed in an array on the substrate 1, wherein at least one of the pixel units includes a light emitting diode. The light emitting diode may include a sub-millimeter light emitting diode or a micro light emitting diode, which may adopt the structure of a light emitting diode chip. A plurality of terminals 6 are arranged on the substrate 1 and located in the side region 3, and the plurality of terminals are distributed in the side region 3 at intervals along the first direction D1; a plurality of wirings 7 are arranged on the substrate 1, wherein one end of at least one of the wirings 7 is electrically connected to the terminal 6, and the other end is electrically connected to the driving circuit of the pixel unit 5, and the driving circuit of the pixel unit 5 may include at least one transistor, and the transistor may include a source, a gate and a drain, and an active layer. For example, the transistor may have a dual-gate structure, which may include a first gate located below the active layer and a second gate located above the active layer. In the narrow slit or seamless connection scheme, the data signal, power signal, scanning signal and other signals on the display panel are exported to the side of the display panel or the back of the display panel by using the terminal 6 formed on the base substrate 1 of the display panel, and the driver chip or driver circuit board is bound to the side of the display panel or the back of the display panel to realize the control of the display panel. In the narrow slit or seamless splicing scheme, the design of the terminal 6 located on the front of the display panel is more important. On the one hand, the size of the terminal 6 should not be too large. If the terminal 6 is too large, it is easy to cause the side area to occupy too much space, and the non-display area in the spliced ​​large screen will become larger, thereby affecting the display effect; on the other hand, the conductive performance of the terminal 6 should be good enough to form a good electrical connection with the external driver chip or driver circuit board and the multiple traces 7 on the front of the display panel, so as to realize the real-time control of the display panel by the external driver circuit board or driver chip.

[0050] exist Figure 1 In the exemplary embodiment of FIG. 1 , the first direction D1 and the second direction D2 are schematically shown. For example, a plurality of pixel units may be arranged in an array along the first direction D1 and the second direction D2. It should be noted that the embodiments of the present disclosure are not limited thereto.

[0051] Figure 2 A schematic plan view of a display panel during a processing process according to some exemplary embodiments of the present disclosure is shown.

[0052] Reference Figure 2The display panel includes: a base substrate 1; a first conductive layer 8 located on the base substrate 1; a plurality of traces 7, wherein the plurality of traces 7 are located in the first conductive layer 8; a first passivation layer 9, located on a side of the first conductive layer 8 away from the base substrate 1; a second conductive layer 10, located on a side of the first passivation layer 9 away from the base substrate 1; and a plurality of terminals 6, wherein the plurality of terminals 6 are located in the second conductive layer 10. The orthographic projections of the plurality of terminals 6 on the base substrate 1 fall within the orthographic projections of the side region 3 on the base substrate 1, and the plurality of terminals 6 are arranged in the side region 3 at intervals. The terminals 6 may have different shapes, such as a rectangle, a square, a trapezoid, a triangle, a circle, an ellipse or a polygon.

[0053] The inventor has discovered through research that in the narrow seam or seamless splicing scheme, in the process of depositing the second conductive layer 10, due to the step difference at the edge of the first passivation layer 9 below the second conductive layer 10, film cracks may appear in the local area of ​​the second conductive layer 10 that overlaps with the step difference, or excessive bottom etching may lead to uneven defects at the bottom of the film layer, which in turn leads to poor electrical performance of some terminals 6 located at defects such as film cracks or bottom etching, or film structure defects of at least some of the terminals 6, which in turn leads to in subsequent processes, such as when depositing the nickel-gold layer by the nickel-gold process, the gold solution penetrates into the cracks of the second conductive layer 10 or the uneven gaps of the second conductive layer 10, resulting in abnormal gold growth during gold deposition, resulting in short circuit or open circuit in the electrical connection between some terminals 6 and multiple traces 7 or an external driver circuit board or driver chip, causing poor display.

[0054] To this end, in the embodiment of the present disclosure, a protrusion is designed for the edge structure of the first passivation layer 9 so that the orthographic projection of at least one of the terminals 6 on the base substrate 1 falls within the orthographic projection of the first passivation layer 9 on the base substrate 1, thereby avoiding a step difference in the first passivation layer 9 under at least one of the terminals, which is beneficial to improving the film quality of the terminal, ensuring that the terminal forms a good electrical connection with the corresponding wiring and the external driving circuit, and improving the reliability of the display panel.

[0055] In the embodiments of the present disclosure, Figure 2As shown, it is shown that the edge of the first passivation layer 9 has a plurality of first passivation layer protrusions 91 corresponding to the plurality of terminals, so that the orthographic projection of the plurality of terminals 6 on the base substrate 1 falls within the orthographic projection of the first passivation layer 9 on the base substrate 1, reducing or eliminating the step difference of the lower film layer during the process of the plurality of terminals 6, thereby avoiding the phenomenon of uneven bottom recesses caused by cracks in the film layer of at least part of the plurality of terminals 6 or excessive etching when forming the plurality of terminals 6, improving the film layer quality of the plurality of terminals 6, thereby facilitating the subsequent process, and further improving the conductive performance of the plurality of terminals 6, avoiding open circuit or short circuit.

[0056] Figure 3 The display panel according to some exemplary embodiments of the present disclosure is shown along Figure 2 Cross-sectional view taken along the midline AA'.

[0057] Reference Figure 3 , the display panel comprises: a base substrate 1; a buffer layer 12 located on the base substrate 1; a first conductive layer 8 located on a side of the buffer layer 12 away from the base substrate 1; a first passivation layer 9 located on a side of the first conductive layer 8 away from the base substrate 1, wherein a portion of the first passivation layer 9 may cover a surface of the first conductive layer 8 away from the base substrate 1, and another portion may cover a surface of the buffer layer 12 away from the base substrate 1. The display panel comprises a plurality of vias penetrating the first passivation layer 9, and the plurality of vias respectively expose at least a portion of the first conductive layer 8. The display panel further comprises a second conductive layer 10, and the second conductive layer 10 is located on a side of the first passivation layer 9 away from the base substrate 1. At least a portion of the second conductive layer 10 is electrically connected to a portion of the first conductive layer 8 through a plurality of vias in the first passivation layer 9. The display panel further comprises a second passivation layer 11, and the second passivation layer is located on a side of the second conductive layer 8 away from the base substrate 1. The display panel further comprises a plurality of vias penetrating the second passivation layer 11, and the plurality of vias respectively expose at least a portion of a plurality of terminals 6.

[0058] Figure 4 Partial plan views of display panels according to other exemplary embodiments of the present disclosure are shown.

[0059] Reference Figure 2 and Figure 4, the display panel includes: a base substrate 1; a plurality of terminals 6, the plurality of terminals 6 including a first terminal 61. The display panel also includes a plurality of routing lines, the plurality of routing lines including a first routing line 71, the first routing line 71 is used to transmit a ground signal, and the first terminal 61 is electrically connected to the first routing line 71. The orthographic projection of the first terminal 61 on the base substrate 1 falls within the orthographic projection of the first passivation layer 9 on the base substrate 1. The orthographic projection of the first terminal 61 on the base substrate 1 includes a first side edge 611 close to the side edge 4 of the base substrate. The first passivation layer 9 includes a first passivation layer protrusion 91, and the first passivation layer protrusion 91 includes a first protrusion 911. The orthographic projection of the first protrusion 911 on the substrate 1 includes a second side edge 9111 close to the side edge 4 of the substrate; the orthographic projection of the first terminal 61 on the substrate 1 falls within the orthographic projection of the first protrusion 911 on the substrate 1, and in the second direction D2, the second side edge 9111 is closer to the side edge 4 of the substrate than the first side edge 611, wherein the second direction is perpendicular to the side edge 4 of the substrate.

[0060] Exemplarily, in the display panel, the size of the orthographic projection of the first protrusion 911 along the first direction D1 of the base substrate 1 is a first prescribed distance L1, and the size of the orthographic projection of the first terminal 61 along the first direction D1 of the base substrate 1 is a second prescribed distance L2. In the embodiment of the present disclosure, the first prescribed distance L1 is greater than the second prescribed distance L2. The first direction D1 is parallel to the side edge 4 of the base substrate.

[0061] Figure 5 A schematic plan view of a display panel according to some other embodiments of the present disclosure is shown, wherein a plurality of pixel units, a plurality of wirings and an electrical connection structure of a plurality of terminals are shown.

[0062] Combined with reference Figure 1The display panel includes: a base substrate 1, a display area 2 and a plurality of pixel units 5, wherein the plurality of pixel units 5 are located in the display area 2 on the base substrate 1. The plurality of pixel units 5 include a first light emitting diode 51, a second light emitting diode 52 and a third light emitting diode 53, respectively, wherein the first light emitting diode 51 is used to emit light of a first color, the second light emitting diode 52 is used to emit light of a second color, and the third light emitting diode is used to emit light of a third color; the sizes of the first light emitting diode 51, the second light emitting diode 52 and the third light emitting diode 53 may be the same or different, and the sizes of the first light emitting diode 51, the second light emitting diode 52 and the third light emitting diode 53 may also be regularly distributed on the base substrate 1 with the same or different pixel densities according to actual needs. By way of example, in an embodiment of the present disclosure, the display panel also includes a plurality of wirings 7, in combination with reference to Figure 5 The plurality of wires further include a second wire 72 and a third wire 73, wherein the second wire 72 is used to transmit a first voltage signal to the second light-emitting diode 52 and the third light-emitting diode 53, and the third wire 73 is used to transmit a second voltage signal to the first light-emitting diode. The display panel further includes a plurality of terminals 6, wherein the plurality of terminals 6 further include a second terminal 62 and a third terminal 63, wherein the second terminal 62 is electrically connected to the second wire 72, and the third terminal 63 is electrically connected to the third wire 73. The second terminal 62 and the third terminal 63 are respectively connected to an external driving circuit board or a driving chip to control the lighting state of the light-emitting diodes and achieve different display effects.

[0063] Fig. 6A and Figure 6B shows a schematic plan view of a display panel of some embodiments of the present disclosure, Figure 7 Schematic diagrams of plan views of display panels of other embodiments of the present disclosure are shown, wherein Fig. 6A , Figure 6B and Figure 7 There are different first passivation layer structure designs.

[0064] Reference Fig. 6A and 6B The display panel includes a base substrate 1, a first passivation layer 9 and a plurality of terminals 6. The plurality of terminals 6 include a second terminal 62 and a third terminal 63, wherein at least one of the second terminal 62 and the third terminal 63 has an orthographic projection on the base substrate 1 that falls within the orthographic projection of the first passivation layer 9 on the base substrate 1. Fig. 6A, the orthographic projection of the second terminal 62 on the substrate 1 falls within the orthographic projection of the first passivation layer 9 on the substrate 1, and the orthographic projection of the third terminal 63 on the substrate 1 partially overlaps with the orthographic projection of the first passivation layer 9 on the substrate 1. The orthographic projection of the second terminal 62 on the substrate 1 includes a third side 621 close to the side edge 4 of the substrate, the first passivation layer 9 includes a second protrusion 912, and the orthographic projection of the second protrusion 912 on the substrate 1 includes a fourth side 9121 close to the side edge 4 of the substrate, and in the second direction D2, the fourth side 9121 is closer to the side edge 4 of the substrate than the third side 621.

[0065] In other embodiments, reference Figure 7 The orthographic projections of the second terminal 62 and the third terminal 63 on the base substrate 1 partially overlap with the orthographic projection of the first passivation layer 9 on the base substrate 1 .

[0066] In addition to the above Fig. 6A and Figure 7 The first passivation layer may have other structural designs. For example, Figure 4 As shown, the orthographic projection of the second terminal 62 on the base substrate 1 partially overlaps with the orthographic projection of the first passivation layer 9 on the base substrate 1, and the orthographic projection of the third terminal 63 on the base substrate 1 falls into the first passivation layer 9. Figure 6B The orthographic projection of the third terminal 63 on the substrate 1 includes a fifth side 631 close to the side edge 4 of the substrate, the first passivation layer 9 includes a third protrusion 913, and the orthographic projection of the third protrusion 913 on the substrate includes a sixth side 9131 close to the side edge 4 of the substrate, and in the second direction D2, the sixth side 9131 is closer to the side edge 4 of the substrate than the fifth side 631.

[0067] In other embodiments, Figure 5 As shown, the orthographic projections of the second terminal 62 and the third terminal 63 on the substrate 1 both fall within the orthographic projection of the first passivation layer 9 on the substrate 1. Fig. 6A , the orthographic projection of the second terminal 62 on the substrate 1 includes a third side 621 close to the side edge 4 of the substrate, the first passivation layer 9 includes a second protrusion 912, the orthographic projection of the second protrusion 912 on the substrate 1 includes a fourth side 9121 close to the side edge 4 of the substrate, and in the second direction D2, the fourth side 9121 is closer to the side edge 4 of the substrate than the third side 621. Figure 6BThe orthographic projection of the third terminal 63 on the substrate 1 includes a fifth side 631 close to the side edge 4 of the substrate, the first passivation layer 9 includes a third protrusion 913, and the orthographic projection of the third protrusion 913 on the substrate includes a sixth side 9131 close to the side edge 4 of the substrate, and in the second direction D2, the sixth side 9131 is closer to the side edge 4 of the substrate than the fifth side 631.

[0068] Figure 8 1 is a planar structural diagram of the first passivation layer and the first covering layer in some other embodiments of the present disclosure.

[0069] Reference Figure 8 The display panel includes: a base substrate 1; a first passivation layer 9, wherein the first passivation layer 9 includes a first sub-passivation layer 92 and a second sub-passivation layer 93, wherein the second sub-passivation layer 93 is located on the side of the first sub-passivation layer 92 away from the base substrate 1, and the orthographic projections of the first sub-passivation layer 92 and the second sub-passivation layer 93 on the base substrate 1 may completely overlap or partially overlap. The first sub-passivation layer 92 and the second sub-passivation layer 93 may be made of the same material or different materials, and the processes for preparing the first sub-passivation layer 92 and the third sub-passivation layer 93 may be the same or different. By superimposing the first sub-passivation layer 92 and the second sub-passivation layer 93, the thickness of the first passivation layer in the direction perpendicular to the base substrate 1 may be increased, and the passivation effect of the first passivation layer 9 on the first conductive layer may be improved. The display panel also includes a first covering layer 13, wherein the first covering layer 13 is located between the first sub-passivation layer 92 and the second sub-passivation layer 93, and the first covering layer 13 may be a flat layer or an insulating layer. The display panel further includes a plurality of vias 17 penetrating the first sub-passivation layer 92, the first cover layer 13, and the second sub-passivation layer 93, and the electrical connection between the first conductive layer and the second conductive layer can be achieved through the plurality of vias 17. The orthographic projection of the first cover layer 13 on the base substrate 1 falls within the orthographic projection of the first sub-passivation layer 92 on the base substrate 1. The display panel further includes a plurality of terminals 6, wherein the orthographic projection of at least one of the terminals on the base substrate 1 falls within the orthographic projection of each of the first sub-passivation layer 92 and the second sub-passivation layer 93 on the base substrate 1, and the orthographic projection of at least one of the terminals on the base substrate 1 partially overlaps with the orthographic projection of the first cover layer 13 on the base substrate 1.

[0070] Fig. 9 1 is a planar structural diagram of the first passivation layer and the second passivation layer in some other embodiments of the present disclosure.

[0071] Reference Fig. 9, the display panel includes: a base substrate 1, a first passivation layer 9, a second conductive layer 10 and a second passivation layer 11; the second passivation layer 11 is located on the side of the second conductive layer 10 away from the base substrate 1. The orthographic projection of the first passivation layer 9 on the base substrate 1 includes a seventh side 907 close to the side edge 4 of the base substrate. The orthographic projection of the second passivation layer 11 on the base substrate 1 includes an eighth side 118 close to the side edge 4 of the base substrate. In the second direction D2, the eighth side 118 is closer to the side edge 4 of the base substrate than the seventh side 907. The second passivation layer 11 plays a role in protecting the second conductive layer 10. By designing the pattern of the second passivation layer, it can be ensured that the orthographic projection of the first passivation layer 9 on the base substrate 1 falls within the orthographic projection of the second passivation layer 11 on the base substrate 1. The second conductive layer 10 is located between the first passivation layer 9 and the second passivation layer 11. By wrapping the second passivation layer, the passivation protection effect of the second conductive layer 10 can be achieved, and the reaction of external water and oxygen with the second conductive layer 10 can be prevented, thereby improving the electrical transmission stability of the second conductive layer 10 and extending the service life of the display panel.

[0072] Fig.10 1 is a planar structural diagram of the second passivation layer and the second covering layer in some other embodiments of the present disclosure.

[0073] Reference Fig.10 The display panel includes: a base substrate 1; a second passivation layer 11, wherein the second passivation layer 11 includes a third sub-passivation layer 111 and a fourth sub-passivation layer 112, and the fourth sub-passivation layer 112 is located on the side of the third sub-passivation layer 111 away from the base substrate 1. The display panel also includes a second covering layer 14, and the second covering layer 14 is located between the third sub-passivation layer 111 and the fourth sub-passivation layer 112. The second covering layer 14 can be a planarization layer or an insulating layer. The display panel also includes a plurality of terminals 6, and the orthographic projection of at least one of the terminals on the base substrate 1 partially overlaps with the orthographic projection of the second covering layer on the base substrate.

[0074] Fig.11 is a schematic plan view of a display panel in some other embodiments of the present disclosure, wherein a plurality of via structures are shown.

[0075] Reference Fig.11, the display panel includes: a base substrate 1; a first passivation layer 9; a second conductive layer 10; a second passivation layer 11 and a second cover layer 14 and a plurality of via holes 18 penetrating the second passivation layer 11 and the second cover layer 14, wherein the plurality of via holes 18 can be formed by a single process such as ion beam etching, sputtering etching or laser etching, or by a combination of two or three processes such as ion beam etching, sputtering etching or laser etching to etch a portion of the second passivation layer 11 and the second cover layer 14, so that a plurality of via holes 18 exposing a portion of the second conductive layer 10 are formed in the second passivation layer 11 and the second cover layer 14. The display panel also includes a plurality of terminals 6, wherein the plurality of via holes 18 respectively expose at least a portion of the plurality of terminals. The first passivation layer 9 also includes a plurality of first passivation layer protrusions 91; wherein the orthographic projection of at least one of the via holes 18 on the base substrate 1 at least partially overlaps with the orthographic projection of at least one of the first passivation layer protrusions 91 on the base substrate 1.

[0076] In the embodiment of the present disclosure, the plurality of vias penetrating the second passivation layer 11 and the second cover layer 14 include a first via 181. The first passivation layer protrusion 91 also includes a first protrusion 911. The orthographic projection of the first via 181 on the base substrate 1 at least partially overlaps with the orthographic projection of the first protrusion 911 on the base substrate 1. The display panel also includes a second via 171 penetrating the first passivation layer 9 and the first cover layer 14, and the first terminal 61 is electrically connected to the first trace 71 through the second via 171. The orthographic projection of the first via 181 on the base substrate 1 and the orthographic projection of the second via 171 on the base substrate 1 are at least partially aligned along the first direction D1. The signal lines of the pixel driving circuit located in the first conductive layer 8 are electrically connected to the second conductive layer 10 through the second via 171, wherein the signal lines include data signal lines, power signal lines, scanning signal lines, etc. Part of the second conductive layer 10 is exposed through the first via hole 181 to form a pad area of ​​the first terminal 61 , which is further connected to an external driving circuit board or driving chip through the pad area to control the display panel.

[0077] Continue to refer to Fig.11, the display panel includes: a base substrate 1; a plurality of terminals 6; a first passivation layer 9; a first cover layer 13; a second passivation layer 11 and a second cover layer 14; the display panel also includes a plurality of vias 18 penetrating the second passivation layer 11 and the second cover layer 14. The plurality of vias 18 include a third via 182; the first passivation layer 9 also includes a second protrusion 912. The orthographic projection of the third via 182 on the base substrate 1 at least partially overlaps with the orthographic projection of the second protrusion 912 on the base substrate 1. The display panel also includes a fourth via 172 penetrating the first passivation layer 11 and the first cover layer 13. The display panel also includes a second terminal 62 and a second wiring 72. The second terminal 62 is electrically connected to the second wiring 72 through the fourth via 172. The orthographic projection of the third via 182 on the base substrate 1 and the projection of the fourth via 172 on the base substrate are arranged at intervals along the second direction.

[0078] In the embodiment of the present disclosure, the plurality of vias 18 penetrating the second passivation layer 11 and the second cover layer 14 include a fifth via 183. The display panel also includes a first passivation layer 9. The first passivation layer 9 includes a third protrusion 913. The orthographic projection of the fifth via 183 on the base substrate 1 at least partially overlaps with the orthographic projection of the third protrusion 913 on the base substrate 1. The display panel also includes a sixth via 173 penetrating the first passivation layer 9 and the first cover layer 13. The plurality of terminals 6 also include a third terminal 63. The orthographic projection of the fifth via 183 on the base substrate 1 and the orthographic projection of the sixth via 173 on the base substrate 1 are at least partially aligned along the first direction.

[0079] By optimizing the positional relationship between the third via 182 and the fifth via 183 and the protrusion of the first passivation layer, at least a portion of the orthographic projection of the third via 182 on the substrate 1 falls within the orthographic projection of the second protrusion 912 on the substrate 1, and at least a portion of the orthographic projection of the fifth via 183 on the substrate 1 falls within the orthographic projection of the third protrusion 913 on the substrate 1, thereby ensuring that when preparing the second conductive layer 10, there is no significant step difference in the first passivation layer 9 below the positions of the third via 182 and the fifth via 183, which will not cause the film quality of the second conductive layer 10 in the area where the third via 182 and the fifth via 183 are located to be reduced, thereby affecting the electrical performance of the terminals at the corresponding positions.

[0080] Fig.12 and Fig.13 is a schematic plan view of a display panel in some other embodiments of the present disclosure, wherein Fig.12 and Fig.13 The edge structure of the first passivation layer is shown.

[0081] Reference Fig.12 The display panel includes: a base substrate 1; and a first passivation layer 9. The base substrate 1 includes a side edge 4 of the base substrate; and the orthographic projection of the first passivation layer 9 on the base substrate includes a side edge 95 close to the side edge 4 of the base substrate, and the side edge 95 is serrated.

[0082] Reference Fig.13 The display panel includes: a base substrate 1; and a first passivation layer 9. The base substrate 1 includes a side edge 4 of the base substrate; the orthographic projection of the first passivation layer 9 on the base substrate includes a side edge 95 close to the side edge 4 of the base substrate, and the side edge 95 is a continuous fold line.

[0083] Combined with reference Figure 6B In some embodiments of the present disclosure, the orthographic projection of at least one of the multiple terminals 6 on the base substrate 1 falls within the orthographic projection of the first passivation layer 9 on the base substrate 1. The multiple terminals are located in the second conductive layer. By designing the shape of the side edge 95 of the orthographic projection of the first passivation layer 9 on the base substrate 1, the step difference of the film layer below the second conductive layer 10 during the process of preparing the second conductive layer 10 on the first passivation layer 9 can be reduced or even eliminated, that is, a more flat bottom supporting film layer is provided for the second conductive layer 10. When the second conductive layer 10 is grown in this way, the film layer of the second conductive layer 10 will be more uniform and dense, which can significantly reduce the defects in the second conductive layer 10, and can also reduce the gap between the second conductive layer 10 and the first passivation layer below, thereby reducing the probability of damage to the second conductive layer 10 by other subsequent processes of the second conductive layer 10, and improving the electrical stability of the second conductive layer 10, thereby reducing the probability of short circuit or open circuit on the second conductive layer 10, and improving the reliability of the display panel.

[0084] Fig.14 4 is a cross-sectional view of a display panel at a terminal according to some other embodiments of the present disclosure.

[0085] Reference Fig.14, the display panel includes: a base substrate 1; a buffer layer 12; a first conductive layer 8; a first passivation layer 9; a second conductive layer 10; and a second passivation layer 11. The display panel also includes a plurality of terminals 6, wherein at least one of the terminals 6 includes a terminal body 67 and a nickel-gold layer 68. The terminal body 67 is located in the second conductive layer, and the nickel-gold layer 68 is located on the surface of the terminal body 67 away from the base substrate 1. The preparation process of the nickel-gold layer 68 includes forming an opening in a partial area of ​​the second passivation layer 11, and the formation process of the opening area can be laser etching, plasma etching, or reactive ion etching. After the opening is formed, a nickel-gold layer is formed in the opening area by electroplating nickel-gold or sputtering nickel-gold, wherein the quality of the nickel-gold layer is closely related to the film quality of the second conductive layer in the opening area. If the film quality of the second conductive layer in the opening area is high, the film defects of the nickel-gold layer prepared above the second conductive layer corresponding to the opening area will be less, which can greatly improve the electrical stability of the display panel terminal.

[0086] Fig.15A This is a partial enlarged view of a defective terminal of a display panel in the related art; Fig. 15B yes Fig.15A SEM image of the terminal defect shown.

[0087] The inventors have found through research that in the process of preparing the second conductive layer at the position of the opening area, if the underlying film layer, such as the first passivation layer, has a step difference in the opening area, the second conductive layer grown in the area with the step difference often has many defects. Fig.15A The picture shown is an enlarged picture of one of the defective terminals in the display panel. The black straight line in the middle is the area with step difference. After the opening is formed in this area to prepare the nickel-gold layer, the quality of the nickel-gold layer is significantly reduced, and defects such as uneven surface and edge overflow appear, which leads to abnormalities such as short circuit or open circuit in the electrical connection between the terminal and the external driver circuit board, reducing the display quality of the display panel. Fig. 15B Through microscope analysis, it can be found that the second conductive layer in this area has cracks or the bottom etching causes the surface of the second conductive layer close to the substrate to be uneven, which leads to the subsequent preparation of the nickel-gold layer, such as the nickel-gold electroplating process. The gold solution enters the cracks of the second conductive layer or the uneven gap area of ​​the second conductive layer, resulting in abnormal nickel-gold plating, which in turn causes a short circuit or open circuit between the terminal and the external driver circuit board or driver chip, seriously affecting the reliability of the display panel.

[0088] Fig.16 is a SEM image of one terminal in a display panel according to some exemplary embodiments of the present disclosure.

[0089] In the embodiments of the present disclosure, referring to Fig.16, by designing the protruding portion of the first passivation layer below the second conductive layer, e.g. Fig.12 The serrated design can improve the flatness of the film layer below the second conductive layer and eliminate the step difference of the film layer below some terminals in the second conductive layer, thereby improving the film quality of the terminals in the non-step difference area. By eliminating the step difference of the film layer below the second conductive layer, the quality of the prepared second conductive layer is significantly improved, the surface of the film is flat, there are no obvious cracks, and there is no uneven bottom caused by dry etching. Furthermore, when the nickel-gold layer is prepared in the corresponding opening area above the second conductive layer with higher quality, the quality of the nickel-gold layer in the opening area above the second conductive layer can be improved, the probability of defective display panels can be reduced, and the reliability of the display panel can be improved.

[0090] Fig.17 1 is a schematic plan view of a display panel according to some other exemplary embodiments of the present disclosure.

[0091] Reference Fig.17 The display panel comprises: at least one display area 2 and a side area 3 and a side edge 4 of a substrate, wherein the side edge 4 of the substrate is parallel to the side edge 4 of the substrate. Fig.17In the first direction D1 shown, the distance between the side region 3 and the side edge 4 of the substrate is smaller than the distance between the display region 2 and the side edge 4 of the substrate; a plurality of pixel units 5 are arranged in the display region 2, and the plurality of pixel units 5 are distributed in an array on the substrate 1, wherein at least one of the pixel units includes a light emitting diode, and the light emitting diode may include a sub-millimeter light emitting diode or a micro light emitting diode, which may adopt the structure of a light emitting diode chip; a plurality of terminals 6 are arranged on the substrate 1 and located in the side region 3, and the plurality of terminals are distributed in the side region 3 at intervals along the first direction D1; a plurality of wirings 7 are arranged on the substrate 1, wherein one end of at least one of the wirings 7 is electrically connected to the terminal 6, and the other end is electrically connected to the driving circuit of the pixel unit 5, and the driving circuit of the pixel unit 5 may include at least one transistor, and the transistor may include a source, a gate, a drain, and an active layer. For example, the transistor may have a dual-gate structure, which may include a first gate located below the active layer and a second gate located above the active layer. The display panel also includes a lead 20 disposed on the base substrate 1, one end of the lead is electrically connected to the terminal 6, and the lead 20 extends from the terminal toward the side edge 4 of the base substrate. The lead is used to lead the signal line to the driving circuit board or the driving chip. Further, the display panel may include multiple independent display panels, and the multiple independent display panels may be individually connected to independent sub-driving circuit boards or sub-driving chips, and further the master control chip is used to control each sub-driving circuit board or sub-driving chip in a linkage manner to achieve the overall display of multiple display panels; the multiple independent display panels may also partially share some sub-driving circuit boards or sub-driving chips, and further the master control chip is used to control each sub-driving circuit board or sub-driving chip in a linkage manner to achieve the overall display of multiple display panels; the multiple independent display panels may also all share a master control chip, and the master control chip is used to realize the linkage control of the display panel. The specific matching of multiple display screens and driving circuits needs to be designed based on the number of multiple display panels and the driving requirements, combined with the driving circuit of the driving circuit board or the number of pins of the driving chip.

[0092] In the embodiments of the present disclosure, Figure 2 and reference Fig.17, the display panel also includes: a first conductive layer 8 arranged on the base substrate 1, wherein the multiple wirings 7 are located in the first conductive layer 8; the display panel also includes a first passivation layer 9 arranged on the side of the first conductive layer 8 away from the base substrate 1; and a second conductive layer 10 arranged on the side of the first passivation layer 9 away from the base substrate 1, wherein the terminal 6 is located in the second conductive layer, and at least one of the orthographic projections of the terminal 6 on the base substrate 1 falls within the orthographic projection of the first passivation layer 9 on the base substrate 1. By designing the structure of the first passivation layer, the probability of step difference in the first passivation layer 9 below the terminal 6 can be reduced or eliminated, thereby improving the film quality of the second conductive layer 10 where the terminal 6 is located, reducing the probability of abnormal nickel-gold process at the terminal in subsequent processes, improving the reliability and stability of the terminal 6, and reducing the probability of short circuit or open circuit. Furthermore, the signal lines of the display area, such as data signals, power signals, scanning signals, etc., are led out through the leads 20 to a driving circuit board or a driving chip located on the side or back of the display panel through the terminals, which is beneficial for achieving narrow slit splicing or seamless splicing of small screens during the small screen splicing process, thereby further improving the display effect of the display panel.

[0093] Fig.18 1 is a schematic plan view of a display panel according to some other embodiments of the present disclosure, wherein at least two small screens are spliced ​​together to form a large display screen.

[0094] Reference Fig.18 The display panel includes a plurality of sub-display panels 100, and the plurality of sub-display panels 100 are connected to a master control chip through the connection wiring of the 1S area to realize linkage control of the plurality of sub-display panels. Before the plurality of sub-display panels are connected to the master control circuit board or the master control chip, they can also be connected to the sub-control driving circuit board or the sub-driving chip first according to actual control requirements, and then connected to the master control circuit board or the master control chip.

[0095] Some exemplary embodiments of the present disclosure further provide a display device, wherein the display device includes any display panel as described above.

[0096] It will be appreciated by those skilled in the art that the features described in the various embodiments and / or claims of the present disclosure may be combined and / or combined in a variety of ways, even if such combinations and / or combinations are not explicitly described in the present disclosure. In particular, the features described in the various embodiments and / or claims of the present disclosure may be combined and / or combined in a variety of ways without departing from the spirit and teachings of the present disclosure. All of these combinations and / or combinations fall within the scope of the present disclosure.

[0097] Although the present disclosure has been shown and described with reference to specific exemplary embodiments of the present disclosure, it should be understood by those skilled in the art that various changes in form and details may be made to the present disclosure without departing from the spirit and scope of the present disclosure as defined by the appended claims and their equivalents. Therefore, the scope of the present disclosure should not be limited to the above-mentioned embodiments, but should be determined not only by the appended claims, but also by the equivalents of the appended claims.

Claims

1. A display panel, wherein: The display panel comprises: A base substrate, the base substrate comprising at least one side region and a display region, wherein the at least one side region is closer to a side edge of the base substrate than the display region; A plurality of pixel units are arranged in the display area, the plurality of pixel units are distributed in an array on the substrate along a first direction and a second direction, and at least one of the pixel units includes a light emitting diode; A plurality of terminals are disposed on the base substrate and located in the side region, wherein the plurality of terminals are spaced apart and distributed along the side edge of the base substrate; and A plurality of wirings are arranged on the substrate, at least one of the wirings having one end electrically connected to the terminal and the other end electrically connected to the light emitting diode, Wherein, the display panel comprises: A first conductive layer disposed on the substrate, wherein the plurality of traces are located in the first conductive layer; A first passivation layer disposed on a side of the first conductive layer away from the substrate; and a second conductive layer disposed on a side of the first passivation layer away from the base substrate, wherein the terminal is located in the second conductive layer, The orthographic projection of at least one of the terminals on the base substrate falls within the orthographic projection of the first passivation layer on the base substrate.

2. The display panel according to claim 1, wherein: The first passivation layer includes a plurality of protrusions, and the orthographic projections of the plurality of terminals on the base substrate respectively fall within the orthographic projections of the plurality of protrusions on the base substrate.

3. The display panel according to claim 1, wherein: The plurality of terminals include a first terminal, the plurality of traces include a first trace, the first trace is used to transmit a ground signal, and the first terminal is electrically connected to the first trace; as well as An orthographic projection of the first terminal on the base substrate falls within an orthographic projection of the first passivation layer on the base substrate.

4. The display panel according to claim 1, wherein: The orthographic projection of the first terminal on the base substrate includes a first side edge close to a side edge of the base substrate; and The first passivation layer includes a first protrusion, the orthographic projection of the first protrusion on the substrate includes a second side edge close to the side edge of the substrate, the orthographic projection of the first terminal on the substrate falls within the orthographic projection of the first protrusion on the substrate, and in a second direction, the second side edge is closer to the side edge of the substrate than the first side edge, wherein the second direction is perpendicular to the side edge of the substrate.

5. The display panel according to claim 1 or 2, wherein: A size of an orthographic projection of the first protrusion on the base substrate along a first direction is greater than a size of an orthographic projection of the first terminal on the base substrate along the first direction, wherein the first direction is parallel to a side edge of the base substrate.

6. The display panel according to claim 4, wherein: The plurality of pixel units respectively include a first light emitting diode, a second light emitting diode and a third light emitting diode, wherein the first light emitting diode is used to emit light of a first color, the second light emitting diode is used to emit light of a second color, and the third light emitting diode is used to emit light of a third color; The plurality of wires further include a second wire and a third wire, the second wire being used to transmit a first voltage signal to the second light emitting diode and the third light emitting diode, and the third wire being used to transmit a second voltage signal to the first light emitting diode; and The plurality of terminals further include a second terminal and a third terminal, the second terminal is electrically connected to the second trace, and the third terminal is electrically connected to the third trace.

7. The display panel according to any one of claims 1 to 5, wherein: An orthographic projection of at least one of the second terminal and the third terminal on the base substrate falls within an orthographic projection of the first passivation layer on the base substrate.

8. Wherein, the orthographic projection of the second terminal on the base substrate includes a third side edge close to the side edge of the base substrate; and The first passivation layer includes a second protrusion, the orthographic projection of the second protrusion on the base substrate includes a fourth side edge close to the side edge of the base substrate, and in the second direction, the fourth side edge is closer to the side edge of the base substrate than the third side edge.

9. Wherein, the orthographic projection of the third terminal on the base substrate includes a fifth side close to the side edge of the base substrate; and The first passivation layer includes a third protrusion, the orthographic projection of the third protrusion on the base substrate includes a sixth side edge close to the side edge of the base substrate, and in the second direction, the sixth side edge is closer to the side edge of the base substrate than the fifth side edge.

10. The display panel according to any one of claims 1 to 6, wherein: An orthographic projection of at least one of the second terminal and the third terminal on the base substrate partially overlaps with an orthographic projection of the first passivation layer on the base substrate.

11. The display panel according to claim 9, wherein: The first passivation layer includes a first sub-passivation layer and a second sub-passivation layer, and the second sub-passivation layer is located on a side of the first sub-passivation layer away from the substrate; The display panel further includes a first covering layer, wherein the first covering layer is located between the first sub-passivation layer and the second sub-passivation layer; as well as The orthographic projection of at least one of the terminals on the base substrate falls within the orthographic projection of each of the first sub-passivation layer and the second sub-passivation layer on the base substrate, and the orthographic projection of at least one of the terminals on the base substrate partially overlaps with the orthographic projection of the first covering layer on the base substrate.

12. The display panel according to claim 10, wherein: The display panel further includes a second passivation layer, wherein the second passivation layer is located on a side of the second conductive layer away from the base substrate; and The orthographic projection of the first passivation layer on the base substrate includes a seventh side close to the side edge of the base substrate, and the orthographic projection of the second passivation layer on the base substrate includes an eighth side close to the side edge of the base substrate, and in the second direction, the eighth side is closer to the side edge of the base substrate than the seventh side.

13. The display panel according to any one of claims 1 to 12, wherein: The second passivation layer includes a third sub-passivation layer and a fourth sub-passivation layer, and the fourth sub-passivation layer is located on a side of the third sub-passivation layer away from the substrate; The display panel further includes a second covering layer, wherein the second covering layer is located between the third sub-passivation layer and the fourth sub-passivation layer; as well as An orthographic projection of at least one of the terminals on the base substrate partially overlaps with an orthographic projection of the second cover layer on the base substrate.

14. The display panel according to claim 11, wherein: The display panel includes a plurality of via holes penetrating the second passivation layer and the second cover layer, the plurality of via holes respectively exposing at least a portion of the plurality of terminals; as well as An orthographic projection of at least one of the via holes on the base substrate partially overlaps with an orthographic projection of at least one of the protrusions on the base substrate.

15. The display panel according to claim 14, wherein: The plurality of via holes penetrating the second passivation layer and the second cover layer include a first via hole, an orthographic projection of the first via hole on the base substrate partially overlaps with an orthographic projection of the first protrusion on the base substrate; The display panel further includes a second via hole penetrating the first passivation layer and the first covering layer, and the first terminal is electrically connected to the first trace through the second via hole; as well as An orthographic projection of the first via hole on the base substrate and an orthographic projection of the second via hole on the base substrate are at least partially aligned along a first direction.

16. The display panel according to any one of claims 1 to 12, wherein: The plurality of via holes penetrating the second passivation layer and the second cover layer include a third via hole, and an orthographic projection of the third via hole on the base substrate partially overlaps with an orthographic projection of the second protrusion on the base substrate; The display panel further includes a fourth via hole penetrating the first passivation layer and the first cover layer, and the second terminal is electrically connected to the second trace through the fourth via hole; as well as The orthographic projection of the third via hole on the base substrate and the orthographic projection of the fourth via hole on the base substrate are arranged at intervals along the second direction.

17. The display panel according to claim 16, wherein: The plurality of via holes penetrating the second passivation layer and the second cover layer include a fifth via hole, and an orthographic projection of the fifth via hole on the base substrate partially overlaps with an orthographic projection of the third protrusion on the base substrate; The display panel further includes a sixth via hole penetrating the first passivation layer and the first covering layer, and the third terminal is electrically connected to the third trace through the sixth via hole; as well as An orthographic projection of the fifth via hole on the base substrate and an orthographic projection of the sixth via hole on the base substrate are at least partially aligned along a first direction.

18. The display panel according to claim 17, wherein: The orthographic projection of the first passivation layer on the base substrate includes a side edge close to a side edge of the base substrate, and the side edge includes a shape selected from the group consisting of a wall shape, a sawtooth shape, a wave shape, and a continuous broken line shape.

19. The display panel according to claim 6, wherein: At least one of the terminals includes a terminal body and a nickel-gold plating layer, wherein the terminal body is located in the second conductive layer, and the nickel-gold plating layer is located on a surface of the terminal body away from the base substrate.

20. A display panel, wherein: The display panel comprises: A base substrate, the base substrate comprising at least one side region and a display region, wherein the at least one side region is closer to a side edge of the base substrate than the display region; A plurality of pixel units are arranged in the display area, the plurality of pixel units are distributed in an array on the substrate, and at least one of the pixel units comprises a light emitting diode; A plurality of terminals are arranged on the substrate and located in the side area, and the plurality of terminals are distributed at intervals along the side edge of the substrate; A plurality of wirings are arranged on the substrate, at least one of the wirings having one end electrically connected to the terminal and the other end electrically connected to the light emitting diode; and A lead wire is arranged on the base substrate, one end of the lead wire is electrically connected to the terminal, and the lead wire extends from the terminal toward the side edge of the base substrate. Wherein, the display panel comprises: A first conductive layer disposed on the substrate, wherein the plurality of traces are located in the first conductive layer; A first passivation layer disposed on a side of the first conductive layer away from the substrate; and a second conductive layer disposed on a side of the first passivation layer away from the base substrate, wherein the terminal is located in the second conductive layer, The orthographic projection of at least one of the terminals on the base substrate falls within the orthographic projection of the first passivation layer on the base substrate.

21. A display device, wherein: The display device comprises the display panel according to any one of claims 1 to 20.

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