Light-emitting field effect transistor and display device

Abstract

The invention provides a light-emitting field effect transistor and a display device. The light-emitting field effect transistor includes a gate layer, a light-emitting layer, and a source-drain layer. The gate layer includes a base portion and a pillar portion disposed on the base portion. The light-emitting layer is arranged on one side of the base part in an insulating mode and surrounds the stand column part. The source-drain layer is arranged on the side, away from the gate layer, of the light-emitting layer. According to the invention, the stand column part is added in the gate layer, so that the interface area of aggregated carriers in the device is increased, the concentration of the carriers in a conducting channel is improved, the voltage applied to the gate layer can be regulated and controlled according to requirements, the concentration of the carriers in the conducting channel is further increased or inhibited, and the number of electrons and holes in the device is convenient to balance.

Description

Technical Field

[0001] The present invention relates to the field of display technology, in particular to a light-emitting field effect transistor and a display device. Background Art

[0002] The OLEFET (Organic Light-Emitting Field Effect Transistor) reported in recent years is a new functional device that combines the luminescence characteristics of OLED (Organic Light-Emitting Diode) and the switching characteristics of OFET (Organic field-effect transistor).

[0003] In theory, OLEFET provides a new device structure for studying the transport characteristics of carriers and the luminescence theory of excitons, which has important display significance. At the same time, due to the characteristics of high current density and low metal electrode absorption loss, OLEFET is also an ideal structure for constructing electrically pumped organic lasers.

[0004] In terms of application, the flat panel display technology based on OLEFET has a simpler process and higher integration than the flat panel display technology based on OFET-driven OLED. It is expected to significantly reduce the panel preparation cost, improve the yield and overall performance of the panel, and is therefore regarded as a strong competitor for the next generation of flat panel display technology.

[0005] However, the inventors have found in their research that the current OLEFET structure has limited effect on regulating carriers, resulting in poor luminescence of the device, which in turn causes the display effect of the terminal device to fail to meet expectations. Summary of the invention

[0006] The object of the present invention is to provide a light-emitting field effect transistor and a display device to solve the problem that the light-emitting effect of the current OLEFET light-emitting structure is not good, resulting in an unsatisfactory display effect of the device.

[0007] To achieve the above object, the present invention provides a light-emitting field effect transistor, which includes a gate layer, a light-emitting layer and a source-drain electrode layer. The gate layer includes a base portion and a column portion provided on the base portion. The light-emitting layer is insulated and provided on one side of the base portion and surrounds the column portion. The source-drain electrode layer is provided on a side of the light-emitting layer away from the gate layer.

[0008] Further, the orthographic projection of the column portion on the light-emitting layer is located within the orthographic projection range of the base portion on the light-emitting layer. The column portion extends along a first direction perpendicular to the surface where the base portion is located, and the base portion extends along a second direction perpendicular to the first direction. Preferably, the material of the gate layer includes a conductive material. Preferably, the material of the column portion is the same as that of the base portion.

[0009] Further, the source-drain electrode layer comprises a first electrode located on one side of the pillar portion and a second electrode located on a side of the pillar portion away from the first electrode. Preferably, the orthographic projection of the pillar portion on the base portion does not overlap with the orthographic projection of the source-drain electrode layer on the base portion.

[0010] Further, the orthographic projection of the column portion on the base portion is located between the orthographic projections of the first electrode and the second electrode on the base portion. Preferably, the column portion has a central axis, and the central axis coincides with the center point of the light-emitting layer.

[0011] Further, the gate layer includes at least two base portions and at least two pillar portions, a gap is provided between two adjacent base portions, and each base portion is provided with a pillar portion. Preferably, the orthographic projections of the first electrode and the second electrode on the base portion are respectively located on both sides of the gap. Preferably, the orthographic projection of the base portion on the light-emitting layer is outside the orthographic projection range of the adjacent base portion on the light-emitting layer.

[0012] Further, the gate layer includes at least one first base portion and at least one second base portion, the orthographic projection of the first electrode on the gate layer is located on the first base portion, and the orthographic projection of the second electrode on the gate layer is located on the second base portion. A positive voltage is applied to the first base portion, and a negative voltage is applied to the second base portion. Preferably, the orthographic projection of the first base portion on the light-emitting layer is outside the orthographic projection range of the second base portion on the light-emitting layer.

[0013] Furthermore, a distance between one end of the column portion away from the base portion and the base portion is greater than or equal to a distance between one side of the light-emitting layer away from the substrate portion and the base portion.

[0014] Furthermore, the light-emitting field effect transistor further comprises an insulating layer, wherein the insulating layer is disposed between the gate layer and the light-emitting layer and covers an exposed surface of the column portion.

[0015] Furthermore, the material of the light-emitting layer includes an organic semiconductor material. The material of the insulating layer includes an inorganic material. Preferably, the inorganic material includes silicon atoms.

[0016] Furthermore, the light-emitting field effect transistor further comprises a hole transport layer and an electron transport layer. The hole transport layer is arranged between the light-emitting layer and the source-drain electrode layer, the electron transport layer is arranged between the light-emitting layer and the base, and the distance between the end of the column away from the base and the base is greater than or equal to the distance between the end of the hole transport layer away from the base and the base; or, the hole transport layer is arranged between the light-emitting layer and the base, the electron transport layer is arranged between the light-emitting layer and the source-drain electrode layer, and the distance between the end of the column away from the base and the base is greater than or equal to the distance between the end of the electron transport layer away from the base and the base.

[0017] The present invention further provides a display device, which includes the light-emitting field effect transistor as described above.

[0018] The advantages of the present invention are: in a light-emitting field effect transistor and a display device of the present invention, by adding a column portion in the gate layer, the interface area of ​​the carriers gathered in the device and the direction of the field effect are increased, so that more carriers can be gathered in the conductive channel, thereby increasing the concentration of carriers in the conductive channel. At the same time, different gate layer voltages can be applied to different organic semiconductor materials used in the light-emitting field effect transistor, thereby increasing or suppressing the concentration of carriers in the conductive channel, facilitating the balance of the number of electrons and holes in the device, thereby improving the current luminous efficiency of the device and reducing the risk of heat damage to the device due to the imbalance of the number of electrons and holes in the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0020] Figure 1 is a top view of the light-emitting field effect transistor in Example 1 of the present invention;

[0021] Figure 2 for Figure 1 A schematic diagram of the cross-sectional structure of the light-emitting field effect transistor at line AA';

[0022] Figure 3 A schematic diagram of the flow of carriers when a positive voltage is applied to the gate layer in Example 1 of the present invention;

[0023] Figure 4 A schematic diagram of the flow of carriers when a negative voltage is applied to the gate layer in Example 1 of the present invention;

[0024] Figure 5 is a schematic diagram of a cross-sectional structure of a light-emitting field effect transistor in another embodiment of the present invention;

[0025] Figure 6 is a schematic diagram of a cross-sectional structure of a light-emitting field effect transistor in another embodiment of the present invention;

[0026] Figure 7 is a top view of a light-emitting field effect transistor in Example 2 of the present invention;

[0027] Figure 8 for Figure 7 A schematic diagram of the cross-sectional structure of the light-emitting field effect transistor at line BB';

[0028] Fig. 9 Schematic diagram of the flow of carriers when a positive voltage and a negative voltage are applied to the gate layer in Embodiment 2 of the present invention;

[0029] Fig.10 is a schematic diagram of a cross-sectional structure of a light-emitting field effect transistor in another embodiment of the present invention;

[0030] Fig.11 Schematic diagram of the cross-sectional structure of a light-emitting field effect transistor in other embodiments of the present invention.

[0031] The components in the figure are shown as follows:

[0032] Light-emitting field effect transistor 1; Gate layer 10;

[0033] Base portion 11; First base portion 111;

[0034] The second base portion 112; The column portion 12;

[0035] A first column portion 121; A second column portion 122;

[0036] Gap 13; Insulation layer 20;

[0037] Electron transport layer 30; Light emitting layer 40;

[0038] Hole transport layer 50; Source and drain layer 60;

[0039] A first electrode 61; A second electrode 62;

[0040] Electron 2; Hole 3. DETAILED DESCRIPTION

[0041] The preferred embodiments of the present invention are described below with reference to the drawings in the specification to prove that the present invention can be implemented. The embodiments of the invention can fully introduce the present invention to those skilled in the art, making its technical content clearer and easier to understand. The present invention can be embodied through many different forms of embodiments of the invention, and the protection scope of the present invention is not limited to the embodiments mentioned in the text.

[0042] In the drawings, components with the same structure are indicated by the same numerical reference numerals, and components with similar structures or functions are indicated by similar numerical reference numerals. The size and thickness of each component shown in the drawings are arbitrarily shown, and the present invention does not limit the size and thickness of each component. In order to make the illustration clearer, the thickness of the components is appropriately exaggerated in some places in the drawings.

[0043] In addition, the following descriptions of the various embodiments of the invention are made with reference to the attached diagrams to illustrate specific embodiments of the invention that the present invention can be implemented with. The directional terms mentioned in the present invention, such as "upper", "lower", "front", "back", "left", "right", "inner", "outer", "side", etc., are only with reference to the directions of the attached drawings. Therefore, the directional terms used are for better and clearer description and understanding of the present invention, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", "third", etc. are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0044] When some components are described as being "on" another component, the component may be directly placed on the other component; there may also be an intermediate component on which the component is placed, and the intermediate component is placed on the other component. When a component is described as being "mounted on" or "connected to" another component, the two may be understood to be directly "mounted on" or "connected", or one component may be indirectly "mounted on" or "connected to" another component via an intermediate component.

[0045] In related display technologies, OLEFET devices integrate multiple layers of organic semiconductor layers on the basis of OTFT device structures, and control the carrier concentration in the organic semiconductor layer through gate voltage, thereby improving the efficiency of electron / hole injection, and further improving the efficiency of electron-hole recombination in the light-emitting layer. However, OLEFET devices in related display technologies are all planar bottom-gate structures, and the distance between the carriers in the upper layer and the gate is too far, which severely limits the regulating effect of the gate on the carriers, thereby affecting the luminescence effect of the device and increasing its power consumption. The top-gate structured OLEFET device has a complex process, high production cost, and low production efficiency, which is not conducive to mass production.

[0046] Example 1

[0047] Based on the technical problems raised in the above-mentioned related display technologies, an embodiment of the present invention provides a light-emitting field effect transistor 1, such as Figure 1 and Figure 2 As shown, the light-emitting field effect transistor 1 includes a gate layer 10 , an insulating layer 20 , a light-emitting layer 40 , an electron transport layer 30 , a hole transport layer 50 and a source-drain electrode layer 60 .

[0048] The insulating layer 20 is arranged on the surface of the gate layer 10, the electron transport layer 30, the light emitting layer 40 and the hole transport layer 50 are stacked in sequence on the side of the insulating layer 20 away from the gate layer 10, and the source and drain layer 60 is arranged on the side of the hole transport layer 50 away from the gate layer 10. Among them, the source and drain layer 60 includes a first electrode 61 and a second electrode 62. The materials of the gate layer 10 and the source and drain layer 60 include at least one of conductive materials such as metals and metal oxides. The materials of the electron transport layer 30, the light emitting layer 40 and the hole transport layer 50 all include organic semiconductor materials; the material of the insulating layer 20 includes inorganic materials containing silicon atoms, such as silicon oxide (SiOx), silicon nitride (SiNx), etc., which can be prepared by CVD (Chemical Vapor Deposition) process or thermal oxidation process.

[0049] After conducting, the gate layer 10 forms a conductive channel in the electron transport layer 30, the light-emitting layer 40 and the hole transport layer 50 containing organic semiconductor materials. The first electrode 61 injects charges into the conductive channel, and the second electrode 62 collects the charges flowing out of the conductive channel, thereby electrically turning on the light-emitting field effect transistor 1. The switching control of the light-emitting field effect transistor 1 is achieved by controlling the circuit signal received by the gate layer 10. At the same time, after being conductive, the source and drain layer 60 can transfer carriers to the conductive channel (i.e., the electron transport layer 30, the hole transport layer 50 and the light-emitting layer 40), that is, the first electrode 61 and the second electrode 62 inject electrons 2 and holes 3 into the electron transport layer 30 and the hole transport layer 50 respectively, and under the action of the transverse electric field between the voltage of the first electrode 61 and the voltage of the second electrode 62, the electron transport layer 30 and the hole transport layer 50 then transfer electrons 2 and holes 3 to the light-emitting layer 40, so that the electrons 2 and holes 3 can be recombined in the middle position of the light-emitting layer 40, thereby exciting the excitons in the light-emitting layer 40 to emit light, thereby converting electrical energy into light energy.

[0050] Further, the gate layer 10 includes a base portion 11 and a column portion 12, the column portion 12 is arranged on the surface of the base portion 11, the column portion 12 extends along a first direction Y perpendicular to the surface of the base portion 11, and the base portion 11 extends along a second direction X perpendicular to the first direction Y, so that the orthographic projection of the column portion 12 on the light-emitting layer 40 is located within the orthographic projection range of the base portion 12 on the light-emitting layer 40. The orthographic projection of the column portion 12 on the base portion 11 does not overlap with the orthographic projection of the source and drain electrode layer 60 on the base portion 11. The column portion 12 has a central axis L, which is perpendicular to the surface of the base portion 11 in contact with the column portion 12, thereby forming a vertical gate structure. The vertical gate structure can be prepared by a patterning process, such as a photolithography process, a wet etching process, a dry etching process or a silicon wafer etching process, and the base portion 11 and the column portion 12 can be prepared simultaneously in the same process, so that the material of the base portion 11 is the same as that of the column portion 12.

[0051] Specifically, the insulating layer 20 is disposed on the surface of the base portion 11 and covers the exposed surface of the column portion 12. The electron transport layer 30, the hole transport layer 50 and the light emitting layer 40 are disposed on the side of the insulating layer 20 away from the base portion 11 and surround the column portion 12. The distance between the end of the column portion 12 away from the base portion 11 (i.e., the top of the column portion 12) and the base portion 11 is greater than the distance between the end of the light emitting layer 40 away from the base portion 11 and the base portion 11, and the distance between the end of the column portion 12 away from the base portion 11 and the base portion 11 is greater than or equal to the distance between the end of the hole transport layer 50 away from the base portion 11 (i.e., the top surface of the hole transport layer 50) and the base portion 11, that is, the top height of the column portion 12 is greater than or equal to the top surface height of the hole transport layer 50, so that the column portion 12 sequentially penetrates the electron transport layer 30, the light emitting layer 40 and the hole transport layer 50 in the thickness direction (i.e., the first direction Y) of the light emitting field effect transistor 1. The concentration of carriers in the corresponding transport layer can be controlled by regulating the voltage applied to the gate layer 10, as follows:

[0052] When a positive voltage is applied to the gate layer 10, Figure 3 As shown, the electrons 2 injected by the first electrode 61 gather toward the horizontal interface between the insulating layer 20 and the electron transport layer 30 on the surface of the base portion 11, and also gather toward the vertical interface between the insulating layer 20 and the electron transport layer 30 on the surface of the column portion 12. Compared with the planar bottom gate structure in the related art in which the electrons 2 only gather on the horizontal interface between the insulating layer 20 and the electron transport layer 30, the vertical gate structure in the embodiment of the present invention can increase the interface area of ​​the electron 2 gathering through the column portion 12, that is, a vertical interface is added on the basis of the horizontal interface, thereby increasing the concentration of the electrons 2 in the electron transport layer 30 through the field effect generated by the column portion 12;

[0053] When a negative voltage is applied to the gate layer 10, as Figure 4 As shown, the holes 3 injected by the second electrode 62 are gathered toward the horizontal interface between the insulating layer 20 and the hole transport layer 50 on the surface of the base portion 11, and are also gathered toward the vertical interface between the insulating layer 20 and the hole transport layer 50 on the surface of the column portion 12. Compared with the planar bottom gate structure in the related art in which the holes 3 are only gathered on the horizontal interface between the insulating layer 20 and the hole transport layer 50, the vertical gate structure in the embodiment of the present invention can increase the interface area of ​​the hole 3 gathering through the column portion 12, that is, a vertical interface is added on the basis of the horizontal interface, thereby increasing the concentration of holes 3 in the hole transport layer 50 through the field effect generated by the column portion 12.

[0054] On the one hand, in the embodiment of the present invention, a vertical column portion 12 is formed on the base portion 11 of the gate layer 10, and the column portion 12 increases the field effect action direction of the gate layer 10 in the horizontal direction. The field effect action direction is different from the field effect action direction generated by the base layer in the vertical direction, which enables the carriers to be evenly distributed in the electron transport layer 30 or the hole transport layer 50 in the horizontal direction, and also compresses the distance between adjacent carriers in the horizontal direction, so that more carriers can be gathered in the electron transport layer 30 or the hole transport layer 50, thereby increasing the concentration of carriers in the electron transport layer 30 or the hole transport layer 50. At the same time, the vertical column portion 12 can also increase the interface area of ​​the gathered carriers, and can also increase the concentration of carriers in the electron transport layer 30 or the hole transport layer 50.

[0055] On the other hand, in the embodiment of the present invention, in view of the differences in the organic semiconductor materials contained in the electron transport layer 30, the light-emitting layer 40 and the hole transport layer 50, the concentration of carriers in the corresponding transport layer can be increased or suppressed by controlling the gate voltage, thereby facilitating the control of the number of electrons 2 and holes 3 in the light-emitting field effect transistor 1 to be the same, thereby effectively improving the current luminous efficiency of the device and reducing the risk of device heating due to excessive carrier concentration on one side. At the same time, the hole blocking layer and electron blocking layer in the traditional OLED device can be omitted, reducing the thickness of the device and achieving lightness and thinness.

[0056] The orthographic projection of the column portion 12 on the base portion 11 is located between the orthographic projections of the first electrode 61 and the second electrode 62 on the base portion 11, so that the carriers injected by the first electrode 61 and the second electrode 62 can be gathered at the center of the device between the first electrode 61 and the second electrode 62, thereby increasing the carrier concentration and recombination rate at the center of the device. Preferably, the central axis L of the column portion 12 coincides with the center point of the light-emitting layer 40, so that the column portion 12 is located at the center of the light-emitting field effect transistor 1 device.

[0057] In the light-emitting field effect transistor 1 provided in the embodiment of the present invention, the electron transport layer 30 is located between the light-emitting layer 40 and the base 11 of the gate layer 10, and the hole transport layer 50 is located on one side of the light-emitting layer 40 and the source-drain layer 60, that is, the distance between the end of the hole transport layer 50 away from the base 11 and the base 11 is greater than the distance between the end of the electron transport layer 30 away from the base 11 and the base 11. However, in other embodiments of the present invention, a light-emitting field effect transistor 1 is further provided, such as Figure 5 As shown, the electron transport layer 30 in the light-emitting field effect transistor 1 can be arranged between the light-emitting layer 40 and the source-drain layer 60, and the hole transport layer 50 can be arranged between the light-emitting layer 40 and the base 11 of the gate layer 10. At this time, the distance between the end of the electron transport layer 30 away from the base 11 and the base 11 is greater than the distance between the end of the hole transport layer 50 away from the base 11 and the base 11, and the distance between the end of the column 12 away from the base 11 and the base 11 is greater than or equal to the distance between the end of the electron transport layer 30 away from the base 11 and the base 11. The structure of the remaining film layers in the device and the field effect regulation principle are similar to the light-emitting field effect transistor 1 provided in the embodiment of the present invention, so no further details are given here. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0058] Furthermore, in other embodiments of the present invention, the electron transport layer 30 and the hole transport layer 50 may be removed, and the light-emitting layer 40 may be directly stacked on the side of the insulating layer 20 away from the base 11 of the gate layer 10, and the source-drain layer 60 may be directly stacked on the side of the light-emitting layer 40 away from the gate layer 10, so as to form a structure as shown in FIG. Figure 6 The light-emitting field effect transistor 1 shown in the figure can simplify the preparation steps of the device, thereby improving the production efficiency of the device and reducing the production cost, and can also further reduce the thickness of the device.

[0059] The present invention also provides a display device in which a display panel is provided, and the display panel includes the light-emitting field effect transistor 1 as described above. The display device can be any display device with a display function, such as a mobile phone, a laptop computer, a tablet computer, etc.

[0060] In the light-emitting field effect transistor provided in the embodiment of the present invention, by adding a vertical column portion in the gate layer, the interface area of ​​the carriers gathered in the device and the direction of the field effect are increased, so that more carriers can be gathered in the electron transport layer or the hole transport layer, thereby increasing the concentration of carriers in the electron transport layer or the hole transport layer. At the same time, different gate layer voltages can be applied to different organic semiconductor materials used in the light-emitting field effect transistor, thereby increasing or suppressing the concentration of carriers in different transport layers, balancing the number of electrons and holes in the device, thereby improving the current luminous efficiency of the device and reducing the risk of heat damage to the device due to the imbalance of the number of electrons and holes in the device.

[0061] Example 2

[0062] Based on the technical problems raised in the above-mentioned related display technologies, an embodiment of the present invention provides a light-emitting field effect transistor 1, such as Figure 7 and Figure 8 As shown, the light-emitting field effect transistor 1 includes a gate layer 10 , an insulating layer 20 , a light-emitting layer 40 , an electron transport layer 30 , a hole transport layer 50 and a source-drain electrode layer 60 .

[0063] The insulating layer 20 is arranged on the surface of the gate layer 10, the electron transport layer 30, the light emitting layer 40 and the hole transport layer 50 are stacked in sequence on a surface of the insulating layer 20 away from the gate layer 10, and the source-drain electrode layer 60 is arranged on the side of the hole transport layer 50 away from the gate layer 10. Among them, the source-drain electrode layer 60 includes a first electrode 61 and a second electrode 62. The materials of the gate layer 10 and the source-drain electrode layer 60 include at least one of conductive materials such as metals and metal oxides; the materials of the electron transport layer 30, the light emitting layer 40 and the hole transport layer 50 all include organic semiconductor materials; the material of the insulating layer 20 includes inorganic materials containing silicon atoms, such as silicon oxide (SiOx), silicon nitride (SiNx), etc., which can be prepared by CVD (Chemical Vapor Deposition) process or thermal oxidation process.

[0064] After conducting, the gate layer 10 forms a conductive channel in the electron transport layer 30, the light-emitting layer 40 and the hole transport layer 50 containing organic semiconductor materials. The first electrode 61 injects charges into the conductive channel, and the second electrode 62 collects the charges flowing out of the conductive channel, thereby electrically turning on the light-emitting field effect transistor 1. The switching control of the light-emitting field effect transistor 1 is achieved by controlling the circuit signal received by the gate layer 10. At the same time, after being conductive, the source and drain layer 60 can transfer carriers to the conductive channel (i.e., the electron transport layer 30, the hole transport layer 50 and the light-emitting layer 40), that is, the first electrode 61 and the second electrode 62 inject electrons 2 and holes 3 into the electron transport layer 30 and the hole transport layer 50 respectively, and under the action of the lateral electric field between the voltage of the first electrode 61 and the voltage of the second electrode 62, the electron transport layer 30 and the hole transport layer 50 then transfer electrons 2 and holes 3 to the light-emitting layer 40, so that the electrons 2 and holes 3 can be recombined in the middle position of the light-emitting layer 40, thereby exciting the excitons in the light-emitting layer 40 to emit light, and then converting electrical energy into light energy.

[0065] Further, the gate layer 10 includes two base portions 11 and two pillar portions 12, namely a first base portion 111, a second base portion 112, a first pillar portion 121 and a second pillar portion 122. The first pillar portion 121 is arranged on the surface of the first base portion 111, and the second pillar portion 122 is arranged on the surface of the second base portion 112. The first pillar portion 121 and the second pillar portion 122 extend along a first direction Y perpendicular to the surface where the first base portion 111 and the second base portion 112 are located, respectively, and the first base portion 111 and the second base portion 112 extend along a second direction X perpendicular to the first direction Y, respectively. The first pillar portion 121 and the second pillar portion 122 each have a central axis, the central axis L1 of the first pillar portion 121 is perpendicular to the surface where the first base portion 111 and the first pillar portion 121 are in contact, and the central axis L2 of the second pillar portion 122 is perpendicular to the surface where the second base portion 112 and the second pillar portion 122 are in contact, thereby forming a vertical gate structure. There is a gap 13 between the adjacent first base portion 111 and the second base portion 112, and the first base portion 111 and the second base portion 112 are completely disconnected by the gap 13, so that the orthographic projection of the first base portion 111 on the light-emitting layer 40 is located outside the orthographic projection range of the adjacent second base portion 112 on the light-emitting layer 40, thereby forming two independent vertical gate structures. The vertical gate structure can be prepared by a patterning process, such as a photolithography process, a wet etching process, a dry etching process, or a silicon wafer etching process, and the first base portion 111, the second base portion 112, the first column portion 121, and the second column portion 122 can be prepared simultaneously in the same process, so that the materials of the first base portion 111, the second base portion 112, the first column portion 121, and the second column portion 122 are the same. The orthographic projection of the first electrode 61 on the gate layer 10 is located on the first base portion 111, the orthographic projection of the second electrode 62 on the gate layer 10 is located on the second base portion 112, the orthographic projections of the first column portion 121 and the second column portion 122 on the first base portion 111 and the second base portion 112 respectively do not overlap with the orthographic projections of the first electrode 61 and the second electrode 62 on the first base portion 111 and the second base portion 112 respectively, and the orthographic projections of the first electrode 61 and the second electrode 62 on the base portion 11 are respectively located on both sides of the gap 13.

[0066] Specifically, the insulating layer 20 is disposed on the surface of the two base portions 11 and covers the exposed surfaces of the two pillar portions 12. The electron transport layer 30, the hole transport layer 50 and the light emitting layer 40 are disposed on the surface of the insulating layer 20 away from the two base portions 11 and surround the pillar portions 12. The distance between one end of the two column portions 12 away from the base portion 11 (i.e., the top end of the first column portion 121 and the second column portion 122) and the base portion 11 is greater than the distance between one end of the light-emitting layer 40 away from the base portion 11 and the base portion 11, and the distance between one end of the two column portions 12 away from the base portion 11 and the base portion 11 is greater than or equal to the distance between one end of the hole transport layer 50 away from the base portion 11 (i.e., the top surface of the hole transport layer 50) and the base portion 11, that is, the top heights of the first column portion 121 and the second column portion 122 are both greater than or equal to the top surface height of the hole transport layer 50, so that the two column portions 12 sequentially penetrate the electron transport layer 30, the light-emitting layer 40 and the hole transport layer 50 in the thickness direction of the light-emitting field effect transistor 1 (i.e., the first direction Y).

[0067] In the embodiment of the present invention, the voltages applied to the first base portion 111 and the second base portion 112 are different, wherein the first base portion 111 applies a positive voltage and the second base portion 112 applies a negative voltage, so that the first column portion 121 follows the positive voltage applied to the first base portion 111 and the second column portion 122 follows the negative voltage applied to the second base portion 112. Fig. 9 As shown, the electrons 2 injected by the first electrode 61 gather toward the horizontal interface between the insulating layer 20 and the electron transport layer 30 on the surface of the first base portion 111, and also gather toward the vertical interface between the insulating layer 20 and the electron transport layer 30 on the surface of the first column portion 121; the holes 3 injected by the second electrode 62 gather toward the horizontal interface between the insulating layer 20 and the hole transport layer 50 on the surface of the second base portion 112, and also gather toward the vertical interface between the insulating layer 20 and the hole transport layer 50 on the surface of the second column portion 122. Compared with the planar bottom gate structure in the related art in which the electrons 2 only gather on the horizontal interface between the insulating layer 20 and the electron transport layer 30, the two vertical gate structures in the embodiment of the present invention respectively increase the interface area where the electrons 2 and the holes 3 gather by the first column portion 121 and the second column portion 122, that is, the vertical interface is added on the basis of the horizontal interface, so that the concentrations of the electrons 2 and the holes 3 in the electron transport layer 30 are increased respectively by the field effect generated by the two column portions 12.

[0068] On the one hand, in the embodiment of the present invention, a vertical column portion 12 is formed on the base portion 11 of the gate layer 10, and the column portion 12 increases the field effect direction of the gate layer 10 in the horizontal direction. The field effect direction is different from the field effect direction generated by the base layer in the vertical direction, which enables the carriers to be evenly distributed in the electron transport layer 30 and the hole transport layer 50 in the horizontal direction, and also compresses the distance between adjacent carriers in the horizontal direction, so that more carriers can be gathered in the electron transport layer 30 and the hole transport layer 50, and further increases the concentration of carriers in the electron transport layer 30 and the hole transport layer 50. At the same time, the vertical column portion 12 can also increase the interface area of ​​the gathered carriers, and can also increase the concentration of carriers in the electron transport layer 30 and the hole transport layer 50.

[0069] On the other hand, in the embodiment of the present invention, in view of the differences in the organic semiconductor materials contained in the electron transport layer 30, the light-emitting layer 40 and the hole transport layer 50, the concentration of carriers in the corresponding transport layer can be increased or suppressed by respectively controlling the voltage applied to the first base portion 111 and the second base portion 112, thereby facilitating the control of the number of electrons 2 and holes 3 in the light-emitting field effect transistor 1 to be the same, thereby effectively improving the current luminous efficiency of the device and reducing the risk of device heating due to excessive carrier concentration on one side. At the same time, the hole blocking layer and the electron blocking layer in the traditional OLED device can be omitted, thereby reducing the thickness of the device and achieving lightweight.

[0070] The orthographic projections of the first column portion 121 and the second column portion 122 on the base portion 11 are located between the orthographic projections of the first electrode 61 and the second electrode 62 on the base portion 11, so that the carriers injected by the first electrode 61 and the second electrode 62 can be gathered at the center of the device between the first electrode 61 and the second electrode 62, thereby increasing the carrier concentration and recombination rate at the center of the device. Preferably, the connecting line L3 between the center point of the gap 13 and the center point of the light-emitting layer 40 is parallel to the central axis of the column portion 12, and the spacing between the first column portion 121 and the second column portion 122 and the gap 13 is the same, so that the gap 13 between the two column portions 12 is located at the center of the light-emitting field effect transistor 1 device.

[0071] In the light-emitting field effect transistor 1 provided in the embodiment of the present invention, the electron transport layer 30 is located between the light-emitting layer 40 and the base 11 of the gate layer 10, and the hole transport layer 50 is located on one side of the light-emitting layer 40 and the source-drain layer 60, that is, the distance between the end of the hole transport layer 50 away from the base 11 and the base 11 is greater than the distance between the end of the electron transport layer 30 away from the base 11 and the base 11. However, in other embodiments of the present invention, a light-emitting field effect transistor 1 is further provided, such as Fig.10As shown, the electron transport layer 30 in the light-emitting field effect transistor 1 can be arranged between the light-emitting layer 40 and the source-drain layer 60, and the hole transport layer 50 can be arranged between the light-emitting layer 40 and the base 11 of the gate layer 10. At this time, the distance between the end of the electron transport layer 30 away from the base 11 and the base 11 is greater than the distance between the end of the hole transport layer 50 away from the base 11 and the base 11, and the distance between the end of the column 12 away from the base 11 and the base 11 is greater than or equal to the distance between the end of the electron transport layer 30 away from the base 11 and the base 11. The structure of the remaining film layers in the device and the field effect regulation principle are similar to the light-emitting field effect transistor 1 provided in the embodiment of the present invention, so no further details are given here. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0072] Furthermore, in other embodiments of the present invention, the electron transport layer 30 and the hole transport layer 50 may be removed, and the light-emitting layer 40 may be directly stacked on the side of the insulating layer 20 away from the base 11 of the gate layer 10, and the source-drain layer 60 may be directly stacked on the side of the light-emitting layer 40 away from the gate layer 10, so as to form a structure as shown in FIG. Fig.11 The light-emitting field effect transistor 1 shown in the figure can simplify the preparation steps of the device, thereby improving the production efficiency of the device and reducing the production cost, and can also further reduce the thickness of the device.

[0073] The present invention also provides a display device in which a display panel is provided, and the display panel includes the light-emitting field effect transistor 1 as described above. The display device can be any display device with a display function, such as a mobile phone, a laptop computer, a tablet computer, etc.

[0074] In the light-emitting field effect transistor provided in the embodiment of the present invention, by adding a vertical column portion in the gate layer, the interface area of ​​the carriers gathered in the device and the direction of the field effect are increased, so that more carriers can be gathered in the electron transport layer and the hole transport layer, thereby increasing the concentration of carriers in the electron transport layer and the hole transport layer. At the same time, different gate layer voltages can be applied to different organic semiconductor materials used in the light-emitting field effect transistor, thereby increasing or suppressing the concentration of carriers in different transport layers, balancing the number of electrons and holes in the device, thereby improving the current luminous efficiency of the device and reducing the risk of heating damage to the device due to the imbalance of the number of electrons and holes in the device.

[0075] Furthermore, the embodiment of the present invention is a preferred embodiment of the present invention. Compared with the light-emitting field effect transistor provided in Example 1, in this embodiment, the gate layer is set as two independent vertical gate structures through a gap, so that the gate layer can be applied with positive voltage and negative voltage at the same time, thereby realizing simultaneous regulation of electron concentration and hole concentration.

[0076] Although the present invention is described herein with reference to specific embodiments, it should be understood that these embodiments are merely examples of the principles and applications of the present invention. It should therefore be understood that many modifications may be made to the exemplary embodiments and that other arrangements may be devised without departing from the spirit and scope of the present invention as defined by the appended claims. It should be understood that the various dependent claims and features described herein may be combined in a manner different from that described in the original claims. It should also be understood that features described in conjunction with individual embodiments may be used in other described embodiments.

Claims

1. A light-emitting field effect transistor, characterized in that: include: A gate layer, comprising a base portion and a column portion disposed on the base portion; A light-emitting layer is insulated and arranged on one side of the base portion and surrounds the column portion; The source-drain electrode layer is arranged on a side of the light-emitting layer away from the gate layer.

2. The light-emitting field effect transistor according to claim 1, characterized in that: The orthographic projection of the column portion on the light-emitting layer is within the range of the orthographic projection of the base portion on the light-emitting layer; The column portion extends along a first direction perpendicular to the surface where the base portion is located, and the base portion extends along a second direction perpendicular to the first direction; Preferably, the material of the gate layer includes a conductive material; Preferably, the material of the pillar portion is the same as that of the base portion.

3. The light-emitting field effect transistor according to claim 1, characterized in that: The source-drain layer comprises: A first electrode, located on one side of the column portion; A second electrode is located on a side of the column portion away from the first electrode; Preferably, an orthographic projection of the pillar portion on the base portion does not overlap with an orthographic projection of the source / drain electrode layer on the base portion.

4. The light-emitting field effect transistor according to claim 3, characterized in that: The orthographic projection of the column portion on the base portion is located between the orthographic projections of the first electrode and the second electrode on the base portion; Preferably, the column portion has a central axis, and the central axis coincides with the center point of the light-emitting layer.

5. The light-emitting field effect transistor according to claim 3, characterized in that: The gate layer comprises: At least two of the base parts, with a gap between two adjacent base parts; At least two of the pillar parts, one of the pillar parts is disposed on each of the base parts; Preferably, the orthographic projections of the first electrode and the second electrode on the base are respectively located on both sides of the gap; preferably, the orthographic projection of the base on the light-emitting layer is located outside the range of the orthographic projection of the adjacent base on the light-emitting layer.

6. The light-emitting field effect transistor according to claim 5, characterized in that: The gate layer comprises: at least one first base portion and at least one second base portion, the orthographic projection of the first electrode on the gate layer is located on the first base portion, and the orthographic projection of the second electrode on the gate layer is located on the second base portion; A positive voltage is applied to the first base portion, and a negative voltage is applied to the second base portion; Preferably, the orthographic projection of the first base portion on the light-emitting layer is outside the range of the orthographic projection of the second base portion on the light-emitting layer.

7. The light-emitting field effect transistor according to claim 1, characterized in that: The distance between one end of the column away from the base and the base is greater than or equal to the distance between one end of the light-emitting layer away from the base and the base; Preferably, the display panel further comprises a hole transport layer and an electron transport layer, wherein the hole transport layer is located between the light emitting layer and the source-drain electrode layer, and the electron transport layer is located between the light emitting layer and the base portion; The distance between one end of the column away from the base and the base is greater than or equal to the distance between one end of the hole transport layer away from the base and the base; Preferably, the display panel further comprises a hole transport layer and an electron transport layer, the electron transport layer is located between the light emitting layer and the source-drain electrode layer, and the hole transport layer is located between the light emitting layer and the base; A distance between one end of the pillar portion away from the base portion and the base portion is greater than or equal to a distance between one end of the electron transport layer away from the base portion and the base portion.

8. The light-emitting field effect transistor according to claim 1, characterized in that: Also includes: The insulating layer is disposed between the gate layer and the light-emitting layer and covers the exposed surface of the column part.

9. The light-emitting field effect transistor according to claim 8, characterized in that: The material of the light-emitting layer includes an organic semiconductor material; The material of the insulating layer includes inorganic material; Preferably, the inorganic material includes silicon atoms.

10. A display device, characterized in that: Comprising a light-emitting field effect transistor as described in any one of claims 1-9.

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