Display device

Abstract

A display device includes: a first substrate including a light emitting area; a via insulating layer defining a trench including a substantially inclined surface and a substantially flat surface; a light emitting layer disposed on the via insulating layer in the light emitting region and including a first portion parallel to the substantially inclined surface and a second portion disposed parallel to the substantially flat surface; and a color conversion layer on the light emitting layer. A first angle formed between a first imaginary straight line and a second imaginary straight line extending perpendicular to the first portion is larger than a second angle formed between a traveling direction of light having the maximum luminous intensity among the light emitted from the first portion and the second imaginary straight line. The first imaginary straight line connects a point where the first portion and the second portion intersect with an edge of the color conversion layer and forms an obtuse angle with the first portion.

Description

Technical Field

[0001] The present disclosure generally relates to display devices.The present disclosure relates to display devices that provide visual information. Background Art

[0002] With the development of information technology, the importance of display devices as a connection medium between users and information has been emphasized. For example, the use of display devices such as liquid crystal display (LCD) devices, organic light emitting display (OLED) devices, plasma display panel (PDP) devices, or quantum dot display devices is increasing.

[0003] In order to reduce light loss of the display device and display colors efficiently, a color conversion layer and a display device including the color conversion layer have been proposed. Recently, a lot of research is being conducted to improve the light conversion efficiency of the color conversion layer.

[0004] It will be understood that this background technology section is intended to provide a useful background for understanding the technology. However, this background technology section may also include ideas, concepts or understandings that are not known or understood by those skilled in the relevant art prior to the corresponding effective filing date of the subject matter disclosed herein. Summary of the invention

[0005] The embodiment provides a display device having improved light conversion efficiency.

[0006] The embodiment provides a display device in which defects caused by alignment errors are suppressed.

[0007] The display device according to the embodiment may include: a first substrate including a light emitting area; a via insulating layer disposed on the first substrate, the via insulating layer defining a groove, the groove including a substantially inclined surface and a substantially flat surface, the groove overlapping the light emitting area; a light emitting layer disposed on the via insulating layer in the light emitting area, the light emitting layer including a first portion disposed parallel to the substantially inclined surface and a second portion disposed parallel to the substantially flat surface; and a color conversion layer disposed on the light emitting layer, the color conversion layer overlapping the light emitting area. A first angle formed between a first imaginary straight line and a second imaginary straight line extending perpendicularly to the first portion is greater than a second angle formed between a traveling direction of light having a maximum light emission intensity among light emitted from the first portion and the second imaginary straight line, the first imaginary straight line connecting a point where the first portion and the second portion of the light emitting layer intersect with an edge of the color conversion layer and forming an obtuse angle with the first portion.

[0008] In an embodiment, light having the maximum luminous intensity among the light emitted from the first portion of the light emitting layer may be incident on the color conversion layer.

[0009] In an embodiment, the groove may have a substantially inverted trapezoidal cross-sectional shape.

[0010] In an embodiment, the display device may further include: a lower electrode disposed between the via insulating layer and the light emitting layer. The lower electrode may extend to the inside of the groove on the via insulating layer. The lower electrode may include a substantially inclined surface disposed parallel to the substantially inclined surface of the groove and a substantially flat surface disposed parallel to the substantially flat surface of the groove.

[0011] In an embodiment, the display device may further include: a pixel defining layer disposed on the via insulating layer, wherein the pixel defining layer defines an opening exposing the groove. The pixel defining layer may overlap at least a portion of the groove in a plan view.

[0012] According to an embodiment, the display device may include: a first substrate including a light emitting area; a via insulating layer disposed on the first substrate, the via insulating layer defining a groove, the groove including a substantially inclined surface and a substantially flat surface, the groove overlapping the light emitting area; a light emitting layer disposed on the via insulating layer in the light emitting area, the light emitting layer including a first portion disposed parallel to the substantially inclined surface and a second portion disposed parallel to the substantially flat surface; a pixel defining layer disposed on the via insulating layer, the pixel defining layer defining an opening exposing the groove, and the pixel defining layer being spaced apart from the groove by a selectable distance in a plan view; and a color conversion layer disposed on the light emitting layer, the color conversion layer overlapping the light emitting area. A first angle formed between a first imaginary straight line and a second imaginary straight line extending perpendicularly to the first portion is greater than a second angle formed between a traveling direction of light having a maximum light emission intensity among the light emitted from the first portion and the second imaginary straight line, the first imaginary straight line connecting a point where the first portion and the second portion of the light emitting layer intersect with an edge of the color conversion layer and forming an obtuse angle with the first portion.

[0013] In an embodiment, the light emitting layer may further include: a third portion disposed on the via insulating layer, the third portion extending from the first portion, and the third portion contacting the pixel defining layer.

[0014] In an embodiment, light having the maximum luminous intensity among the light emitted from the first portion of the light emitting layer may be incident on the color conversion layer.

[0015] In an embodiment, the display device may further include: a lower electrode disposed between the via insulating layer and the light emitting layer. The lower electrode may extend on the via insulating layer to the inside of the groove.

[0016] In an embodiment, the lower electrode may include: a substantially inclined surface disposed in parallel with the substantially inclined surface of the groove; and a substantially flat surface disposed in parallel with the substantially flat surface of the groove. The light emitting layer may be disposed along a contour of the lower electrode.

[0017] The display device according to the embodiment may include: a via insulating layer disposed on a first substrate, the via insulating layer defining a groove, the groove including a substantially inclined surface and a substantially flat surface and overlapping a light emitting region; a light emitting layer disposed on the via insulating layer in the light emitting region, the light emitting layer including a first portion disposed parallel to the substantially inclined surface and a second portion disposed parallel to the substantially flat surface; and a color conversion layer disposed on the light emitting layer and overlapping the light emitting region. In this case, a first angle formed between a first imaginary straight line and a second imaginary straight line extending perpendicularly to the first portion is greater than a second angle formed between a traveling direction of light having a maximum light emission intensity among light emitted from the first portion and the second imaginary straight line, the first imaginary straight line connecting a point where the first portion and the second portion intersect with an edge of the color conversion layer and forming an obtuse angle with the first portion.

[0018] Therefore, among the light emitted from the light emitting layer, light having a relatively large light emission intensity can be incident on the color conversion layer. As a result, the light conversion efficiency of the color conversion layer can be improved.

[0019] The display device according to the embodiment may further include a pixel defining layer disposed on the via insulating layer and spaced apart from the trench by a selectable distance in a plan view.

[0020] Therefore, defects caused by alignment errors occurring during a manufacturing process of the display device can be suppressed. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Illustrative, non-limiting embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0022] Figure 1 is a schematic plan view showing a display device according to an embodiment.

[0023] Figure 2 It is along Figure 1Schematic cross-sectional view taken along line II'.

[0024] Figure 3 It is shown Figure 2 Schematic cross-sectional view of a color conversion layer included in a display device.

[0025] Figure 4 is a diagram showing the relationship between the angle of light and the luminous intensity.

[0026] Figure 5 is a schematic cross-sectional view illustrating a direction in which light emitted from a light emitting layer travels in a display device according to a comparative example.

[0027] Figure 6 It is shown in Figure 2 Schematic cross-sectional view of the direction in which light emitted from a light-emitting layer travels in a display device.

[0028] Figure 7 is a schematic cross-sectional view for explaining the first angle.

[0029] Figure 8 It is a view used to explain the second angle.

[0030] Fig. 9 is a schematic cross-sectional view showing a display device according to an embodiment.

[0031] Fig.10 yes Fig. 9 An enlarged schematic cross-sectional view of area "A" of FIG. DETAILED DESCRIPTION

[0032] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. The same reference numerals are used for the same components in the drawings, and repeated description of the same components will be omitted.

[0033] In the drawings, the size, thickness, ratio, and dimensions of elements may be exaggerated for convenience of description and clarity. Like reference numerals refer to like elements throughout.

[0034] As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0035] In the specification and claims, the term "and / or" is intended to include any combination of the terms "and" and "or" for the purpose of its meaning and interpretation. For example, "A and / or B" may be understood to mean "A, B, or A and B". The terms "and" and "or" may be used in a conjunction or disjunction sense and may be understood to be equivalent to "and / or".

[0036] In the specification and claims, the phrase "at least one of..." is intended to include the meaning of "at least one selected from the group of..." for the purpose of its meaning and interpretation. For example, "at least one of A and B" can be understood to mean "A, B, or A and B".

[0037] It will be understood that although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element without departing from the scope of the present disclosure.

[0038] The term "overlap" or "overlapping" means that a first object can be above, below, or to one side of a second object, and vice versa. Additionally, the term "overlap" may include stacking, stacking, facing, extending, covering, or partially covering, or any other suitable term that a person of ordinary skill in the art will recognize and understand.

[0039] The terms "facing" and "facing" mean that the first element can be directly or indirectly opposite to the second element. In the case where a third element is between the first element and the second element, the first element and the second element can be understood as being indirectly opposite to each other although still facing each other.

[0040] When an element is described as “not overlaying” or “not overlapping” another element, this may include the elements being spaced apart, offset or separated from each other, or any other suitable terminology as one of ordinary skill in the art would recognize and appreciate.

[0041] The terms “comprises and / or comprising,” “includes and / or including,” “has, have and / or having” and variations thereof, when used in the present specification, specify the presence of stated features, integers, steps, operations, elements, components and / or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0042] As used herein, "about" or "approximately" includes the stated value and means within an acceptable range of deviation for the particular value as determined by one of ordinary skill in the art, taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, or ±5% of the stated value.

[0043] Unless otherwise defined or implied herein, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It is further understood that, unless expressly defined herein, terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and should not be interpreted in an idealized or overly formal sense.

[0044] It will be understood that when an element (or region, layer, portion, etc.) is referred to in the specification as being "on", "connected to" or "coupled to" another element, the element may be directly disposed on, directly connected to or directly coupled to the other element, or an intervening element may be disposed between the element and the other element.

[0045] It should be understood that the terms “connected to” or “coupled to” may include a physical connection or physical coupling or an electrical connection or electrical coupling.

[0046] Figure 1 is a schematic plan view showing a display device according to an embodiment.

[0047] In the present specification, a plane may be defined by a first direction DR1 and a second direction DR2 intersecting the first direction DR1. For example, the first direction DR1 and the second direction DR2 may be perpendicular to each other. A direction perpendicular to the plane (for example, a thickness direction of the display device DD) may be a third direction DR3. In other words, the third direction DR3 may be perpendicular to each of the first direction DR1 and the second direction DR2.

[0048] Reference Figure 1 , the display device DD according to the embodiment may include a display area DA and a peripheral area PA. The display area DA may be defined as an area where an image is displayed. The peripheral area PA may be defined as an area where an image is not displayed. The peripheral area PA may be located around the display area DA. For example, the peripheral area PA may completely surround or may be adjacent to the display area DA.

[0049] Pixels PX for generating an image may be disposed in the display area DA. Each of the pixels PX may include a first sub-pixel, a second sub-pixel, and a third sub-pixel.

[0050] The display area DA may include a light emitting area EA and a light blocking area BA. Each of the light emitting areas EA may include a first light emitting area EA1, a second light emitting area EA2, and a third light emitting area EA3. In this case, the first sub-pixel may overlap with the first light emitting area EA1, the second sub-pixel may overlap with the second light emitting area EA2, and the third sub-pixel may overlap with the third light emitting area EA3.

[0051] Each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 may be an area in which light emitted from the light emitting element is emitted to the outside of the display device DD. For example, the first light emitting area EA1 may emit a first light, the second light emitting area EA2 may emit a second light, and the third light emitting area EA3 may emit a third light. In an embodiment, the first light may be red light, the second light may be green light, and the third light may be blue light. However, the present disclosure is not limited thereto. For example, the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 may be combined to emit yellow, cyan, and magenta light.

[0052] In a plan view, each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 may be repeatedly arranged or disposed along the row direction and the column direction. In other words, each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 may be repeatedly arranged or disposed along the first direction DR1 and the second direction DR2. For example, the first light emitting area EA1 and the third light emitting area EA3 may be alternately arranged or disposed in the odd rows (e.g., the first row) of the display area DA along the first direction DR1. The second light emitting area EA2 may be repeatedly arranged or disposed in the even rows (e.g., the second row) adjacent to the odd rows of the display area DA along the first direction DR1.

[0053] The areas of the first light-emitting area EA1, the second light-emitting area EA2, and the third light-emitting area EA3 may be different from each other. In an embodiment, the area of ​​the first light-emitting area EA1 emitting red light may be larger than the area of ​​the second light-emitting area EA2 emitting green light and the area of ​​the third light-emitting area EA3 emitting blue light. In this case, the area of ​​the second light-emitting area EA2 may be larger than the area of ​​the third light-emitting area EA3. However, the present disclosure is not limited to this. For example, the area of ​​the second light-emitting area EA2 emitting green light may be larger than the area of ​​the first light-emitting area EA1 emitting red light and the area of ​​the third light-emitting area EA3 emitting blue light. In this case, the area of ​​the first light-emitting area EA1 may be larger than the area of ​​the third light-emitting area EA3.

[0054] Each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 may have one of a triangular plane shape, a square plane shape, a circular plane shape, an orbital plane shape, an elliptical plane shape, etc. In an embodiment, each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 may have a rectangular plane shape.

[0055] The light blocking area BA may be located between the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3. For example, in a plan view, the light blocking area BA may surround the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3. The light blocking area BA may be defined as a non-luminous area.

[0056] Figure 2 It is along Figure 1 Schematic cross-sectional view taken along line II'. Figure 3 It is shown Figure 2 Schematic cross-sectional view of a color conversion layer included in a display device.

[0057] Reference Figure 2 and Figure 3 , the display device DD according to the embodiment may include an array substrate ASUB, a color conversion substrate CSUB, and a filling layer FIL disposed between the array substrate ASUB and the color conversion substrate CSUB.

[0058] The array substrate ASUB may include a first substrate SUB1, a driving element TR, an insulating structure, a via insulating layer VIA, a light emitting element LD, a pixel defining layer PDL and an encapsulation layer TFE. In this case, the light emitting element LD may include a lower electrode AE, a light emitting layer EML and an upper electrode CE.

[0059] The color conversion substrate CSUB may include an anti-reflection layer ARL, a second substrate SUB2, a color filter layer CFL, a low refractive layer LR, a first capping layer CAP1, a bank layer BK, a color conversion layer CVL, and a second capping layer. In this case, the color conversion layer CVL may include a first color conversion pattern CVP1, a second color conversion pattern CVP2, and a transmissive pattern TRP.

[0060] The first substrate SUB1 may include a transparent material or an opaque material. The first substrate SUB1 may be formed of a transparent resin substrate. A polyimide substrate may be an example of a transparent resin substrate. In this case, the polyimide substrate may include a first organic layer, a first barrier layer, a second organic layer, and the like. For example, the first substrate SUB1 may include a quartz substrate (e.g., a synthetic quartz substrate, a fluorine-doped quartz substrate), a calcium fluoride substrate, a soda-lime glass substrate, an alkali-free glass substrate, and the like. These may be used alone or in combination with each other.

[0061] The driving element TR may be disposed on the first substrate SUB1. In an embodiment, the driving element TR may include a thin film transistor. For example, the driving element TR may include amorphous silicon, polycrystalline silicon, or a metal oxide semiconductor.

[0062] Metal oxide semiconductors can include binary compounds (AB x), ternary compounds (AB x C y ) or quaternary compound (AB x C y D z ) etc., binary compounds (AB x ), ternary compounds (AB x C y ) or quaternary compound (AB x C y D z ) and the like include indium (In), zinc (Zn), gallium (Ga), tin (Sn), titanium (Ti), aluminum (Al), hafnium (Hf), zirconium (Zr), magnesium (Mg), etc. For example, the metal oxide semiconductor may include zinc oxide (ZnO), indium tin oxide (ITO), indium zinc tin oxide (IZTO), indium gallium zinc oxide (IGZO), etc. These may be used alone or in combination with each other.

[0063] The insulating structure may be disposed on the first substrate SUB1. The insulating structure may cover the driving element TR. The insulating structure may include an inorganic insulating layer and / or an organic insulating layer. For example, the inorganic insulating layer may include silicon oxide (SiO x ), silicon nitride (SiN x ), Silicon Carbide (SiC x ), silicon oxynitride (SiO x N y ), Silicon Oxycarbide (SiO x C y ) etc. The organic insulating layer may include a photoresist, a polyacrylic acid-based resin, a polyimide-based resin, a polyamide-based resin, a siloxane-based resin, an acrylic-based resin, an epoxy-based resin, etc. These may be used alone or in combination with each other.

[0064] The via insulating layer VIA may be disposed on the insulating structure. For example, the via insulating layer VIA may be configured to have a relatively thick thickness. The contact hole may be defined in the via insulating layer VIA. The contact hole may expose a portion of the driving element TR. The via insulating layer VIA may include an organic insulating material or an inorganic insulating material. In an embodiment, the via insulating layer VIA may include an organic insulating material. For example, the via insulating layer VIA may include a photoresist, a polyacrylic-based resin, a polyimide-based resin, a polyamide-based resin, a siloxane-based resin, an acrylic-based resin, an epoxy-based resin, etc. These may be used alone or in combination with each other.

[0065] In an embodiment, the via insulating layer VIA may define a trench TCH. The trench TCH may refer to a portion of the upper surface of the via insulating layer VIA that is recessed toward the first substrate SUB1. The trench TCH may overlap each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3.

[0066] In an embodiment, the trench TCH may have a substantially inverted trapezoidal cross-sectional shape. In other words, the trench TCH has a first inclined surface (eg, Figure 6 The first inclined surface IS1), the second inclined surface (eg, Figure 6 The second inclined surface IS2) and the flat surface (eg, Figure 6 The first inclined surface may be spaced apart from the second inclined surface in the cross section, and the flat surface may be between the first inclined surface and the second inclined surface. The first inclined surface may face the second inclined surface. The flat surface may contact each of the first inclined surface and the second inclined surface. However, the present disclosure is not limited thereto.

[0067] The lower electrode AE ​​may be disposed on the via insulating layer VIA. In other words, the lower electrode AE ​​may be disposed between the via insulating layer VIA and the light emitting layer EML. The lower electrode AE ​​may overlap each of the first light emitting region EA1, the second light emitting region EA2, and the third light emitting region EA3. The lower electrode AE ​​may be electrically connected to the driving element TR through a contact hole formed in the via insulating layer VIA.

[0068] In an embodiment, the lower electrode AE ​​may extend to the inside of the trench TCH on the via insulating layer VIA. In other words, the lower electrode AE ​​may be disposed along the contour of the via insulating layer VIA.

[0069] Therefore, the upper surface of the lower electrode AE ​​may include a first inclined surface, a second inclined surface, a first flat surface, a second flat surface, and a third flat surface. In the cross section, the first inclined surface may be spaced apart from the second inclined surface, and the first flat surface is between the first inclined surface and the second inclined surface. The first inclined surface may face the second inclined surface. The second flat surface may extend from the first inclined surface and may partially overlap with the pixel defining layer PDL. The third flat surface may extend from the second inclined surface and may partially overlap with the pixel defining layer PDL.

[0070] In this case, the first inclined surface, the second inclined surface, and the first flat surface of the lower electrode AE ​​may be disposed in parallel with the first inclined surface, the second inclined surface, and the flat surface of the trench TCH, respectively.

[0071] For example, the lower electrode AE ​​may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. Examples of materials that may be used as the lower electrode AE ​​may include silver (Ag), an alloy containing silver, molybdenum (Mo), an alloy containing molybdenum, aluminum (Al), an alloy containing aluminum, aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), nickel (Ni), chromium (Cr), chromium nitride (CrN), titanium (Ti), tantalum (Ta), platinum (Pt), scandium (Sc), indium tin oxide (ITO), indium zinc oxide (IZO), etc. These may be used alone or in combination with each other. For example, the lower electrode AE ​​may be used as an anode electrode.

[0072] The pixel defining layer PDL may be disposed on the via insulating layer VIA and the lower electrode AE ​​in the light blocking area BA. An opening OP exposing the trench TCH may be defined in the pixel defining layer PDL. The pixel defining layer PDL may cover an edge of the lower electrode AE ​​and expose an upper surface of the lower electrode AE.

[0073] In an embodiment, in a plan view, the pixel defining layer PDL may overlap at least a portion of the trench TCH. For example, one end or ends of the pixel defining layer PDL may extend to a point where the second flat surface of the lower electrode AE ​​and the first inclined surface of the lower electrode AE ​​intersect. The other end of the pixel defining layer PDL may extend to a point where the third flat surface of the lower electrode AE ​​and the second inclined surface of the lower electrode AE ​​intersect. However, the present disclosure is not limited thereto.

[0074] The pixel defining layer PDL may include an organic insulating material or an inorganic insulating material. In an embodiment, the pixel defining layer PDL may include an organic insulating material. Examples of organic insulating materials that may be used as the pixel defining layer PDL may include photoresists, polyacrylic acid-based resins, polyimide-based resins, polyamide-based resins, siloxane-based resins, acrylic-based resins, epoxy-based resins, etc. These may be used alone or in combination with each other.

[0075] The light-emitting layer EML may be disposed on the via insulating layer VIA. As an example, the light-emitting layer EML may be disposed on the lower electrode AE. The light-emitting layer EML may overlap each of the first light-emitting area EA1, the second light-emitting area EA2, and the third light-emitting area EA3. For example, holes provided from the lower electrode AE ​​and electrons provided from the upper electrode CE may be recombined in the light-emitting layer EML to form excitons. When the excitons change from an excited state to a ground state, the light-emitting layer EML may emit light. The light-emitting layer EML may emit light having a given color (e.g., red, green, and blue). In an embodiment, the light-emitting layer EML may emit blue light Lb.

[0076] In an embodiment, the light emitting layer EML may be disposed along the contour of the lower electrode AE. Therefore, the light emitting layer EML may include a first portion (eg, Figure 6 The first portion EML-P1) and the second portion (eg, Figure 6 For example, the first portion of the light emitting layer EML may be disposed in parallel with each of the first and second inclined surfaces of the trench TCH, and the second portion of the light emitting layer EML may be disposed in parallel with the flat surface of the trench TCH.

[0077] For example, the light emitting layer EML may have a single layer structure including one light emitting layer. For example, the light emitting layer EML may have a tandem structure in which light emitting layers may be stacked on each other.

[0078] The upper electrode CE may be disposed on the light emitting layer EML and the pixel defining layer PDL. The upper electrode CE may be completely disposed in the first light emitting area EA1, the second light emitting area EA2, the third light emitting area EA3, and the light blocking area BA. The upper electrode CE may be disposed along the contours of the pixel defining layer PDL and the light emitting layer EML. For example, the upper electrode CE may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. These may be used alone or in combination with each other. For example, the upper electrode CE may be used as a cathode electrode.

[0079] Therefore, the light emitting element LD including the lower electrode AE, the light emitting layer EML and the upper electrode CE may be disposed on the via insulating layer VIA. The light emitting element LD may be electrically connected to the driving element TR. In an embodiment, the light emitting element LD may include a blue light emitting element emitting blue light Lb.

[0080] The encapsulation layer TFE may be disposed on the upper electrode CE. The encapsulation layer TFE may prevent impurities, moisture, etc. from penetrating into the light emitting element LD from the outside. The encapsulation layer TFE may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. For example, the inorganic encapsulation layer may include silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ) etc. These may be used alone or in combination with each other. For example, the organic encapsulation layer may include a cured polymer such as polyacrylate.

[0081] The second substrate SUB2 may be formed of a transparent resin substrate. For example, the second substrate SUB2 may include an insulating material such as glass or plastic. For example, the second substrate SUB2 may include an organic polymer material (such as polycarbonate, polyethylene, polypropylene, etc.). These may be used alone or in combination with each other.

[0082] The anti-reflection layer ARL may be disposed on the second substrate SUB2. External light may enter the display device DD. The external light may be reflected from various electrodes or wires included in the display device DD. The anti-reflection layer ARL may prevent the reflected external light from being recognized by the user.

[0083] The anti-reflection layer ARL may include an inorganic material and / or an organic material. For example, the anti-reflection layer ARL may include an acrylic resin, a methacrylic resin, a vinyl resin, an epoxy resin, a polyurethane resin, a cellulose resin, a perylene resin, a silsesquioxane resin (e.g., polyhedral oligomeric silsesquioxane, POSS), etc. These may be used alone or in combination with each other. The anti-reflection layer ARL may include a thermosetting material or a photocurable material.

[0084] The color filter layer CFL may be disposed below or under the second substrate SUB2. The color filter layer CFL may include a black matrix and a color filter disposed in a space defined by the black matrix. The black matrix may overlap the light blocking area BA. The color filter may include a first color filter overlapping the first light emitting area EA1, a second color filter overlapping the second light emitting area EA2, and a third color filter overlapping the third light emitting area EA3. For example, the first color filter may be a red color filter, the second color filter may be a green color filter, and the third color filter may be a blue color filter.

[0085] The low refractive layer LR may be disposed below or under the color filter layer CFL. The low refractive layer LR may be completely disposed in the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 and the light blocking area BA. The low refractive layer LR may improve the light conversion efficiency of the color conversion layer CVL.

[0086] The low refractive layer LR may have a relatively low refractive index. For example, the refractive index of the low refractive layer LR may be lower than the refractive index of the color conversion layer CVL. The low refractive layer LR may include an organic material. For example, the low refractive layer LR may include an organic polymer material containing silicon.

[0087] The first capping layer CAP1 may be disposed below or under the low refractive layer LR. The first capping layer CAP1 may be disposed entirely in the first, second and third light emitting areas EA1, EA2 and EA3 and the light blocking area BA. The first capping layer CAP1 may act as a moisture barrier to prevent degradation of the low refractive layer LR.

[0088] The first capping layer CAP1 may include a silicon compound. For example, the first capping layer CAP1 may include silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ) etc. These may be used alone or in combination with each other.

[0089] The bank layer BK may be disposed below or under the first capping layer CAP1. The bank layer BK may overlap the light blocking area BA. The bank layer BK may surround the color conversion layer CVL. A space for accommodating the ink composition during the process of forming the color conversion layer CVL may be formed in the bank layer BK. For example, the bank layer BK may have a grid shape or a matrix shape in a plan view.

[0090] For example, the bank layer BK may include an organic material such as an epoxy-based resin, a phenolic resin, an acrylic-based resin, a silicon-based resin, etc. These may be used alone or in combination with each other.

[0091] The color conversion layer CVL may be disposed below or under the first capping layer CAP1. When the array substrate ASUB and the color conversion substrate CSUB are bonded, the color conversion layer CVL may be disposed on the light emitting layer EML. The color conversion layer CVL may overlap the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3. The color conversion layer CVL may convert light emitted from the light emitting layer EML into light having a given wavelength.

[0092] The color conversion layer CVL may include a first color conversion pattern CVP1, a second color conversion pattern CVP2, and a transmissive pattern TRP. The first color conversion pattern CVP1 may overlap the light emitting layer EML in the first light emitting area EA1. The second color conversion pattern CVP2 may overlap the light emitting layer EML in the second light emitting area EA2. The transmissive pattern TRP may overlap the light emitting layer EML in the third light emitting area EA3.

[0093] The first color conversion pattern CVP1 may convert light (e.g., blue light Lb) emitted from the light emitting layer EML into the first color light L1. The second color conversion pattern CVP2 may convert light emitted from the light emitting layer EML into the second color light L2. The transmissive pattern TRP may transmit the light emitted from the light emitting layer EML. In an embodiment, the first color light L1 may be red light, and the second color light L2 may be green light. The transmissive pattern TRP may transmit the blue light Lb. However, the present disclosure is not limited thereto.

[0094] like Figure 3As shown in , the first color conversion pattern CVP1 may include first quantum dots CVP1c excited by light emitted from the light emitting layer EML and emitting first color light L1. The first color conversion pattern CVP1 may also include a first photosensitive polymer CVP1b in which first scattering particles CVP1a are dispersed.

[0095] The second color conversion pattern CVP2 may include second quantum dots CVP2c excited by light emitted from the light emitting layer EML and emitting second color light L2. The second color conversion pattern CVP2 may also include a second photosensitive polymer CVP2b in which second scattering particles CVP2a are dispersed.

[0096] The transmissive pattern TRP may emit blue light Lb by transmitting light emitted from the light emitting layer EML. The transmissive pattern TRP may include a third photosensitive polymer TRPb in which third scattering particles TRPa are dispersed.

[0097] For example, each of the first photosensitive polymer CVP1b, the second photosensitive polymer CVP2b, and the third photosensitive polymer TRPb may include an organic material having light transmittance, such as a silicon-based resin or an epoxy-based resin. The first scattering particles CVP1a, the second scattering particles CVP2a, and the third scattering particles TRPa may scatter and emit light emitted from the light emitting layer EML. The first scattering particles CVP1a, the second scattering particles CVP2a, and the third scattering particles TRPa may include the same material as each other.

[0098] Return to reference Figure 2 , therefore, the first light emitting area EA1 may emit the first color light L1, the second light emitting area EA2 may emit the second color light L2, and the third light emitting area EA3 may emit the blue light Lb.

[0099] The second capping layer may be disposed below or under the bank layer BK and the color conversion layer CVL. The second capping layer may completely cover the bank layer BK and the color conversion layer CVL. For example, the second capping layer may include a silicon compound.

[0100] The filling layer FIL may be disposed between the first substrate SUB1 and the second substrate SUB2. In other words, the filling layer FIL may be disposed between the array substrate ASUB and the color conversion substrate CSUB. The filling layer FIL may be filled between the array substrate ASUB and the color conversion substrate CSUB. The filling layer FIL may include an organic material having light transmittance.

[0101] exist Figure 2 In the embodiment, the display device DD is described as having a structure including two substrates (eg, a first substrate SUB1 and a second substrate SUB2), but the present disclosure is not limited thereto. For example, the display device DD may also have a structure including one substrate.

[0102] Although the display device DD of the present disclosure is described by limiting an organic light emitting display (OLED) device, the configuration of the present disclosure is not limited thereto. In other embodiments, the display device DD may include a liquid crystal display (LCD) device, a field emission display (FED) device, a plasma display panel (PDP) device, an electrophoretic image display (EPD) device, an inorganic light emitting display (ILED) device, or a quantum dot display device.

[0103] Figure 4 is a diagram showing the relationship between the angle of light and the luminous intensity.

[0104] Reference Figure 4 , the horizontal axis may correspond to the surface of the light emitting layer EML in the cross section, and the vertical axis may correspond to a straight line perpendicular to the light emitting layer EML in the cross section (e.g., a straight line parallel to the third direction DR3). The vertical axis may correspond to the luminous intensity of light emitted from the light emitting layer EML. The light emitting layer EML may include a point light source PLS. The point where the horizontal axis and the vertical axis intersect may correspond to the point light source PLS. The point light source PLS may emit divergent light. In other words, the point light source PLS may emit light at various angles.

[0105] As an example, Figure 4 The relationship between the angle formed by the straight line perpendicular to the light emitting layer EML in the cross section and the traveling direction of the light emitted from the point light source PLS and the luminous intensity of the light is shown. In this case, the luminous intensity of the light at an angle of about 30 degrees may be greater than the luminous intensity of the light at an angle of about 20 degrees. The luminous intensity of the light at an angle in the range of about 30 degrees to about 40 degrees may be greater than the luminous intensity of the light at an angle in the range of about 0 degrees to about 10 degrees. However, the present disclosure is not limited thereto. The relationship between the angle and the luminous intensity of the light may vary depending on the material of the light emitting layer EML and the thickness of the light emitting layer EML.

[0106] Figure 5 is a schematic cross-sectional view illustrating a direction in which light emitted from a light emitting layer travels in a display device according to a comparative example.

[0107] Reference Figure 5 , the display device DD' according to the comparative example may include a via insulating layer VIA', a lower electrode AE', a light emitting layer EML', a pixel defining layer PDL', and a color conversion pattern CVP'. In this case, the light emitting layer EML' may include a point light source PLS'. In addition to each of the via insulating layer VIA', the lower electrode AE', and the light emitting layer EML' having a flat upper surface, the display device DD' may be similar to the reference example. Figure 2 The display devices DD described are essentially identical.

[0108] The via insulating layer VIA' may have a flat upper surface. In other words, the via insulating layer VIA' may not define a groove (eg, Figure 2 Groove TCH).

[0109] The lower electrode AE' may be disposed on the via insulating layer VIA'. The lower electrode AE' may overlap the light emitting area EA'. The lower electrode AE' may have a flat upper surface. In other words, the upper surface of the lower electrode AE' may not include an inclined surface.

[0110] The pixel defining layer PDL' may be disposed on the via insulating layer VIA' and the lower electrode AE' in the light blocking area BA'. The pixel defining layer PDL' may cover an edge of the lower electrode AE'. An opening exposing an upper surface of the lower electrode AE' may be defined.

[0111] The light emitting layer EML' may be disposed on the lower electrode AE'. The light emitting layer EML' may overlap the light emitting area EA'. The light emitting layer EML' may include a flat upper surface. In other words, the upper surface of the light emitting layer EML' may not include an inclined surface.

[0112] The color conversion pattern CVP' may be disposed on the light emitting layer EML'. The color conversion pattern CVP' may overlap the light emitting layer EML' in the light emitting area EA'. The color conversion pattern CVP' may convert light emitted from the light emitting layer EML' into the first color light.

[0113] The point light source PLS' included in the light emitting layer EML' may emit light. For example, the point light source PLS' may emit light at various angles. Figure 5 , the light emitted from the point light source PLS' is represented by an arrow. The length of the arrow may correspond to the luminous intensity of the light. In other words, the longer the length of the arrow, the greater the luminous intensity of the light.

[0114] Some light emitted from the point light source PLS' located in a region adjacent to the pixel defining layer PDL (e.g., an edge of the light emitting layer EML') may not be incident on the color conversion pattern CVP'. In other words, since the point light source PLS' emits light at different angles, some light may not be incident on the color conversion pattern CVP'. For example, light Lgt having the maximum light emission intensity among the lights may not be incident on the color conversion pattern CVP'. Therefore, the light conversion efficiency of the color conversion pattern CVP' included in the display device DD' may be relatively low.

[0115] Figure 6 It is shown in Figure 2 Schematic cross-sectional view of the direction in which light emitted from a light-emitting layer travels in a display device. Figure 7is a schematic cross-sectional view for explaining the first angle. Figure 8 It is a diagram for explaining the second angle.

[0116] Reference Figure 6 , the display device DD according to the embodiment may include a via insulating layer VIA, a lower electrode AE, a light emitting layer EML, a pixel defining layer PDL, and a first color conversion pattern CVP1. The overlapping structure between the light emitting layer EML and the first color conversion pattern CVP1 may overlap with the light emitting layer EML and the second color conversion pattern (e.g., Figure 2 The overlapping structure between the light emitting layer EML and the first color conversion pattern CVP1 may be substantially the same as the overlapping structure between the light emitting layer EML and the transmissive pattern (eg, Figure 2 Therefore, the following description will focus on the overlapping structure between the light emitting layer EML and the first color conversion pattern CVP1.

[0117] The via insulating layer VIA may define a trench TCH. The trench TCH may refer to a portion in which a portion of an upper surface of the via insulating layer VIA is recessed toward a direction opposite to the third direction DR3. The trench TCH may overlap the first light emitting area EA1.

[0118] In an embodiment, the trench TCH may have an inverted trapezoidal cross-sectional shape. In other words, the trench TCH may include a first inclined surface IS1, a second inclined surface IS2, and a flat surface FS. In the cross section, the first inclined surface IS1 may be spaced apart from the second inclined surface IS2, and the flat surface FS is interposed between the first inclined surface IS1 and the second inclined surface IS2. The first inclined surface IS1 may face the second inclined surface IS2. The flat surface FS may contact each of the first inclined surface IS1 and the second inclined surface IS2.

[0119] The lower electrode AE ​​may be disposed on the via insulating layer VIA. The lower electrode AE ​​may overlap with the first light emitting area EA1. The lower electrode AE ​​may be disposed along the contour of the via insulating layer VIA. In other words, the lower electrode AE ​​may be disposed inside the trench TCH. Therefore, the upper surface of the lower electrode AE ​​may include a first inclined surface, a second inclined surface, and a flat surface. In this case, the first inclined surface, the second inclined surface, and the flat surface of the lower electrode AE ​​may be disposed in parallel with the first inclined surface IS1, the second inclined surface IS2, and the flat surface FS of the trench TCH, respectively.

[0120] The pixel defining layer PDL may be disposed on the via insulating layer VIA and the lower electrode AE ​​in the light blocking area BA. Figure 2The opening OP) may be defined in the pixel defining layer PDL. In an embodiment, the pixel defining layer PDL may overlap at least a portion of the trench TCH in a plan view.

[0121] The light emitting layer EML may be disposed on the lower electrode AE. The light emitting layer EML may overlap with the first light emitting area EA1. The light emitting layer EML may be disposed along the contour of the lower electrode AE. Therefore, the light emitting layer EML may include a first portion EML-P1 disposed in parallel with each of the first inclined surface and the second inclined surface of the lower electrode AE ​​and a second portion EML-P2 disposed in parallel with the flat surface of the lower electrode AE. The first portion EML-P1 of the light emitting layer EML may be disposed in parallel with each of the first inclined surface IS1 and the second inclined surface IS2 of the trench TCH. The second portion EML-P2 of the light emitting layer EML may be disposed in parallel with the flat surface FS of the trench TCH.

[0122] The first color conversion pattern CVP1 may be disposed on the light emitting layer EML. The first color conversion pattern CVP1 may overlap the light emitting layer EML in the first light emitting area EA1. The first color conversion pattern CVP1 may convert light emitted from the light emitting layer EML into first color light (eg, red light).

[0123] The point light sources PLS included in the light emitting layer EML may emit light. Figure 6 , the light emitted from the point light source PLS is represented by an arrow. The length of the arrow may correspond to the luminous intensity of the light.

[0124] The upper surface of the light emitting layer EML may include an inclined surface (e.g., an edge of the light emitting layer EML) in a region adjacent to the pixel defining layer PDL. As an example, the light emitting layer EML may include a first portion EML-P1 disposed parallel to each of the first inclined surface IS1 and the second inclined surface IS2 of the trench TCH in a region adjacent to the pixel defining layer PDL. Therefore, light Lgt having the maximum light emission intensity among the light emitted from the point light source PLS located in the region adjacent to the pixel defining layer PDL may be incident on the first color conversion pattern CVP1. As a result, the light conversion efficiency of the first color conversion pattern CVP1 included in the display device DD according to the embodiment may be improved.

[0125] Further references Figure 7 and Figure 8, a first imaginary straight line SL1 may be defined, which connects a point where the first portion EML-P1 and the second portion EML-P2 intersect and an edge of the first color conversion pattern CVP1 and forms an obtuse angle with the first portion EML-P1. In other words, the first imaginary straight line SL1 may be defined as an imaginary straight line connecting a point where the first portion EML-P1 and the second portion EML-P2 intersect and an edge of the first color conversion pattern CVP1 having a relatively large separation distance from the first portion EML-P1.

[0126] As an example, the first color conversion pattern CVP1 may include a first edge CVP1-E1 overlapping the first inclined surface IS1 of the trench TCH and a second edge CVP1-E2 overlapping the second inclined surface IS2 of the trench TCH. For example, the first imaginary straight line SL1 may be defined as an imaginary straight line connecting a point where the first portion EML-P1 and the second portion EML-P2 adjacent to the first inclined surface IS1 intersect with the second edge CVP1-E2.

[0127] A second imaginary straight line SL2 extending perpendicularly to the first portion EML-P1 of the light emitting layer EML may be defined. Here, an angle formed by the first imaginary straight line SL1 and the second imaginary straight line SL2 may be defined as a first angle θ1.

[0128] like Figure 8 As shown in , the point light source PLS included in the light emitting layer EML may emit light at various angles. The horizontal axis may correspond to the surface of the light emitting layer EML in the cross section, and the vertical axis may correspond to a straight line (e.g., a second imaginary straight line SL2) perpendicular to the light emitting layer EML in the cross section. The vertical axis may correspond to the luminous intensity of the light emitted from the light emitting layer EML.

[0129] In this case, an angle formed between a traveling direction of light Lgt having the maximum luminous intensity among the light emitted from the point light sources PLS and the second imaginary straight line SL2 may be defined as a second angle θ2.

[0130] In an embodiment, the first angle θ1 may be greater than the second angle θ2. For example, the second angle θ2 may have a value in the range of about 30 degrees to about 40 degrees, and the first angle θ1 may have a value in the range of about 40 degrees to about 60 degrees. Therefore, among the lights emitted from the point light sources PLS, the light having a relatively large luminous intensity (e.g., Figure 8 The shadow area of ​​the first color conversion pattern CVP1 may be incident on the first color conversion pattern CVP1. As a result, the light conversion efficiency of the first color conversion pattern CVP1 included in the display device DD may be further improved.

[0131] Fig. 9is a schematic cross-sectional view showing a display device according to an embodiment. Fig.10 yes Fig. 9 An enlarged schematic cross-sectional view of area "A" of FIG.

[0132] Reference Fig. 9 and Fig.10 , the display device DD2 according to the embodiment may include an array substrate ASUB, a color conversion substrate CSUB, and a filling layer FIL disposed between the array substrate ASUB and the color conversion substrate CSUB. The array substrate ASUB may include a first substrate SUB1, a driving element TR, an insulating structure, a via insulating layer VIA, a light emitting element LD, a pixel defining layer PDL, and an encapsulation layer TFE. In this case, the light emitting element LD may include a lower electrode AE, a light emitting layer EML, and an upper electrode CE. The color conversion substrate CSUB may include an anti-reflection layer ARL, a second substrate SUB2, a color filter layer CFL, a low refractive layer LR, a first capping layer CAP1, a bank layer BK, a color conversion layer CVL, and a second capping layer. In this case, the color conversion layer CVL may include a first color conversion pattern CVP1, a second color conversion pattern CVP2, and a transmissive pattern TRP.

[0133] The display device DD2 may be similar to the reference TFT except that the pixel defining layer PDL is spaced apart from the trench TCH defined by the via insulating layer VIA in a plan view. Figure 2 The display device DD described is substantially the same as that described above. Figure 2 The description of the display device DD described is repeated.

[0134] The via insulating layer VIA may be disposed on the first substrate SUB1. The via insulating layer VIA may define a trench TCH. The trench TCH may overlap each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3.

[0135] In an embodiment, the trench TCH may have an inverted trapezoidal cross-sectional shape. In other words, the trench TCH may include a first inclined surface IS1, a second inclined surface IS2, and a flat surface FS.

[0136] The lower electrode AE ​​may be disposed on the via insulating layer VIA. The lower electrode AE ​​may overlap each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3. The lower electrode AE ​​may extend to the inside of the trench TCH on the via insulating layer VIA. In other words, the lower electrode AE ​​may be disposed along the contour of the via insulating layer VIA.

[0137] Therefore, the upper surface of the lower electrode AE ​​may include a first inclined surface, a second inclined surface, a first flat surface, a second flat surface, and a third flat surface. In the cross section, the first inclined surface may be spaced apart from the second inclined surface, and the first flat surface is between the first inclined surface and the second inclined surface. The first inclined surface may face the second inclined surface. The second flat surface may extend from the first inclined surface and may partially overlap with the pixel defining layer PDL. The third flat surface may extend from the second inclined surface and may partially overlap with the pixel defining layer PDL.

[0138] The pixel defining layer PDL may be disposed on the via insulating layer VIA and the lower electrode AE ​​in the light blocking area BA. An opening OP exposing the trench TCH may be defined in the pixel defining layer PDL. The pixel defining layer PDL may cover an edge of the lower electrode AE ​​and expose an upper surface of the lower electrode AE.

[0139] In an embodiment, Fig.10 As shown in , in a plan view, the pixel defining layer PDL may be spaced apart from the trench TCH by a selectable distance. For example, in consideration of an alignment error occurring during a manufacturing process of the display device DD2, in a plan view, the pixel defining layer PDL may be spaced apart from the trench TCH by a selectable distance. Therefore, defects caused by alignment errors occurring during a manufacturing process may be suppressed.

[0140] In an embodiment, the separation distance Dpt between the pixel defining layer PDL and the trench TCH in the plan view may be about 6.6 micrometers or less. For example, the separation distance Dpt in the plan view may be about 2 micrometers. In the case where the separation distance Dpt in the plan view exceeds about 6.6 micrometers, the light conversion efficiency of the display device DD2 may be lower than that of the display device according to the comparative example (e.g., Figure 5 The light conversion efficiency of the display device DD').

[0141] The light emitting layer EML may be disposed on the via insulating layer VIA. As an example, the light emitting layer EML may be disposed on the lower electrode AE. The light emitting layer EML may overlap each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3. The light emitting layer EML may be disposed along the contour of the lower electrode AE. Therefore, the light emitting layer EML may include a first portion EML-P1 disposed in parallel with each of the first inclined surface and the second inclined surface of the lower electrode AE ​​and a second portion EML-P2 disposed in parallel with the first flat surface of the lower electrode AE. For example, the first portion EML-P1 of the light emitting layer EML may be disposed in parallel with each of the first inclined surface IS1 and the second inclined surface IS2 of the trench TCH. The second portion EML-P2 of the light emitting layer EML may be disposed in parallel with the flat surface FS of the trench TCH.

[0142] In an embodiment, the light emitting layer EML may further include a third portion EML-P3 extending from the first portion EML-P1 and disposed on the via insulating layer VIA. As an example, the third portion EML-P3 of the light emitting layer EML may be disposed on the lower electrode AE, may extend from the first portion EML-P1, and may contact the pixel defining layer PDL. The third portion EML-P3 of the light emitting layer EML may have a flat upper surface. In other words, the third portion EML-P3 of the light emitting layer EML may be disposed parallel to each of the second flat surface and the third flat surface of the lower electrode AE.

[0143] In the following, we will refer again to Figure 5 , Figure 7 and Fig.10 The effects of the present disclosure are described.

[0144] Reference Figure 5 , Figure 7 and Fig.10 , the light conversion efficiency according to the first angle θ1 was measured in the display devices satisfying the comparative example, example 1, example 2, example 3, example 4, example 5, example 6, example 7, example 8 and example 9. The first angle θ1 is formed between the first imaginary straight line SL1 and the second imaginary straight line SL2 extending perpendicularly to the first portion EML-P1, the first imaginary straight line SL1 connecting the point where the first portion EML-P1 and the second portion EML-P2 intersect with the edge of the first color conversion pattern CVP1 and forming an obtuse angle with the first portion EML-P1. The second angle θ2 is formed between the traveling direction of the light having the maximum luminous intensity among the light emitted from the first portion EML-P1 and the second imaginary straight line SL2.

[0145] The number of pixels per unit area (or, pixels per inch, PPI) of each of the display devices is 220, and the second angle θ2 of the light emitting layer included in each of the pixels is about 30 degrees.

[0146] A display device satisfying Examples 1, 2, and 3 (e.g., Figure 6The display device DD) may include a via insulating layer VIA in which a trench TCH is defined, a lower electrode arranged along the outline of the via insulating layer VIA, and a light-emitting layer EML arranged along the outline of the lower electrode AE. Therefore, the first part EML-P1 of the light-emitting layer EML is arranged to be parallel to the first inclined surface IS1 of the trench TCH. The second part EML-P2 of the light-emitting layer EML is arranged to be parallel to the flat surface FS of the trench TCH. The separation distance Dpt in a plan view between the pixel defining layer PDL and the trench TCH is approximately 0 microns. The first angle θ1 of the display device satisfying Example 1 is approximately 53.4 degrees. The first angle θ1 of the display device satisfying Example 2 is approximately 57.4 degrees. The first angle θ1 of the display device satisfying Example 3 is approximately 58.1 degrees.

[0147] A display device satisfying Examples 4, 5, and 6 (e.g., Fig. 9 The display device DD2) may include a via insulating layer VIA in which a trench TCH is defined, a lower electrode arranged along the outline of the via insulating layer VIA, and a light-emitting layer EML arranged along the outline of the lower electrode AE. Therefore, a first portion EML-P1 of the light-emitting layer EML is arranged to be parallel to a first inclined surface IS1 of the trench TCH. A second portion EML-P2 of the light-emitting layer EML is arranged to be parallel to a flat surface FS of the trench TCH. The separation distance Dpt in a plan view between the pixel defining layer PDL and the trench TCH is approximately 2 microns. The first angle θ1 of the display device satisfying Example 4 is approximately 52.2 degrees. The first angle θ1 of the display device satisfying Example 5 is approximately 56.0 degrees. The first angle θ1 of the display device satisfying Example 6 is approximately 56.5 degrees.

[0148] A display device satisfying Examples 7, 8, and 9 (eg, Fig. 9 The display device DD2) may include a via insulating layer VIA in which a trench TCH is defined, a lower electrode arranged along the outline of the via insulating layer VIA, and a light-emitting layer EML arranged along the outline of the lower electrode AE. Therefore, the first part EML-P1 of the light-emitting layer EML is arranged to be parallel to the first inclined surface IS1 of the trench TCH. The second part EML-P2 of the light-emitting layer EML is arranged to be parallel to the flat surface FS of the trench TCH. The separation distance Dpt between the pixel defining layer PDL and the trench TCH in a plan view is approximately 6.6 microns. The first angle θ1 of the display device satisfying Example 7 is approximately 50.8 degrees. The first angle θ1 of the display device satisfying Example 8 is approximately 51.8 degrees. The first angle θ1 of the display device satisfying Example 9 is approximately 52.3 degrees.

[0149] The display device (eg, Figure 5The display device DD') may include a via insulating layer VIA', a lower electrode AE' disposed on the via insulating layer VIA', and a light emitting layer EML' disposed on the lower electrode AE'. Each of the via insulating layer VIA', the lower electrode AE' and the light emitting layer EML' has a flat upper surface.

[0150] As a result, referring to Table 1 below, based on the light conversion efficiency of the display device that meets the comparative example, the light conversion efficiency of the display device that meets Example 1 was measured to be approximately 104.0%, the light conversion efficiency of the display device that meets Example 2 was measured to be approximately 104.4%, and the light conversion efficiency of the display device that meets Example 3 was measured to be approximately 103.9%.

[0151] Based on the light conversion efficiency of the display device satisfying the comparative example, the light conversion efficiency of the display device satisfying Example 4 was measured to be approximately 103.4%, the light conversion efficiency of the display device satisfying Example 5 was measured to be approximately 103.6%, and the light conversion efficiency of the display device satisfying Example 6 was measured to be approximately 103.2%.

[0152] Based on the light conversion efficiency of the display device that meets the comparative example, the light conversion efficiency of the display device that meets Example 7 was measured to be approximately 101.0%, the light conversion efficiency of the display device that meets Example 8 was measured to be approximately 101.1%, and the light conversion efficiency of the display device that meets Example 9 was measured to be approximately 101.1%.

[0153] [Table 1]

[0154]

[0155] From these results, it can be seen that the light conversion efficiency of the display device DD is improved by including the light-emitting layer EML and by making the first angle θ1 greater than the second angle θ2, and the light-emitting layer EML may include a first portion EML-P1 arranged parallel to the first inclined surface IS1 of the groove TCH and a second portion EML-P2 arranged parallel to the flat surface FS of the groove TCH.

[0156] Considering alignment errors occurring during the manufacturing process, the display device DD2 according to the embodiment may include a pixel defining layer PDL spaced apart from the trench TCH by a selectable distance in a plan view. However, it can be seen that the light conversion efficiency of the display device DD2 decreases when the separation distance Dpt increases.

[0157] The present disclosure may be applied to various display devices. For example, within the spirit and scope of the present disclosure, the present disclosure may be applied to various display devices, such as display devices for vehicles, ships and aircraft, portable communication devices, display devices for exhibitions or information transmission, and medical display devices.

[0158] The foregoing is an illustration of the embodiments of the present disclosure and should not be construed as limiting thereof. Although some embodiments have been described with reference to the accompanying drawings, it will be readily appreciated by those skilled in the art that many changes and modifications may be made without departing from the spirit and scope of the present disclosure and as defined in the appended claims.

Claims

1. A display device, wherein: The display device comprises: A first substrate including a light emitting region; A via insulating layer, disposed on the first substrate, the via insulating layer defining a groove, the groove including an inclined surface and a flat surface, and the groove overlapping the light emitting area; a light emitting layer disposed on the via insulating layer in the light emitting region, the light emitting layer including a first portion disposed parallel to the inclined surface and a second portion disposed parallel to the flat surface; and a color conversion layer, disposed on the light-emitting layer, and the color conversion layer overlaps the light-emitting region, wherein a first angle formed between a first imaginary straight line and a second imaginary straight line extending perpendicularly to the first portion is greater than a second angle formed between a traveling direction of light having a maximum luminous intensity among the light emitted from the first portion and the second imaginary straight line, the first imaginary straight line connecting a point where the first portion and the second portion of the light-emitting layer intersect with an edge of the color conversion layer and forming an obtuse angle with the first portion.

2. The display device according to claim 1, wherein: Light having the maximum luminous intensity among the light emitted from the first portion of the light emitting layer is incident on the color conversion layer.

3. The display device according to claim 1, wherein: The groove has an inverted trapezoidal cross-sectional shape.

4. The display device according to claim 1, wherein: The display device further includes: A lower electrode is arranged between the via insulating layer and the light emitting layer, wherein the lower electrode extends on the via insulating layer to the interior of the groove, and The lower electrode includes an inclined surface disposed in parallel with the inclined surface of the trench and a flat surface disposed in parallel with the flat surface of the trench.

5. The display device according to claim 4, wherein: The display device further includes: a pixel defining layer, disposed on the via insulating layer, and the pixel defining layer defines an opening exposing the groove, The pixel defining layer overlaps with at least a portion of the groove in a plan view.

6. A display device, wherein: The display device comprises: A first substrate including a light emitting region; A via insulating layer, disposed on the first substrate, the via insulating layer defining a groove, the groove including an inclined surface and a flat surface, and the groove overlapping the light emitting area; a light emitting layer disposed on the via insulating layer in the light emitting region, the light emitting layer comprising a first portion disposed parallel to the inclined surface and a second portion disposed parallel to the flat surface; a pixel defining layer disposed on the via insulating layer, the pixel defining layer defining an opening exposing the groove, and the pixel defining layer being spaced apart from the groove by a selectable distance in a plan view; and a color conversion layer, disposed on the light-emitting layer, and the color conversion layer overlaps the light-emitting region, wherein a first angle formed between a first imaginary straight line and a second imaginary straight line extending perpendicularly to the first portion is greater than a second angle formed between a traveling direction of light having a maximum luminous intensity among the light emitted from the first portion and the second imaginary straight line, the first imaginary straight line connecting a point where the first portion and the second portion of the light-emitting layer intersect with an edge of the color conversion layer and forming an obtuse angle with the first portion.

7. The display device according to claim 6, wherein: The light-emitting layer further comprises: A third portion is disposed on the via insulating layer, the third portion extends from the first portion, and the third portion contacts the pixel defining layer.

8. The display device according to claim 6, wherein: Light having the maximum luminous intensity among the light emitted from the first portion of the light emitting layer is incident on the color conversion layer.

9. The display device according to claim 6, wherein: The display device further includes: A lower electrode is arranged between the via insulating layer and the light emitting layer, Wherein, the lower electrode extends on the via insulating layer to the inside of the groove.

10. The display device according to claim 9, wherein: The lower electrode comprises: an inclined surface disposed parallel to the inclined surface of the groove; and A flat surface is disposed parallel to the flat surface of the groove, and wherein the light emitting layer is disposed along a contour of the lower electrode.

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