Mother substrate for display device and method for manufacturing display device

By arranging inspection pads and high-resistance wiring on the display device motherboard, the problem of insufficient adjacent short-circuit inspection accuracy in the prior art is solved, and more accurate and efficient short-circuit detection is achieved.

CN119343031APending Publication Date: 2025-01-21MAGNOLIA WHITE CORP
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Patent Information

Application Number
CN202410958724.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-07-19
Filing Date
2024-07-17
Publication Date
2025-01-21

AI Technical Summary

Technical Problem

In the prior art, when manufacturing a display device with a touch panel, it is difficult to improve the accuracy of adjoining short circuit inspection, resulting in inaccurate short circuit detection.

Method used

A mother substrate for a display device is designed. By arranging a plurality of inspection pads, first high-resistance wiring and cutting lines on the mother substrate, it is ensured that the inspection pads are not connected to each other through high-resistance wiring before inspection, thereby improving short circuit detection. accuracy.

Benefits of technology

This method can accurately detect the adjacent short circuit of the touch panel in the display device, reduce detection time and effort, and avoid misjudgment that the resistance value of the high-resistance wiring is a short circuit.

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Abstract

The invention provides a mother substrate for a display device and a manufacturing method of the display device, which can improve the accuracy of adjacent short circuit inspection. A mother substrate for a display device according to an embodiment of the present invention is provided with: a plurality of inspection pads provided to inspect whether or not two touch electrodes adjacent to each other among a plurality of touch electrodes included in a touch panel are not short-circuited; a first high-resistance wiring connecting the plurality of inspection pads to each other; a first cutting line set to cut a plurality of display devices from the display device mother substrate; and a second cutting line set along the outer shape of the single display device. The first high-resistance wiring is disposed across the first cutting line and is cut off along the first cutting line before inspection using the plurality of inspection pads. The plurality of inspection pads are not connected to each other by the first high-resistance wiring at the time of inspection.
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Description

[0001] Cross-references to related applications

[0002] This application is based on and claims the benefit of priority from Japanese Patent Application No. 2023-117480 (filing date: July 19, 2023), the entire contents of which are incorporated herein by reference. Technical Field

[0003] Embodiments of the present invention relate to a mother substrate for a display device and a method for manufacturing a display device. Background Art

[0004] In recent years, a display device using an organic light emitting diode (OLED) as a display element has been put into practical use. The display element includes a lower electrode, an organic layer covering the lower electrode, and an upper electrode covering the organic layer.

[0005] Sometimes a display device is equipped with a touch panel for detecting a user's operation on a display area. In the manufacture of such a display device with a touch panel, it is necessary to check whether two electrodes adjacent to each other among a plurality of electrodes constituting the touch panel are not short-circuited. This inspection is called an adjacent short-circuit inspection, and a technology that can improve the accuracy of the inspection is required. Summary of the invention

[0006] An object of the present invention is to provide a mother substrate for a display device and a method for manufacturing a display device, which can improve the accuracy of adjacent short-circuit inspection.

[0007] A display device mother substrate according to one embodiment is provided with a plurality of display devices, each of which includes: a display panel having a display area for displaying an image; and a touch panel having a plurality of touch electrodes overlapping the display area. The display device mother substrate includes: a plurality of inspection pads provided for each of the display devices in order to inspect whether two touch electrodes adjacent to each other among the plurality of touch electrodes are not short-circuited; a first high-resistance wiring connecting the plurality of inspection pads to each other; a first cutting line set to cut out a plurality of display devices from the display device mother substrate; and a second cutting line set along the outer shape of a single display device. The plurality of inspection pads are respectively arranged between the first cutting line and the second cutting line, and are electrically connected to the corresponding touch electrodes for the inspection. The first high-resistance wiring is arranged in a manner spanning the first cutting line, and is cut along the first cutting line before the inspection using the plurality of inspection pads. The plurality of inspection pads are not connected to each other through the first high-resistance wiring during the inspection.

[0008] A method for manufacturing a display device according to one embodiment is a method for manufacturing a single display device from a mother substrate for a display device, wherein the mother substrate for a display device is formed with a plurality of display devices, each of the plurality of display devices includes a display panel having a display area for displaying an image, and a touch panel having a plurality of touch electrodes overlapping the display area, and the mother substrate for a display device includes a first cutting line and a second cutting line, a plurality of inspection pads arranged between the first cutting line and the second cutting line and provided for each of the display devices, and a first high-resistance wiring connecting the plurality of inspection pads to each other. In the method for manufacturing a display device, the mother substrate for a display device is cut along the first cutting line set so as to cross the first high-resistance wiring, a plurality of display devices are cut out from the mother substrate for a display device, the plurality of inspection pads are used to inspect whether two touch electrodes adjacent to each other among the plurality of touch electrodes are not short-circuited, and after the inspection, the plurality of display devices are cut along the second cutting line to form the outer shape of a single display device. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 It is a perspective view showing a schematic configuration example of a display device according to an embodiment.

[0010] Figure 2 It is a plan view showing a schematic configuration example of a touch panel according to this embodiment.

[0011] Figure 3 It is a cross-sectional view showing a schematic configuration example of a display device according to this embodiment.

[0012] Figure 4 This is a plan view for explaining an example of a configuration for inspecting adjacent short circuits in a touch panel.

[0013] Figure 5 It is a plan view for explaining an example of a configuration for inspecting adjacent short circuits in a touch panel according to the embodiment.

[0014] Figure 6 It is a plan view showing a schematic configuration example of a mother substrate for a display device according to this embodiment.

[0015] Figure 7 It is a cross-sectional view showing a schematic configuration example of a display device according to this embodiment. DETAILED DESCRIPTION

[0016] Hereinafter, embodiments will be described with reference to the drawings.

[0017] It should be noted that the disclosed content is only an example, and the invention is not limited to the content described in the following embodiments. Deformations that can be easily thought of by those skilled in the art are of course included in the disclosed scope. In order to make the description clearer, the size, shape, etc. of each part are sometimes changed relative to the actual embodiment and schematically shown in the drawings. In multiple drawings, the same reference numerals are marked for corresponding elements, and detailed descriptions are sometimes omitted.

[0018] In the drawings, mutually orthogonal X-axis, Y-axis and Z-axis are recorded as needed for easy understanding. The direction along the X-axis is called the first direction, the direction along the Y-axis is called the second direction, and the direction along the Z-axis is called the third direction. The third direction Z is the normal direction relative to the plane including the first direction X and the second direction Y. In addition, the method of observing various elements parallel to the third direction Z is called top view.

[0019] The display device involved in this embodiment is an organic electroluminescent display device having an organic light emitting diode (OLED) as a display element, and can be mounted on various electronic devices such as televisions, personal computers, vehicle-mounted devices, tablet terminals, smart phones, portable telephone terminals, wearable terminals, etc. In addition, the display device involved in this embodiment is a display device with a touch panel that can detect user operations on the display area.

[0020] Figure 1 1 is a perspective view showing an example of a schematic configuration of a display device DSP according to the present embodiment. The display device DSP includes a display panel PNL, a touch panel TP, a first wiring substrate FPC1, and a second wiring substrate FPC2. The display panel PNL includes a first substrate SUB1. The display panel PNL includes a display area DA for displaying an image and a peripheral area PA surrounding the display area DA.

[0021] The display panel PNL has a plurality of pixels PX arranged in a matrix along a first direction X and a second direction Y in a display area DA. The pixel PX includes a plurality of sub-pixels SP. In one example, the pixel PX includes a red sub-pixel SP1, a green sub-pixel SP2, and a blue sub-pixel SP3. It should be noted that the pixel PX may also include sub-pixels SP of other colors such as white together with the sub-pixels SP1, SP2, and SP3 or instead of any of the sub-pixels SP1, SP2, and SP3.

[0022] The sub-pixel SP includes a pixel circuit 1 and a display element DE driven by the pixel circuit 1. The pixel circuit 1 includes a pixel switch 2, a driving transistor 3, and a capacitor 4. The pixel switch 2 and the driving transistor 3 are switching elements composed of, for example, thin film transistors.

[0023] The gate electrode of the pixel switch 2 is connected to the scanning line GL. One of the source electrode and the drain electrode of the pixel switch 2 is connected to the signal line SL, and the other is connected to the gate electrode of the driving transistor 3 and the capacitor 4. In the driving transistor 3, one of the source electrode and the drain electrode is connected to the power line PL and the capacitor 4, and the other is connected to the display element DE.

[0024] It should be noted that the configuration of the pixel circuit 1 is not limited to the illustrated example. For example, the pixel circuit 1 may include more thin film transistors and capacitors.

[0025] The first substrate SUB1 has a mounting area MA. The first wiring substrate FPC1 and the second wiring substrate FPC2 are arranged in the mounting area MA. The first wiring substrate FPC1 is provided with a display controller CT1 that performs control related to image display.

[0026] The touch panel TP is overlapped on the display area DA of the display panel PNL. The touch panel TP has a plurality of touch electrodes, which will be described in detail later. These touch electrodes are electrically connected to the second wiring substrate FPC2. The second wiring substrate FPC2 is provided with a detection controller CT2 that performs control related to touch detection.

[0027] The display controller CT1 and the detection controller CT2 are composed of, for example, ICs. Figure 1 , the display controller CT1 and the detection controller CT2 are mounted on different wiring substrates, but the controllers CT1 and CT2 may be mounted on the same wiring substrate.

[0028] Figure 2 1 is a plan view showing an example of a schematic structure of the touch panel TP involved in this embodiment. Figure 2 As shown in FIG. 1 , the touch panel TP has a plurality of touch electrodes TX. Figure 2 In the example of FIG. 1 , 16 (4 rows×4 columns) touch electrodes TX1 to TX16 are arranged in a matrix. Among the touch electrodes TX1 to TX16, touch electrodes TX1 to TX8 are located in the left half of the figure, and touch electrodes TX9 to TX16 are located in the right half of the figure.

[0029] like Figure 2 As shown, the touch electrode TX1 is disposed adjacent to the touch electrodes TX2 and TX16 along the first direction X. The touch electrode TX1 is disposed adjacent to the touch electrode TX3 along the second direction Y.

[0030] The touch electrode TX2 is disposed adjacent to the touch electrode TX1 along the first direction X. The touch electrode TX2 is disposed adjacent to the touch electrode TX4 along the second direction Y.

[0031] The touch electrode TX3 is disposed adjacent to the touch electrodes TX4 and TX14 along the first direction X. The touch electrode TX3 is disposed adjacent to the touch electrodes TX1 and TX5 along the second direction Y.

[0032] The touch electrode TX4 is disposed adjacent to the touch electrode TX3 along the first direction X. The touch electrode TX4 is disposed adjacent to the touch electrodes TX2 and TX6 along the second direction Y.

[0033] The touch electrode TX5 is disposed adjacent to the touch electrodes TX6 and TX12 along the first direction X. The touch electrode TX5 is disposed adjacent to the touch electrodes TX3 and TX7 along the second direction Y.

[0034] The touch electrode TX6 is disposed adjacent to the touch electrode TX5 along the first direction X. The touch electrode TX6 is disposed adjacent to the touch electrodes TX4 and TX8 along the second direction Y.

[0035] The touch electrode TX7 is disposed adjacent to the touch electrodes TX8 and TX10 along the first direction X. The touch electrode TX7 is disposed adjacent to the touch electrode TX5 along the second direction Y.

[0036] The touch electrode TX8 is disposed adjacent to the touch electrode TX7 along the first direction X. The touch electrode TX8 is disposed adjacent to the touch electrode TX6 along the second direction Y.

[0037] The touch electrode TX9 is disposed adjacent to the touch electrode TX10 along the first direction X. The touch electrode TX9 is disposed adjacent to the touch electrode TX11 along the second direction Y.

[0038] The touch electrode TX10 is disposed adjacent to the touch electrodes TX7 and TX9 along the first direction X. The touch electrode TX10 is disposed adjacent to the touch electrode TX12 along the second direction Y.

[0039] The touch electrode TX11 is disposed adjacent to the touch electrode TX12 along the first direction X. The touch electrode TX11 is disposed adjacent to the touch electrodes TX9 and TX13 along the second direction Y.

[0040] The touch electrode TX12 is disposed adjacent to the touch electrodes TX5 and TX11 along the first direction X. The touch electrode TX12 is disposed adjacent to the touch electrodes TX10 and TX14 along the second direction Y.

[0041] The touch electrode TX13 is disposed adjacent to the touch electrode TX14 along the first direction X. The touch electrode TX13 is disposed adjacent to the touch electrodes TX11 and TX15 along the second direction Y.

[0042] The touch electrode TX14 is disposed adjacent to the touch electrodes TX3 and TX13 along the first direction X. The touch electrode TX14 is disposed adjacent to the touch electrodes TX12 and TX16 along the second direction Y.

[0043] The touch electrode TX15 is disposed adjacent to the touch electrode TX16 along the first direction X. The touch electrode TX15 is disposed adjacent to the touch electrode TX13 along the second direction Y.

[0044] The touch electrode TX16 is disposed adjacent to the touch electrodes TX1 and TX15 along the first direction X. The touch electrode TX16 is disposed adjacent to the touch electrode TX14 along the second direction Y.

[0045] It should be noted that the number and arrangement of the touch electrodes TX are not limited to this example.

[0046] The touch electrodes TX1 to TX16 are connected to leads LL1 to LL16, respectively. The leads LL1 to LL16 are electrically connected to the second wiring substrate FPC2 (detection controller CT2) via the connection portion TCN. More specifically, the leads LL1 to LL8 are electrically connected to the second wiring substrate FPC2 via the connection portion TCN1, and the leads LL9 to LL16 are electrically connected to the second wiring substrate FPC2 via the connection portion TCN2.

[0047] For example, the touch electrodes TX1 to TX8 , the leads LL1 to LL8 , and the connection portion TCN1 and the touch electrodes TX9 to TX16 , the leads LL9 to LL16 , and the connection portion TCN2 have line-symmetric shapes with respect to a center line in the first direction X.

[0048] Figure 3 FIG. 1 is a cross-sectional view showing an example of a schematic structure of a display device DSP according to the present embodiment. Figure 3 As shown, the display device DSP has an insulating substrate 10. The substrate 10 may be glass or a flexible resin film. A circuit layer 11 is disposed on the substrate 10. The circuit layer 11 includes Figure 1 The illustrated pixel circuit 1, scanning lines GL, signal lines SL, power lines PL and other various circuits and wirings.

[0049] The circuit layer 11 is covered with an organic insulating layer 12. The organic insulating layer 12 functions as a planarizing film that planarizes the unevenness generated by the circuit layer 11. Pixel electrodes PE1, PE2, and PE3 are arranged on the organic insulating layer 12. Figure 3 Although not shown in the cross section, the pixel electrodes PE1, PE2, and PE3 are connected to the pixel circuit 1 included in the circuit layer 11 through contact holes formed in the organic insulating layer 12, respectively.

[0050] A bank BNK is disposed on the organic insulating layer 12 and the pixel electrodes PE1, PE2, and PE3. The bank BNK includes a pixel opening AP1 that exposes a portion of the pixel electrode PE1, a pixel opening AP2 that exposes a portion of the pixel electrode PE2, and a pixel opening AP3 that exposes a portion of the pixel electrode PE3. The ends of the pixel electrodes PE1, PE2, and PE3 are covered by the bank BNK.

[0051] An organic layer OR1 is disposed on the pixel electrode PE1. The organic layer OR1 covers the pixel electrode PE1 through the pixel opening AP1. An organic layer OR2 is disposed on the pixel electrode PE2. The organic layer OR2 covers the pixel electrode PE2 through the pixel opening AP2. An organic layer OR3 is disposed on the pixel electrode PE3. The organic layer OR3 covers the pixel electrode PE3 through the pixel opening AP3.

[0052] A common electrode CE is disposed on the bank BNK and the organic layers OR1, OR2, and OR3. The common electrode CE is disposed over a plurality of pixels PX (sub-pixels SP) and faces the pixel electrodes PE1, PE2, and PE3.

[0053] The portion of the pixel electrode PE1, the organic layer OR1 and the common electrode CE that overlaps with the pixel opening AP1 constitutes the display element DE1 of the sub-pixel SP1. The portion of the pixel electrode PE2, the organic layer OR2 and the common electrode CE that overlaps with the pixel opening AP2 constitutes the display element DE2 of the sub-pixel SP2. The portion of the pixel electrode PE3, the organic layer OR3 and the common electrode CE that overlaps with the pixel opening AP3 constitutes the display element DE3 of the sub-pixel SP3.

[0054] It should be noted that the pixel electrodes PE1 , PE2 , and PE3 may also be referred to as lower electrodes, and the common electrode CE may be referred to as an upper electrode.

[0055] The common electrode CE is covered by a sealing layer 13. The sealing layer 13 is covered by a resin layer 14. The resin layer 14 is covered by a sealing layer 15. The touch electrode TX and the lead LL connected to the touch electrode TX are arranged on the sealing layer 15. The touch electrode TX and the lead LL are formed of the same material and by the same manufacturing process.

[0056] The touch electrode TX is covered with a resin layer 16. An optical adhesive OCA is disposed on the resin layer 16. The optical adhesive OCA bonds the polarizing plate POL disposed thereon to the resin layer 16.

[0057] The organic insulating layer 12 is formed of an organic insulating material. The bank BNK and the resin layers 14 and 16 are formed of a resin material (organic insulating material) such as epoxy resin or acrylic resin. The sealing layers 13 and 15 are formed of an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON) or aluminum oxide (Al2O3).

[0058] The pixel electrodes PE1, PE2, and PE3 include a reflective layer formed of, for example, silver (Ag) and a pair of conductive oxide layers covering the upper and lower surfaces of the reflective layer, respectively. Each conductive oxide layer can be formed of, for example, a transparent conductive oxide such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), or IGZO (Indium Gallium Zinc Oxide).

[0059] The organic layers OR1, OR2, and OR3 may have a stacked structure of a hole injection layer, a hole transport layer, an electron blocking layer, a light emitting layer, a hole blocking layer, an electron transport layer, and an electron injection layer. The organic layers OR1, OR2, and OR3 may have a so-called tandem structure including a plurality of light emitting layers.

[0060] The common electrode CE is formed of a metal material such as an alloy of magnesium and silver (MgAg).

[0061] The pixel circuits 1 included in the sub-pixels SP1, SP2, SP3 respectively supply pixel voltages to the pixel electrodes PE1, PE2, PE3, and the common voltage to the common electrode CE.

[0062] The organic layers OR1, OR2, and OR3 emit light according to the application of voltage. For example, when a potential difference is formed between the pixel electrode PE1 and the common electrode CE, the light-emitting layer of the organic layer OR1 emits light in a red wavelength range. When a potential difference is formed between the pixel electrode PE2 and the common electrode CE, the light-emitting layer of the organic layer OR2 emits light in a green wavelength range. When a potential difference is formed between the pixel electrode PE3 and the common electrode CE, the light-emitting layer of the organic layer OR3 emits light in a blue wavelength range.

[0063] As another example, the light-emitting layers of the organic layers OR1, OR2, and OR3 may also emit light of the same color (for example, white). In this case, the display device DSP may also include a color filter that converts the light emitted by the light-emitting layer into light of a color corresponding to the sub-pixels SP1, SP2, and SP3. In addition, the display device DSP may also include a layer including quantum dots that are excited by the light emitted by the light-emitting layer to generate light of a color corresponding to the sub-pixels SP1, SP2, and SP3.

[0064] exist Figure 1 to Figure 3 In manufacturing the display device DSP with a touch panel TP as shown, it is necessary to check whether two adjacent touch electrodes TX are not short-circuited. This inspection is called an adjacent short-circuit inspection, for example, Figure 4 The structure shown is carried out.

[0065] Figure 4 It is a plan view for explaining an example of a structure for inspecting adjacent short circuits in the touch panel TP.

[0066] The lead wires LL1 to LL8 extending from the touch electrodes TX1 to TX8 are connected to the connection portion TCN1 disposed in the mounting area MA. Figure 4 As shown, wirings L1 to L8 are connected to the connection portion TCN1, and the wirings L1 to L8 are electrically connected to the touch electrodes TX1 to TX8 via the leads LL1 to LL8, and the wirings L1 to L8 are connected to the inspection pads PD1 to PD8. Figure 4 As shown, the connection portion TCN1 is connected to a ring-shaped ground wiring LG and a wiring L17 electrically connected to the ground wiring LG, and the wiring L17 is connected to the ground pad PDG1.

[0067] like Figure 4 As shown, the inspection pad PD1 corresponding to the touch electrode TX1 and the inspection pad PD5 corresponding to the touch electrode TX5 are formed integrally as one inspection pad PD1_5. In addition, the wiring L1 electrically connected to the touch electrode TX1 and the wiring L5 electrically connected to the touch electrode TX5 are bundled and connected to the inspection pad PD1_5. In this way, by integrally forming a plurality of inspection pads PD corresponding to a plurality of non-adjacent touch electrodes TX, and bundling a plurality of wirings L electrically connected to the plurality of touch electrodes TX and connecting them to the inspection pad PD, it is possible to avoid missing adjacent short circuits in the touch panel TP and reduce the number of inspection pads PD required for adjacent short circuit inspection. The time required for adjacent short circuit inspection increases in proportion to the number of inspection pads PD, so by reducing the number of inspection pads PD, the time required for adjacent short circuit inspection can be shortened.

[0068] Similarly, the inspection pad PD2 corresponding to the touch electrode TX2 and the inspection pad PD6 corresponding to the touch electrode TX6 are integrally formed as one inspection pad PD2_6. The wiring L2 electrically connected to the touch electrode TX2 and the wiring L6 electrically connected to the touch electrode TX6 are bundled and connected to the inspection pad PD2_6.

[0069] The inspection pad PD3 corresponding to the touch electrode TX3 and the inspection pad PD7 corresponding to the touch electrode TX7 are integrally formed as one inspection pad PD3_7. The wiring L3 electrically connected to the touch electrode TX3 and the wiring L7 electrically connected to the touch electrode TX7 are bundled and connected to the inspection pad PD3_7.

[0070] The inspection pad PD4 corresponding to the touch electrode TX4 and the inspection pad PD8 corresponding to the touch electrode TX8 are integrally formed as one inspection pad PD4_8. The wiring L4 electrically connected to the touch electrode TX4 and the wiring L8 electrically connected to the touch electrode TX8 are bundled and connected to the inspection pad PD4_8.

[0071] The inspection pads PD1_5, PD2_6, PD3_7, PD4_8 and the ground pad PDG1 are connected to each other through a ring-shaped high resistance wiring LR1 (first high resistance wiring) called a short-circuit ring. By providing such a ring-shaped high resistance wiring LR1, it is possible to prevent the display device DSP (display panel PNL) from being damaged by static electricity caused by peeling electrification during the manufacturing process of the display device DSP (display panel PNL).

[0072] In the above, the configuration of the left half in the figure has been described, but the configuration of the right half in the figure is the same.

[0073] More specifically, the lead wires LL9 to LL16 extending from the touch electrodes TX9 to TX16 are connected to the connection portion TCN2 disposed in the mounting area MA. Figure 4 As shown, wirings L9 to L16 are connected to the connection portion TCN2, and the wirings L9 to L16 are electrically connected to the touch electrodes TX9 to TX16 via the leads LL9 to LL16, and the wirings L9 to L16 are connected to the inspection pads PD9 to PD16. Figure 4 As shown, the ring-shaped ground wiring LG and the wiring L18 electrically connected to the ground wiring LG are connected to the connection portion TCN2, and the wiring L18 is connected to the ground pad PDG2.

[0074] The inspection pad PD9 corresponding to the touch electrode TX9 and the inspection pad PD13 corresponding to the touch electrode TX13 are integrally formed as one inspection pad PD9_13. In addition, the wiring L9 electrically connected to the touch electrode TX9 and the wiring L13 electrically connected to the touch electrode TX13 are bundled and connected to the inspection pad PD9_13.

[0075] The inspection pad PD10 corresponding to the touch electrode TX10 and the inspection pad PD14 corresponding to the touch electrode TX14 are integrally formed as one inspection pad PD10_14. The wiring L10 electrically connected to the touch electrode TX10 and the wiring L14 electrically connected to the touch electrode TX14 are bundled and connected to the inspection pad PD10_14.

[0076] The inspection pad PD11 corresponding to the touch electrode TX11 and the inspection pad PD15 corresponding to the touch electrode TX15 are integrally formed as one inspection pad PD11_15. The wiring L11 electrically connected to the touch electrode TX11 and the wiring L15 electrically connected to the touch electrode TX15 are bundled and connected to the inspection pad PD11_15.

[0077] The inspection pad PD12 corresponding to the touch electrode TX12 and the inspection pad PD16 corresponding to the touch electrode TX16 are integrally formed as one inspection pad PD12_16. The wiring L12 electrically connected to the touch electrode TX12 and the wiring L16 electrically connected to the touch electrode TX16 are bundled and connected to the inspection pad PD12_16.

[0078] The inspection pads PD9_13, PD10_14, PD11_15, and PD12_16 and the ground pad PDG2 are connected to each other via a loop-shaped high-resistance wiring LR2 (first high-resistance wiring) provided to cope with static electricity.

[0079] It should be noted that if Figure 4 As shown, the inspection pads PD1_5, PD2_6, PD3_7, PD4_8, PD9_13, PD10_14, PD11_15, PD12_16, the ground pads PDG1, PDG2 and the high resistance wirings LR1, LR2 are all arranged between the first cutting line CL1 and the second cutting line CL2. The first cutting line CL1 is a cutting line set to cut out a plurality of display devices DSP from a display device mother substrate on which a plurality of display devices DSP are formed. The second cutting line CL2 is a cutting line set along the outer shape of a single display device DSP.

[0080] The adjacent short circuit inspection is performed after the display device mother substrate is cut along the first cutting line CL1 and a plurality of display devices DSP are cut out from the display device mother substrate. When the adjacent short circuit inspection in the touch panel TP is completed, the display device DSP is cut along the second cutting line CL2, and its shape is adjusted to the appearance of the final product. That is, the inspection pads PD1_5, PD2_6, PD3_7, PD4_8, PD9_13, PD10_14, PD11_15, PD12_16, ground pads PDG1, PDG2 and high resistance wirings LR1, LR2 arranged between the first cutting line CL1 and the second cutting line CL2 are all cut off from the display device DSP and do not remain in the final product. Accordingly, there is no need to set up space in the display device DSP for configuring the inspection pads PD, the ground pads PDG, and the high resistance wiring LR for dealing with static electricity, and the narrow frame of the display device DSP can be achieved.

[0081] However, in Figure 4 The structure shown has the following problems.

[0082] For example, in order to check the adjacent short circuit between touch electrodes TX1 and TX2 and the adjacent short circuit between touch electrodes TX5 and TX6, voltage V1 is applied to the inspection pad PD1_5, and voltage V2 (≠V1) is applied to the inspection pad PD2_6. As a result, when a specified resistance value is detected between the inspection pads PD1_5 and PD2_6, it is considered that a resistance value that should not be detected is detected, thereby detecting a short circuit between touch electrodes TX1 and TX2 or between touch electrodes TX5 and TX6. However, in Figure 4 In the configuration shown, since the inspection pads PD1_5 and PD2_6 are connected to each other through the high resistance wiring LR1 provided for dealing with static electricity, it is sometimes impossible to determine from the detected resistance value whether the resistance value is caused by the short circuit between the touch electrodes TX1 and TX2 or between the touch electrodes TX5 and TX6 or the resistance value of the high resistance wiring LR1. That is, there is a possibility that the adjacent short circuit in the touch panel TP cannot be accurately detected.

[0083] in addition, Figure 4 The configuration shown has the following problems in inspections other than the above-mentioned adjacent short circuit inspection.

[0084] For example, the continuity check of the ring-shaped ground wiring LG is performed by bringing the probe into contact with the ground pads PDG1 and PDG2. However, sometimes the position of the probe in contact with the ground pads PDG1 and PDG2 is shifted so that at least one of the probes does not contact the ground pads PDG1 and PDG2. In this case, since the ground pads PDG1 and PDG2 are not electrically connected, an infinitely large resistance value is detected as a result of the continuity check. On the other hand, when the ground wiring LG is broken, since the ground pads PDG1 and PDG2 are not electrically connected, an infinitely large resistance value is also detected as a result of the continuity check. That is, in Figure 4 In the illustrated configuration, when an infinite resistance value is detected during the continuity test of the loop-shaped ground wiring LG, it is impossible to determine whether the resistance value is caused by poor contact of the probe or by disconnection of the ground wiring LG.

[0085] Therefore, when an infinite resistance value is detected as a result of the continuity check of the loop-shaped ground wiring LG, the operation of bringing the probe into contact with the ground pads PDG1 and PDG2 is attempted multiple times, and when an infinite resistance value is detected in each case, the disconnection of the ground wiring LG is detected. However, in this method, multiple attempts are required to determine whether the infinite resistance value detected as a result of the continuity check is a resistance value caused by poor contact of the probe or a resistance value caused by the disconnection of the ground wiring LG, which is time-consuming and laborious.

[0086] Therefore, in this embodiment, a configuration that can solve the above-mentioned various problems will be described.

[0087] Figure 5 It is a plan view showing an example of a configuration for inspecting adjacent short circuits in the touch panel TP according to the present embodiment.

[0088] like Figure 5 As shown, the structure of this embodiment is Figure 4 The difference of the structure shown is that the high resistance wiring LR1 connecting the inspection pads PD1_5, PD2_6, PD3_7, PD4_8 and the ground pad PDG1 and the high resistance wiring LR2 connecting the inspection pads PD9_13, PD10_14, PD11_15, PD12_16 and the ground pad PDG2 are arranged in a manner that crosses the first cutting line CL1. In other words, the first cutting line CL1 is set in a manner that crosses the high resistance wirings LR1 and LR2. Figure 4 The composition shown is different.

[0089] In addition, if Figure 5 As shown, the structure of this embodiment is Figure 4The difference of the structure shown is that a high resistance wiring LR3 (second high resistance wiring) is provided between the first cutting line CL1 and the second cutting line CL2, which connects the wirings L17 and L18 electrically connected to the ground wiring LG and the ground pads PDG1 and PDG2. It should be noted that the resistance value of the high resistance wiring LR3 is expected to be greater than the resistance value of the ground wiring LG, preferably with a difference of more than two orders of magnitude. For example, when the resistance value of the ground wiring LG is 3kΩ, the resistance value of the high resistance wiring LR3 is expected to be 300kΩ, etc.

[0090] As described above, the adjacent short circuit inspection is performed after the display device mother substrate is cut along the first cutting line CL1 and a plurality of display devices DSP are cut out from the display device mother substrate. Figure 5 In the structure shown, the high resistance wiring LR1 is cut along the first cutting line CL1 before the adjacent short circuit inspection, and the inspection pads PD1_5, PD2_6, PD3_7, PD4_8 and the ground pad PDG1 are not connected to each other through the high resistance wiring LR1 during the adjacent short circuit inspection. Similarly, the high resistance wiring LR2 is also cut along the first cutting line CL1 before the adjacent short circuit inspection, and the inspection pads PD9_13, PD10_14, PD11_15, PD12_16 and the ground pad PDG2 are not connected to each other through the high resistance wiring LR2 during the adjacent short circuit inspection. Accordingly, the high resistance wiring LR1 and LR2 can be used to prevent the display panel PNL from being damaged due to static electricity generated in the process of manufacturing the display panel PNL, and at the same time, the resistance values ​​of the high resistance wirings LR1 and LR2 can be prevented from being detected in the adjacent short circuit inspection. That is, the adjacent short circuit in the touch panel TP can be accurately detected.

[0091] In addition, Figure 5 In the composition shown, Figure 4 Similarly to the configuration shown, in the continuity test of the ring-shaped ground wiring LG, if the probes contacting the ground pads PDG1 and PDG2 are displaced so that at least one of the probes does not contact the ground pads PDG1 and PDG2, an infinite resistance value is detected as a result of the continuity test. Figure 5In the structure shown, when the ground wiring LG is broken, the resistance value of the high resistance wiring LR3 is detected as a result of the above-mentioned continuity check. It should be noted that when there is no poor contact between the ground pads PDG1 and PDG2 and the probe and the ground wiring LG is not broken, the combined resistance value of the resistance value of the ground wiring LG and the resistance value of the high resistance wiring LR3 is detected as a result of the above-mentioned continuity check. Based on this, it is possible to determine whether the ground wiring LG is broken or whether there is poor contact between the ground pads PDG1 and PDG2 and the probe (and thus it can also be determined that the ground wiring LG is not broken) through a single continuity check. Figure 4 Compared with the structure shown in the figure, the time and effort required for the continuity inspection can be reduced.

[0092] Figure 6 FIG. 1 is a schematic top view of the mother substrate MB for the display device according to the present embodiment. Figure 6 As shown, a plurality of display devices DSP with touch panels TP arranged in a matrix are formed on the display device mother substrate MB.

[0093] The mother substrate MB for the display device includes: Figure 5 More specifically, the display device mother substrate MB includes a test pad PD and a ground pad PDG for each display device DSP, high resistance wirings LR1 and LR2 that interconnect the test pad PD and the ground pad PDG, a first cutting line CL1 set to cut out a plurality of display devices DSP from the display device mother substrate MB, and a second cutting line CL2 set along the outer shape of a single display device DSP. It should be noted that Figure 6 Although the detailed illustration is omitted, the inspection pad PD includes inspection pads corresponding to the plurality of touch electrodes included in the touch panel TP. In addition, the ground pad PDG includes two ground pads corresponding to the ring-shaped ground wiring included in the touch panel TP, and the two ground pads are connected by a high resistance wiring LR3 that is separately provided from the high resistance wirings LR1 and LR2.

[0094] It should be noted that at least no organic insulating layer is disposed on the first cutting line CL1 and the second cutting line CL2. Figure 6 Although not shown, verniers or marks for determining the positions of the first cutting line CL1 and the second cutting line CL2 are provided near the first cutting line CL1 and the second cutting line CL2.

[0095] In the above-described embodiment, the display panel PNL is described as having a common electrode CE (upper electrode) throughout a plurality of pixels PX (sub-pixels SP), but the present invention is not limited thereto. The display panel PNL may also be configured as follows: Figure 7 The structure shown in FIG. 1 is that each sub-pixel SP is provided with an upper electrode.

[0096] In this case, if Figure 7 As shown, on the organic insulating layer 12, replace Figure 3 The bank BNK shown in the figure is provided with a rib 5 having pixel openings AP1, AP2, AP3 and formed of an inorganic material, and a partition wall 6 including a conductive lower portion 61 arranged on the rib 5 and an upper portion 62 arranged on the lower portion 61. It should be noted that the upper portion 62 has a greater width than the lower portion 61, and the two ends of the upper portion 62 are protruded from the side surfaces of the lower portion 61. Such a shape of the partition wall 6 can also be called a cantilever shape.

[0097] In the pixel openings AP1, AP2, AP3, the lower electrodes LE1, LE2, LE3 are covered by the organic layers OR1, OR2, OR3, and the organic layers OR1, OR2, OR3 are covered by the upper electrodes UE1, UE2, UE3. The upper electrodes UE1, UE2, UE3 are in contact with the side surfaces of the lower portion 61 of the partition 6, respectively.

[0098] It should be noted that a portion of the organic layers OR1, OR2, and OR3 and a portion of the upper electrodes UE1, UE2, and UE3 are located above the upper portion 62 of the partition wall 6. For example, a portion of the organic layer OR3 and the upper electrode UE3 are located above the upper portion 62 of the partition wall 6 on the left side of the figure, and are separated from the organic layer OR3 and the upper electrode UE3 located below the partition wall 6. Similarly, a portion of the organic layer OR2 and the upper electrode UE2 are located above the upper portion 62 of the partition wall 6 on the right side of the figure, and are separated from the organic layer OR2 and the upper electrode UE2 located below the partition wall 6. Furthermore, a portion of the organic layer OR1 and the upper electrode UE1 are located above the upper portion 62 of the partition wall 6 on both sides of the figure, and are separated from the organic layer OR1 and the upper electrode UE1 located below the partition wall 6.

[0099] like Figure 7 As shown, a touch panel TP can also be provided in the display panel PNL of such a configuration. In this case, by using Figure 5 By performing the adjacent short circuit inspection and the continuity inspection in the touch panel TP with the configuration shown, it is possible to accurately detect the adjacent short circuit in the touch panel TP and reduce the time and effort required for the continuity inspection.

[0100] According to one embodiment described above, it is possible to provide a mother substrate for a display device and a method for manufacturing a display device that can improve the accuracy of adjacent short circuit inspection.

[0101] It should be noted that several embodiments of the present invention are described, but these embodiments are presented as examples and are not intended to limit the scope of the invention. These new embodiments can be implemented in various other forms, and various omissions, substitutions, and changes can be made without departing from the scope of the subject matter of the invention. These embodiments and their variations are included in the scope and subject matter of the invention, and are included in the invention described in the claims and the scope of their equivalents.

Claims

1. A mother substrate for a display device, wherein a plurality of display devices are formed thereon, wherein the plurality of display devices respectively include: a display panel having a display area for displaying an image; and a touch panel having a plurality of touch electrodes overlapping the display area, wherein: The mother substrate for a display device comprises: A plurality of inspection pads provided for each of the display devices in order to inspect whether two touch electrodes adjacent to each other among the plurality of touch electrodes are not short-circuited; a first high resistance wiring connecting the plurality of inspection pads to each other; a first cutting line set for cutting out a plurality of display devices from the display device mother substrate; and A second cutting line set along the outer shape of a single display device, The plurality of inspection pads are respectively arranged between the first cutting line and the second cutting line, and are electrically connected to the corresponding touch electrodes for the inspection. The first high-resistance wiring is arranged so as to straddle the first cutting line and is cut along the first cutting line before the inspection using the plurality of inspection pads. The plurality of inspection pads are not connected to each other through the first high-resistance wiring at the time of the inspection.

2. The mother substrate for a display device according to claim 1, wherein: The touch panel has a ring-shaped ground wiring. The display device mother substrate further includes two ground pads electrically connected to the annular ground wiring. The two ground pads are connected via a second high-resistance wiring arranged between the first cutting line and the second cutting line.

3. The mother substrate for a display device according to claim 2, wherein: The second high-resistance wiring has a resistance value greater than a resistance value of the loop-shaped ground wiring.

4. The mother substrate for a display device according to claim 3, wherein: In the continuity test of the loop-shaped ground wiring, when the two ground pads are not in contact with the probe used for the continuity test, an infinite resistance value is detected as a result of the continuity test, When the loop-shaped ground wiring is disconnected, the resistance value of the second high-resistance wiring is detected as a result of the continuity check. When the loop-shaped ground wiring is not broken, a combined resistance value of a resistance value of the loop-shaped ground wiring and a resistance value of the second high-resistance wiring is detected as a result of the continuity test.

5. The mother substrate for a display device according to claim 1, wherein: At least no organic insulating layer is disposed on the first cutting line and the second cutting line.

6. The mother substrate for a display device according to claim 5, wherein: The display panel comprises: Lower electrode; a bank portion formed of an organic material, having a pixel opening overlapping the lower electrode and covering a periphery of the lower electrode; an upper electrode, which is opposite to the lower electrode and is arranged over a plurality of pixels arranged in a matrix in the display area; and The organic layer is disposed between the lower electrode and the upper electrode, and emits light according to a potential difference between the lower electrode and the upper electrode.

7. The mother substrate for a display device according to claim 5, wherein: The display panel comprises: Lower electrode; a rib portion, formed of an inorganic material, having a pixel opening overlapping the lower electrode and covering a periphery of the lower electrode; a bulkhead disposed above the rib; an upper electrode, which is opposite to the lower electrode; and The organic layer is disposed between the lower electrode and the upper electrode, and emits light according to a potential difference between the lower electrode and the upper electrode.

8. A method for manufacturing a display device, which is a method for manufacturing a single display device from a mother substrate for a display device, wherein: The display device mother substrate is formed with a plurality of display devices, each of which includes a display panel having a display area for displaying an image, and a touch panel having a plurality of touch electrodes overlapping the display area, the display device mother substrate having a first cutting line and a second cutting line, a plurality of inspection pads arranged between the first cutting line and the second cutting line and provided for each of the display devices, and a first high resistance wiring connecting the plurality of inspection pads to each other. In the method for manufacturing the display device, cutting the display device mother substrate along the first cutting line set so as to cross the first high-resistance wiring, thereby cutting out a plurality of display devices from the display device mother substrate, using the plurality of inspection pads to inspect whether two touch electrodes adjacent to each other among the plurality of touch electrodes are not short-circuited, After the inspection, the plurality of display devices are cut along the second cutting line to form an outer shape of a single display device.

9. The method for manufacturing a display device according to claim 8, wherein: The touch panel has a ring-shaped ground wiring. The display device mother substrate further includes two ground pads electrically connected to the annular ground wiring. The two ground pads are connected via a second high-resistance wiring arranged between the first cutting line and the second cutting line.

10. The method for manufacturing a display device according to claim 9, further comprising: Before the plurality of display devices are cut along the second cutting line, a probe is brought into contact with the two ground pads to perform a continuity test of the loop-shaped ground wiring.

Citation Information

Patent Citations

  • Game machine

    JP2023117480A