A method, device and storage medium for detecting defects in a circuit area of a micro-display device
By performing grayscale expansion and corrosion treatment on the image of the display circuit area, and dividing pixel by pixel with the sample limit diagram to identify the dark and bright defect areas of the circuit, the error detection and miss detection problem in the detection of the internal circuit structure of the display screen is solved and the detection accuracy is improved.
Patent Information
- Application Number
- CN202411920737.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-25
- Publication Date
- 2025-08-22
- Estimated Expiration
- 2044-12-25
AI Technical Summary
In the prior art, the screen defect detection of the circuit structure of the display screen internally has problems of false detection and missed detection, resulting in a decrease in detection accuracy.
The image of the display circuit area is collected by the flying camera, grayscale expansion and grayscale corrosion are processed, templates are generated, defect area detection is carried out in combination with the circuit area sample limit diagram, and pixel-by-pixel segmentation is used using the grayscale mean and compensation value to identify the circuit dark defect and bright defect areas.
The screen defect detection accuracy in the circuit area in the display screen image is improved, the error detection and miss detection rates are reduced, and the detection accuracy is improved.
Smart Images

Figure CN119359721B_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of display screen detection, and in particular to a method, device, and storage medium for detecting defects in a circuit area of a micro-display device. Background Art
[0002] With the rapid development of industrial and internet technologies, industry requirements for industrial product quality are becoming increasingly refined and standardized. In the display panel industry, product quality directly impacts competitiveness, and the accuracy of product dimensions and specifications is the most fundamental process indicator of product quality. Display screens, as one of the display components of devices, are used in a variety of high-end devices such as mobile phones, televisions, and tablets. As people's demands for visual displays continue to rise, display screens have gradually become technologically sophisticated products.
[0003] Display defect detection is a necessary step for adjustments. Display defects can be categorized as display defects and body defects. Display defects refer to areas of discordance that occur when a display displays an image. Existing technology typically requires inputting a specific image onto the display under test, capturing the image with a camera, and then performing image detection to analyze the display. Body defects, on the other hand, refer to areas of damage on or within the display itself (such as chipped corners or foreign matter). These defects can be identified without inputting an image; they can be captured with a camera and analyzed through image detection.
[0004] However, as the application areas of display screens become increasingly broad and more functions are added, sophisticated circuit structures are being added inside or on the surface of the display screens. This type of structure does not significantly affect the detection of display defects because the display screen layer is usually located on the circuit structure. However, since screen defects do not require image display, and the circuit structure is usually a very thin circuit board, due to the complex internal structure of the circuit structure, it mainly appears as blocks with different layers, and the overall area is large, concentrated, and set inside the display screen. This makes it easy for these displays containing circuit structures to misdetect or miss detection of screen defects in the corresponding circuit structure area, reducing the accuracy of screen defect detection in the circuit area. Summary of the Invention
[0005] The present application discloses a method, device and storage medium for detecting defects in a circuit area of a micro display device, which are used to improve the accuracy of detecting defects in a display screen image containing a circuit area.
[0006] The first aspect of the present application discloses a method for detecting defects in a circuit area of a micro display device, comprising:
[0007] Use a flying camera to shoot the display screen to be tested and collect images of the circuit area of the display screen to be tested;
[0008] copying the circuit area image to generate a first circuit area image and a second circuit area image;
[0009] Performing grayscale expansion processing on the first circuit area image to generate a first template;
[0010] Performing grayscale corrosion processing on the second circuit area image to generate a second template;
[0011] Detect circuit defect areas on the first template and the second template respectively according to a preset circuit area limit sample diagram to generate circuit dark defect areas and circuit bright defect areas;
[0012] Defect identification and detection are performed on the dark defect area and the bright defect area of the circuit to generate circuit area defect data.
[0013] Optionally, detecting circuit defect areas on the first template and the second template respectively according to a preset circuit area limit sample diagram to generate circuit dark defect areas and circuit bright defect areas includes:
[0014] Obtaining dark defect compensation values and bright defect compensation values;
[0015] Perform pixel-by-pixel segmentation based on a preset dark defect threshold lower limit, dark defect threshold upper limit, circuit area limit sample map, first template, and dark defect compensation value to generate a circuit dark defect area;
[0016] According to the preset lower limit of the bright defect threshold, the upper limit of the bright defect threshold, the circuit area limit sample map, the second template and the bright defect compensation value, pixel-by-pixel segmentation is performed to generate a circuit bright defect area.
[0017] Optionally, obtain dark defect compensation values and bright defect compensation values, including:
[0018] The preset circuit area limit sample is copied, and grayscale expansion processing and grayscale corrosion processing are performed respectively to generate a third template and a fourth template;
[0019] Obtaining grayscale means of the first template, the second template, the third template, and the fourth template to generate a first grayscale mean, a second grayscale mean, a third grayscale mean, and a fourth grayscale mean;
[0020] Obtaining dark defect grayscale parameters and bright defect grayscale parameters. The dark defect grayscale parameters refer to the pixel grayscale data of each dark defect after grayscale expansion processing, and the bright defect grayscale parameters refer to the pixel grayscale data of each bright defect after grayscale erosion processing;
[0021] generating a dark defect compensation value by using the first grayscale mean, the third grayscale mean, and the dark defect grayscale parameter;
[0022] A bright defect compensation value is generated by using the second grayscale mean, the fourth grayscale mean, and the bright defect grayscale parameter.
[0023] Optionally, after photographing the display screen to be tested by using a flying camera to capture the circuit area image of the display screen to be tested, and before copying the circuit area image to generate the first circuit area image and the second circuit area image, the method further includes:
[0024] Perform mean filter noise reduction or Gaussian filter noise reduction on the circuit area image.
[0025] Optionally, before photographing the display screen to be tested by using a flying camera to acquire an image of the circuit area of the display screen to be tested, the method further includes:
[0026] Capture images of the standard sample limit screen to generate standard images of the product;
[0027] Generate the initial position of the circuit area and the buffer area on the standard image;
[0028] The edges of the initial position of the circuit area are detected from the outside to the inside, and all candidate edge points are screened according to the preset edge point parameter threshold;
[0029] Fit all edge candidate points and determine the coordinates of the angle points;
[0030] Generate a circuit area frame according to the coordinates of the angle point;
[0031] Crop the standard image according to the circuit area frame to generate a circuit area limited sample image.
[0032] Optionally, defect identification and detection are performed on the dark defect area and the bright defect area of the circuit to generate circuit area defect data, including:
[0033] Cutting the dark defect area of the circuit of the first template and the bright defect area of the circuit of the second template to generate dark defect sub-areas and bright defect sub-areas;
[0034] The cropped dark defect sub-region and bright defect sub-region are sent to the classification network for classification to generate the classification results;
[0035] The classification results are used to generate a data list based on the image ID of the display screen image.
[0036] The second aspect of the present application discloses a device for detecting defects in a circuit area of a micro display device, comprising:
[0037] An acquisition unit is used to photograph the display screen to be tested by using a flying camera to acquire an image of the circuit area of the display screen to be tested;
[0038] A first generating unit is configured to copy the circuit area image to generate a first circuit area image and a second circuit area image;
[0039] A second generating unit is configured to perform grayscale expansion processing on the first circuit area image to generate a first template;
[0040] A third generating unit is used to perform grayscale corrosion processing on the second circuit area image to generate a second template;
[0041] a fourth generating unit, configured to detect circuit defect areas on the first template and the second template respectively according to a preset circuit area limit sample diagram, and generate circuit dark defect areas and circuit bright defect areas;
[0042] The fifth generating unit is used to perform defect recognition and detection on the dark defect area and the bright defect area of the circuit to generate circuit area defect data.
[0043] Optionally, the fourth generating unit includes:
[0044] An acquisition module, used for acquiring a dark defect compensation value and a bright defect compensation value;
[0045] A first generating module is configured to perform pixel-by-pixel segmentation based on a preset dark defect threshold lower limit, a dark defect threshold upper limit, a circuit area limit sample image, a first template, and a dark defect compensation value to generate a circuit dark defect area;
[0046] The second generation module is used to perform pixel-by-pixel segmentation according to the preset bright defect threshold lower limit, bright defect threshold upper limit, circuit area limit sample map, second template and bright defect compensation value to generate a circuit bright defect area.
[0047] Optionally, obtain modules, including:
[0048] The preset circuit area limit sample is copied, and grayscale expansion processing and grayscale corrosion processing are performed respectively to generate a third template and a fourth template;
[0049] Obtaining grayscale means of the first template, the second template, the third template, and the fourth template to generate a first grayscale mean, a second grayscale mean, a third grayscale mean, and a fourth grayscale mean;
[0050] Obtaining dark defect grayscale parameters and bright defect grayscale parameters. The dark defect grayscale parameters refer to the pixel grayscale data of each dark defect after grayscale expansion processing, and the bright defect grayscale parameters refer to the pixel grayscale data of each bright defect after grayscale erosion processing;
[0051] generating a dark defect compensation value by using the first grayscale mean, the third grayscale mean, and the dark defect grayscale parameter;
[0052] A bright defect compensation value is generated by using the second grayscale mean, the fourth grayscale mean, and the bright defect grayscale parameter.
[0053] Optionally, after the collection unit and before the first generation unit, the device further includes:
[0054] The filtering unit is used to perform mean filtering or Gaussian filtering noise reduction processing on the circuit area image.
[0055] Optionally, before the collection unit, the device further includes:
[0056] The sixth generating unit is used to collect images of the standard sample limit screen to generate a standard image of the product;
[0057] a seventh generating unit, configured to generate an initial position of a circuit area and a buffer area on the standard image;
[0058] A screening unit is used to perform edge detection on the edges of the initial position of the circuit area from the outside to the inside, and screen out all candidate edge points according to a preset edge point parameter threshold;
[0059] Determination unit, used to fit all edge candidate points and determine the coordinates of the angle points;
[0060] an eighth generating unit, configured to generate a circuit area frame according to the coordinates of the angle point;
[0061] The ninth generating unit is used to crop the standard image according to the circuit area frame to generate a circuit area limit sample image.
[0062] Optionally, the fifth generation unit includes:
[0063] Cutting the dark defect area of the circuit of the first template and the bright defect area of the circuit of the second template to generate dark defect sub-areas and bright defect sub-areas;
[0064] The cropped dark defect sub-region and bright defect sub-region are sent to the classification network for classification to generate the classification results;
[0065] The classification results are used to generate a data list based on the image ID of the display screen image.
[0066] A third aspect of the present application provides a device for detecting defects in a circuit area of a micro-display device, comprising:
[0067] processor, memory, input and output units, and buses;
[0068] The processor is connected to the memory, input and output units, and the bus;
[0069] The memory stores a program, and the processor calls the program to execute the first aspect and any optional method of the first aspect.
[0070] In a fourth aspect, the present application provides a computer-readable storage medium on which a program is stored. When the program is executed on a computer, the program executes the first aspect and any optional method of the first aspect.
[0071] It can be seen from the above technical solutions that the embodiments of the present application have the following advantages:
[0072] In this application, the display screen to be tested is first photographed using a flying camera to capture an image of the circuit area of the display screen to be tested. The circuit area image is copied to generate a first circuit area image and a second circuit area image. The first circuit area image is subjected to grayscale expansion processing to generate a first template. The second circuit area image is subjected to grayscale corrosion processing to generate a second template. The first template and the second template are respectively inspected for circuit defect areas based on a preset circuit area limit sample diagram to generate circuit dark defect areas and circuit bright defect areas. Defect recognition detection is performed on the circuit dark defect area and the circuit bright defect area to generate circuit area defect data.
[0073] Circuit area defects are classified into bright and dark defects, and then hierarchical detection is performed. Specifically, grayscale expansion and grayscale erosion are performed on the circuit area image to generate a first template for dark defects and a second template for bright defects. The pixels of the first template are analyzed individually using the circuit area limit sample to determine the dark defect area. The pixels of the first template are then analyzed individually using the circuit area limit sample to generate the bright defect area. Finally, defect identification and detection are performed on the dark and bright defect areas of the circuit to generate circuit area defect data. This method uses grayscale erosion and grayscale expansion processing, followed by regional analysis of the defect-free circuit area limit sample image to determine the corresponding bright and dark defect areas. This method improves the screen defect detection accuracy of display screen images containing circuit areas. BRIEF DESCRIPTION OF THE DRAWINGS
[0074] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments or descriptions of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.
[0075] Figure 1 A schematic diagram of an embodiment of a method for detecting defects in a circuit area of a micro-display device according to the present application;
[0076] Figure 2 A schematic diagram of an embodiment of a method for generating a bright defect area of a circuit according to the present application;
[0077] Figure 3A schematic diagram of an embodiment of a method for obtaining dark defect compensation values and bright defect compensation values according to the present application;
[0078] Figure 4 A schematic diagram of an embodiment of the pre-processing method of the present application;
[0079] Figure 5 A schematic diagram of an embodiment of a method for generating a circuit area limit sample diagram according to the present application;
[0080] Figure 6 A schematic diagram of an embodiment of a method for generating a circuit area limit sample diagram according to the present application;
[0081] Figure 7 A schematic diagram of an embodiment of a device for detecting defects in a circuit area of a micro display device according to the present application;
[0082] Figure 8 A schematic diagram of another embodiment of the device for detecting defects in the circuit area of a micro display device according to the present application;
[0083] Figure 9 A schematic diagram of the display screen image of this application;
[0084] Figure 10 A schematic diagram of the circuit area image of this application. DETAILED DESCRIPTION
[0085] In the following description, specific details such as specific system structures and techniques are provided for purposes of illustration rather than limitation to facilitate a thorough understanding of the embodiments of the present application. However, it will be apparent to those skilled in the art that the present application may be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to avoid obscuring the description of the present application with unnecessary detail.
[0086] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, integers, steps, operations, elements and / or components, but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or collections thereof.
[0087] It will also be understood that the term "and / or" used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
[0088] As used in this specification and the appended claims, the term "if" can be interpreted as "when" or "upon" or "in response to determining" or "in response to detecting," depending on the context. Similarly, the phrase "if it is determined" or "if [described condition or event] is detected" can be interpreted as meaning "upon determination" or "in response to determining" or "upon detection of [described condition or event]" or "in response to detecting [described condition or event]," depending on the context.
[0089] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.
[0090] References to "one embodiment" or "some embodiments" in this specification mean that a particular feature, structure, or characteristic described in conjunction with that embodiment is included in one or more embodiments of the present application. Thus, phrases such as "in one embodiment," "in some embodiments," "in other embodiments," and "in other embodiments" appearing in various places in this specification do not necessarily refer to the same embodiment, but rather mean "one or more but not all embodiments," unless otherwise specifically emphasized. The terms "including," "comprising," "having," and variations thereof all mean "including but not limited to," unless otherwise specifically emphasized.
[0091] In the prior art, as the application fields of display screens become increasingly extensive and more and more functions are added, sophisticated circuit structures are added inside or on the surface of the display screen. This type of structure does not have much impact on the detection of display defects because the display screen layer is usually located on the circuit structure. However, since screen defects do not require image display, and the circuit structure is usually a very thin circuit board, due to the complex internal structure of the circuit structure, it mainly appears as blocks with different layers, and the overall area is large, concentrated, and arranged inside the display screen. This makes it easy for display screens containing circuit structures to have false detections and missed detections of screen defects in the corresponding circuit structure area, which reduces the accuracy of screen defect detection in the circuit area.
[0092] Based on this, the present application discloses a method, device and storage medium for detecting defects in the circuit area of a micro display device, which are used to improve the screen defect detection accuracy of a display screen image containing a circuit area.
[0093] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.
[0094] The method of the present application can be applied to a server, device, terminal or other device with logic processing capability, and the present application does not limit this. For the convenience of description, the following description is based on the example of the execution subject being a terminal.
[0095] See also Figure 1 The present application provides an embodiment of a method for detecting defects in a circuit area of a micro display device, comprising:
[0096] 101. Use a flying camera to shoot the display screen to be tested, and collect an image of the circuit area of the display screen to be tested;
[0097] In this embodiment, the display screen to be tested is first fixed, the light source is turned on, and the display screen to be tested is photographed by an industrial line scan camera to generate a display screen image. The display screen to be tested contains a circuit structure. In this embodiment, the circuit structure is block-shaped and contains irregular circuit modules.
[0098] The terminal first divides the display screen image into regional texture structures to generate a circuit area image, the purpose of which is to detect the circuit area image separately. In this embodiment, it can be determined by manual demarcation or computer detection.
[0099] The textures of the image display area (corresponding to the display area appearance image), the circuit area (corresponding to the circuit area appearance image), and the boundary area (corresponding to the boundary area appearance image) are very different. Figure 9 , Figure 9 is a display screen image. Please refer to Figure 10 , Figure 10 This is an image of the circuit area.
[0100] The circuit structure is located in the trapezoidal area at the bottom of the figure. It can be seen that this part has many shapes, including sawtooth circuit structure, strip circuit structure and other shapes. The area formed by these structures is the appearance image of the circuit area.
[0101] 102. Copy the circuit area image to generate a first circuit area image and a second circuit area image;
[0102] The terminal copies the circuit area image to generate two circuit area images, which are defined as a first circuit area image and a second circuit area image.
[0103] 103. Perform grayscale expansion processing on the first circuit area image to generate a first template;
[0104] 104. Perform grayscale corrosion processing on the second circuit area image to generate a second template;
[0105] In this embodiment, the terminal generates a structural element according to the screen detection defect corresponding to the circuit area, and is specifically designed according to the size of the defect area and the defect type of the screen detection defect.
[0106] Traditional defect convolution kernels are designed mainly based on the size of the defect area. This approach is suitable for defects in the display area of the display, but the effect is much worse for defects in the circuit area.
[0107] In this embodiment, circuit area defects are categorized into bright defects and dark defects. During the design process, the grayscale ranges of each defect must be determined based on the bright and dark defects. For example, images of different circuit area defects are captured and strictly segmented, leaving only the corresponding circuit defect areas. Grayscale mean detection is then performed on each defect. Based on the grayscale mean of a particular circuit area defect, the defects are classified into bright and dark defects. The grayscale range of the bright defect is determined based on the grayscale mean of the bright defect, and the grayscale range of the dark defect is determined similarly. The size range of each circuit defect within the bright defect is then determined. Within these specific size and grayscale ranges, structural elements specific to the bright and dark defects are generated.
[0108] Next, in this embodiment, the terminal performs grayscale expansion processing on the first circuit area image using the structural elements of the dark defects in the circuit area to generate a first template.
[0109] In this embodiment, the terminal performs grayscale corrosion processing on the second circuit area image using structural elements of bright defects in the circuit area to generate a second template.
[0110] For the first template (grayscale image) I and the structural element B, the grayscale morphological dilation can be expressed as:
[0111]
[0112] Where (x, y) represents the pixel position in the first template I, and (s, t) represents a position in the structuring element B (here, structuring element B is the convolution kernel corresponding to the dark defect). This formula indicates that for each pixel position, the maximum value of the sum of the pixel value within the structuring element coverage and the structuring element value is calculated, and this maximum value is used as the pixel value after the dilation operation.
[0113] Similarly, for the second template I and the structural element B, the grayscale morphological corrosion can be expressed as:
[0114]
[0115] Where (x, y) represents a pixel position in the second template I, and (s, t) represents a position in the structuring element B (here, structuring element B is the convolution kernel corresponding to the bright defect). This formula indicates that for each pixel position, the minimum difference between the pixel value within the structuring element coverage and the structuring element value is calculated, and this minimum value is used as the pixel value after the erosion operation.
[0116] 105. Detect circuit defect areas on the first template and the second template respectively according to a preset circuit area limit sample diagram to generate circuit dark defect areas and circuit bright defect areas;
[0117] In this embodiment, the terminal obtains a standard sample screen (a defect-free display screen) and photographs it under appropriate lighting conditions to generate a sample screen image. This image is then processed using the same partitioning method (the method used to determine the circuit area using the display screen image) to generate a corresponding circuit area sample image. Specifically, before performing circuit area appearance inspection, the terminal selects a standard sample screen of the same type as the display screen to be tested. This standard sample screen can be selected from all products or prepared in advance. The standard sample screen can be defined as a high-quality product, requiring it to be free of defects such as chipped edges and corners. The standard sample screen is photographed and imaged, and the circuit area is then observed.
[0118] Next, the terminal uses the circuit area limit sample image and the pixel points on the first template for comparative analysis to detect areas that meet the circuit dark defects. At the same time, the terminal uses the circuit area limit sample image and the pixel points on the second template for comparative analysis to detect areas that meet the circuit bright defects.
[0119] 106. Perform defect identification and detection on the dark defect area and the bright defect area of the circuit to generate circuit area defect data.
[0120] The terminal performs defect recognition and detection on the dark defect area and the bright defect area of the circuit to generate circuit area defect data. In this embodiment, after the terminal compares the circuit defect areas of the first template and the second template, it can perform defect recognition and detection on the dark defect area and the bright defect area of the circuit. Specifically, artificial intelligence recognition can be used. Traditional artificial intelligence recognition of an entire display screen image will have a poorer detection effect because there are fewer training samples for existing circuit area defects, which makes the simple artificial intelligence model less effective in detecting display screen images of larger areas. However, in this embodiment, by performing grayscale expansion and grayscale corrosion on the circuit area image respectively, and then screening out the defective area through the circuit area limit sample image, the detection amount of the artificial intelligence model is reduced. At the same time, this method can provide a large number of training samples because different defect areas can be determined and identified, and finally the circuit area defect data is generated through the artificial intelligence model.
[0121] In this embodiment, a flying camera is first used to capture an image of the circuit area of the display screen to be tested. This circuit area image is then copied to generate a first circuit area image and a second circuit area image. The first circuit area image is then subjected to grayscale expansion processing to generate a first template. The second circuit area image is then subjected to grayscale erosion processing to generate a second template. Circuit defect areas are then detected for the first and second templates based on a preset circuit area limit pattern, generating dark circuit defect areas and bright circuit defect areas. Defect recognition testing is then performed on the dark circuit defect area and bright circuit defect area to generate circuit area defect data.
[0122] Circuit area defects are classified into bright and dark defects, and then hierarchical detection is performed. Specifically, grayscale expansion and grayscale erosion are performed on the circuit area image to generate a first template for dark defects and a second template for bright defects. The pixels of the first template are analyzed individually using the circuit area limit sample to determine the dark defect area. The pixels of the first template are then analyzed individually using the circuit area limit sample to generate the bright defect area. Finally, defect identification and detection are performed on the dark and bright defect areas of the circuit to generate circuit area defect data. This method uses grayscale erosion and grayscale expansion processing, followed by regional analysis of the defect-free circuit area limit sample image to determine the corresponding bright and dark defect areas. This method improves the screen defect detection accuracy of display screen images containing circuit areas.
[0123] See also Figure 2 The present application provides an embodiment of a method for generating a bright defect area of a circuit, comprising:
[0124] 201. Obtaining a dark defect compensation value and a bright defect compensation value;
[0125] In this embodiment, the terminal first obtains the dark defect compensation value Diff-offset-1 and the light defect compensation value Diff-offset-2. The dark defect compensation value is calculated based on the circuit limit pattern and the grayscale of the first template, and the light defect compensation value is calculated based on the circuit limit pattern and the grayscale of the second template.
[0126] Because the circuit limit sample is actually collected in a standard environment scene, and the real-time display screen image may not reach the standard environment scene, there may be certain differences in the lighting environment at this time, especially in the flying shooting system. The corresponding specific light source is turned on, but the actual light source may be different from the standard environment scene. At this time, it is necessary to calculate the compensation value of the first template and the second template based on the lighting difference.
[0127] 202. Perform pixel-by-pixel segmentation according to a preset dark defect threshold lower limit, a preset dark defect threshold upper limit, a circuit area limit sample image, a first template, and a dark defect compensation value to generate a circuit dark defect area;
[0128] Next, the terminal obtains the dark defect threshold lower limit Diff-dark-lower and the dark defect threshold upper limit Diff-dark-upper. The terminal calculates the dark defect parameter of each pixel based on the pixel Mn of the circuit area limit sample image, the pixel CBn on the first template, and the dark defect compensation value Diff-offset-1, and then compares it with the dark defect threshold lower limit Diff-dark-lower and the dark defect threshold upper limit Diff-dark-upper. The comparison mode of the dark defect parameter with the dark defect threshold lower limit Diff-dark-lower and the dark defect threshold upper limit Diff-dark-upper is as follows:
[0129] CBn-Mn+Diff-offset-1>Diff-dark-lower
[0130] CBn-Mn+Diff-offset-1<=Diff-dark-upper
[0131] When the dark defect parameter is greater than the dark defect threshold lower limit Diff-dark-lower and the dark defect parameter is less than Diff-dark-upper, it means that the current pixel is a dark defect pixel. The dark defect parameter of each pixel is calculated according to this method to determine the circuit dark defect area composed of dark defect pixels.
[0132] 203. Perform pixel-by-pixel segmentation according to a preset lower limit of the bright defect threshold, an upper limit of the bright defect threshold, a circuit area limit sample image, a second template, and a bright defect compensation value to generate a circuit bright defect area.
[0133] Next, the terminal obtains the bright defect threshold lower limit Diff-light-lower and the bright defect threshold upper limit Diff-light-upper. The terminal calculates the bright defect parameter of each pixel based on the pixel Mn of the circuit area limit sample image, the pixel CSn on the second template, and the bright defect compensation value Diff-offset-2, and then compares it with the bright defect threshold lower limit Diff-light-lower and the bright defect threshold upper limit Diff-light-upper. The comparison mode of the bright defect parameter with the bright defect threshold lower limit Diff-light-lower and the bright defect threshold upper limit Diff-light-upper is as follows:
[0134] CSn-Mn+Diff-offset-2>Diff-light-lower
[0135] CSn-Mn+Diff-offset-2<=Diff-light-upper
[0136] When the bright defect parameter is greater than the bright defect threshold lower limit Diff-light-lower, or the bright defect parameter is less than Diff-light-upper, it means that the current pixel is a bright defect pixel. According to this method, the bright defect parameter of each pixel is calculated to determine the circuit bright defect area composed of bright defect pixels.
[0137] This method can effectively distinguish between bright defect areas and dark defect areas on the display screen image. It not only subdivides the defects in the circuit area, but also uses a unique defect detection method to regionally identify the subdivided defects, thereby improving the accuracy of subsequent identification.
[0138] See also Figure 3 The present application provides an embodiment of a method for obtaining dark defect compensation values and bright defect compensation values, including:
[0139] 301. Copy the preset circuit area limit sample image, and perform grayscale expansion processing and grayscale corrosion processing respectively to generate a third template and a fourth template;
[0140] In this embodiment, the terminal first copies the circuit area sample image and performs grayscale expansion and grayscale erosion using the structural elements of bright defects and dark defects, respectively, to generate the third and fourth templates. This step is to ensure that the standard image undergoes the same preprocessing.
[0141] 302. Obtain grayscale means of the first template, the second template, the third template, and the fourth template to generate a first grayscale mean, a second grayscale mean, a third grayscale mean, and a fourth grayscale mean;
[0142] The terminal obtains the grayscale means of the first template, the second template, the third template, and the fourth template, which are respectively recorded as a first grayscale mean u1, a second grayscale mean u2, a third grayscale mean u3, and a fourth grayscale mean u4.
[0143] 303. Obtaining dark defect grayscale parameters and bright defect grayscale parameters. The dark defect grayscale parameters refer to the pixel grayscale data of each dark defect after grayscale expansion processing, and the bright defect grayscale parameters refer to the pixel grayscale data of each bright defect after grayscale erosion processing.
[0144] The terminal obtains the grayscale parameters of dark defects and the grayscale parameters of bright defects. The dark defect grayscale parameters refer to the pixel grayscale data of each dark defect after grayscale expansion processing. The bright defect grayscale parameters refer to the pixel grayscale data of each bright defect after grayscale corrosion processing. For example: the grayscale value range of the sample image of each dark defect after grayscale expansion processing.
[0145] 304. Generate a dark defect compensation value using the first grayscale average, the third grayscale average, and the dark defect grayscale parameter;
[0146] The terminal generates a dark defect compensation value using the first grayscale mean, the third grayscale mean, and the dark defect grayscale parameter. For example, the grayscale value range of each circuit area dark defect is first averaged to generate the grayscale median of each circuit area dark defect. The grayscale medians of all dark defects are then averaged to generate the dark defect coefficient T1. The dark defect compensation value Diff-offset-1 is calculated using the dark defect coefficient T1, the first grayscale mean u1, and the third grayscale mean u3:
[0147] Diff-offset-1=(u3-u1)[(T1+d) / (T1-d)]
[0148] Wherein, d is the supplementary coefficient, which is usually an integer less than 5 and greater than -5. d depends on the size of T1 and u1. When T1 is greater than u1, d is 1 to 5 to increase the compensation value. When T1 is less than u1, d is -1 to -5 to reduce the compensation value.
[0149] 305 . Generate a bright defect compensation value using the second grayscale mean, the fourth grayscale mean, and the bright defect grayscale parameter.
[0150] The terminal generates a bright defect compensation value by using the second grayscale mean, the fourth grayscale mean, and the bright defect grayscale parameter.
[0151] For example: First, the grayscale value range of each circuit area bright defect is averaged to generate the grayscale median of each circuit area bright defect, and then the grayscale medians of all bright defects are averaged to generate the bright defect coefficient T2. The bright defect compensation value Diff-offset-2 is calculated using the dark defect coefficient T2, the second grayscale mean u2, and the fourth grayscale mean u4:
[0152] Diff-offset-2=(u4-u2)[(T2+d) / (T2-d))]
[0153] Wherein, d is the supplementary coefficient, which is usually an integer less than 5 and greater than -5. d depends on the size of T2 and u2. When T2 is greater than u2, d is 1 to 5 to increase the compensation value. When T2 is less than u2, d is -1 to -5 to reduce the compensation value.
[0154] See also Figure 4 , the present application provides an embodiment of a preprocessing method, comprising:
[0155] 401. Perform mean filter noise reduction processing or Gaussian filter noise reduction processing on the circuit area image.
[0156] In this embodiment, because the flying camera system captures images, a significant amount of flying noise is present, requiring pre-processing and noise reduction of the captured images. First, the lens's aperture and focal length are fixed to meet the high-speed flying camera system's operating mode. The positional relationship between the platform and the flying camera is adjusted, a point light source is fixed to one side of the flying camera lens, and the camera parameters are saved. Furthermore, images captured by the flying camera will contain various types of noise. To ensure image quality, the following noise reduction processes must be performed:
[0157] 1. Mean filtering: The processing method is: use a 3×3 mean filter window to filter the image Iori to obtain the image Is.
[0158] 2. Gaussian filtering: The processing method is: use the Gaussian function as a filter to perform weighted averaging on the signal to smooth the signal and reduce noise, and then filter the image Iori to obtain the image Ig.
[0159] While pre-processing the image, template information is loaded. This template information is a standard image collected before inspection, and the wafer feature information is extracted from the image and passed to the subsequent inspection module.
[0160] See also Figure 5 The present application provides an embodiment of a method for generating a circuit area limit sample diagram, comprising:
[0161] 501. Capture images of the standard sample limit screen to generate a standard image of the product;
[0162] In this embodiment, when creating a circuit area limit sample diagram, first, a standard image of a standard limit sample screen is collected.
[0163] 502. Generate an initial position of a circuit area and a buffer area on the standard image;
[0164] The terminal generates an initial position of the circuit area and a buffer area on the standard image. The buffer area is the screening range of all edge candidate points.
[0165] 503. Perform edge detection on the edges of the initial position of the circuit area from the outside to the inside, and select all candidate edge points according to a preset edge point parameter threshold;
[0166] After the terminal presets the initial position and threshold of the possible circuit area, it can perform edge detection. Specifically, the edge of the initial position of the circuit area is detected from the outside to the inside, and all edge candidate points are screened out according to the preset edge point parameter threshold.
[0167] 504. Fit all candidate edge points and determine the coordinates of the angle points;
[0168] The terminal then fits all candidate edge points and determines the coordinates of the angle points. Specifically, the terminal fits each edge, and after fitting multiple straight lines, it can determine the coordinates of the intersection of two adjacent fitted straight lines.
[0169] 505. Generate a circuit area frame according to the coordinates of the angle point;
[0170] The terminals are connected according to the coordinates at the angle points, and a circuit area frame is generated according to the coordinates at the angle points.
[0171] 506. Crop the standard image according to the circuit area frame to generate a circuit area limited sample image.
[0172] The terminal crops the standard image according to the circuit area frame and finally generates a circuit area limited sample image. This method can also be used on the display screen image.
[0173] After extracting the complete circuit area image (circuit area limited sample), record the circuit area image information (width, height, etc.).
[0174] The above method can well divide the entire circuit area and reduce the amount of calculation.
[0175] See also Figure 6 The present application provides an embodiment of a method for generating a circuit area limit sample diagram, comprising:
[0176] 601. Crop the dark defect region of the circuit of the first template and the bright defect region of the circuit of the second template to generate dark defect sub-regions and bright defect sub-regions;
[0177] 602. Send the cropped dark defect sub-region and the bright defect sub-region to a classification network for classification to generate a classification result;
[0178] 603. Generate a data list based on the classification result according to the image ID of the display screen image.
[0179] In this embodiment, the terminal needs to integrate all bright and dark defects in the circuit area, crop the bright and dark defect areas, use the ResNet classification network to accurately classify, refine each defect type, and save the output for customer display. The specific operation steps are as follows:
[0180] 1. Obtain all bright and dark defect areas and cut them out;
[0181] 2. Send the cropped defective area to the classification network for classification;
[0182] 3. Get all classification results;
[0183] 4. Generate a data list (including all feature parameters) based on the image ID;
[0184] 5. Replace the classification results into the data list;
[0185] 6. Output data list data.
[0186] This method can accurately identify defective areas, reducing the amount of calculation. It can also generate a large number of training samples to improve the accuracy of the artificial intelligence model.
[0187] See also Figure 7 The present application provides an embodiment of a device for detecting defects in a circuit area of a micro display device, comprising:
[0188] The sixth generating unit 701 is configured to capture an image of the standard sample-limiting screen and generate a standard image of the product;
[0189] The seventh generating unit 702 is configured to generate an initial position of a circuit area and a buffer area on the standard image;
[0190] The screening unit 703 is used to perform edge detection on the edges of the initial position of the circuit area from the outside to the inside, and screen out all candidate edge points according to a preset edge point parameter threshold;
[0191] A determination unit 704 is used to fit all candidate edge points and determine the coordinates of the angle points;
[0192] An eighth generating unit 705 is configured to generate a circuit area frame according to the coordinates of the angle point;
[0193] A ninth generating unit 706 is configured to crop the standard image according to the circuit area frame to generate a circuit area limited sample image;
[0194] An acquisition unit 707 is configured to capture an image of the display screen to be tested by using a flying camera to capture an image of a circuit area of the display screen to be tested;
[0195] The filtering unit 708 is configured to perform mean filtering or Gaussian filtering noise reduction processing on the circuit area image.
[0196] A first generating unit 709 is configured to copy the circuit area image to generate a first circuit area image and a second circuit area image;
[0197] The second generating unit 710 is configured to perform grayscale expansion processing on the first circuit area image to generate a first template;
[0198] The third generating unit 711 is configured to perform grayscale corrosion processing on the second circuit area image to generate a second template;
[0199] A fourth generating unit 712 is configured to detect circuit defect areas on the first template and the second template respectively according to a preset circuit area limit sample diagram, and generate circuit dark defect areas and circuit bright defect areas;
[0200] Optionally, the fourth generating unit 712 includes:
[0201] An acquisition module 7121 is used to acquire a dark defect compensation value and a bright defect compensation value;
[0202] Optionally, the acquisition module 7121 includes:
[0203] The preset circuit area limit sample is copied, and grayscale expansion processing and grayscale corrosion processing are performed respectively to generate a third template and a fourth template;
[0204] Obtaining grayscale means of the first template, the second template, the third template, and the fourth template to generate a first grayscale mean, a second grayscale mean, a third grayscale mean, and a fourth grayscale mean;
[0205] Obtaining dark defect grayscale parameters and bright defect grayscale parameters. The dark defect grayscale parameters refer to the pixel grayscale data of each dark defect after grayscale expansion processing, and the bright defect grayscale parameters refer to the pixel grayscale data of each bright defect after grayscale erosion processing;
[0206] generating a dark defect compensation value by using the first grayscale mean, the third grayscale mean, and the dark defect grayscale parameter;
[0207] A bright defect compensation value is generated by using the second grayscale mean, the fourth grayscale mean, and the bright defect grayscale parameter.
[0208] A first generating module 7122 is configured to perform pixel-by-pixel segmentation based on a preset dark defect threshold lower limit, dark defect threshold upper limit, circuit area limit sample image, first template, and dark defect compensation value to generate a circuit dark defect area;
[0209] The second generation module 7123 is used to perform pixel-by-pixel segmentation according to the preset bright defect threshold lower limit, bright defect threshold upper limit, circuit area limit sample map, second template and bright defect compensation value to generate a circuit bright defect area.
[0210] The fifth generating unit 713 is configured to perform defect recognition and detection on the dark defect area and the bright defect area of the circuit to generate circuit area defect data.
[0211] Optionally, the fifth generating unit 713 includes:
[0212] Cutting the dark defect area of the circuit of the first template and the bright defect area of the circuit of the second template to generate dark defect sub-areas and bright defect sub-areas;
[0213] The cropped dark defect sub-region and bright defect sub-region are sent to the classification network for classification to generate the classification results;
[0214] The classification results are used to generate a data list based on the image ID of the display screen image.
[0215] See also Figure 8 The present application provides a device for detecting defects in a circuit area of a micro-display device, comprising:
[0216] Processor 801 , memory 802 , input / output unit 803 , and bus 804 .
[0217] The processor 801 is connected to the memory 802 , the input and output unit 803 , and the bus 804 .
[0218] The memory 802 stores a program, and the processor 801 calls the program to execute the following Figure 1 、 Figure 2 and Figure 3 、 Figure 4 、 Figure 5 and Figure 6 The method in .
[0219] The present application provides a computer-readable storage medium, wherein a program is stored on the computer-readable storage medium, and when the program is executed on a computer, the program performs the following operations: Figure 1 、 Figure 2 and Figure 3 、 Figure 4 、 Figure 5 and Figure 6 The method in .
[0220] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.
[0221] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.
[0222] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.
[0223] In addition, the functional units in the various embodiments of the present application may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.
[0224] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, read-only memory), random access memory (RAM, random access memory), disk or optical disk, and other media that can store program code.
Claims
1. A method for detecting defects in a circuit area of a micro display device, characterized in that: include: Using a flying camera to photograph the display screen to be tested, and collecting an image of the circuit area of the display screen to be tested; copying the circuit area image to generate a first circuit area image and a second circuit area image; Performing grayscale expansion processing on the first circuit area image to generate a first template; performing grayscale corrosion processing on the second circuit area image to generate a second template; Detecting circuit defect areas on the first template and the second template respectively according to a preset circuit area limit sample diagram to generate circuit dark defect areas and circuit bright defect areas; Detecting circuit defect areas on the first template and the second template respectively according to a preset circuit area limit sample map to generate a circuit dark defect area and a circuit bright defect area, including: obtaining a dark defect compensation value and a bright defect compensation value; performing pixel-by-pixel segmentation according to a preset dark defect threshold lower limit, a dark defect threshold upper limit, the circuit area limit sample map, the first template, and the dark defect compensation value to generate a circuit dark defect area; performing pixel-by-pixel segmentation according to a preset bright defect threshold lower limit, a bright defect threshold upper limit, the circuit area limit sample map, the second template, and the bright defect compensation value to generate a circuit bright defect area; Performing defect recognition detection on the dark defect area of the circuit and the bright defect area of the circuit to generate circuit area defect data; Obtain dark defect compensation values and bright defect compensation values, including: The preset circuit area limit sample is copied, and grayscale expansion processing and grayscale corrosion processing are performed respectively to generate a third template and a fourth template; the grayscale means of the first template, the second template, the third template and the fourth template are obtained to generate a first grayscale mean, a second grayscale mean, a third grayscale mean and a fourth grayscale mean; dark defect grayscale parameters and bright defect grayscale parameters are obtained, and the grayscale value range of the dark defect / bright defect of each circuit area is first averaged to generate the grayscale median of the dark defect / bright defect of each circuit area, and then the grayscale medians of all dark defects / bright defects are averaged to generate dark defect grayscale parameters / bright defect grayscale parameters; a dark defect compensation value is generated by the first grayscale mean, the third grayscale mean and the dark defect grayscale parameter; a bright defect compensation value is generated by the second grayscale mean, the fourth grayscale mean and the bright defect grayscale parameter.
2. The method according to claim 1, wherein After capturing the circuit area image of the display screen to be tested by a flying camera, and before copying the circuit area image to generate the first circuit area image and the second circuit area image, the method further includes: The circuit area image is subjected to mean filter noise reduction processing or Gaussian filter noise reduction processing.
3. The method according to claim 1, wherein Before photographing the display screen to be tested by using a flying camera to acquire an image of the circuit area of the display screen to be tested, the method further includes: Capture images of the standard sample limit screen to generate standard images of the product; generating a circuit area initial position and a buffer area on the standard image; Perform edge detection on the edges of the initial position of the circuit area from the outside to the inside, and screen out all candidate edge points according to a preset edge point parameter threshold; Fit all edge candidate points and determine the coordinates of the angle points; generating a circuit area frame according to the coordinates of the angle point; The standard image is cropped according to the circuit area frame to generate a circuit area limit sample image.
4. The method according to claim 1, wherein Performing defect identification and detection on the dark defect area and the bright defect area of the circuit to generate circuit area defect data includes: Performing cropping on the circuit dark defect region of the first template and the circuit bright defect region of the second template to generate dark defect sub-regions and bright defect sub-regions; The cropped dark defect sub-region and bright defect sub-region are sent to the classification network for classification to generate the classification results; The classification result is used to generate a data list according to the image ID of the display screen image.
5. A device for detecting defects in a circuit area of a micro display device, characterized in that: include: An acquisition unit, configured to photograph the display screen to be tested using a flying camera, and acquire an image of a circuit area of the display screen to be tested; a first generating unit, configured to copy the circuit area image to generate a first circuit area image and a second circuit area image; a second generating unit, configured to perform grayscale expansion processing on the first circuit area image to generate a first template; a third generating unit, configured to perform grayscale corrosion processing on the second circuit area image to generate a second template; a fourth generating unit, configured to detect circuit defect areas of the first template and the second template respectively according to a preset circuit area limit sample diagram, and generate circuit dark defect areas and circuit bright defect areas; The fourth generation unit includes: an acquisition module for acquiring a dark defect compensation value and a light defect compensation value; a first generation module for performing pixel-by-pixel segmentation based on a preset dark defect threshold lower limit, a dark defect threshold upper limit, a circuit area limit sample map, the first template, and the dark defect compensation value to generate a circuit dark defect area; and a second generation module for performing pixel-by-pixel segmentation based on a preset light defect threshold lower limit, a light defect threshold upper limit, a circuit area limit sample map, the second template, and the light defect compensation value to generate a circuit light defect area; a fifth generating unit, configured to perform defect recognition detection on the dark defect area of the circuit and the bright defect area of the circuit to generate circuit area defect data; Obtain dark defect compensation values and bright defect compensation values, including: The preset circuit area limit sample is copied, and grayscale expansion processing and grayscale corrosion processing are performed respectively to generate a third template and a fourth template; the grayscale means of the first template, the second template, the third template and the fourth template are obtained to generate a first grayscale mean, a second grayscale mean, a third grayscale mean and a fourth grayscale mean; dark defect grayscale parameters and bright defect grayscale parameters are obtained, and the grayscale value range of the dark defect / bright defect of each circuit area is first averaged to generate the grayscale median of the dark defect / bright defect of each circuit area, and then the grayscale medians of all dark defects / bright defects are averaged to generate dark defect grayscale parameters / bright defect grayscale parameters; a dark defect compensation value is generated by the first grayscale mean, the third grayscale mean and the dark defect grayscale parameter; a bright defect compensation value is generated by the second grayscale mean, the fourth grayscale mean and the bright defect grayscale parameter.
6. A device for detecting defects in a circuit area of a micro display device, characterized in that: include: processor, memory, input and output units, and buses; The processor is connected to the memory, the input and output unit, and the bus; The memory stores a program, and the processor calls the program to execute the method according to any one of claims 1 to 4. 7 . A computer-readable storage medium having a program stored thereon, wherein the program, when executed on a computer, performs the method according to claim 1 .
Citation Information
Patent Citations
Screen defect detection method and device, equipment and storage medium
CN113781396A
Automated inspection system for metallic surfaces
US6198529B1