Receivers and electronic equipment used in high-speed carrier communication systems for low-voltage power lines

Abstract

A receiver and electronic device for a low-voltage power line high-speed carrier communication system are disclosed. The receiver includes a low-noise amplifier, a first transconductance amplification link, a second transconductance amplification link, and an adder. The low-noise amplifier receives a received signal at its input terminal and its output terminal is coupled to the input terminals of the first and second transconductance amplification links. The output terminal of the first transconductance amplification link is coupled to the first input terminal of the adder. The output terminal of the second transconductance amplification link is coupled to the second input terminal of the adder. The output signals of the first and second transconductance amplification links have opposite polarities. The adder outputs the addition result. This design effectively reduces the receiver's noise floor and improves its signal-to-noise ratio.

Description

Technical Field

[0001] This invention relates to the field of communication equipment technology, and in particular to a receiver and electronic device used in a low-voltage power line high-speed carrier communication system. Background Technology

[0002] A photovoltaic inverter can convert the variable DC voltage generated by a photovoltaic (PV) solar panel into AC power at the grid frequency, thereby feeding the electrical energy generated by the solar panel back to the grid.

[0003] High-speed power line carrier communication (HPLC) refers to a technology that enables communication via power lines in the mains power grid. In existing technologies, the alternating current output from a photovoltaic inverter can be transmitted via HPLC technology to form a photovoltaic communication system.

[0004] In photovoltaic communication systems, the background noise of HPLC receivers is relatively high due to the influence of photovoltaic inverters. Summary of the Invention

[0005] The present invention aims to provide at least one receiver and electronic device for use in HPLC systems, wherein the receiver has low noise floor and high signal-to-noise ratio.

[0006] In a first aspect, the present invention provides a receiver for a low-voltage power line high-speed carrier communication system, which can be applied in an HPLC communication system. The receiver includes: a low-noise amplifier, a first transconductance amplification link, a second transconductance amplification link, and an adder, wherein: the low-noise amplifier receives a received signal at its input terminal, and its output terminal is coupled to the input terminals of the first transconductance amplification link and the second transconductance amplification link; the output terminal of the first transconductance amplification link is coupled to the first input terminal of the adder; the output terminal of the second transconductance amplification link is coupled to the second input terminal of the adder; the output signal of the first transconductance amplification link and the output signal of the second transconductance amplification link have opposite polarities; and the adder outputs the addition result.

[0007] The receiver includes a low-noise amplifier, a first transconductance amplification link, a second transconductance amplification link, and an adder. The output signal of the low-noise amplifier is input to both the first and second transconductance amplification links. Since the output signals of the first and second transconductance amplification links have opposite polarities, the addition operation by the adder effectively eliminates the background noise in the received signal and improves the signal-to-noise ratio.

[0008] Optionally, the first transconductance amplification link includes: a first radio frequency transconductance and a first transimpedance amplifier, wherein: the input terminal of the first radio frequency transconductance is coupled to the output terminal of the low noise amplifier, and its output terminal is coupled to the input terminal of the first transimpedance amplifier; the output terminal of the first transimpedance amplifier is coupled to the first input terminal of the adder.

[0009] Optionally, the receiver further includes: a first voltage biasing unit adapted to provide a bias voltage for the first radio frequency transconductance and the first transimpedance amplifier.

[0010] The first RF transconductance amplifier and the first transimpedance amplifier share the same first voltage bias unit, eliminating the need for two first voltage bias units, thus reducing the power consumption and area of ​​the receiver.

[0011] Optionally, the first voltage bias unit includes: a first PMOS transistor and a second PMOS transistor, wherein: the first PMOS transistor has a source input power supply voltage, its drain coupled to the power supply terminal of the first RF transconductance, and its gate coupled to the gate of the second PMOS transistor; the second PMOS transistor has a source input power supply voltage, its drain coupled to the power supply terminal of the first transimpedance amplifier, and its gate input bias voltage.

[0012] Optionally, the second transconductance amplification link includes: a second radio frequency transconductance and a second transimpedance amplifier, wherein: the input terminal of the second radio frequency transconductance is coupled to the output terminal of the low noise amplifier, and its output terminal is coupled to the input terminal of the second transimpedance amplifier; the output terminal of the second transimpedance amplifier is coupled to the second input terminal of the adder.

[0013] Optionally, the receiver further includes a second voltage bias unit adapted to provide a bias voltage for the second radio frequency transconductance and the second transimpedance amplifier.

[0014] Optionally, the second voltage bias unit includes a third PMOS transistor and a fourth PMOS transistor, wherein: the third PMOS transistor has a source input power supply voltage, its drain coupled to the power supply terminal of the second RF transconductance, and its gate coupled to the gate of the fourth PMOS transistor; the fourth PMOS transistor has a source input power supply voltage, its drain coupled to the power supply terminal of the second transimpedance amplifier, and its gate input bias voltage.

[0015] The second RF transconductance amplifier and the second transimpedance amplifier share the same second voltage bias unit, eliminating the need for two second voltage bias units, thus reducing the power consumption and area of ​​the receiver.

[0016] Optionally, the receiver further includes a programmable gain amplifier, the input of which is coupled to the output of the adder.

[0017] Optionally, the receiver further includes an analog-to-digital converter, the input of which is coupled to the output of the programmable gain amplifier, adapted to perform analog-to-digital conversion on the output signal of the programmable gain amplifier and output a corresponding digital signal.

[0018] Secondly, the present invention also provides an electronic device including any of the receivers described above. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of the structure of a receiver applied to an HPLC system in an embodiment of the present invention;

[0020] Figure 2 This is a schematic diagram of the structure of a first transconductance amplification link in an embodiment of the present invention;

[0021] Figure 3 This is a schematic diagram of the structure of a second transconductance amplification link in an embodiment of the present invention;

[0022] Figure 4 This is a detailed structural schematic diagram of a receiver applied to an HPLC system in an embodiment of the present invention. Detailed Implementation

[0023] As described in the background section above, in photovoltaic communication systems, the HPLC receiver has a relatively high noise floor due to the influence of the photovoltaic inverter, resulting in a low signal-to-noise ratio.

[0024] In this embodiment of the invention, the output signal of the low-noise amplifier is input to the first transconductance amplification link and the second transconductance amplification link, respectively. Since the polarity of the output signal of the first transconductance amplification link is opposite to that of the output signal of the second transconductance amplification link, the addition operation of the adder can effectively eliminate the background noise in the received signal and improve the signal-to-noise ratio.

[0025] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0026] This invention provides a receiver, with reference to... Figure 1 The receiver provided in this embodiment of the invention can be applied in an HPLC system.

[0027] In this embodiment of the invention, the receiver may include a low-noise amplifier 11, a first transconductance amplification link 12, a second transconductance amplification link 13, and an adder 14, wherein:

[0028] The input terminal of the low noise amplifier 11 can receive a signal signal, and the output terminal of the low noise amplifier 11 can be coupled to the input terminal of the first transconductance amplification link 12 and the input terminal of the second transconductance amplification link 13, respectively.

[0029] The output of the first transconductance amplification link 12 is coupled to the first input of the adder 14, and is suitable for transconductance amplification of the received input signal;

[0030] The output of the second transconductance amplification link 13 is coupled to the second input of the adder 14, and is suitable for transconductance amplification of the received input signal;

[0031] The output of adder 14 can output the result of the addition operation.

[0032] In this embodiment of the invention, the output signal of the first transconductance amplification link 12 has the opposite polarity to the output signal of the second transconductance amplification link 13. In other words, the output signal of the first transconductance amplification link 12 is out of phase with the output signal of the second transconductance amplification link 13.

[0033] In practical implementation, since the power of the received signal is usually low, the low-noise amplifier 11 can amplify the received signal with low noise, thereby increasing the power of the received signal.

[0034] In a specific implementation, the first transconductance amplification link 12 may include: a first radio frequency transconductance and a first transimpedance amplifier, wherein:

[0035] The input terminal of the first radio frequency transconductance is coupled to the output terminal of the low noise amplifier 11, and the output terminal of the first radio frequency transconductance is coupled to the input terminal of the first transimpedance amplifier.

[0036] The output of the first transimpedance amplifier is coupled to the first input of the adder 14.

[0037] In a specific implementation, the second transconductance amplification link 13 may include: a second radio frequency transconductance and a second transimpedance amplifier, wherein:

[0038] The input terminal of the second radio frequency transconductance is coupled to the output terminal of the low noise amplifier 11, and the output terminal of the second radio frequency transconductance is coupled to the input terminal of the second transimpedance amplifier.

[0039] The output of the second transimpedance amplifier is coupled to the second input of the adder 14.

[0040] In this embodiment of the invention, the polarity of the first transimpedance amplifier is opposite to that of the second transimpedance amplifier. This opposite polarity can mean that the output signal of the first transimpedance amplifier is out of phase with the output signal of the second transimpedance amplifier.

[0041] In practical implementation, by pre-setting the amplification coefficients of the first and second transconductance amplification links, the noise floor energy on the first and second transconductance amplification links can be made to be the same but out of phase. Therefore, by adding the output signals of the first and second transconductance amplification links using an adder, a received signal with eliminated noise floor can be obtained. This improves the signal-to-noise ratio of the receiver.

[0042] Specifically, the target amplification coefficients of the first transconductance amplification link and the second transconductance amplification link can be obtained in advance through testing, and these target amplification coefficients can be stored in a preset memory. When the receiver is working, it can retrieve the target amplification coefficients of the first transconductance amplification link and the second transconductance amplification link from the memory, and configure the first transconductance amplification link and the second transconductance amplification link accordingly.

[0043] In a specific implementation, the receiver may also include a first voltage bias unit, which provides bias voltage to the first radio frequency transconductance and the first transimpedance amplifier.

[0044] In some embodiments, the first voltage biasing unit may include a first PMOS transistor and a second PMOS transistor, wherein:

[0045] The source of the first PMOS transistor can be supplied with a power supply voltage, the drain of the first PMOS transistor is coupled to the power supply terminal of the first RF transconductance, the gate of the first PMOS transistor is coupled to the gate of the second PMOS transistor, and the gate of the first PMOS transistor is supplied with a bias voltage.

[0046] The source of the second PMOS transistor is connected to the power supply voltage, and the drain of the second PMOS transistor is coupled to the power supply terminal of the first transimpedance amplifier.

[0047] Reference Figure 2 The present invention provides a schematic diagram of the structure of a first transconductance amplification link in an embodiment of the present invention.

[0048] Figure 2 In the first PMOS transistor MP1, the source input power supply voltage is VDD, the drain of the first PMOS transistor MP1 is coupled to the power supply terminal of the first RF transconductance Gm, and the gate input bias voltage is Vbias.

[0049] The source of the second PMOS transistor MP2 is supplied with a power supply voltage VDD. The drain of the second PMOS transistor MP2 is coupled to the power supply terminal of the first transimpedance amplifier TIA. The gate of the second PMOS transistor MP2 is supplied with a bias voltage Vbias.

[0050] Therefore, the first RF transconductance and the first transimpedance amplifier share the same first voltage bias unit, eliminating the need for two separate first voltage bias units, thus reducing the receiver's power consumption and area. Furthermore, sharing the same first voltage bias unit also allows for better matching between the first RF transconductance and the first transimpedance amplifier.

[0051] In a specific implementation, the receiver may also include a second voltage bias unit, which provides bias voltage to the second RF transconductance and the second transimpedance amplifier.

[0052] In some embodiments, the first voltage biasing unit may include a third PMOS transistor and a fourth PMOS transistor, wherein:

[0053] The source of the third PMOS transistor can be supplied with a power supply voltage, the drain of the third PMOS transistor is coupled to the power supply terminal of the second RF transconductance, the gate of the third PMOS transistor is coupled to the gate of the fourth PMOS transistor, and the gate of the third PMOS transistor is supplied with a bias voltage.

[0054] The source of the fourth PMOS transistor is connected to the power supply voltage, and the drain of the fourth PMOS transistor is coupled to the power supply terminal of the second transimpedance amplifier.

[0055] Reference Figure 3 A schematic diagram of a second transconductance amplification link in an embodiment of the present invention is provided.

[0056] Figure 3 In the circuit, the source of the third PMOS transistor MP3 is connected to the power supply voltage VDD, the drain of the third PMOS transistor MP3 is coupled to the power supply terminal of the second RF transconductance AUX Gm, and the gate of the third PMOS transistor MP3 is connected to the bias voltage Vbias.

[0057] The source input power supply voltage of the fourth PMOS transistor MP4 is VDD, the drain of the fourth PMOS transistor MP4 is coupled to the power supply terminal of the first transimpedance amplifier AUX TIA, and the gate input bias voltage of the fourth PMOS transistor MP4 is Vbias.

[0058] Therefore, the second RF transconductance and the second transimpedance amplifier share the same second voltage bias unit, eliminating the need for two separate second voltage bias units, thus further reducing the receiver's power consumption and area. Furthermore, sharing the same second voltage bias unit also allows for better matching between the second RF transconductance and the second transimpedance amplifier.

[0059] In this embodiment of the invention, the receiver may further include a programmable gain amplifier (PGA). The input of the PGA is coupled to the output of the adder, amplifying the output signal of the adder. Since the noise floor of the photovoltaic inverter has been eliminated from the output signal of the adder, the output signal of the adder is the received signal with the noise floor removed. Thus, the programmable gain amplifier amplifies the received signal with the noise floor removed.

[0060] In specific implementations, the receiver may also include an analog-to-digital converter (ADC). The input of the ADC is coupled to the output of the programmable gain amplifier, and is suitable for performing analog-to-digital conversion on the output signal of the programmable gain amplifier and outputting the corresponding digital signal.

[0061] In practical applications, programmable gain amplifiers (PGA) are highly versatile amplifiers. Their amplification factor can be adjusted programmatically according to specific application requirements. By adjusting the PGA's amplification factor, the full-scale signal of the analog-to-digital converter (ADC) can be homogenized, improving measurement accuracy. A PGA can include fully balanced differential amplifier modules, decoder modules, and resistor switch array modules, etc. The aforementioned PGA and ADC components can all utilize existing devices, and will not be elaborated upon here.

[0062] It is understandable that the receiver may also include other modules, such as a baseband processing module, a filtering module, and a mixing module. The roles of these other modules in the receiver and their positions in the receiver's circuit structure can be found in existing HPLC receivers, and will not be elaborated upon here.

[0063] Reference Figure 4 A detailed structural schematic diagram of a receiver according to an embodiment of the present invention is provided. The receiver includes a low-noise amplifier, a first RF transconductance amplifier, a first transimpedance amplifier, a second RF transconductance amplifier, a second transimpedance amplifier, an adder, a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a programmable gain amplifier, and an analog-to-digital converter.

[0064] like Figure 4 As shown, the input terminal of the low noise amplifier 11 receives the received signal from the receiver, and the output terminal of the low noise amplifier 11 is coupled to the input terminal of the first radio frequency transconductance Gm and the input terminal of the second radio frequency transconductance AUX Gm, respectively.

[0065] The output terminal of the first radio frequency transconductance Gm is coupled to the input terminal of the first transimpedance amplifier TIA;

[0066] The output of the first transimpedance amplifier TIA is coupled to the first input of the adder 14.

[0067] The source input power supply voltage of the first PMOS transistor MP1 is VDD, the drain of the first PMOS transistor MP1 is coupled to the power supply terminal of the first RF transconductance Gm, and the gate input bias voltage of the first PMOS transistor MP1 is Vbias.

[0068] The source input power supply voltage of the second PMOS transistor MP2 is VDD, the drain of the second PMOS transistor MP2 is coupled to the power supply terminal of the first transimpedance amplifier TIA, and the gate input bias voltage of the second PMOS transistor MP2 is Vbias.

[0069] The output of the second RF transconductance AUX Gm is coupled to the input of the second transimpedance amplifier AUX TIA;

[0070] The output of the second transimpedance amplifier AUX TIA is coupled to the second input of the adder;

[0071] The source input power supply voltage of the third PMOS transistor MP3 is VDD, the drain of the third PMOS transistor MP3 is coupled to the power supply terminal of the second RF transconductance AUX Gm, and the gate input bias voltage of the third PMOS transistor MP3 is Vbias.

[0072] The source input power supply voltage of the fourth PMOS transistor MP4 is VDD, the drain of the fourth PMOS transistor MP4 is coupled to the power supply terminal of the first transimpedance amplifier AUX TIA, and the gate input bias voltage of the fourth PMOS transistor MP4 is Vbias.

[0073] The output of adder 14 is coupled to the input of programmable gain amplifier PGA;

[0074] The output of the programmable gain amplifier (PGA) is coupled to the input of the analog-to-digital converter (ADC) to amplify the output signal of the adder 14 by a corresponding factor.

[0075] The output terminal of the analog-to-digital converter (ADC) outputs the converted digital signal.

[0076] This invention also provides an electronic device that can be used in an HPLC system, and the electronic device may include the receiver provided in any of the above embodiments.

[0077] In practice, the received signal can be any signal received by the receiver. The receiver may include a receiving antenna, and the received signal can be any signal received by the receiving antenna. A low-noise amplifier can amplify the received signal with low noise.

[0078] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A receiver for use in a low-voltage power line high-speed carrier communication system, characterized in that, In low-voltage power line high-speed carrier communication systems, it includes: a low-noise amplifier, a first transconductance amplification link, a second transconductance amplification link, and an adder, wherein: The low-noise amplifier receives a received signal at its input terminal and its output terminal is coupled to the input terminals of the first transconductance amplification link and the second transconductance amplification link. The first transconductance amplification link has its output terminal coupled to the first input terminal of the adder; the first transconductance amplification link includes: a first radio frequency transconductance, a first transimpedance amplifier, and a first voltage bias unit, wherein: the first radio frequency transconductance has its input terminal coupled to the output terminal of the low noise amplifier, and its output terminal coupled to the input terminal of the first transimpedance amplifier; the first transimpedance amplifier has its output terminal coupled to the first input terminal of the adder; the first voltage bias unit is adapted to provide a bias voltage for the first radio frequency transconductance and the first transimpedance amplifier; The second transconductance amplification link has its output terminal coupled to the second input terminal of the adder; the output signal of the first transconductance amplification link has the opposite polarity to the output signal of the second transconductance amplification link, and the noise floor on the first transconductance amplification link has the same energy and opposite phase to the noise floor on the second transconductance amplification link; the second transconductance amplification link includes: a second radio frequency transconductance, a second transimpedance amplifier, and a second voltage bias unit, wherein: the input terminal of the second radio frequency transconductance is coupled to the output terminal of the low noise amplifier, and its output terminal is coupled to the input terminal of the second transimpedance amplifier; the output terminal of the second transimpedance amplifier is coupled to the second input terminal of the adder; the second voltage bias unit is adapted to provide a bias voltage for the second radio frequency transconductance and the second transimpedance amplifier; The adder outputs the result of the addition operation.

2. The receiver as described in claim 1, characterized in that, The first voltage bias unit includes: a first PMOS transistor and a second PMOS transistor, wherein: The first PMOS transistor has a source that receives the power supply voltage, a drain that is coupled to the power supply terminal of the first RF transconductance, and a gate that is coupled to the gate of the second PMOS transistor. The second PMOS transistor has the power supply voltage input at its source, its drain coupled to the power supply terminal of the first transimpedance amplifier, and the bias voltage input at its gate.

3. The receiver as described in claim 1, characterized in that, The second voltage bias unit includes: a third PMOS transistor and a fourth PMOS transistor, wherein: The third PMOS transistor has a source that receives the power supply voltage, a drain that is coupled to the power supply terminal of the second RF transconductance, and a gate that is coupled to the gate of the fourth PMOS transistor. The fourth PMOS transistor has the power supply voltage input at its source, its drain coupled to the power supply terminal of the second transimpedance amplifier, and the bias voltage input at its gate.

4. The receiver according to any one of claims 1 to 3, characterized in that, Also includes: A programmable gain amplifier, the input of which is coupled to the output of the adder.

5. The receiver as described in claim 4, characterized in that, Also includes: An analog-to-digital converter, whose input terminal is coupled to the output terminal of the programmable gain amplifier, is adapted to perform analog-to-digital conversion on the output signal of the programmable gain amplifier and output a corresponding digital signal.

6. An electronic device, characterized in that, Includes the receiver as described in any one of claims 1 to 5.

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