Apparatus and method for video decoding and encoding

Abstract

Aspects described herein relate to apparatuses and methods for video decoding and encoding. The apparatus for video decoding comprises: a processor configured to: obtain a merge candidate list for prediction units (PU) in a current picture; obtaining a symmetric affine merge candidate based on an affine merge candidate in the merge candidate list, wherein the symmetric affine merge candidate includes a first symmetric motion vector difference (MVD); generating an updated merge candidate list for prediction of the MVD of the PU, wherein the updated merge candidate list includes the affine merge candidate and the symmetric affine merge candidate; and decoding the current picture including the PU based on the prediction of the MVD of the PU.

Description

[0001] This application is a divisional application of the invention patent application with application number 202080026958.1 filed on March 11, 2020 and invention name “Symmetrical Merge Mode Motion Vector Coding”.

[0002] CROSS-REFERENCE TO RELATED APPLICATIONS

[0003] This application claims priority to U.S. Provisional Patent Application No. 62 / 816,586, filed on March 11, 2019, entitled “Symmetric Motion Vector Difference Coding,” which is incorporated by reference in its entirety as if fully set forth herein. Background Art

[0004] Video coding systems may be used to compress digital video signals, for example to reduce the storage and / or transmission bandwidth required for such signals. Video coding systems may include block-based, wavelet-based, and / or object-based systems. Summary of the invention

[0005] Systems, devices, and methods for symmetric merge mode motion vector encoding are described herein. A symmetric bi-prediction (bi-pred) motion vector (MV) may be constructed from available candidates in a merge candidate list for a conventional inter prediction merge mode and / or an affine prediction merge mode. For example, when encoding a picture that allows bidirectional motion compensated prediction (MCP), the available MV merge candidates may be extended or mapped symmetrically in either direction (e.g., between reference pictures before and after the current picture). A symmetric bi-pred MV may be selected from the merge candidates as the MV of the current prediction unit (PU). The symmetric mapping construction may be repeated, for example, at a decoding device (e.g., based on an encoded index of the MV merge candidate list) to obtain the same merge candidate and encoded MV at an encoding device.

[0006] In one example, a method may be implemented to determine motion information including a motion vector (MV) of a prediction unit (PU) in a current picture. The method may be implemented, for example, by a device that may include a processor storing a computer-readable storage medium and / or configured to execute computer-executable instructions, which when executed perform the method to determine a motion vector (MV) of a prediction unit (PU) in the current picture. A method may include obtaining (e.g., retrieving, generating, or constructing) a merge candidate list of PUs in the current picture. The merge candidate list may include a first merge candidate, the first merge candidate including a first MV, the first MV being associated with a first reference picture in a first reference picture list. For example, a symmetric merge candidate may be obtained (e.g., constructed) via a symmetric mapping of the first merge candidate. The symmetric merge candidate may include a second MV, the second MV being symmetric to the first MV. The symmetric merge candidate may be associated with a second reference picture in a second reference picture list. The symmetric merge candidate may be a dual-prediction merge candidate and may include: a first MV, the first MV being associated with a first reference picture in the first reference picture list; and a second MV, the second MV being symmetric to the first MV and associated with a second reference picture in a second reference picture list. The symmetric merge candidate may be merged (eg, added) to the merge candidate list. A merge candidate (eg, a symmetric merge candidate) may be selected from the merge candidate list for the MV of the predicted PU.

[0007] The first reference picture and the second reference picture may be symmetrical with respect to the current picture.For example, the first reference picture and the second reference picture may have the same picture order count (POC) distance in opposite directions from the current picture.

[0008] The construction of the symmetric merge candidate may be based on whether the second reference picture list contains a symmetric reference picture of the first reference picture, for example, a picture order count (POC) distance from the current picture is equal to the POC distance between the first reference picture and the current picture. In one example, under the condition that there is a symmetric reference picture in the second reference picture list, the first merge candidate may be selected to derive the symmetric merge candidate. The symmetric reference picture is the second reference picture of the symmetric merge candidate.

[0009] The other reference picture list may not include a symmetric reference picture. A reference picture with the closest POC distance may be selected as a second reference picture of a symmetric merge candidate. For example, a reference picture in the second reference picture list whose POC distance to the current picture is closest to the POC distance between the first reference picture and the current picture may be selected.

[0010] For example, motion vector scaling may be applied to construct the second MV of the symmetric merge candidate. The scaling may be based on the POC distance between the second reference picture and the current picture, and the POC distance between the first reference picture and the current picture.

[0011] In one example, for example, a symmetric merge candidate may be constructed and added to the merge candidate list only when the first merge candidate is a uni-prediction merge candidate. In various specific implementations, for example, a symmetric merge candidate may be constructed and added to the merge candidate list regardless of whether the first merge candidate is a bi-prediction merge candidate or a uni-prediction merge candidate.

[0012] For example, a first merge candidate may be determined to be a bidirectional prediction candidate having a first MV based on a first reference picture in a first reference picture list and a third MV based on a third reference picture in a second reference picture list. A second symmetric merge candidate may be constructed via symmetric mapping of the first merge candidate, the second symmetric merge candidate may include a fourth MV that is symmetric to the third MV and is associated with a fourth reference picture in the first reference picture list. A POC distance between the fourth reference picture and the current picture may be equal to or similar to a POC distance between the third reference picture and the current picture.

[0013] Adding the symmetric merge candidate to the merge candidate list may be based on determining (eg, before adding the symmetric merge candidate to the merge candidate list) that the symmetric merge candidate is not redundant with any other merge candidates in the merge candidate list.

[0014] Adding the symmetric merge candidate to the merge candidate list may be based on determining (eg, before adding the symmetric merge candidate to the merge candidate list) that adding the merge candidate to the merge candidate list will not exceed at least one of a maximum allowed number of merge candidates and a maximum allowed number of symmetric merge candidates.

[0015] Symmetric merge candidates may be added to the merge candidate list in a specific order, such as after non-zero MV merge candidates and before any zero MV merge candidates in the merge candidate list.

[0016] The merge candidate may be a conventional merge candidate or an affine merge candidate. For example, the first merge candidate may include at least two candidate control point MVs (CPMVs), and the symmetric merge candidate may include at least two symmetric mapped CPMVs, which are symmetric to the at least two CPMVs of the first merge candidate, respectively. The at least two symmetric mapped CPMVs may be derived by symmetric mapping of the at least two CPMVs.

[0017] In the example of the four-parameter affine model, there may be a symmetric mapping of the first candidate CPMV and the second candidate CPMV of the first merge candidate with the first symmetric CPMV and the second symmetric CPMV of the symmetric merge candidate. For example, four affine candidate CPMV parameters (including x-space translation and y-space translation, scaling factor and rotation angle) may be symmetrically mapped to four affine symmetric CPMV parameters (including negative x-space translation and y-space translation, inverse scaling factor and negative rotation angle). The first symmetric CPMV and the second symmetric CPMV may be derived based on the four affine symmetric CPMV parameters.

[0018] In the example of the six-parameter affine model, there may be a symmetric mapping of the first candidate CPMV, the second candidate CPMV and the third candidate CPMV of the first merge candidate to the first symmetric CPMV, the second symmetric CPMV and the third symmetric CPMV of the symmetric merge candidate. For example, six affine candidate CPMV parameters (including x-space translation and y-space translation, x-scaling factor and y-scaling factor, and rotation angles x and y-rotation angles) may be symmetrically mapped to six affine symmetric CPMV parameters (including negative x-space translation and negative y-space translation, inverse x-scaling factor and inverse y-scaling factor, and negative x-rotation angle and negative y-rotation angle). The first symmetric CPMV, the second symmetric CPMV and the third symmetric CPMV may be derived based on the six affine symmetric CPMV parameters.

[0019] The methods described herein may be performed by a decoder. In some examples, the methods herein or corresponding methods may be performed by an encoder. A computer readable medium may include instructions for causing one or more processors to perform the methods described herein. A computer program product including instructions, when the program is executed by one or more processors, the instructions may cause one or more processors to perform the methods described herein. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1A is a system diagram illustrating an exemplary communication system in which one or more disclosed embodiments may be implemented.

[0021] Figure 1B It is shown that according to the embodiment, Figure 1A A system diagram of an exemplary wireless transmit / receive unit (WTRU) for use within a communication system is shown.

[0022] Figure 1C is a diagram showing that according to the embodiment Figure 1A A system diagram of an exemplary radio access network (RAN) and an exemplary core network (CN) for use within a communication system is shown.

[0023] Figure 1D is a diagram showing that according to the embodiment Figure 1AA system diagram of another exemplary RAN and another exemplary CN for use within the communication system shown.

[0024] Figure 2 is a schematic diagram illustrating an exemplary block-based video decoder.

[0025] Figure 3 is a schematic diagram illustrating an exemplary video decoder.

[0026] Figure 4 is a schematic diagram illustrating an example of a system in which various aspects and examples may be implemented.

[0027] Figure 5 is a schematic diagram showing exemplary positions of spatial merging candidates.

[0028] Figure 6 is a diagram illustrating an example of motion vector scaling of a temporal merging candidate.

[0029] FIG. 7A to FIG. 7C is a diagram showing an example of a control point-based affine motion model including a 4-parameter affine model, a 6-parameter affine model, and an affine motion vector field for each subblock.

[0030] Fig. 8A and Figure 8B is a diagram showing an example of inherited position of an inherited affine motion predictor and an example of control point motion vector inheritance.

[0031] Fig. 9 is a schematic diagram showing exemplary positions of candidate positions for a constructed affine merge pattern.

[0032] Fig.10 is a schematic diagram showing an example of decoding-side motion vector correction.

[0033] Fig.11A and Fig. 11B is a schematic diagram showing an example of symmetric merged MV candidate construction for normal motion and affine motion. DETAILED DESCRIPTION

[0034] A detailed description of exemplary embodiments will now be described with reference to the various drawings. Although this specification provides detailed examples of possible implementations, it should be noted that the details are intended to be illustrative and in no way limit the scope of the application.

[0035] Figure 1A1 is a schematic diagram illustrating an exemplary communication system 100 in which one or more disclosed embodiments may be implemented. The communication system 100 may be a multiple access system that provides content such as voice, data, video, messaging, broadcast, etc. to multiple wireless users. The communication system 100 may enable multiple wireless users to access such content through sharing of system resources (including wireless bandwidth). For example, the communication system 100 may employ one or more channel access methods such as code division multiple access (CDMA), time division multiple access (TDMA), frequency division multiple access (FDMA), orthogonal FDMA (OFDMA), single carrier FDMA (SC-FDMA), zero tail unique word DFT spread OFDM (ZT UW DTS-sOFDM), unique word OFDM (UW-OFDM), resource block filtered OFDM, filter bank multi-carrier (FBMC), etc.

[0036] like Figure 1A As shown, the communication system 100 may include wireless transmit / receive units (WTRUs) 102a, 102b, 102c, 102d, RAN 104 / 113, CN 106 / 115, public switched telephone network (PSTN) 108, Internet 110 and other networks 112, but it should be understood that the disclosed embodiments contemplate any number of WTRUs, base stations, networks, and / or network elements. Each of the WTRUs 102a, 102b, 102c, 102d may be any type of device configured to operate and / or communicate in a wireless environment. By way of example, the WTRUs 102a, 102b, 102c, 102d (any of which may be referred to as a “station” and / or “STA”) may be configured to transmit and / or receive wireless signals and may include user equipment (UE), a mobile station, a fixed or mobile subscriber unit, a subscription-based unit, a pager, a cellular phone, a personal digital assistant (PDA), a smart phone, a laptop, a netbook, a personal computer, a wireless sensor, a hotspot or Mi-Fi device, an Internet of Things (IoT) device, a watch or other wearable device, a head-mounted display (HMD), a vehicle, a drone, medical devices and applications (e.g., remote surgery), industrial devices and applications (e.g., robots and / or other wireless devices operating in an industrial and / or automated process chain environment), a consumer electronic device, a device operating on a commercial and / or industrial wireless network, etc. Any of the WTRUs 102a, 102b, 102c, and 102d may be interchangeably referred to as a UE.

[0037] The communication system 100 may also include a base station 114a and / or a base station 114b. Each of the base stations 114a, 114b may be any type of device that is configured to wirelessly interface with at least one of the WTRUs 102a, 102b, 102c, 102d to facilitate access to one or more communication networks, such as the CN 106 / 115, the Internet 110, and / or other networks 112. By way of example, the base stations 114a, 114b may be a base transceiver station (BTS), a Node B, an eNode B, a Home Node B, a Home eNode B, a gNB, an NR Node B, a site controller, an access point (AP), a wireless router, and the like. While the base stations 114a, 114b are each depicted as a single element, it will be appreciated that the base stations 114a, 114b may include any number of interconnected base stations and / or network elements.

[0038] The base station 114a may be part of the RAN 104 / 113, which may also include other base stations and / or network elements (not shown), such as a base station controller (BSC), a radio network controller (RNC), a relay node, etc. The base station 114a and / or the base station 114b may be configured to transmit and / or receive wireless signals on one or more carrier frequencies (which may be referred to as cells (not shown)). These frequencies may be in a licensed spectrum, an unlicensed spectrum, or a combination of licensed and unlicensed spectrums. A cell may provide coverage of wireless services to a specific geographic area, which may be relatively fixed or may change over time. The cell may be further divided into cell sectors. For example, a cell associated with the base station 114a may be divided into three sectors. Therefore, in one embodiment, the base station 114a may include three transceivers, i.e., one transceiver for each sector of the cell. In one embodiment, the base station 114a may employ multiple-input multiple-output (MIMO) technology and may utilize multiple transceivers for each sector of the cell. For example, beamforming may be used to transmit and / or receive signals in a desired spatial direction.

[0039] The base stations 114a, 114b may communicate with one or more of the WTRUs 102a, 102b, 102c, 102d over an air interface 116, which may be any suitable wireless communication link (e.g., radio frequency (RF), microwave, centimeter wave, micrometer wave, infrared (IR), ultraviolet (UV), visible light, etc.). The air interface 116 may be established using any suitable radio access technology (RAT).

[0040] More specifically, as noted above, the communication system 100 may be a multiple access system and may employ one or more channel access schemes such as CDMA, TDMA, FDMA, OFDMA, SC-FDMA, etc. For example, the base station 114a in the RAN 104 / 113 and the WTRUs 102a, 102b, 102c may implement a radio technology such as Universal Mobile Telecommunications System (UMTS) Terrestrial Radio Access (UTRA), which may use Wideband CDMA (WCDMA) to establish the air interface 115 / 116 / 117. WCDMA may include communication protocols such as High Speed ​​Packet Access (HSPA) and / or Evolved HSPA (HSPA+). HSPA may include High Speed ​​Downlink (DL) Packet Access (HSDPA) and / or High Speed ​​UL Packet Access (HSUPA).

[0041] In one embodiment, the base station 114a and the WTRUs 102a, 102b, 102c may implement a radio technology such as Evolved UMTS Terrestrial Radio Access (E-UTRA), which may establish the air interface 116 using Long Term Evolution (LTE) and / or Advanced LTE (LTE-A) and / or Advanced LTE Pro (LTE-A Pro).

[0042] In one embodiment, the base station 114a and the WTRUs 102a, 102b, 102c may implement a radio technology such as NR radio access, which may establish the air interface 116 using New Radio (NR).

[0043] In one embodiment, the base station 114a and the WTRUs 102a, 102b, 102c may implement multiple radio access technologies. For example, the base station 114a and the WTRUs 102a, 102b, 102c may implement LTE radio access and NR radio access together, for example using dual connectivity (DC) principles. Thus, the air interface used by the WTRUs 102a, 102b, 102c may be characterized by multiple types of radio access technologies and / or transmissions sent to / from multiple types of base stations (e.g., eNBs and gNBs).

[0044] In other embodiments, the base station 114a and the WTRUs 102a, 102b, 102c may implement radio technologies such as IEEE 802.11 (i.e., Wireless Fidelity (WiFi)), IEEE 802.16 (i.e., Worldwide Interoperability for Microwave Access (WiMAX)), CDMA2000, CDMA2000 1X, CDMA2000 EV-DO, Interim Standard 2000 (IS-2000), Interim Standard 95 (IS-95), Interim Standard 856 (IS-856), Global System for Mobile Communications (GSM), GSM Enhanced Data Rates for Evolution (EDGE), GSM EDGE (GERAN), etc.

[0045] Figure 1A The base station 114b in the may be, for example, a wireless router, a Home NodeB, a Home eNodeB, or an access point, and may utilize any suitable RAT to facilitate wireless connectivity in a local area, such as a business location, a home, a vehicle, a campus, an industrial facility, an air corridor (e.g., for use by drones), a road, and the like. In one embodiment, the base station 114b and the WTRUs 102c, 102d may implement a radio technology such as IEEE 802.11 to establish a wireless local area network (WLAN). In one embodiment, the base station 114b and the WTRUs 102c, 102d may implement a radio technology such as IEEE 802.15 to establish a wireless personal area network (WPAN). In yet another embodiment, the base station 114b and the WTRUs 102c, 102d may utilize a cellular-based RAT (e.g., WCDMA, CDMA2000, GSM, LTE, LTE-A, LTE-A Pro, NR, etc.) to establish a picocell or a femtocell. As Figure 1A As shown, base station 114b may have a direct connection to Internet 110. Therefore, base station 114b may not need to access Internet 110 via CN 106 / 115.

[0046] The RAN 104 / 113 may be in communication with the CN 106 / 115, which may be any type of network configured to provide voice, data, applications and / or Voice over Internet Protocol (VoIP) services to one or more of the WTRUs 102a, 102b, 102c, 102d. The data may have different quality of service (QoS) requirements, such as different throughput requirements, delay requirements, error tolerance requirements, reliability requirements, data throughput requirements, mobility requirements, etc. The CN 106 / 115 may provide call control, billing services, mobile location-based services, prepaid calling, Internet connectivity, video distribution, etc., and / or perform high-level security functions, such as user authentication. Although not described in detail in the specification, the CN 106 / 115 may be configured to provide voice, data, applications and / or Voice over Internet Protocol (VoIP) services to one or more of the WTRUs 102a, 102b, 102c, 102d. Figure 1AAlthough not shown in the figure, it will be appreciated that the RAN 104 / 113 and / or the CN 106 / 115 may be in direct or indirect communication with other RANs that employ the same RAT as the RAN 104 / 113 or a different RAT. For example, in addition to being connected to the RAN 104 / 113, which may utilize NR radio technology, the CN 106 / 115 may also be in communication with another RAN (not shown) that employs GSM, UMTS, CDMA2000, WiMAX, E-UTRA, or WiFi radio technology.

[0047] The CN 106 / 115 may also act as a gateway for the WTRUs 102a, 102b, 102c, 102d to access the PSTN 108, the Internet 110, and / or other networks 112. The PSTN 108 may include a circuit-switched telephone network that provides plain old telephone service (POTS). The Internet 110 may include a global system of interconnected computer networks and devices that use common communication protocols, such as the Transmission Control Protocol (TCP), the User Datagram Protocol (UDP), and / or the Internet Protocol (IP) in the TCP / IP Internet protocol suite. The networks 112 may include wired and / or wireless communication networks owned and / or operated by other service providers. For example, the networks 112 may include another CN connected to one or more RANs, which may employ the same RAT as the RAN 104 / 113 or a different RAT.

[0048] Some or all of the WTRUs 102a, 102b, 102c, 102d in the communication system 100 may include multi-mode capabilities (e.g., the WTRUs 102a, 102b, 102c, 102d may include multiple transceivers for communicating with different wireless networks via different wireless links). Figure 1A The illustrated WTRU 102c may be configured to communicate with the base station 114a, which may employ a cellular-based radio technology, and with the base station 114b, which may employ an IEEE 802 radio technology.

[0049] Figure 1B is a system diagram illustrating an exemplary WTRU 102. Figure 1B As shown, the WTRU 102 may include, among other things, a processor 118, a transceiver 120, a transmit / receive element 122, a speaker / microphone 124, a keypad 126, a display / touchpad 128, non-removable memory 130, removable memory 132, a power source 134, a global positioning system (GPS) chipset 136, and / or other peripherals 138. It will be appreciated that the WTRU 102 may include any subcombination of the foregoing elements while remaining consistent with an embodiment.

[0050] The processor 118 may be a general purpose processor, a special purpose processor, a conventional processor, a digital signal processor (DSP), a plurality of microprocessors, one or more microprocessors associated with a DSP core, a controller, a microcontroller, an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) circuit, any other type of integrated circuit (IC), a state machine, etc. The processor 118 may perform signal coding, data processing, power control, input / output processing, and / or any other functions that enable the WTRU 102 to operate in a wireless environment. The processor 118 may be coupled to the transceiver 120, which may be coupled to the transmit / receive element 122. Although Figure 1B The processor 118 and the transceiver 120 are depicted as separate components, but it is understood that the processor 118 and the transceiver 120 may be integrated together in an electronic package or chip.

[0051] The transmit / receive element 122 may be configured to transmit signals to or receive signals from a base station (e.g., base station 114a) via an air interface 116. For example, in one embodiment, the transmit / receive element 122 may be an antenna configured to transmit and / or receive RF signals. In one embodiment, the transmit / receive element 122 may be a transmitter / detector configured to transmit and / or receive, for example, IR, UV, or visible light signals. In yet another embodiment, the transmit / receive element 122 may be configured to transmit and / or receive RF and light signals. It should be appreciated that the transmit / receive element 122 may be configured to transmit and / or receive any combination of wireless signals.

[0052] Although the transmit / receive element 122 is Figure 1B 1 as a single element, the WTRU 102 may include any number of transmit / receive elements 122. More specifically, the WTRU 102 may employ MIMO technology. Thus, in one embodiment, the WTRU 102 may include two or more transmit / receive elements 122 (e.g., multiple antennas) for transmitting and receiving wireless signals over the air interface 116.

[0053] The transceiver 120 may be configured to modulate signals to be transmitted by the transmit / receive element 122 and to demodulate signals received by the transmit / receive element 122. As noted above, the WTRU 102 may have multi-mode capabilities. Thus, the transceiver 120 may include multiple transceivers to enable the WTRU 102 to communicate via multiple RATs, such as NR and IEEE 802.11.

[0054] The processor 118 of the WTRU 102 may be coupled to a speaker / microphone 124, a keypad 126, and / or a display / touchpad 128 (e.g., a liquid crystal display (LCD) display unit or an organic light emitting diode (OLED) display unit) and may receive user input data therefrom. The processor 118 may also output user data to the speaker / microphone 124, the keypad 126, and / or the display / touchpad 128. In addition, the processor 118 may access information from and store data in any type of suitable memory, such as a non-removable memory 130 and / or a removable memory 132. The non-removable memory 130 may include a random access memory (RAM), a read-only memory (ROM), a hard disk, or any other type of memory storage device. The removable memory 132 may include a subscriber identity module (SIM) card, a memory stick, a secure digital (SD) memory card, and the like. In other embodiments, the processor 118 may access information from and store data in a memory that is not physically located on the WTRU 102, such as on a server or a home computer (not shown).

[0055] The processor 118 may receive power from the power source 134, and may be configured to distribute and / or control power to other components in the WTRU 102. The power source 134 may be any suitable device for powering the WTRU 102. For example, the power source 134 may include one or more dry cell batteries (e.g., nickel-cadmium (NiCd), nickel-zinc (NiZn), nickel-metal hydride (NiMH), lithium-ion (Li-ion), etc.), solar cells, fuel cells, etc.

[0056] The processor 118 may also be coupled to the GPS chipset 136, which may be configured to provide location information (e.g., longitude and latitude) regarding the current location of the WTRU 102. In addition to or in lieu of the information from the GPS chipset 136, the WTRU 102 may receive location information from a base station (e.g., base stations 114a, 114b) over the air interface 116 and / or determine its location based on the timing of signals received from two or more nearby base stations. It will be appreciated that the WTRU 102 may acquire location information by any suitable location-determination method while remaining consistent with an embodiment.

[0057] The processor 118 may also be coupled to other peripherals 138, which may include one or more software modules and / or hardware modules that provide additional features, functionality, and / or wired or wireless connectivity. For example, the peripherals 138 may include an accelerometer, an electronic compass, a satellite transceiver, a digital camera (for photos and / or video), a universal serial bus (USB) port, a vibration device, a television transceiver, a hands-free headset, module, a frequency modulation (FM) radio unit, a digital music player, a media player, a video game player module, an Internet browser, a virtual reality and / or augmented reality (VR / AR) device, an activity tracker, etc. The peripheral device 138 may include one or more sensors, which may be one or more of the following: a gyroscope, an accelerometer, a Hall effect sensor, a magnetometer, an orientation sensor, a proximity sensor, a temperature sensor, a time sensor; a geolocation sensor; an altimeter, a light sensor, a touch sensor, a magnetometer, a barometer, a gesture sensor, a biometric sensor, and / or a humidity sensor.

[0058] The WTRU 102 may include a full-duplex radio for which transmission and reception of some or all signals (e.g., associated with specific subframes for UL (e.g., for transmission) and downlink (e.g., for reception)) may be concurrent and / or simultaneous. The full-duplex radio may include an interference management unit for reducing and / or substantially eliminating self-interference via hardware (e.g., choke) or via signal processing performed by a processor (e.g., a separate processor (not shown) or via the processor 118). In one embodiment, the WTRU 102 may include a full-duplex radio for which transmission and reception of some or all signals (e.g., associated with specific subframes for UL (e.g., for transmission) and downlink (e.g., for reception)) may be concurrent and / or simultaneous.

[0059] Figure 1C 1 is a system diagram illustrating the RAN 104 and the CN 106 according to one embodiment. As described above, the RAN 104 may employ an E-UTRA radio technology to communicate with the WTRUs 102a, 102b, 102c over the air interface 116. The RAN 104 may also be in communication with the CN 106.

[0060] The RAN 104 may include evolved Node-Bs 160a, 160b, 160c, though it will be appreciated that the RAN 104 may include any number of evolved Node-Bs while remaining consistent with an embodiment. The evolved Node-Bs 160a, 160b, 160c may each include one or more transceivers for communicating with the WTRUs 102a, 102b, 102c over the air interface 116. In one embodiment, the evolved Node-Bs 160a, 160b, 160c may implement MIMO technology. Thus, the evolved Node-B 160a, for example, may use multiple antennas to transmit wireless signals to and / or receive wireless signals from the WTRU 102a.

[0061] Each of the evolved Node Bs 160a, 160b, 160c may be associated with a particular cell (not shown) and may be configured to handle radio resource management decisions, handover decisions, scheduling of users in the UL and / or DL, etc. Figure 1C As shown, the eNode-Bs 160a, 160b, 160c may communicate with one another via an X2 interface.

[0062] Figure 1C The illustrated CN 106 may include a mobility management entity (MME) 162, a serving gateway (SGW) 164, and a packet data network (PDN) gateway (or PGW) 166. While each of the foregoing elements is depicted as being part of the CN 106, it should be understood that any of these elements may be owned and / or operated by an entity other than a CN operator.

[0063] The MME 162 may be connected to each of the evolved Node-Bs 162a, 162b, 162c in the RAN 104 via an S1 interface and may serve as a control node. For example, the MME 162 may be responsible for authenticating users of the WTRUs 102a, 102b, 102c, bearer activation / deactivation, selecting a particular serving gateway during an initial attach of the WTRUs 102a, 102b, 102c, etc. The MME 162 may provide a control plane function for switching between the RAN 104 and other RANs (not shown) that employ other radio technologies, such as GSM and / or WCDMA.

[0064] The SGW 164 may be connected to each of the evolved Node-Bs 160a, 160b, 160c in the RAN 104 via an S1 interface. The SGW 164 may generally route and forward user data packets to / from the WTRUs 102a, 102b, 102c. The SGW 164 may perform other functions, such as anchoring the user plane during inter-evolved Node-B handovers, triggering paging when DL data is available for the WTRUs 102a, 102b, 102c, managing and storing the context of the WTRUs 102a, 102b, 102c, and the like.

[0065] The SGW 164 may be connected to the PGW 166, which may provide the WTRUs 102a, 102b, 102c with access to packet-switched networks, such as the Internet 110, to facilitate communications between the WTRUs 102a, 102b, 102c and IP-enabled devices.

[0066] The CN 106 may facilitate communications with other networks. For example, the CN 106 may provide the WTRUs 102a, 102b, 102c with access to circuit-switched networks, such as the PSTN 108, to facilitate communications between the WTRUs 102a, 102b, 102c and traditional land-line communications devices. For example, the CN 106 may include, or may be in communication with, an IP gateway (e.g., an IP Multimedia Subsystem (IMS) server) that serves as an interface between the CN 106 and the PSTN 108. In addition, the CN 106 may provide the WTRUs 102a, 102b, 102c with access to other networks 112, which may include other wired and / or wireless networks owned and / or operated by other service providers.

[0067] Although the WTRU Figures 1A to 1D Although described as a wireless terminal, it is contemplated that in certain representative embodiments, such a terminal may (eg, temporarily or permanently) use a wired communications interface with a communications network.

[0068] In a representative embodiment, the other network 112 may be a WLAN.

[0069] A WLAN in infrastructure basic service set (BSS) mode may have an access point (AP) for a BSS and one or more stations (STAs) associated with the AP. The AP may have access or an interface to a distribution system (DS) or another type of wired / wireless network that carries traffic to and / or carries traffic away from the BSS. Traffic originating from outside the BSS and leading to the STA may be reached by the AP and may be delivered to the STA. Traffic originating from the STA and leading to a destination outside the BSS may be sent to the AP to be delivered to the corresponding destination. Traffic between STAs within the BSS may be sent by the AP, for example, wherein the source STA may send traffic to the AP, and the AP may deliver the traffic to the destination STA. Traffic between STAs within the BSS may be considered and / or referred to as point-to-point traffic. Point-to-point traffic may be sent between the source and destination STAs (e.g., directly between them) using a direct link setup (DLS). In certain representative embodiments, the DLS may use 802.11e DLS or 802.11z tunnel DLS (TDLS). A WLAN using an independent BSS (IBSS) mode may not have an AP, and STAs (eg, all STAs) within or using the IBSS may communicate directly with each other. The IBSS communication mode may sometimes be referred to herein as an "ad-hoc" communication mode.

[0070] When using the 802.11ac infrastructure operating mode or a similar operating mode, the AP may transmit a beacon on a fixed channel (such as a primary channel). The primary channel may be a fixed width (e.g., a 20 MHz wide bandwidth) or a width dynamically set via signaling. The primary channel may be an operating channel of the BSS and may be used by the STA to establish a connection with the AP. In certain representative embodiments, carrier sense multiple access / collision avoidance (CSMA / CA) may be implemented, for example, in an 802.11 system. For CSMA / CA, a STA (e.g., each STA) (including the AP) may sense the primary channel. If the primary channel is sensed / detected and / or determined to be busy by a particular STA, the particular STA may back off. One STA (e.g., only one station) may transmit at any given time in a given BSS.

[0071] High throughput (HT) STAs may communicate using a 40 MHz wide channel, for example, via a combination of a primary 20 MHz channel and adjacent or non-adjacent 20 MHz channels to form a 40 MHz wide channel.

[0072] Very high throughput (VHT) STA can support 20MHz, 40MHz, 80MHz and / or 160MHz wide channels. 40MHz and / or 80MHz channels can be formed by combining continuous 20MHz channels. A 160MHz channel can be formed by combining 8 continuous 20MHz channels, or by combining two non-continuous 80MHz channels (this can be called 80+80 configuration). For the 80+80 configuration, after channel coding, the data can pass through a segment parser that can divide the data into two streams. Each stream can be processed by inverse fast Fourier transform (IFFT) and time domain processing separately. These streams can be mapped to two 80MHz channels, and data can be transmitted by transmitting STA. At the receiver of the receiving STA, the above-mentioned operation for the 80+80 configuration can be reversed, and the combined data can be sent to the medium access control (MAC).

[0073] 802.11af and 802.11ah support operating modes below 1GHz. Channel operating bandwidths and carriers are reduced in 802.11af and 802.11ah relative to those used in 802.11n and 802.11ac. 802.11af supports 5MHz, 10MHz, and 20MHz bandwidths in the TV White Space (TVWS) spectrum, and 802.11ah supports 1MHz, 2MHz, 4MHz, 8MHz, and 16MHz bandwidths using non-TVWS spectrum. According to a representative embodiment, 802.11ah may support instrument type control / machine type communications, such as MTC devices in macro coverage areas. MTC devices may have certain capabilities, such as limited capabilities, including support for (e.g., only support for) certain bandwidths and / or limited bandwidths. MTC devices may include batteries with battery life above a threshold (e.g., to maintain very long battery life).

[0074] WLAN systems that can support multiple channels and channel bandwidths such as 802.11n, 802.11ac, 802.11af, and 802.11ah include channels that can be designated as primary channels. The primary channel may have a bandwidth equal to the maximum common operating bandwidth supported by all STAs in the BSS. The bandwidth of the primary channel may be set and / or limited by a STA (which supports the minimum bandwidth operating mode) from all STAs operating in the BSS. In the example of 802.11ah, for STAs (e.g., MTC-type devices) that support (e.g., only support) 1MHz mode, the primary channel may be 1MHz wide, even if the AP and other STAs in the BSS support 2MHz, 4MHz, 8MHz, 16MHz, and / or other channel bandwidth operating modes. Carrier sensing and / or network allocation vector (NAV) settings may depend on the state of the primary channel. If the primary channel is busy, for example, because a STA (supporting only the 1MHz operating mode) is transmitting to the AP, the entire available frequency band may be considered busy even if most of the frequency bands remain idle and may be available.

[0075] In the United States, the available frequency band for 802.11ah is 902MHz to 928MHz. In South Korea, the available frequency band is 917.5MHz to 923.5MHz. In Japan, the available frequency band is 916.5MHz to 927.5MHz. The total bandwidth available for 802.11ah is 6MHz to 26MHz, depending on the country code.

[0076] Figure 1D 1 is a system diagram showing the RAN 113 and the CN 115 according to one embodiment. As noted above, the RAN 113 may employ NR radio technology to communicate with the WTRUs 102a, 102b, 102c over the air interface 116. The RAN 113 may also be in communication with the CN 115.

[0077] The RAN 113 may include gNBs 180a, 180b, 180c, though it will be appreciated that the RAN 113 may include any number of gNBs while remaining consistent with an embodiment. The gNBs 180a, 180b, 180c may each include one or more transceivers to communicate with the WTRUs 102a, 102b, 102c over the air interface 116. In one embodiment, the gNBs 180a, 180b, 180c may implement MIMO technology. For example, the gNBs 180a, 180b may utilize beamforming to transmit signals to and / or receive signals from the gNBs 180a, 180b, 180c. Thus, the gNB 180a may, for example, use multiple antennas to transmit wireless signals to and / or receive wireless signals from the WTRU 102a. In one embodiment, the gNBs 180a, 180b, 180c may implement carrier aggregation techniques. For example, the gNB 180a may transmit multiple component carriers to the WTRU 102a (not shown). A subset of these component carriers may be on unlicensed spectrum, while the remaining component carriers may be on licensed spectrum. In one embodiment, the gNBs 180a, 180b, 180c may implement coordinated multi-point (CoMP) techniques. For example, the WTRU 102a may receive coordinated transmissions from gNB 180a and gNB 180b (and / or gNB 180c).

[0078] The WTRUs 102a, 102b, 102c may communicate with the gNBs 180a, 180b, 180c using transmissions associated with scalable parameter sets. For example, OFDM symbol spacing and / or OFDM subcarrier spacing may vary for different transmissions, different cells, and / or different portions of the wireless transmission spectrum. The WTRUs 102a, 102b, 102c may communicate with the gNBs 180a, 180b, 180c using subframes or transmission time intervals (TTIs) of varying or scalable lengths (e.g., containing different numbers of OFDM symbols and / or continuously varying absolute time lengths).

[0079] The gNBs 180a, 180b, 180c may be configured to communicate with the WTRUs 102a, 102b, 102c in a standalone configuration and / or a non-standalone configuration. In a standalone configuration, the WTRUs 102a, 102b, 102c may communicate with the gNBs 180a, 180b, 180c while also not accessing other RANs (e.g., such as the eNodeBs 160a, 160b, 160c). In a standalone configuration, the WTRUs 102a, 102b, 102c may use one or more of the gNBs 180a, 180b, 180c as mobility anchor points. In a standalone configuration, the WTRUs 102a, 102b, 102c may communicate with the gNBs 180a, 180b, 180c using signals in an unlicensed band. In a non-standalone configuration, the WTRUs 102a, 102b, 102c may communicate or connect with the gNBs 180a, 180b, 180c while also communicating or connecting with other RANs, such as the eNode-Bs 160a, 160b, 160c. For example, the WTRUs 102a, 102b, 102c may implement the DC principle to communicate with one or more gNBs 180a, 180b, 180c and one or more evolved Node-Bs 160a, 160b, 160c substantially simultaneously. In a non-standalone configuration, the evolved Node-Bs 160a, 160b, 160c may serve as mobility anchors for the WTRUs 102a, 102b, 102c, and the gNBs 180a, 180b, 180c may provide additional coverage and / or throughput for serving the WTRUs 102a, 102b, 102c.

[0080] Each of the gNBs 180a, 180b, 180c may be associated with a particular cell (not shown) and may be configured to handle radio resource management decisions, handover decisions, scheduling of users in UL and / or DL, support of network slicing, dual connectivity, interworking between NR and E-UTRA, routing of user plane data towards a user plane function (UPF) 184a, 184b, routing of control plane information towards an access and mobility management function (AMF) 182a, 182b, etc. Figure 1D As shown, gNBs 180a, 180b, and 180c may communicate with each other via an Xn interface.

[0081] Figure 1DThe CN 115 shown may include at least one AMF 182a, 182b, at least one UPF 184a, 184b, at least one session management function (SMF) 183a, 183b, and possible data networks (DNs) 185a, 185b. Although each of the foregoing elements is depicted as part of the CN 115, it should be understood that any of these elements may be owned and / or operated by an entity other than the CN operator.

[0082] The AMF 182a, 182b may be connected to one or more of the gNBs 180a, 180b, 180c via the N2 interface in the RAN 113 and may serve as a control node. For example, the AMF 182a, 182b may be responsible for authenticating users of the WTRU 102a, 102b, 102c, support of network slicing (e.g., handling of different PDU sessions with different requirements), selecting a specific SMF 183a, 183b, management of registration areas, termination of NAS signaling, mobility management, etc. The AMF 182a, 182b may use network slicing in order to customize CN support for the WTRU 102a, 102b, 102c based on the type of services used by the WTRU 102a, 102b, 102c. For example, different network slices may be established for different use cases, such as services relying on ultra-reliable low latency (URLLC) access, services relying on enhanced mobile broadband (eMBB) access, services for machine type communication (MTC) access, etc. The AMF 162 may provide a control plane function for switching between the RAN 113 and other RANs (not shown) that employ other radio technologies, such as LTE, LTE-A, LTE-A Pro, and / or non-3GPP access technologies, such as WiFi.

[0083] The SMF 183a, 183b may be connected to the AMF 182a, 182b in the CN 115 via the N11 interface. The SMF 183a, 183b may also be connected to the UPF 184a, 184b in the CN 115 via the N4 interface. The SMF 183a, 183b may select and control the UPF 184a, 184b, and configure traffic routing through the UPF 184a, 184b. The SMF 183a, 183b may perform other functions such as managing and allocating UE IP addresses, managing PDU sessions, controlling policy enforcement and QoS, providing downlink data notification, etc. The PDU session type may be IP-based, non-IP-based, Ethernet-based, etc.

[0084] The UPF 184a, 184b may be connected to one or more of the gNBs 180a, 180b, 180c in the RAN 113 via the N3 interface, which may provide the WTRUs 102a, 102b, 102c with access to packet-switched networks, such as the Internet 110, to facilitate communications between the WTRUs 102a, 102b, 102c and IP-enabled devices. The UPF 184, 184b may perform other functions, such as routing and forwarding packets, enforcing user plane policies, supporting multi-homed PDU sessions, handling user plane QoS, buffering downlink packets, providing mobility anchoring, etc.

[0085] The CN 115 may facilitate communications with other networks. For example, the CN 115 may include or may communicate with an IP gateway (e.g., an IP Multimedia Subsystem (IMS) server) that serves as an interface between the CN 115 and the PSTN 108. In addition, the CN 115 may provide the WTRUs 102a, 102b, 102c with access to other networks 112, which may include other wired and / or wireless networks owned and / or operated by other service providers. In one embodiment, the WTRUs 102a, 102b, 102c may be connected to local data networks (DNs) 185a, 185b via the UPF 184a, 184b via an N3 interface to the UPF 184a, 184b and an N6 interface between the UPF 184a, 184b and the DN 185a, 185b.

[0086] Given that Figures 1A to 1D as well as Figures 1A to 1D Corresponding to the description of the present invention, one or more or all of the functions described herein with reference to one or more of the following may be performed by one or more simulation devices (not shown): WTRU102a-d, base station 114a-b, evolved Node B 160a-c, MME 162, SGW 164, PGW 166, gNB 180a-c, AMF182a-b, UPF 184a-b, SMF 183a-b, DN 185a-b and / or any other device described herein. The simulation device may be one or more devices configured to emulate one or more or all of the functions described herein. For example, the simulation device may be used to test other devices and / or simulate network and / or WTRU functions.

[0087] The simulation device may be designed to implement one or more tests of other devices in a laboratory environment and / or an operator network environment. For example, the one or more simulation devices may perform one or more or all functions while being fully or partially implemented and / or deployed as part of a wired and / or wireless communication network in order to test other devices within the communication network. The one or more simulation devices may perform one or more functions or all functions while being temporarily implemented / deployed as part of a wired and / or wireless communication network. The simulation device may be directly coupled to another device for testing purposes and / or may use over-the-air wireless communications to perform testing.

[0088] The one or more simulation devices may perform one or more (including all) functions without being implemented / deployed as part of a wired and / or wireless communication network. For example, the simulation device may be used in a test scenario in a test lab and / or a non-deployed (e.g., testing) wired and / or wireless communication network to implement testing of one or more components. The one or more simulation devices may be test equipment. Direct RF coupling and / or wireless communication via RF circuits (e.g., which may include one or more antennas) may be used by the simulation device to transmit and / or receive data.

[0089] The present application describes a number of aspects, including tools, features, examples, models, methods, etc. Many of these aspects are described in a particular manner, and at least in order to illustrate individual features, are usually described in a manner that may sound restrictive. However, this is to describe clearly and does not limit the application or scope of these aspects. In fact, all different aspects can be combined and interchanged to provide further aspects. In addition, these aspects can also be combined and interchanged with the aspects described in the earlier submission.

[0090] The aspects described and contemplated in this application can be implemented in many different forms. Figures 5 to 11B Some examples may be provided, but others are also contemplated. Figures 5 to 11B The discussion of the present invention does not limit the breadth of specific implementations. At least one of these aspects generally relates to video encoding and decoding, and at least one other aspect generally relates to transmitting a generated or encoded bitstream. These and other aspects may be implemented as methods, apparatus, a computer-readable storage medium having stored thereon instructions for encoding or decoding video data according to any of the methods described, and / or a computer-readable storage medium having stored thereon a bitstream generated according to any of the methods described.

[0091] In this application, the terms "reconstructed" and "decoded" are used interchangeably, the terms "pixel" and "sample" are used interchangeably, and the terms "image", "picture" and "frame" are used interchangeably.

[0092] Various methods are described herein, and each method in these methods includes one or more steps or actions for realizing the method.Unless the correct operation of the method requires the steps or actions of a specific order, otherwise the order and / or use of specific steps and / or actions can be modified or combined.In addition, in various examples, terms such as "first", "second" can be used for modifying elements, parts, steps, operations, etc., such as "first decoding" and "second decoding".Unless specifically required, otherwise using such terms does not mean that the modified operation is sorted.Therefore, in this example, the first decoding does not need to be performed before the second decoding, and can, for example, occur before the second decoding, at the second decoding device or in the time period overlapping with the second decoding.

[0093] Various methods and other aspects described in this application may be used to modify modules (eg, decoding modules) of the video encoder 100 and the decoder 200, such as Figure 2 and Figure 3 In addition, the subject matter disclosed herein can be applied to, for example, any type, format, or version of video coding (whether described in a standard or described in a recommendation), whether pre-existing or developed in the future, as well as extensions of any such standards and recommendations. Unless otherwise indicated or technically excluded, the aspects described in this application can be used alone or in combination.

[0094] Various values ​​are used in the examples described in this application, such as the maximum allowed size of the merge list is 6, 4×4 luminance sub-blocks, 4×4 chrominance sub-blocks, 1 / 16 fractional precision, 4-parameter affine model, 6-parameter affine model, etc. These and other specific values ​​are used for the purpose of describing the examples, and the aspects described are not limited to these specific values. These and other specific values ​​are used to describe the examples, and the aspects described are not limited to these specific values.

[0095] Figure 2 is a schematic diagram illustrating an exemplary video encoder. Variations of the exemplary encoder 200 are contemplated, but the following describes encoder 200 for clarity without describing all contemplated variations.

[0096] Prior to encoding, the video sequence may undergo pre-encoding processing (201), such as applying a color transform to an input color picture (e.g., conversion from RGB 4:4:4 to YCbCr 4:2:0), or performing a remapping of input picture components in order to obtain a signal distribution that is more resilient to compression (e.g., using histogram equalization of one of the color components). Metadata may be associated with the pre-processing and appended to the bitstream.

[0097] In encoder 200, a picture is encoded by encoder elements as described below. The picture to be encoded is partitioned (202) and processed in units such as coding units (CUs). For example, each unit is encoded using intra mode or inter mode. When the unit is encoded in intra mode, it performs intra prediction (260). In inter mode, motion estimation (275) and compensation (270) are performed. The encoder decides (205) which of intra mode or inter mode is used to encode the unit, and indicates the intra / inter decision by, for example, a prediction mode flag. For example, a prediction residual is calculated by subtracting (210) the prediction block from the original image block.

[0098] The prediction residual is then transformed (225) and quantized (230). The quantized transform coefficients, along with motion vectors and other syntax elements, are entropy encoded (245) to output a bitstream. The encoder may skip the transform and apply quantization directly to the untransformed residual signal. The encoder may bypass both the transform and quantization, i.e., directly encode the residual without applying the transform or quantization process.

[0099] The encoder decodes the coded block to provide a reference for further prediction. The quantized transform coefficients are dequantized (240) and inverse transformed (250) to decode the prediction residual. The decoded prediction residual and the prediction block are combined (255) to reconstruct the image block. A loop filter (265) is applied to the reconstructed picture to perform, for example, deblocking / SAO (sample adaptive offset) filtering to reduce coding artifacts. The filtered picture is stored in a reference picture buffer (280).

[0100] Figure 3 300 is a schematic diagram illustrating an example of a video decoder. In the exemplary decoder 300, a bitstream is decoded by decoder elements as described below. The video decoder 300 generally performs the same operations as described above. Figure 2 The encoding process described above is the reverse of the decoding process. Encoder 200 also typically performs video decoding as part of encoding the video data.

[0101] Specifically, the input to the decoder includes a video bitstream, which may be generated by the video encoder 200. The bitstream is first entropy decoded (330) to obtain transform coefficients, motion vectors, and other encoding information. The picture partition information indicates how the picture is partitioned. Therefore, the decoder can partition (335) the picture according to the decoded picture partition information. The transform coefficients are dequantized (340) and inverse transformed (350) to decode the prediction residual. The decoded prediction residual and the prediction block are combined (355) to reconstruct the image block. The prediction block can be obtained (370) from intra-frame prediction (360) or motion compensated prediction (i.e., inter-frame prediction) (375). A loop filter (365) is applied to the reconstructed image. The filtered image is stored in a reference picture buffer (380).

[0102] The decoded pictures may also undergo post-decoding processing (385), such as an inverse color transform (e.g., a transform from YCbCr 4:2:0 to RGB 4:4:4), or inverse remapping, which performs the inverse of the remapping process performed in the pre-encoding process (201). The post-decoding processing may use metadata derived in the pre-encoding process and signaled in the bitstream.

[0103] Figure 4 It is a schematic diagram showing an example of a system in which various aspects and examples described herein can be implemented. System 400 may be embodied as a device including various components described below and configured to perform one or more aspects of the aspects described in this document. Examples of such devices include, but are not limited to, various electronic devices, such as personal computers, laptop computers, smart phones, tablet computers, digital multimedia set-top boxes, digital television receivers, personal video recording systems, connected home appliances and servers. The elements of system 400 may be embodied in a single integrated circuit (IC), multiple ICs and / or discrete components, either individually or in combination. For example, in at least one example, the processing and encoder / decoder elements of system 400 are distributed over multiple ICs and / or discrete components. In various examples, system 400 is communicatively coupled to one or more other systems or other electronic devices via, for example, a communication bus or through a dedicated input port and / or output port. In various examples, system 400 is configured to implement one or more aspects of the aspects described in this document.

[0104] The system 400 includes at least one processor 410 configured to execute instructions loaded therein for implementing various aspects described in this document, for example. The processor 410 may include embedded memory, input-output interfaces, and various other circuits known in the art. The system 400 includes at least one memory 420 (e.g., a volatile memory device and / or a non-volatile memory device). The system 400 includes a storage device 440, which may include a non-volatile memory and / or a volatile memory, including but not limited to an electrically erasable programmable read-only memory (EEPROM), a read-only memory (ROM), a programmable read-only memory (PROM), a random access memory (RAM), a dynamic random access memory (DRAM), a static random access memory (SRAM), a flash memory, a magnetic disk drive, and / or an optical disk drive. As a non-limiting example, the storage device 440 may include an internal storage device, an attached storage device (including a removable and non-removable storage device), and / or a network-accessible storage device.

[0105] The system 400 includes an encoder / decoder module 430, which is configured to process data, for example, to provide encoded video or decoded video, and the encoder / decoder module 430 may include its own processor and memory. The encoder / decoder module 430 represents a module that can be included in a device to perform encoding functions and / or decoding functions. As is well known, a device may include one or both of an encoding module and a decoding module. In addition, the encoder / decoder module 430 may be implemented as an independent element of the system 400, or may be combined in the processor 410 as a combination of hardware and software known to those skilled in the art.

[0106] Program code to be loaded onto the processor 410 or the encoder / decoder 430 to perform various aspects described in this document may be stored in the storage device 440 and subsequently loaded onto the memory 420 for execution by the processor 410. According to various examples, one or more of the processor 410, the memory 420, the storage device 440, and the encoder / decoder module 430 may store one or more of various items during the execution of the processes described in this document. Such stored items may include, but are not limited to, input video, decoded video or portions of decoded video, bitstreams, matrices, variables, and intermediate or final results from the processing of equations, formulas, operations, and operation logic.

[0107] In some examples, memory inside the processor 410 and / or the encoder / decoder module 430 is used to store instructions and provide working memory for processing required during encoding or decoding. However, in other examples, memory external to the processing device (e.g., the processing device may be the processor 410 or the encoder / decoder module 430) is used for one or more of these functions. The external memory may be a memory 420 and / or a storage device 440, such as a dynamic volatile memory and / or a non-volatile flash memory. In several examples, the external non-volatile flash memory is used to store, for example, an operating system for a television. In at least one example, a fast external dynamic volatile memory (such as RAM) is used as working memory for video encoding and decoding operations.

[0108] As indicated at block 445, input to the elements of system 400 may be provided through various input devices. Such input devices include, but are not limited to: (i) a radio frequency (RF) section that receives an RF signal transmitted over the air, for example, by a broadcaster; (ii) a component (COMP) input terminal (or a set of COMP input terminals); (iii) a universal serial bus (USB) input terminal; and / or (iv) a high-definition multimedia interface (HDMI) input terminal. Figure 4 Other examples not shown include composite video.

[0109] In various examples, the input device of block 445 has associated corresponding input processing elements as known in the art. For example, the RF part may be associated with elements suitable for the following: (i) selecting a desired frequency (also referred to as selecting a signal, or band limiting a signal to a frequency band); (ii) down-converting the selected signal; (iii) again band-limiting to a narrower frequency band to select a signal frequency band that may be referred to as a channel in some examples; (iv) demodulating the down-converted and band-limited signal; (v) performing error correction; and (vi) demultiplexing to select a desired data packet stream. Various examples of the RF part include one or more elements for performing these functions, such as a frequency selector, a signal selector, a band limiter, a channel selector, a filter, a down-converter, a demodulator, an error corrector, and a demultiplexer. The RF part may include a tuner that performs various of these functions, including, for example, down-converting a received signal to a lower frequency (e.g., an intermediate frequency or a near-baseband frequency) or down-converting to baseband. In a set-top box example, the RF part and its associated input processing element receive the RF signal transmitted by wired (e.g., cable) medium, and perform frequency selection by filtering, down-conversion and filtering to the desired frequency band again. Various examples rearrange the order of above-mentioned (and other) elements, remove some elements in these elements, and / or add other elements that perform similar or different functions. Adding element can include inserting element between existing elements, for example, inserting amplifier and analog-to-digital converter. In various examples, the RF part includes antenna.

[0110] In addition, the USB and / or HDMI terminals may include corresponding interface processors for connecting the system 400 to other electronic devices via USB and / or HDMI connections. It should be understood that various aspects of input processing (e.g., Reed-Solomon error correction) may be implemented as needed, for example, in a separate input processing IC or in the processor 410. Similarly, various aspects of USB or HDMI interface processing may be implemented as needed, in a separate interface IC or in the processor 410. The demodulated, error-corrected, and demultiplexed streams are provided to various processing elements, including, for example, the processor 410 and the encoder / decoder 430, which operate in conjunction with memory and storage elements to process the data streams as needed for presentation on output devices.

[0111] The various components of system 400 may be disposed within an integrated housing. Within the integrated housing, the various components may be interconnected and data may be transmitted between the components using a suitable connection arrangement 425 (e.g., an internal bus known in the art, including an inter-chip (I2C) bus, wiring, and a printed circuit board).

[0112] System 400 includes a communication interface 450 that can communicate with other devices via a communication channel 460. Communication interface 450 may include, but is not limited to, a transceiver configured to transmit and receive data through communication channel 460. Communication interface 450 may include, but is not limited to, a modem or a network card, and communication channel 460 may be implemented, for example, within a wired and / or wireless medium.

[0113] In various examples, data is streamed or otherwise provided to system 400 using a wireless network such as a Wi-Fi network, for example IEEE 802.11 (IEEE refers to the Institute of Electrical and Electronics Engineers). The Wi-Fi signals of these examples are received by a communication channel 460 and a communication interface 450 suitable for Wi-Fi communication. The communication channel 460 of these examples is usually connected to an access point or a router, which provides access to an external network including the Internet to allow streaming applications and other cross-top communications. Other examples use a set-top box to provide streaming data to system 400, which is delivered by the HDMI connection of an input block 445. Some more examples use the RF connection of an input block 445 to provide streaming data to system 400. As described above, various examples provide data in a non-streaming manner. In addition, various examples use wireless networks outside Wi-Fi, such as cellular networks or Bluetooth networks.

[0114] The system 400 can provide output signals to various output devices, including a display 475, a speaker 485, and other peripherals 495. The display 475 of various examples includes, for example, one or more of a touch screen display, an organic light emitting diode (OLED) display, a curved display, and / or a foldable display. The display 475 can be used for a television, a tablet computer, a laptop computer, a mobile phone (mobile phone), or other devices. The display 475 can also be integrated with other components (e.g., as in a smart phone), or it can be separate (e.g., an external monitor for a laptop computer). In various examples of the examples, the other peripherals 495 include one or more of a stand-alone digital video disc (or digital versatile disc) (DVR, for both terms), a disc player, a stereo system, and / or a lighting system. Various examples use one or more peripherals 495 that provide functions based on the output of the system 400. For example, a disc player performs the function of playing the output of the system 400.

[0115] In various examples, control signals are transmitted between the system 400 and the display 475, speaker 485, or other peripheral device 495 using signaling such as AV.Link, consumer electronics control (CEC), or other communication protocols that enable device-to-device control with or without user intervention. Output devices may be communicatively coupled to the system 400 via dedicated connections through respective interfaces 470, 480, and 490. Alternatively, the output devices may be connected to the system 400 via a communication interface 450 using a communication channel 460. The display 475 and speaker 485 may be integrated into a single unit with other components of the system 400 in an electronic device (e.g., a television). In various examples, the display interface 470 includes a display driver, such as, for example, a timing controller (T Con) chip.

[0116] Alternatively, if the RF portion of input 445 is part of a separate set-top box, display 475 and speaker 485 may be separate from one or more of the other components. In various examples where display 475 and speaker 485 are external components, output signals may be provided via dedicated output connections including, for example, an HDMI port, a USB port, or a COMP output.

[0117] These examples may be performed by computer software implemented by the processor 410 or by hardware or by a combination of hardware and software. As a non-limiting example, these examples may be implemented by one or more integrated circuits. The memory 420 may be of any type suitable for the technical environment and, as a non-limiting example, may be implemented using any appropriate data storage technology, such as optical memory devices, magnetic memory devices, semiconductor-based memory devices, fixed memory, and removable memory. The processor 410 may be of any type suitable for the technical environment and, as a non-limiting example, may include one or more of a microprocessor, a general-purpose computer, a special-purpose computer, and a processor based on a multi-core architecture.

[0118] Various implementations involve decoding. As used in this application, "decoding" may cover, for example, all or part of a process performed on a received coded sequence to produce a final output suitable for display. In various examples, such processes include one or more of the processes typically performed by a decoder, such as entropy decoding, inverse quantization, inverse transform, and differential decoding. In various examples, such processes also include or alternatively include processes performed by decoders of various implementations described in this application, such as: performing symmetric merge mode MV decoding; generating a merge candidate list; decoding motion vectors (MVs) for motion compensated prediction (MCP); generating symmetric merge candidates for conventional inter-frame prediction and affine inter-frame prediction; generating history-based MVP (HMVP) merge candidates; performing MV correction search for dual-prediction MVs (e.g., performing decoding-side motion vector correction (DMVR); using a lookup table (LUT) to solve for affine model parameter values; and / or decoding MVPs and MV differences (MVD) indexes of MVP lists, etc.

[0119] As another example, in one example, "decoding" refers only to entropy decoding, in another example, "decoding" refers only to differential decoding, and in another example, "decoding" refers to a combination of entropy decoding and differential decoding. Whether the phrase "decoding process" specifically refers to a subset of operations or broadly refers to a broader decoding process will be clear based on the context of the specific description and is believed to be well understood by those skilled in the art.

[0120] Various implementations involve encoding. In a manner similar to the discussion above about "decoding", "encoding" as used in this application may cover, for example, all or part of the processes performed on an input video sequence to produce an encoded bitstream. In various examples, such processes include one or more of the processes typically performed by an encoder, such as partitioning, differential coding, transforming, quantization, and entropy coding. In various examples, such processes also include or alternatively include processes performed by decoders of various implementations described in this application, such as: performing symmetric merge mode MV decoding; generating a merge candidate list; decoding motion vectors (MVs) for motion compensated prediction (MCP); generating symmetric merge candidates for conventional inter-frame prediction and affine inter-frame prediction; generating history-based MVP (HMVP) merge candidates; performing MV correction search for dual-prediction MVs; using a lookup table (LUT) to solve for affine model parameter values; and / or decoding MVPs and MV differences (MVDs) The index of the MVP list, etc.

[0121] As another example, in one example, "decoding" refers only to entropy decoding, in another example, "decoding" refers only to differential decoding, and in another example, "decoding" refers to a combination of differential decoding and entropy decoding. Whether the phrase "encoding process" specifically refers to a subset of operations or broadly refers to a broader encoding process will be clear based on the context of the specific description and is believed to be well understood by those skilled in the art.

[0122] Note that the syntax elements used herein, such as coding syntax for merge mode (e.g., merge_flag and merge_index), coding syntax for affine merge mode (e.g., merge_subblock_flag and / or merge_subblock_index), etc., are descriptive terms. Therefore, they do not exclude the use of other syntax element names.

[0123] When the figures are presented in the form of flow charts, it should be understood that the figures also provide block diagrams of corresponding devices. Similarly, when the figures are presented in the form of block diagrams, it should be understood that the figures also provide flow charts of corresponding methods / processes.

[0124] Various examples relate to rate-distortion optimization. Specifically, during the encoding process, a balance or trade-off between rate and distortion is often considered, which often takes into account constraints on computational complexity. Rate-distortion optimization is generally expressed as minimizing a rate-distortion function, which is a weighted sum of rate and distortion. There are different methods to solve the rate-distortion optimization problem. For example, these methods can be based on extensive testing of all coding options (including all considered modes or coding parameter values) and a complete evaluation of their coding costs and the associated distortion of the reconstructed signal after encoding and decoding. Faster methods can also be used to save coding complexity, in particular, to calculate approximate distortion based on predictions or prediction residual signals rather than reconstructed residual signals. A mixture of these two methods can also be used, such as by using approximate distortion for only some of the possible coding options and using full distortion for other coding options. Other methods only evaluate a subset of possible coding options. More generally, many methods use any of a variety of techniques to perform optimization, but the optimization is not necessarily a complete evaluation of both coding costs and associated distortions.

[0125] The specific implementations and aspects described herein may be implemented in, for example, methods or processes, devices, software programs, data streams, or signals. Even if only discussed in the context of a single form of specific implementation (e.g., discussed only as a method), the specific implementation of the features discussed may also be implemented in other forms (e.g., devices or programs). The device may be implemented in, for example, appropriate hardware, software, and firmware. These methods may be implemented in, for example, a processor, which generally refers to a processing device, including, for example, a computer, a microprocessor, an integrated circuit, or a programmable logic device. The processor also includes communication devices, such as, for example, computers, mobile phones, portable / personal digital assistants ("PDAs"), and other devices that facilitate information communication between end users.

[0126] References to "one example" or "an example" or "one implementation" or "an implementation" and other variations thereof mean that a particular feature, structure, characteristic, etc. described in connection with the example is included in at least one example. Thus, the phrases "in one example" or "in an example" or "in one implementation" or "in an implementation" and any other variations appearing in various places throughout this application are not necessarily all referring to the same example.

[0127] Additionally, the present application may involve "determining" various information. Determining information may include, for example, estimating information, calculating information, predicting information, or retrieving information from a memory. Obtaining may include receiving, retrieving, constructing, generating, and / or determining.

[0128] Furthermore, the present application may refer to "accessing" various information. Accessing information may include, for example, one or more of receiving information, retrieving information (e.g., from a memory), storing information, moving information, copying information, calculating information, determining information, predicting information, or estimating information.

[0129] Additionally, the present application may refer to "receiving" various information. Like "accessing," receiving is a broad term. Receiving information may include, for example, one or more of accessing information or retrieving information (e.g., from a memory). Furthermore, "receiving" generally refers to "receiving" in one way or another during operations such as, for example, storing information, processing information, transmitting information, moving information, copying information, erasing information, calculating information, determining information, predicting information, or estimating information.

[0130] It should be understood that, for example, in the case of "A / B," "A and / or B," and "at least one of A and B," the use of any of the following " / ," "and / or," and "at least one" is intended to encompass selecting only the first listed option (A), or only the second listed option (B), or both options (A and B). As another example, in the case of "A, B, and / or C" and "at least one of A, B, and C," such phrases are intended to encompass selecting only the first listed option (A), or only the second listed option (B), or only the third listed option (C), or only the first listed option and the second listed option (A and B), or only the first listed option and the third listed option (A and C), or only the second listed option and the third listed option (B and C), or all three options (A and B and C). As will be apparent to one of ordinary skill in this and related arts, this can be extended to as many items as listed.

[0131] In addition, as used herein, the term "signal" refers to (among other things) indicating something to a corresponding decoder. Encoder signals may include, for example, the size of a merge candidate list, a coded merge candidate index for a merged MV prediction candidate list, and the like. Thus, in one example, the same parameters are used at both the encoding and decoding ends. Thus, for example, an encoder may transmit (explicit signaling) specific parameters to a decoder so that the decoder can use the same specific parameters. Conversely, if the decoder already has specific parameters as well as other parameters, signaling may be used without transmitting (implicit signaling) to simply allow the decoder to know and select specific parameters. Bit savings are achieved in various examples by avoiding the transmission of any actual function. It should be understood that signaling can be implemented in a variety of ways. For example, in various examples, one or more syntax elements, flags, and the like are used to signal information to a corresponding decoder. Although the verb form of the word "signal" is mentioned above, the word "signal" may also be used as a noun in this article.

[0132] It will be apparent to one of ordinary skill in the art that a specific implementation may generate various signals formatted to carry, for example, storable or transmittable information. The information may include, for example, instructions for performing a method or data generated by one of the specific implementations. For example, a signal may be formatted to carry a bit stream of the example. Such a signal may be formatted as, for example, an electromagnetic wave (e.g., using a radio frequency portion of a spectrum) or a baseband signal. Formatting may include, for example, encoding a data stream and modulating a carrier using the encoded data stream. The information carried by the signal may be, for example, analog or digital information. As is known, the signal may be transmitted over a variety of different wired or wireless links. The signal may be stored on a processor readable medium.

[0133] Many examples are described herein. Features of the examples may be provided individually or in any combination across various claim classes and types. In addition, the examples may include one or more of the features, devices, or aspects described herein across various claim classes and types, individually or in any combination.

[0134] Video coding systems may be used to compress digital video signals, which may reduce storage requirements and / or transmission bandwidth of the video signals. Video coding systems may include block-based, wavelet-based, and / or object-based systems.

[0135] The block-based hybrid coding architecture can combine inter- and intra-picture prediction and transform coding with entropy coding. One or more coding aspects (e.g., for coding efficiency) can be implemented, including, for example, one or more of the following: (i) coding structure; (ii) intra-frame prediction; (iii) inter-frame prediction, transform, quantization and coefficient coding; (iv) in-loop filter; and / or (v) screen content coding.

[0136] The coding structure may be implemented, for example, using multiple types of treeblock partitions such as quadtree, binary tree, and ternary tree partitions.

[0137] Intra prediction may be implemented, for example, using 65 angular intra prediction directions, including, for example, one or more of wide-angle prediction and / or a linear model (LM) chroma mode.

[0138] Inter prediction may be implemented, for example, using one or more of the following: affine motion model, sub-block temporal motion vector prediction (SbTMVP), adaptive motion vector precision, decoder-side motion vector correction (DMVR), triangle partitioning, combined intra and inter prediction (CIIP), merge mode with motion vector difference (MMVD), bidirectional optical flow (BDOF), and / or bi-prediction weighted average (BPWA).

[0139] Transformation, quantization, and coefficient encoding may be accomplished, for example, using one or more of: a selection of multiple transform modes with discrete cosine transform (DCT) 2, discrete sine transform (DST) 7, and DCT 8; associated quantization with a maximum quantization parameter (QP) increased from 51 to 63; and / or modified transform coefficient encoding.

[0140] The loop filter may be implemented, for example, using a generalized adaptive loop filter (GALF). Screen content coding may be implemented, for example, using intra block copy (IBC). 360-degree video coding may be implemented, for example, using horizontal surround motion compensation.

[0141] For example, different MV encoding modes (e.g., merge mode and advanced motion vector prediction (AMVP) mode) may be implemented to encode motion vectors (MVs) for motion compensated prediction (MCP). In merge mode, encoded MVs from neighboring PUs (e.g., spatial and / or temporal neighboring PUs) may be collected to create a merged MV candidate list. The index of the list may be encoded and / or transmitted to the decoder. In AMVP mode, candidate MVs from neighboring PUs may be used as MV predictors (MVPs), and additional MV differences (MVDs) may be encoded.

[0142] For example, for pictures that allow bidirectional prediction, the continuity of motion trajectories can be assumed and exploited (e.g., for coding efficiency). For example, symmetric MVD mapping can encode the MVD for forward prediction and derive the MVD for backward prediction from the forward prediction (e.g., via symmetric mapping). For example, symmetric MVD mapping can be used (e.g., in DMVR) to perform MV correction search for bi-predicted MVs (e.g., at the decoding end).

[0143] Symmetric mapping can be used for merge mode MV encoding. Merge mode MV candidates can be collected or constructed. For example, the merge candidates may include one or more of the following: an encoded MV from a spatially adjacent CU, an encoded MV from a temporally collocated CU, a constructed MV from a spatially adjacent CU (e.g., for affine motion mode), an MV from a previously encoded CU, a pairwise average MV of the top candidates from an existing merge candidate list, a constructed symmetric bidirectional prediction (bi-pred) MV, and a zero MV.

[0144] Symmetric bi-pred (bi-pred) MVs may be constructed from available (e.g., existing) candidates in a merge candidate list. For example, when encoding a picture that allows bidirectional prediction, the continuity of motion may be utilized, which involves motion compensated prediction (MCP) from reference pictures before and after the current picture. For example, when encoding a picture that allows bidirectional prediction, available MV merge candidates may be symmetrically extended / mapped in either direction (e.g., backward or forward between reference pictures). The constructed symmetric bi-pred merge candidate may be used (e.g., in a merge candidate list) as an MV merge candidate for an encoder or decoder to select from. For example, if motion continuity is maintained, a symmetric bi-pred MV candidate (e.g., an MV encoded as the current PU) may be selected. For example, a decoder may repeat the symmetric mapping construction implemented by an encoder to obtain an encoded MV. For example, an encoding index of an MV merge candidate list may be provided to a decoder and used by the decoder to generate a merge candidate list and / or an encoded MV. For example, by constructing a symmetric bi-pred MV and adding it to a merge candidate list, encoding efficiency may be improved without incurring encoding bit costs.

[0145] The methods described herein may be performed by a decoder. In some examples, the methods herein or corresponding methods may be performed by an encoder. A computer readable medium may include instructions for causing one or more processors to perform the methods described herein. A computer program product including instructions, when the program is executed by one or more processors, the instructions may cause one or more processors to perform the methods described herein.

[0146] Merge mode MV encoding may be performed (e.g., for a coding block (CB) or a prediction unit (PU)). For example, the MV of a CB or a PU may be encoded in merge mode or AMVP mode. In merge mode, encoded MVs for neighboring PUs may be collected as MV candidates in a merge candidate list (e.g., to encode the current PU). An index to the candidate list may be encoded and transmitted to a decoder. The decoder may reproduce the MV candidates (e.g., based on the encoded index), such as an MCP for the PU. In AMVP mode, neighboring encoded MVs may be used as MVPs (e.g., in an AMVP candidate list (AMVPCL). The encoder may encode (e.g., for the decoder) an index to the MVP list and (e.g., a remaining) MV difference (MVD).

[0147] The merge mode may be used for MCP based on a conventional translational motion model and / or for MCP based on an affine motion model.

[0148] A merge mode of conventional inter prediction may be performed. In conventional inter prediction merge mode (e.g., MCP based on a non-affine translation motion model), a merge candidate list may be constructed (e.g., in order), for example, using one or more of the following types of candidates: spatial MVPs from spatially neighboring coding units (CUs), temporal MVPs from collocated CUs, history-based MVPs from a first-in-first-out (FIFO) table, pair-wise average MVPs, symmetric bi-pred MVs, and / or zero MVs.

[0149] The size of the merge list may be signaled, for example, in a slice structure header. The merge list may have a maximum size (e.g., a maximum number of candidates). In one example, the maximum size of the merge list may be, for example, six. Other examples may have different maximum values ​​or no maximum number of candidates. For example, for (e.g., each) CU encoded in merge mode, the index of the best merge candidate may be encoded. Different categories of candidate merges may have different generation procedures.

[0150] Merge candidates may include spatial candidates. Spatial merge candidates may be derived. In one example, spatial merge candidates may be derived at a location Figure 5 Select (eg, up to four) merge candidates from the candidates at the indicated positions.

[0151] Figure 5 is a schematic diagram showing exemplary positions of spatial merge candidates. The derivation order may be, for example, A1, B1, B0, A0, and B2. For example, when (e.g., only when) the CU at position A1, B1, B0, A0 is not used and / or intra-coded, position B2 may be considered. For example, when the CU at position A1, B1, B0, A0 belongs to another slice or tile or is otherwise unavailable, one or more CUs at positions A1, B1, B0, A0 may not be used. For example, if one or more CUs at positions A1, B1, B0, A0 are available but intra-coded, one or more CUs in the CUs at positions A1, B1, B0, A0 may not provide MV candidates for the merge mode of the current CU. For example, after adding the first candidate (e.g., at position A1), the addition of the candidate may be subject to a redundancy check. The redundancy check may remove (e.g., from a list of merge candidates) redundant candidates with the same motion information. The redundancy check may take into account the selected candidate pairs (e.g., to reduce computational complexity).

[0152] The merge candidates may include temporal candidates. In one example, (e.g., only one) temporal MVP (TMVP) candidate may be added to the merge candidate list. The temporal merge candidate may be derived. The scaled motion vector (e.g., for the temporal merge candidate) may be derived, for example, based on a co-located CU belonging to a collocated reference picture. The reference picture list to be used for deriving the co-located CU may be indicated, for example, by explicit signaling (e.g., in a slice structure header). For example, Figure 6 As shown by the dotted line in , the scaled motion vector of the temporal merging candidate can be obtained.

[0153] Figure 6 is a schematic diagram showing an example of motion vector scaling of a temporal merge candidate. For example, the scaled motion vector of the temporal merge candidate may be scaled based on the motion vector of the co-located CU, for example using POC (picture order count) distances tb and td. The POC distance tb may indicate a POC difference between a current picture and a reference picture of the current picture. The POC distance td may indicate a POC difference between a collocated picture and a reference picture of the collocated picture. The reference picture index of the temporal merge candidate may be set equal to zero. The position of the temporal candidate may be selected, for example, between a collocated center candidate CU and a collocated lower right CU.

[0154] The merge candidates may include history-based merge candidates. History-based MVP (HMVP) merge candidates may be added to the merge candidate list, for example, after spatial MVP and TMVP merge candidates. Motion information of previously encoded blocks may be stored in a table and / or used as the MVP of the current CU. The previously encoded blocks may or may not be from an immediately adjacent CU. A table with multiple HMVP candidates may be maintained, for example, during the encoding / decoding process. For example, when (for example, first) a different coding tree unit (CTU) row is encountered, the table may be reset (for example, by clearing the table). For example, if (for example, when) there is a non-sub-block inter-picture coded CU (for example, for affine mode), the motion information may be added to the last entry of the table (for example, as a new HMVP candidate).

[0155] The HMVP table size S may be limited to a maximum number of table entries. In one example, the HMVP table size S may be set to 6, which may indicate that up to 6 HMVP candidates may be added to the table. For example, when inserting (e.g., new) motion candidates into the table, a constrained first-in, first-out (FIFO) rule may be used. A redundancy check may be applied to determine if identical HMVPs exist in the table. Identical (e.g., redundant) HMVPs may be removed from the table. For example, when a candidate is removed, the HMVP candidate may be moved forward.

[0156] The HMVP candidates (e.g., in the HMVP table) may be used in a merge candidate list construction process. For example, the HMVP candidates (e.g., in the table) may be checked (e.g., in order) to determine whether the HMVP candidate should become a merge candidate. The HMVP candidate may be inserted into the merge candidate list, e.g., after the TMVP candidate. For example, a redundancy check may be applied to determine whether the HMVP candidate is redundant, e.g., with respect to a spatial or temporal merge candidate. In one example, the number of redundancy check operations may be reduced.

[0157] The merge candidates may include pair-wise average merge candidates. For example, pair-wise average candidates may be generated by averaging predefined candidate pairs in an available (e.g., existing) merge candidate list. The predefined pairs may be defined as, for example, {(0,1), (0,2), (1,2), (0,3), (1,3), (2,3)}. These numbers may represent the merge index of the merge candidate list. For example, the average motion vector may be calculated separately for each reference list. For example, even when the motion vectors point to different reference pictures, the two (e.g., all two) motion vectors available in one reference list may be averaged. If only one motion vector is available, that motion vector may be used directly. If no motion vector is available, the list may be invalid.

[0158] The merge candidate may include a symmetric bi-prediction motion vector. The construction of symmetric bi-pred motion vectors is discussed in more detail below.

[0159] The merge candidates may include zero MVPs. After adding the symmetric bi-pred Mv merge candidate to the merge list, the merge list may be incomplete. Zero MVPs may be inserted at the end of the merge candidate list, for example, up to a maximum number of merge candidates.

[0160] Affine motion compensated prediction may be performed. For example, block-based affine transform motion compensated prediction (MCP) may be applied to a variety of motions, such as zoom-in / out, rotation, perspective motion, and other unusual motions (as described herein).

[0161] FIG. 7A to FIG. 7C is a schematic diagram showing an example of a control point-based affine motion model including a 4-parameter affine model, a 6-parameter affine model, and an affine motion vector field (MVF) for each subblock. The affine motion field of a block may be described by motion information of two control point (e.g., 4 parameters) or three control point (e.g., 6 parameters) motion vectors.

[0162] For a 4-parameter affine motion model (e.g., Fig. 7A As shown), the motion vector at the sample position (x, y) in the block can be derived, for example, using Equation 1:

[0163]

[0164] For a 6-parameter affine motion model (e.g., Figure 7B As shown), the motion vector at the sample position (x, y) in the block can be derived, for example, using Equation 2:

[0165]

[0166] refer to Fig. 7A and Figure 7B And referring to equations 1 and 2, the motion vector of the upper left corner control point v0 can be expressed as (mv 0x ,mv 0y ). The motion vector of the upper right corner control point v1 can be expressed by (mv 1x ,mv 1y ). The motion vector of the lower left corner control point v2 can be expressed by (mv 2x ,mv 2y )instruct.

[0167] For example, block-based affine transform prediction can be applied to simplify motion compensated prediction. The motion vector of the center sample of the sub-block can be calculated to derive the motion vector of the 4×4 luminance sub-block. In one example, Figure 7CAs shown, the motion vector of the center sample of each sub-block can be calculated, for example, according to Equation 1 and / or Equation 2 to derive the motion vector of each 4×4 luminance sub-block. The motion vector can be rounded to 1 / 16 fractional precision. For example, a motion compensated interpolation filter can be applied to generate a prediction of (e.g., each) sub-block using the derived motion vector. For example, the sub-block size of the chroma component can be set to 4×4. The MV of the 4×4 chroma sub-block can be calculated as, for example, the average of the MVs of the four corresponding 4×4 luminance sub-blocks.

[0168] For example, there may be multiple affine motion inter prediction modes (eg, including an affine merge mode and an affine AMVP mode), eg, similar to multiple translational motion inter prediction modes.

[0169] A merge mode for affine prediction may be performed. The affine merge mode may be applied to, for example, CUs whose width and height are greater than or equal to 8. In the affine merge mode, the control point MV (CPMV) of the current CU may be generated, for example, based on motion information of spatially neighboring CUs. The number of CPMVP candidates may be limited (e.g., to a maximum number of candidates). In one example, there may be one or more (e.g., up to five) CPMVP candidates. An index may be signaled (e.g., by an encoder to a decoder) to indicate the CPMVP candidate to be used for the current CU. The affine merge candidate list may include one or more of the following types of CPMV candidates: an inherited affine merge candidate that can be extrapolated from the CPMV of a neighboring CU; a constructed affine merge candidate CPMVP that can be derived using a translation MV of a neighboring CU; a constructed symmetric affine merge candidate that can be derived by symmetric mapping of an existing affine merge candidate; and / or a zero MV.

[0170] The inherited affine merge candidate may be used for affine prediction. The number of inherited affine merge candidates may be limited. In one example, there may be at most two inherited affine candidates in the affine merge candidate list. For example, the inherited affine candidate may be derived from the affine motion model of the neighboring blocks (e.g., one from the left neighboring CU and one from the top neighboring CU).

[0171] Fig. 8A and Figure 8B is a diagram showing an example of inherited position of an inherited affine motion predictor and an example of control point motion vector inheritance. Fig. 8AAn exemplary candidate block is shown. In one example (e.g., for the left predictor), the scan order may be A0 to A1. In one example (e.g., for the predictor described above), the scan order may be B0 to B1 to B2. In one example, the first inheritance candidate from each side may be selected. A pruning check cannot be performed between two inheritance candidates. In one example (e.g., when a neighboring affine CU is identified), the control point motion vectors of the neighboring affine CU may be used, for example, to derive the CPMVP candidate in the affine merge list of the current CU. In one example (e.g., when such Figure 8B As shown, when the adjacent lower left block A is encoded in affine mode), motion vectors v2, v3, and v4 (for example, of the upper left corner, upper right corner, and lower left corner of the CU containing block A) can be obtained. For example, if block A is encoded using a 4-parameter affine model, two CPMVs of the current CU can be calculated, for example, based on v2 and v3. For example, if block A is encoded using a 6-parameter affine model, three CPMVs of the current CU can be calculated, for example, based on v2, v3, and v4.

[0172] The constructed affine candidates may be used for affine prediction. The affine candidates may be constructed, for example, by combining neighboring translational motion information from (eg, each) control point.

[0173] Fig. 9 is a schematic diagram showing exemplary positions of candidate positions for the constructed affine merge pattern. The motion information of the control point can be derived from the specified spatial neighbors and temporal neighbors (e.g., by Fig. 9 CPMV k (k=1,2,3,4) may represent the kth control point. In one example (e.g., for CPMV1), the availability of blocks may be checked in sequence (e.g., block B2 then B3 then A2). The MV of the first available block may be used. In one example (e.g., for CPMV2), the availability of blocks may be checked in sequence (e.g., block B1 then B0). In one example (e.g., for CPMV3), the availability of blocks may be checked in sequence (e.g., block A1 then A0). For example, if TMVP is available, TMVP may be used as CPMV4.

[0174] For example, after obtaining the MVs of the four control points, an affine merge candidate may be constructed based on the motion information. The combination of the control point MVs may be used to construct the following (eg, in order):

[0175] {CPMV1,CPMV2,CPMV3}, {CPMV1,CPMV2,CPMV4}, {CPMV1,CPMV3,CPMV4}, {CPMV2,CPMV3,CPMV4}, {CPMV1,CPMV2}, {CPMV1,CPMV3}

[0176] A combination of three CPMVs can construct a 6-parameter affine merge candidate. A combination of two CPMVs can construct a 4-parameter affine merge candidate. For example, if the reference indexes of the control points are different, the relevant combination of control point MVs can be discarded, for example to avoid the motion scaling process.

[0177] The constructed symmetric affine merge candidate can be used for affine prediction. The constructed symmetric affine merge candidate can be derived by symmetric mapping of existing affine merge candidates. The constructed symmetric affine merge candidate is discussed in more detail below.

[0178] Zero MV may be used for affine prediction. For example, if the list is not yet full, a zero MV is inserted at the end of the affine merge candidate list, for example after checking other constructed affine merge candidates (such as a constructed symmetric affine merge candidate).

[0179] Symmetrical MV difference (MVD) for bi-prediction may be performed. For example, due to the continuity of motion trajectories in bi-prediction, the motion vectors in the forward reference picture and the backward reference picture may be symmetric. Symmetrical motion vector difference (MVD) may include an inter-coding mode that uses the continuity of motion trajectories in bi-prediction. In symmetric MVD mode, the MVD of reference picture list 1 may be symmetric to the MVD of list 0. In one example, (e.g., only) the MVD of reference picture list 0 may be signaled (e.g., for coding efficiency). The MV encoded for the current picture in symmetric MVD mode may be derived, for example, using Equation 3:

[0180]

[0181] The subscript in Equation 3 may indicate reference list 0 or 1. A direction may be indicated by x and y (eg, x may indicate a horizontal direction, and y may indicate a vertical direction).

[0182] For example, the symmetric MVD mode may be used for bidirectional prediction when any of the following is true: (i) reference list 0 contains forward reference pictures and reference list 1 contains backward reference pictures; and / or (ii) reference list 0 contains backward reference pictures and reference list 1 contains forward reference pictures.

[0183] In one example, for example, in symmetric MVD mode, the reference picture indices of reference list 0 and reference list 1 may not be signaled. For example, the reference picture indices of reference list 0 and reference list 1 may be derived in symmetric MVD mode.

[0184] In one example (e.g., if reference list 0 contains forward reference pictures and reference list 1 contains backward reference pictures), the reference picture index in list 0 may be set to the closest forward reference picture with respect to the current picture, and the reference picture index of list 1 may be set to the closest backward reference picture with respect to the current picture. In one example (e.g., if reference list 0 contains backward reference pictures and reference list 1 contains forward reference pictures), the reference picture index in list 0 may be set to the closest backward reference picture with respect to the current picture, and the reference picture index of list 1 may be set to the closest forward reference picture with respect to the current picture.

[0185] Symmetric MVD can reduce signaling overhead and / or coding complexity. For example, a symmetric MVD mode can avoid signaling reference picture indices for two reference picture lists. A symmetric MVD mode can (eg, only) signal a set of MVDs for one list (eg, list-0).

[0186] Decoding-side motion vector correction (DMVR) may be performed. Decoding-side motion vector correction based on bilateral matching (BM) may be applied, for example, to improve the accuracy of MVs in merge mode. For example, in a bi-prediction operation, a corrected MV may be searched around an initial MV in reference picture list L0 and / or reference picture list L1. BM may calculate the distortion between two candidate blocks in reference picture list L0 and list L1.

[0187] Fig.10 is a schematic diagram showing an example of decoding-side motion vector correction. Fig.10 As shown, the sum of absolute differences (SAD) between blocks 1004 and 1006 may be calculated, for example, based on each MV candidate surrounding the initial MV. The MV candidate with the lowest SAD may become the revised MV and / or may be used to generate a bi-prediction signal.

[0188] The modified MV (e.g., derived by the DMVR process) can be used to generate inter-frame prediction samples and / or can be used for temporal motion vector prediction for future picture coding. The original MV can be used for the deblocking process and / or can be used for spatial motion vector prediction for future CU coding.

[0189] like Fig.10 As shown, the search point can be around the initial MV. The MV offset can follow the MV difference mirror (e.g., symmetric) rule. The DMVR checkpoint (e.g., represented by the candidate MV pair (MV0, MV1)) can be obtained, for example, according to Equation 4:

[0190]

[0191] MV offsetThe modified offset between the initial MV and the modified MV in one of the reference pictures may be represented by . The modified search range may be, for example, two integer luma samples from the initial MV. For example, the search complexity may be reduced by using a fast search method with an early termination trigger.

[0192] Merge mode MV candidates may be constructed for PUs (e.g., allowing bidirectional prediction). Merge mode MV candidates may be constructed, for example, via symmetric mapping of (e.g., existing) candidate MVs from one direction to another (e.g., from a forward reference picture to a backward reference picture and vice versa). For example, merge mode MV candidates may be constructed for conventional inter-prediction merge mode and / or for affine prediction merge mode. For example, if the motion trajectory is continuous across video frames, symmetric MV candidate construction via symmetric mapping may be used.

[0193] Fig.11A is a schematic diagram showing an example of a symmetric merge MV candidate construction for a conventional motion. Fig.11A As shown), the original merged MV candidate (MVx0, MVy0) can use the reference picture in list 0. The symmetric mapping of the MV in another reference picture list 1 can be derived from the original merged MV candidate (MVx0, MVy0). The derived symmetric mapping MV candidate can be (MVx1, MVy1). The MV in the short arrow line can indicate the MV magnitude. The long arrow line can show the motion trajectory across the picture (for example, from the reference picture in list 0 to the current picture and / or from the current picture in list 1 to the reference picture). τ0, τ1 can represent the temporal distance (for example, POC distance) between the reference picture in list 0 and the current picture or between the current picture and the reference picture in list 1, respectively. In one example, the translation motion vectors MV0 and MV1 (for example, the short arrow line) can indicate symmetric translation motion vectors (for example, MV1=-MV0).

[0194] Symmetric merge candidates may be constructed (e.g., from available merge candidates) for conventional inter prediction. A merge candidate list (e.g., an available merge candidate list) may include, for example, one or more of the following: spatially adjacent MVs, temporally collocated MVs, historical MVPs, pairwise average MVs, and / or zero MVs. In an example, one or more symmetric bi-pred MV candidates may be located at positions such as: (i) after a non-zero MV and before a zero MV; (ii) after a historical MVP and before a pairwise average MV; and / or (iii) after a temporally collocated MV and before a historical MVP. The position of the symmetric bi-pred MV candidate may depend on, for example, test results. Positioning just before the zero MV may be the most conservative position.

[0195] Symmetric merge candidates may be used for PUs that allow bi-directional prediction. For example, symmetric merge candidates may be used for PUs of tile group type B and / or B slices / pictures.

[0196] Symmetric MV candidates may be constructed and / or added based on available (eg, existing) merge candidates.Exemplary procedures for constructing symmetric merge MV candidates (eg, based on available merge candidates) are provided herein.

[0197] In one example, the following exemplary procedure may be implemented for (eg, each) available (eg, existing) merge MV candidate (eg, candidate i) in a merge candidate list (eg, starting from the top candidate).

[0198] An existing merge mode MV candidate (eg, merge candidate i) in the merge candidate list may have a level MvCand i,x , vertical MvCand i,y , a prediction reference picture list refPicList, a reference picture index refPicIdx, and a reference picture order count (POC) refPicPoc. It may be determined whether candidate i is a uni-pred MV. It may be determined (e.g., for uni-pred MV i) whether there is a reference picture in a different reference picture list (e.g., list (1-refPicList) with a POC distance to the current picture, the current tile group, or the current slice that is equal to the POC distance between the current picture and the picture list referenced by merge candidate i. For example, it may be determined whether Equation 5 is true:

[0199] refPicPocCand i -curPicPoc==curPicPoc-refPicPocSym j Equation 5 where refPicPocCand i , curPicPoc, and refPicPocSym i The POC of the reference picture of merge candidate i (eg, the candidate being evaluated), the POC of the current picture / slice, and the POC of reference picture j from a different reference picture list (eg, list (1-refPicList)) may be represented separately.

[0200] For example, if symmetric reference pictures with equivalent POCs are included in different reference picture lists (e.g., list (1-refPicList)), a symmetric bi-pred MV candidate may be created for merge candidate i. The uni-pred merge candidate MV (e.g., merge candidate i) may be represented as refPicList MV. The symmetric bi-pred MV candidate derived from the refPicList MV may be represented as (1-refPicList) MV, which indicates an MV in a prediction direction opposite to that of the uni-pred merge candidate MV. The symmetric bi-pred MV candidate may be derived, for example, using Equation 6 as a symmetric mapping of the uni-pred candidate MV:

[0201] MvSym i,x =-MvCand i,x ,MvSym i,y =-MvCand i,y Equation 6

[0202] Symmetric MV candidates may be added to the merge candidate list, for example, based on one or more factors / criteria, such as one or more conditions. In one example, a symmetric bi-pred merge candidate may be added to the merge candidate list under the following conditions: (i) the symmetric bi-pred candidate (e.g., a newly created symmetric bi-pred candidate) is not already in the merge candidate list (e.g., is not redundant with candidates in the list); (ii) the total number of available merge candidates in the list is less than the maximum number of allowed merge candidates; and (iii) the total number of symmetric merge candidates in the merge candidate list is less than the maximum number of symmetric merge candidates allowed. In one example, for example, if (i), (ii), or (ii) is not true in this example, the symmetric MV candidate may not be added to the merge candidate list.

[0203] A determination may be made as to whether candidate i is a bi-pred MV. In one example (e.g., where candidate i is a bi-pred MV), the MV of candidate i associated with two reference picture lists may be considered as two separate (e.g., different) uni-pred candidates, respectively. The aforementioned symmetric mapping procedure for constructing a symmetric bi-pred candidate (e.g., and conditionally adding to a merge candidate list) may be applied to each of the two separate uni-pred candidates. The symmetric mapping applied to the two separate uni-pred candidates may generate two different symmetric merge candidates. The determination as to whether to add two different symmetric merge candidates may be made separately, e.g., applied separately to each symmetric merge candidate.

[0204] For example, if the required maximum number of merge candidates and / or the allowed maximum number of symmetric merge candidates is reached, the process of checking each existing merge candidate in the merge candidate list may stop. For example, if the required maximum number of merge candidates and / or the allowed maximum number of symmetric merge candidates is not reached, the next available candidate in the list may be processed, e.g., candidate i may be processed as described herein. For example, when candidate i is processed as described herein, an added (e.g., newly added) symmetric candidate may not be processed.

[0205] In an example, a symmetric reference picture (e.g., equal POC distance) condition may be based on, for example, the closest POC distance, rather than an equivalent POC distance, to consider whether to generate a symmetric bi-pred merge candidate for an existing merge candidate. In one example, the closest POC may include an equivalent POC (e.g., having a zero difference). Whether the conditional POC distance is equal to another distance, closest to another distance, or another distance may depend on, for example, a test result. In one example, checking a different (e.g., another) reference list as described herein may include searching for a reference picture that provides a POC distance closest to the current picture to satisfy the equal POC distance condition (e.g., as provided in Equation 5). For example, Equation 7 may be used:

[0206]

[0207] In an example (eg, where equation 7 is used), MV scaling may be applied, for example, based on different POC distances to the current picture. In one example, MV scaling may be applied according to equation 8:

[0208] MvSym i,x = -α·MvCand i,x , MvSym i,y = -α·MvCand i,y Equation 8

[0209]

[0210] In an example, the maximum allowed number of symmetric merge candidates may be set to, for example, 1 or 2. The maximum number of symmetric merge candidates may depend on, for example, test results.

[0211] In an example, a symmetric merge candidate construction (e.g., as described herein) may be applied, for example, to available (e.g., existing) uni-pred merge candidates (e.g., applied only to existing uni-pred merge candidates), bi-pred merge candidates (e.g., applied only to existing bi-pred merge candidates), and / or uni-pred or bi-pred merge candidates (e.g., applied to all existing candidates, whether uni pred or bi pred).

[0212] Symmetric merge candidate construction (e.g., as described herein) can be performed at the encoder side and / or the decoder side. The decoder can, for example, generate the same symmetric merge candidate constructed by the encoder based on the encoded merge candidate index of the merge candidate list. Adding symmetric merge candidates to the merge candidate list (e.g., as described herein) can improve coding efficiency without incurring additional coding and / or signaling costs.

[0213] Coding syntax for merge mode (e.g., merge_flag and merge_index, etc.) may be provided. A merge candidate list construction may be provided. In one example, a symmetric merge candidate may be added at one or more positions in the merge candidate list (e.g., between pairwise average MV candidates and zero MV candidates).

[0214] Symmetric merge candidates may be constructed for affine mode prediction. For example, merge mode may be used for affine mode MCP. The merge candidate list for affine mode may be different from the merge candidate list for conventional inter prediction. In the example of affine mode prediction, the merge candidate may include, for example, one or more of an inherited affine merge candidate, a constructed affine merge candidate, and / or a zero MV. A symmetric affine merge candidate (e.g., created as described herein) may be located in the affine merge candidate list, for example, after a non-zero MV candidate and before a zero MV candidate.

[0215] Fig. 11B is a schematic diagram showing an example of symmetric merged MV candidate construction for affine motion. Fig. 11B As shown), the original affine merge candidate (e.g., with multiple MVs) can use the reference picture in list 0. The symmetric mapping of the MVs in another reference picture list 1 can be derived from the initial affine merge candidate MV. In one example, the translation motion vectors MV0 and MV1 (e.g., short arrow lines) can indicate symmetric translation motion vectors (e.g., MV1=-MV0). The rotation arrows represented by the rotation angles θ0 and θ1 can indicate symmetric rotation motion vectors (e.g., θ1=-θ0). The scaling factors ρ0 and ρ1 can indicate symmetric scaling motion vectors (e.g., ρ1=1 / ρ0). Fig.11A Similarly, τ0 and τ1 may represent the temporal distance (eg, POC distance) between the reference picture in list 0 and the current picture or between the current picture and the reference picture in list 1, respectively.

[0216] In an example, the symmetric affine merge candidate construction may be similar to the symmetric merge candidate construction used for conventional inter prediction. The difference between the symmetric mapping of affine mode and conventional inter prediction is described below.

[0217] In affine mode (e.g., for uni-pred candidates), two or three control point MVs may be used for a 4-parameter affine model and a 6-parameter affine model, respectively (e.g., as described herein). A symmetric mapping (e.g., as shown in Equation 6) may be applied to the upper left control point MV. The upper left control point MV may represent the same translation motion as the MV in the conventional inter prediction mode. The MVs of the other (e.g., 1 or 2) control points (e.g., the upper right control point and the lower left control point) may follow different symmetric mapping calculations. The MVs of the other 1 or 2 control points (e.g., the upper right control point and the lower left control point) may represent scaling and / or rotational motion information.

[0218] The affine motion model can be expressed, for example, according to Equation 9:

[0219]

[0220] As shown in Equation 9, and can be the horizontal and vertical components of the MV at position (x, y), d x d y can be a spatial translation, ρ x , y can be a scaling factor, θ x ,θ y can be the rotation angle, and x, y can represent the horizontal direction and the vertical direction, respectively. Equation 9 can represent a 6-parameter affine motion model. The 4-parameter affine model can be consistent with Equation 9 and Equation 10:

[0221] ρ x =ρ y ,θ x =θ y Equation 10

[0222] For example, in a 4-parameter affine model, the MVs of the two control points can be known from the uni-pred MV candidates. The MVs of the two control points may include, for example, the MVs of the top left control point 0 at (0,0). and the upper right control point at (w,0) Where w can be the width of the CU. Inserting MV into Equation 9 at two locations and combining the assumptions of Equation 10, we can obtain Equations 11 and 12:

[0223]

[0224] Plugging Equation 11 into Equation 12 yields Equation 13:

[0225]

[0226] In an example, a lookup table (LUT) may be used to solve for values ​​of one or more of, for example, ρ, sinθ, and / or cosθ, so that the encoder and decoder may obtain the same calculation results. In one example, the LUT may be created using Equation 14:

[0227]

[0228] As shown in Equation 14, N may control the precision (eg, 256), a = 0 ... N, and b = 1 ... N. The square brackets used on the right side of Equation 14 may represent rounding to the nearest integer.

[0229] In the example of symmetrical mapping to different prediction directions (e.g., opposite prediction directions), the four affine model parameters (d x ,d y ,ρ,θ) can be (e.g., symmetrically) mapped to (-d x ,-d y ,ρ -1 , -θ). The symmetric mapping of the scaling ratio ρ may be the inverse of the scaling ratio ρ (e.g., reference Fig. 11B , ρ1=1 / ρ0). For example, as shown in Equation 15 and Equation 16, the corresponding two control points MV of another reference picture list can be derived (eg, from the opposite prediction direction):

[0230]

[0231] As shown in Equation 15 and Equation 16, Two control point MVs from another prediction direction may be represented.

[0232] Starting from Equation 9, the 4-parameter affine motion symmetry mapping process (e.g., as described herein) can be extended to solve and / or compute the symmetric mapping MV of the lower left control point of the 6-parameter affine model. In Equation 17, It can represent the lower left control point at (0,h), where h is the height of the CU.

[0233] Inserting (0,h) into Equation 9 yields Equation 17:

[0234]

[0235] In the 6-parameter affine model of Equation 9, (ρ, θ) derived in this paper in the 4-parameter model can be transformed into (ρ x ,θ x ), which represents the scaling ratio and rotation angle along the horizontal direction. Equation 17 can be used to solve (ρ y ,θ y ), which represents the scaling ratio and rotation angle along the vertical direction.

[0236] Plugging Equation 11 into Equation 17 yields Equation 18:

[0237]

[0238] One or more LUTs (e.g., applied similarly to the LUTs described herein) may be used to solve for p y 、sinθ y cosθ y The model parameters may be symmetrically mapped (eg, using one or more LUTs) to obtain the model parameters from (d x ,d y ,ρ y ,θ y ) maps to (-d x ,-d y ,ρ y -1 ,-θ y ). The lower left control point MV from the other direction may be provided, for example, by Equation 19:

[0239]

[0240] As presented herein by way of example, different symmetric mapping schemes may be used to construct symmetric affine merge candidates and symmetric merge candidates for conventional inter prediction. One or more aspects, considerations, or variations of the symmetric affine merge candidate construction and the symmetric merge candidate construction for conventional inter prediction may be similar (e.g., identical). Similar considerations or variations may include, for example, one or more of the following: equal (e.g., or closest) POC distance conditions, the maximum number of symmetric candidate merges allowed, the type of existing candidate merges that can be used to construct symmetric candidates (e.g., only uni-pred, only bi-pred, or both), etc.

[0241] Coding syntax for affine merge mode (e.g., merge_subblock_flag and merge_subblock_index) may be provided. Affine merge candidate list construction may be provided. Symmetric affine merge candidates (e.g., as described herein) may be added to the affine merge candidate list, e.g., after the constructed affine merge MV candidate and before the zero MV candidate.

[0242] Although features and elements are described above in specific combinations, it will be understood by those of ordinary skill in the art that each feature or element may be used alone or in any combination with other features and elements. In addition, the methods described herein may be implemented in a computer program, software, or firmware incorporated in a computer-readable medium for execution by a computer or processor. Examples of computer-readable media include electronic signals (transmitted via a wired or wireless connection) and computer-readable storage media. Examples of computer-readable storage media include, but are not limited to, read-only memory (ROM), random access memory (RAM), registers, cache memory, semiconductor memory devices, magnetic media (such as built-in hard disks and removable disks), magneto-optical media, and optical media (such as CD-ROM disks and digital versatile disks (DVDs)). A processor associated with software may be used to implement a radio frequency transceiver for a WTRU, UE, terminal, base station, RNC, or any host computer.

Claims

1. A device for video decoding, comprising: A processor, the processor being configured to: Obtain a merge candidate list for a prediction unit PU in the current picture; Obtaining a symmetric affine merge candidate based on the affine merge candidate in the merge candidate list, wherein the symmetric affine merge candidate includes a first symmetric motion vector difference MVD; generating an updated merge candidate list for prediction of the MVD of the PU, wherein the updated merge candidate list includes the affine merge candidate and the symmetric affine merge candidate; and Based on the prediction of the MVD of the PU, the current picture including the PU is decoded. 2 . The apparatus of claim 1 , wherein the first symmetric MVD is determined based on an MVD of a first control point associated with the affine merge candidate.

3. The apparatus of claim 2, wherein the symmetric affine merge candidate further comprises a second symmetric MVD, and the processor is further configured to: The second symmetric MVD is determined using a scaling factor that is the inverse of a scaling factor associated with a second control point of the affine merge candidate.

4. The apparatus of claim 2, wherein the symmetric affine merge candidate further comprises a second symmetric MVD, and the processor is further configured to: The second symmetric MVD is determined using a rotation angle that is opposite in direction to a rotation angle associated with a second control point of the affine merge candidate. 5 . The apparatus of claim 1 , wherein the first symmetric MVD indicates a translation MVD that is symmetric to the MVD of the control point associated with the affine merge candidate.

6. The apparatus of claim 1 , wherein the affine merge candidate is associated with a first reference picture and the symmetric affine merge candidate is associated with a second reference picture, and wherein a first picture order count (POC) difference associated with the current picture and the first reference picture and a second POC difference associated with the current picture and the second reference picture are the same. 7 . The apparatus of claim 1 , wherein the updated merge candidate list is generated by inserting the symmetric affine merge candidate into the merge candidate list. 8 . The apparatus of claim 1 , wherein the affine merge candidate is a uni-predictive merge candidate or a bi-predictive merge candidate. 9 . The apparatus of claim 1 , wherein the updated merge candidate list further includes a zero MVD, and wherein a position of the symmetric affine merge candidate precedes a position of the zero MVD.

10. The device of claim 1, wherein the processor is further configured to: selecting the symmetric affine merge candidate from the updated merge candidate list for the prediction of the MVD of the PU; and A motion vector associated with the PU is determined based on a motion vector predictor MVP associated with the PU and the symmetric affine merge candidate, wherein the current picture is decoded based on the motion vector associated with the PU.

11. A method for video decoding, comprising: Obtain a merge candidate list for a prediction unit PU in the current picture; Obtaining a symmetric affine merge candidate based on the affine merge candidate in the merge candidate list, wherein the symmetric affine merge candidate includes a first symmetric motion vector difference MVD; generating an updated merge candidate list for prediction of the MVD of the PU, wherein the updated merge candidate list includes the affine merge candidate and the symmetric affine merge candidate; and Based on the prediction of the MVD of the PU, the current picture including the PU is decoded. 12 . The method of claim 11 , wherein the first symmetric MVD is determined based on an MVD of a first control point associated with the affine merge candidate.

13. The method of claim 12, wherein the symmetric affine merge candidate further comprises a second symmetric MVD, and the method further comprises: The second symmetric MVD is determined using a scaling factor that is the inverse of a scaling factor associated with a second control point of the affine merge candidate.

14. The method of claim 12, wherein the symmetric affine merge candidate further comprises a second symmetric MVD, and the method further comprises: The second symmetric MVD is determined using a rotation angle that is opposite in direction to a rotation angle associated with a second control point of the affine merge candidate.

15. A device for video encoding, comprising: A processor, the processor being configured to: Obtain a merge candidate list for a prediction unit PU in the current picture; Obtaining a symmetric affine merge candidate based on the affine merge candidate in the merge candidate list, wherein the symmetric affine merge candidate includes a first symmetric motion vector difference MVD; generating an updated merge candidate list for prediction of the MVD of the PU, wherein the updated merge candidate list includes the affine merge candidate and the symmetric affine merge candidate; and Based on the prediction of the MVD of the PU, the current picture including the PU is encoded.

16. The apparatus of claim 15, wherein the first symmetric MVD is determined based on an MVD of a first control point associated with the affine merge candidate.

17. A device according to claim 15, wherein the symmetric affine merge candidate also includes a second symmetric MVD, and the processor is further configured to determine the second symmetric MVD using at least one of a scaling factor or a rotation angle, wherein the scaling factor is inverse to the scaling factor associated with the second control point of the affine merge candidate, and wherein the rotation angle is in opposite direction to the rotation angle associated with the second control point of the affine merge candidate.

18. A method for video encoding, comprising: Obtain a merge candidate list for a prediction unit PU in the current picture; Obtaining a symmetric affine merge candidate based on the affine merge candidate in the merge candidate list, wherein the symmetric affine merge candidate includes a first symmetric motion vector difference MVD; generating an updated merge candidate list for prediction of the MVD of the PU, wherein the updated merge candidate list includes the affine merge candidate and the symmetric affine merge candidate; and Based on the prediction of the MVD of the PU, the current picture including the PU is encoded.

19. The method of claim 18, wherein the first symmetric MVD is determined based on an MVD of a first control point associated with the affine merge candidate.

20. The method of claim 18, wherein the symmetric affine merge candidate further comprises a second symmetric MVD, and the method further comprises determining the second symmetric MVD using at least one of a scaling factor or a rotation angle, wherein the scaling factor is inverse to the scaling factor associated with the second control point of the affine merge candidate, and wherein the rotation angle is in opposite direction to the rotation angle associated with the second control point of the affine merge candidate.

21. A device for video decoding, comprising: The processor is configured as: Obtaining a first initial motion vector MV associated with the first reference picture list and a second initial MV associated with the second reference picture list; Obtaining an MV candidate associated with the first reference picture list based on the first initial MV; obtaining, based on the second initial MV, an MV candidate associated with the second reference picture list; determining a sum of absolute differences (SAD) based on MV candidates associated with the first reference picture list and MV candidates associated with the second reference picture list; and A modified MV of the current block is obtained based on the SAD.

Images