A method for solving the problem of chip breakage in Micro LED wafer bonding process

In the Micro LED wafer bonding process, laser etching is used to form deep grooves and carry out Mg ion implantation, the thermal mismatch problem caused by differences in substrate materials is solved, the chipping rate is reduced, and product quality and economy are improved.

CN119364945BActive Publication Date: 2025-03-14WEIJIU (SUZHOU) OPTOELECTRONICS TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202411875618.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-12-19
Publication Date
2025-03-14
Estimated Expiration
2044-12-19

AI Technical Summary

Technical Problem

In the Micro LED wafer bonding process, due to the different lattice constants and thermal expansion coefficients of the upper and lower substrate materials, thermal mismatch problems and fragmentation occurs.

Method used

By laser etching on the substrate surface of the sapphire substrate, a deep groove of a periodic grating structure or a bull eye ring structure is formed, stress is released, and Mg ion implantation is performed in the deep groove, the lattice constant of the sapphire substrate is changed, its hardness is improved, and the generation of fragmentation is reduced during the wafer bonding process.

Benefits of technology

It effectively solves the problem of chipping in the Micro LED wafer bonding process, reduces the chipping rate, increases the material loss rate of Micro LED screen, and thus reduces the product price.

✦ Generated by Eureka AI based on patent content.

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Abstract

A method for solving the problem of broken pieces in the bonding process of Micro LED wafers belongs to the field of processing technology of semiconductor devices. The method first involves cleaning the substrate surface of a sapphire substrate GaN epitaxial wafer, then laser etching the substrate surface to obtain a deep groove with a periodic grating structure or a bull's eye ring structure, then growing a SiO2 layer on the substrate surface, spin-coating a positive photoresist and curing it, then performing mask exposure on the photoresist film in the deep groove, decomposing the exposed photoresist film to expose the SiO2 layer in the deep groove; after removing the SiO2 layer in the deep groove, Mg ion implantation is performed to obtain an ion implantation layer in the deep groove. The method of the present invention can effectively release substrate stress and reduce the hardness of the GaN epitaxial wafer so that it can better match the hardness of silicon-based CMOS, all of which effectively reduce the generation of broken pieces in the bonding process of Micro LED wafers.
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Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor device processing technology, and specifically relates to a method for solving the problem of chip breakage in a Micro LED wafer bonding process. Background Art

[0002] Currently, there are two mainstream chip transfer solutions in the Micro LED field: Solution one is mass transfer (for example, multiple large-area Micro LED chips are transferred to glass or PCB substrates at one time through electrostatic adsorption, van der Waals force, fluid assembly, laser transfer, etc.); Solution two is wafer bonding. The current mainstream solution is eutectic bonding (Wafer to Wafer), which refers to coating the entire surface of sapphire / silicon substrate GaN epitaxial wafers (that is, growing N-GaN / quantum well / P-GaN structures on sapphire / silicon substrates, which is the current mainstream LED epitaxial structure) and silicon-based CMOS with metal, and using high temperature to heat two or more materials to a molten state, so that their surfaces fuse with each other and form a strong connection during the cooling process.

[0003] Eutectic bonding has low bonding accuracy requirements, so it is widely used. However, when the upper and lower substrates of eutectic bonding are made of different materials, the two substrates have different lattice constants and thermal expansion coefficients, which will lead to thermal mismatch problems and thus cause fragmentation. Figure 1 As shown, during eutectic bonding, external pressure makes the silicon-based CMOS and the sapphire substrate GaN epitaxial wafer completely fit together; in the subsequent heating process, due to the small thermal expansion coefficient of silicon-based CMOS, the silicon-based CMOS will expand less than the sapphire substrate GaN epitaxial wafer after heating; in the cooling process after the metal fusion is completed, the silicon-based CMOS will shrink less than the sapphire substrate GaN epitaxial wafer, so the sapphire substrate GaN epitaxial wafer will warp upward due to the external pressure, and the sapphire substrate GaN epitaxial wafer has high hardness, while the silicon-based CMOS is relatively soft. During the heating and cooling process, the silicon-based CMOS will often crack or even break. Summary of the invention

[0004] The purpose of the present invention is to provide a method for solving the problem of chip breakage in a Micro LED wafer bonding process.

[0005] The method for solving the problem of chip breakage in the Micro LED wafer bonding process described in the present invention comprises the following steps:

[0006] 1) Clean the substrate surface of the sapphire substrate GaN epitaxial wafer to remove organic and inorganic impurities on the substrate surface; then soak and wash it with pure water, rinse it with pure water 2 to 3 times, and then spin dry;

[0007] 2) The substrate surface of the sapphire substrate GaN epitaxial wafer obtained in step 1) is laser etched to obtain deep grooves with a periodic grating structure or a bull's eye ring structure, thereby effectively releasing the stress of the sapphire substrate;

[0008] 3) Making a SiO2 hard mask: growing a 400-600 nm thick SiO2 layer on the substrate surface after etching the deep groove in step 2), then spin coating a positive photoresist on the SiO2 layer and curing it to prepare a photoresist film with a thickness of 600-800 nm; then performing mask exposure on the photoresist film in the deep groove, decomposing the exposed photoresist film to expose the SiO2 layer in the deep groove; then removing the SiO2 layer in the deep groove not covered by the photoresist film, and finally washing away the remaining photoresist film outside the deep groove;

[0009] 4) Perform Mg ion implantation on the device with SiO2 hard mask made in step 3) to obtain an ion implantation layer in the deep groove, change the lattice constant of the sapphire substrate, and improve the hardness of the sapphire substrate; then perform wafer bonding, thereby effectively solving the problem of broken pieces generated in the Micro LED wafer bonding process.

[0010] Furthermore, in step 1), the structure of the GaN epitaxial wafer on sapphire substrate is a sapphire substrate, an N-GaN layer, a quantum well layer and a P-GaN layer, wherein the thickness of the sapphire substrate is 600-900 μm, the thickness of the N-GaN layer is 3-6 μm, the thickness of the quantum well layer is 220-260 nm, and the thickness of the P-GaN layer is 200-220 nm; the structure of the quantum well layer is an InGaN or AlGaN doped layer, and the emission wavelength of the GaN epitaxial wafer on sapphire substrate is adjusted by the doping ratio of In and Al.

[0011] In step 2), laser etching is performed using a 1064 nm red laser; the etching depth of the deep groove is 300-500 μm, the etching width of the deep groove is 1-10 μm, and the spacing of the deep groove is 3-5 μm;

[0012] In step 3), a SiO2 layer is grown by chemical vapor deposition (CVD), and the SiO2 layer in the deep groove not covered by the photoresist film is removed by plasma etching (ICP);

[0013] In step 4), since there is no SiO2 layer in the deep groove, Mg ion implantation can be performed; the Mg ion implantation conditions are: energy 200 keV, injection direction perpendicular to the substrate surface, and injection depth of 20~40 nm; Mg reacts chemically with aluminum oxide, the main component of sapphire, to form magnesium aluminum oxide, which changes the lattice constant of the sapphire substrate and improves the hardness of the sapphire substrate, thereby effectively solving the problem of fragmentation generated in the Micro LED wafer bonding process.

[0014] The content to be protected by this application is not limited to the above technical solutions. Other technicians can refer to the detailed technical parameters and process flow charts provided in this application, combine them with common industrial manufacturing equipment and standard operating procedures, and optimize the parameter range to achieve the various performance indicators claimed in this application.

[0015] Effects and benefits of the present invention:

[0016] Firstly, the sapphire substrate is prone to warping due to its high hardness, and the warping is aggravated after the GaN epitaxial structure is grown. The present invention can effectively release stress by making deep grooves with a periodic structure on the sapphire substrate. Secondly, after Mg ions are implanted into the sapphire substrate, it reacts with aluminum oxide (a component of sapphire) to generate magnesium aluminum oxide, which changes the lattice constant of aluminum oxide and reduces the hardness of the GaN epitaxial wafer on the sapphire substrate, so that it can better match the hardness of silicon-based CMOS. All of these effectively reduce the generation of fragments in the Micro LED wafer bonding process.

[0017] Currently, in the Micro LED process, the chip breakage rate of bonding is close to 50%, which increases the material loss of the Micro LED screen and causes the price of the Micro LED screen to remain high. The present invention can effectively improve the chip breakage problem in the Micro LED bonding process. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 : Schematic diagram showing that the GaN epitaxial wafer on sapphire substrate is severely warped when it is bonded to silicon-based CMOS;

[0019] Figure 2 : Schematic diagram of etching deep grooves (periodic grating structure or bull's eye ring structure) on the substrate surface of a sapphire substrate GaN epitaxial wafer;

[0020] Figure 3 :Process flow chart for making deep grooves on the substrate surface of GaN epitaxial wafer on sapphire substrate and performing ion implantation;

[0021] Figure 4 : Schematic diagram of the device after ion implantation. DETAILED DESCRIPTION

[0022] Example 1: Figure 3 As shown, the method for solving the problem of chip breakage in the Micro LED wafer bonding process described in the present invention comprises the following steps:

[0023] 1) Clean the substrate surface of the sapphire substrate GaN epitaxial wafer to remove surface organic matter (using concentrated sulfuric acid + hydrogen peroxide solution, the concentration ratio of the two is 7:1) and inorganic matter (using acetone + isopropanol for cleaning), then soak and wash with pure water for 5 minutes, and rinse with pure water for 3 minutes. After the above two steps are repeated twice, the surface is dried;

[0024] The structure of the GaN epitaxial wafer on sapphire substrate is sapphire substrate, N-GaN layer, quantum well layer and P-GaN layer, wherein the thickness of the sapphire substrate is 800 μm, the thickness of the N-GaN layer is 4.5 μm, the thickness of the quantum well layer is 240 nm, and the thickness of the P-GaN layer is 210 nm; the structure of the quantum well layer is an InGaN doped layer, and the emission wavelength of the GaN epitaxial wafer on sapphire substrate is adjusted by the doping ratio of In;

[0025] 2) Using a 1064 nm red laser, deep grooves are etched on the substrate surface of the sapphire substrate GaN epitaxial wafer obtained in step 1), and the etching conditions are: laser light source moving speed 50 mm / s, frequency 30KHz, laser pulse width 10 ns, laser power 15 W; the etching depth of the deep groove is 400 μm, the etching width of the deep groove is 5 μm, and the spacing of the deep groove is 3.75 μm; the deep groove is a periodic grating structure deep groove or a bull's eye ring structure deep groove, such as Figure 2 As shown;

[0026] 3) Preparation of hard mask: After etching the deep groove in step 2), a 500nm SiO2 layer was grown using PECVD under the following growth conditions: temperature 250℃, power 100W, nitrous oxide flow rate 1600sccm, silane flow rate 225sccm, and pressure 1600mT; then, photoresist (photoresist 7500, positive photoresist) was spin-coated on the SiO2 layer at a speed of 1000R / s and cured at 120℃ for 120s. The thickness of the prepared photoresist film was 700 μm; then, the photoresist film in the deep groove was exposed with a mask, and the exposure energy during exposure was 80 mJ, after exposure, the mask is removed and then the exposed photoresist film in the deep groove is decomposed by a development process (using a 2.38% by mass tetramethylammonium hydroxide aqueous solution as a developer), thereby exposing the SiO2 layer in the deep groove (the SiO2 layer outside the deep groove is still covered by the photoresist film), and the SiO2 layer in the deep groove is removed by ICP, and the remaining photoresist film is washed away. The ICP process conditions are: ICP power 180 W, RF power 60 W, CF4 flow rate 80 sccm, gas pressure 5 mT;

[0027] 4) performing ion implantation on the device with hard mask obtained in step 3), wherein the implantation element is Mg, the energy is 200 keV, the implantation direction is perpendicular to the substrate surface, and the implantation depth is 30 nm;

[0028] 5) The device obtained in step 4) and the surface of the silicon-based CMOS are respectively plated with the entire surface of the metal, that is, a 200nm ITO film is first evaporated on the P-GaN layer of the device obtained in step 4) by electron beam evaporation process, and annealing treatment is performed (annealing temperature is 475 degrees Celsius, annealing time is 3 minutes, annealing atmosphere is oxygen atmosphere); then a metal layer is deposited, the evaporation scheme is such as eBeam and Sputter, the metal layer includes a chromium blocking protective layer (100nm) and a "titanium layer (20nm)-platinum layer (20nm)" multi-layer structure and a "tin layer (40nm)-gold layer (20nm)" multi-layer structure deposited on the surface of the chromium blocking layer); a "titanium layer (30nm)-platinum layer (30nm)" stacked structure and a "gold layer (20nm)-tin layer (40nm)" stacked structure are sequentially deposited on the surface of the silicon-based CMOS, and the "titanium layer-platinum layer" stacked structure and the "gold layer-tin layer" stacked structure together constitute the metal layer. Then the wafers are bonded. The bonding steps are: first evacuate the vacuum, then slowly heat up (at a rate of 10°C / min), apply pressure (30KN) when the temperature reaches 280°C and keep it for 10 minutes, and finally gradually cool down to room temperature;

[0029] 6) The sapphire substrate of the device produced in step 5) is subjected to laser stripping, with a laser wavelength of 266 nm, a laser irradiation point pitch of 30 μm, an irradiation frequency of 1000 Hz, a bonding wafer stage temperature of 30 degrees Celsius, and a ring-shaped scheme for irradiation stripping from the outside to the inside;

[0030] 7) The Micro LED table (table width 3.75μm, height 2μm) is made by dry etching, and then the remaining Micro LED processes are carried out (refer to Monochromatic Active Matrix Micro-LED Micro-Displays with>5,000 dpi Pixel Density Fabricated using Monolithic Hybrid Integration Process, SID 2018 DIGEST P-125) to obtain the Micro LED display module (display panel), thereby effectively solving the problem of broken pieces generated in the Micro LED wafer bonding process.

Claims

1. A method for solving the problem of chip breakage in a Micro LED wafer bonding process, characterized by: The steps are as follows: 1) Clean the substrate surface of the sapphire substrate GaN epitaxial wafer to remove organic and inorganic impurities on the substrate surface; then soak and wash it with pure water, rinse it with pure water 2 to 3 times, and then spin dry; 2) The substrate surface of the sapphire substrate GaN epitaxial wafer obtained in step 1) is laser etched to obtain deep grooves with a periodic grating structure or a bull's eye ring structure, thereby effectively releasing the stress of the sapphire substrate; 3) Making a SiO2 hard mask: growing a 400-600 nm thick SiO2 layer on the substrate surface after deep trench etching in step 2), then spin coating a positive photoresist on the SiO2 layer and curing it to prepare a photoresist film with a thickness of 600-800 nm; Then, the photoresist film in the deep groove is exposed through a mask, and the exposed photoresist film is decomposed to expose the SiO2 layer in the deep groove; Then remove the SiO2 layer in the deep grooves not covered by the photoresist film, and finally wash away the remaining photoresist film outside the deep grooves; 4) Perform Mg ion implantation on the device with SiO2 hard mask made in step 3) to obtain an ion implantation layer in the deep groove, change the lattice constant of the sapphire substrate, and improve the hardness of the sapphire substrate; then perform wafer bonding, thereby effectively solving the problem of broken pieces generated in the MicroLED wafer bonding process.

2. The method for solving the problem of chip breakage in the Micro LED wafer bonding process according to claim 1, characterized in that: In step 1), the structure of the GaN epitaxial wafer on sapphire substrate is a sapphire substrate, an N-GaN layer, a quantum well layer and a P-GaN layer, wherein the thickness of the sapphire substrate is 600-900 μm, the thickness of the N-GaN layer is 3-6 μm, the thickness of the quantum well layer is 220-260 nm, and the thickness of the P-GaN layer is 200-220 nm; the structure of the quantum well layer is an InGaN or AlGaN doped layer, and the emission wavelength of the GaN epitaxial wafer on sapphire substrate is adjusted by the doping ratio of In and Al.

3. The method for solving the problem of chip breakage in the Micro LED wafer bonding process according to claim 1, characterized in that: In step 2), laser etching is performed using a 1064 nm red light laser; the etching depth of the deep groove is 300-500 μm, the etching width of the deep groove is 1-10 μm, and the spacing between the deep grooves is 3-5 μm.

4. The method for solving the problem of chip breakage in the Micro LED wafer bonding process according to claim 1, characterized in that: In step 3), chemical vapor deposition is used to grow the SiO2 layer, and plasma etching is used to remove the SiO2 layer in the deep grooves not covered by the photoresist film.

5. The method for solving the problem of chip breakage in the Micro LED wafer bonding process according to claim 1, characterized in that: In step 3), the Mg ion injection conditions are: energy 200 keV, injection direction perpendicular to the substrate surface, and injection depth 20-40 nm.

Citation Information

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