Display device and method of manufacturing same

Abstract

A display device and a method of manufacturing the same are provided. The display device includes: a first pixel electrode disposed on a substrate; a pixel defining layer disposed on the substrate and exposing the first pixel electrode; a first light emitting layer disposed on the first pixel electrode; a first common electrode disposed on the first light emitting layer; a first bank layer disposed on the pixel defining layer; a second bank layer disposed on the first bank layer and having a side surface that protrudes more than a side surface of the first bank layer; a first inorganic layer disposed on the first common electrode and the second bank layer, and spaced apart from an upper surface of the second bank layer; and a first filler disposed between the second bank layer and the first inorganic layer and including a material different from a material of the first light emitting layer.

Description

[0001] This application claims priority to and all benefits arising from Korean Patent Application No. 10-2023-0094280, filed on Jul. 20, 2023, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0002] The disclosed embodiments relate to a display device and a method of manufacturing the display device. Background Art

[0003] With the development of the information society, the demand for display devices for displaying images has increased in various forms. For example, display devices are applied to various electronic devices such as smart phones, digital cameras, notebook computers, navigation devices, and smart TVs. The display device may be a flat panel display device such as a liquid crystal display device, a field emission display device, and an organic light emitting display device. Among such flat panel display devices, the light emitting display device includes a light emitting element that enables each pixel of the display panel to emit light itself. Therefore, the light emitting display device can display an image without a backlight unit that provides light to the display panel.

[0004] Recently, the display device has been applied to eyeglasses for providing virtual reality and augmented reality. For application to eyeglasses, it may be desirable to implement the display device in a very small size of 2 inches or less. However, it may be desirable to have a high pixel density to have a high resolution. For example, it may be desirable to have a high pixel density of 400 pixels per inch (PPI) or more. Summary of the invention

[0005] When a display device to be applied to eyeglass-type equipment is implemented in a very small size and has a high pixel density, it may be difficult to implement a separate light emitting element in each emission region through a mask process because the area of ​​the emission region in which the light emitting element is disposed is reduced.

[0006] The disclosed embodiments provide a display device in which a separate light emitting element can be formed in each emission region without a mask process.

[0007] The disclosed embodiments also provide a display device in which an etchant does not penetrate into a light emitting element during an etching process performed during a manufacturing process of the display device, thereby reducing light emission variation that may occur per pixel.

[0008] However, the disclosed embodiments are not limited to the embodiments set forth herein. The above and other features of the disclosed embodiments will become more apparent to those skilled in the art to which the disclosure pertains by referring to the detailed description of the disclosure given below.

[0009] According to a disclosed embodiment, a display device includes: a first pixel electrode, which is arranged on a substrate; a pixel defining layer, which is arranged on the substrate and exposes the first pixel electrode; a first light-emitting layer, which is arranged on the first pixel electrode; a first common electrode, which is arranged on the first light-emitting layer; a first embankment layer, which is arranged on the pixel defining layer; a second embankment layer, which is arranged on the first embankment layer, wherein a side surface of the second embankment layer protrudes more toward the center of the corresponding light-emitting area than a side surface of the first embankment layer corresponding to the side surface of the second embankment layer; a first inorganic layer, which is arranged on the first common electrode and the second embankment layer, wherein the first inorganic layer is spaced apart from an upper surface of the second embankment layer; and a first filling member, which is arranged between the second embankment layer and the first inorganic layer, wherein the first filling member includes a material different from that of the first light-emitting layer.

[0010] In an embodiment, the first filler may include at least one selected from polyimide, polyamide, benzocyclobutene, phenolic resin, acrylic resin, methacrylic resin, polyisoprene, vinyl-based resin, epoxy-based resin, urethane-based resin, cellulose-based resin, and perylene-based resin.

[0011] In an embodiment, the width of the first filler may be in a range from about 3,000 Angstroms (Å) to about 200,000 Å.

[0012] In an embodiment, the thickness of the first filler may be in a range from about 1,500Å to about 2,500Å.

[0013] In an embodiment, the display device may further include: a second pixel electrode, disposed on the substrate and separated from the first pixel electrode; a second light-emitting layer, disposed on the second pixel electrode; a second common electrode, disposed on the second light-emitting layer and separated from the first common electrode; a second inorganic layer, disposed on the second common electrode and the second embankment layer, wherein the second inorganic layer is separated from the upper surface of the second embankment layer; and a second filling member, disposed between the second embankment layer and the second inorganic layer, wherein the second filling member includes a material different from that of the second light-emitting layer, wherein one end of the second embankment layer may be adjacent to the first common electrode, the opposite end of the second embankment layer may be adjacent to the second common electrode, the width of the second embankment layer may be the distance between one end and the opposite end of the second embankment layer, the first inorganic layer may include a wing portion separated from the upper surface of the second embankment layer and overlapping with the second embankment layer in the thickness direction of the substrate, and the ratio of the width of the wing portion of the first inorganic layer to the width of the second embankment layer may be in the range of 0.20 to 0.50.

[0014] In an embodiment, a ratio of a width of the first filler relative to a width of the second bank may be in a range of 0.15 to 0.50.

[0015] In an embodiment, the first filler may include a first side surface adjacent to a side surface of the second bank layer and a second side surface opposite to the first side surface, wherein the second side surface of the first filler may protrude much more than a side surface of the first inorganic layer corresponding to the second side surface of the first filler.

[0016] In an embodiment, the first filling member may include a first side surface adjacent to a side surface of the second embankment layer and a second side surface which may be a surface opposite to the first side surface, wherein the second side surface of the first filling member may be aligned with a side surface of the first inorganic layer corresponding to the second side surface of the first filling member to form a flat surface.

[0017] In an embodiment, the first filling member may include a first side surface adjacent to a side surface of the second bank layer and a second side surface which may be a surface opposite to the first side surface, wherein the side surface of the first inorganic layer may protrude much more than the second side surface of the first filling member corresponding to the side surface of the first inorganic layer.

[0018] In embodiments, the first inorganic layer may contact the first side surface and the upper surface of the first filler and the lower surface of the second bank layer.

[0019] In an embodiment, the display device may further include an organic encapsulation layer disposed on the first inorganic layer, wherein the organic encapsulation layer may include a material different from that of the first filler.

[0020] In an embodiment, the first common electrode and the second common electrode may be spaced apart from each other, wherein the first common electrode and the second common electrode may contact a side surface of the first bank layer.

[0021] In an embodiment, the display device may further include a residual pattern, wherein the pixel defining layer may be spaced apart from an upper surface of the first pixel electrode, and the residual pattern may be disposed between the pixel defining layer and the upper surface of the first pixel electrode.

[0022] According to a disclosed embodiment, a display device includes: a first pixel electrode and a second pixel electrode, which are arranged on a substrate to be spaced apart from each other; a pixel defining layer, which is arranged on the substrate and exposes the first pixel electrode and the second pixel electrode; a first light-emitting layer and a first common electrode, wherein the first light-emitting layer is arranged on the first pixel electrode, and the first common electrode is arranged on the first light-emitting layer; a second light-emitting layer and a second common electrode, wherein the second light-emitting layer is arranged on the second pixel electrode, and the second common electrode is arranged on the second light-emitting layer; a first bank layer, which is arranged on the pixel defining layer; and a second bank layer, which is arranged on the first bank layer, wherein a side surface of the second bank layer is more oriented toward the side surface of the first bank layer than a side surface of the first bank layer corresponding to the side surface of the second bank layer. protrudes much toward the center of the corresponding light-emitting area; a first inorganic layer is arranged on the first common electrode and the second embankment layer, wherein the first inorganic layer is spaced apart from the upper surface of the second embankment layer; a second inorganic layer is arranged on the second common electrode and the second embankment layer, wherein the second inorganic layer is spaced apart from the upper surface of the second embankment layer and from the first inorganic layer; and a first filling member is arranged between the second embankment layer and the first inorganic layer, wherein the first filling member includes a first side surface adjacent to the side surface of the second embankment layer and a second side surface opposite to the first side surface, wherein the second side surface of the first filling member protrudes much more than the side surface of the first inorganic layer corresponding to the second side surface of the first filling member.

[0023] In an embodiment, the display device may further include an organic encapsulation layer disposed on the first filling member, the second bank layer, and the first inorganic layer, wherein the second bank layer may contact the first filling member and the organic encapsulation layer.

[0024] In an embodiment, one end of the second embankment layer may be adjacent to the first common electrode, the opposite end of the second embankment layer may be adjacent to the second common electrode, the width of the second embankment layer may be the distance between one end and the other end of the second embankment layer, the protruding width of the first filling member may be the width of the second side surface of the first filling member protruding from the side surface of the first inorganic layer, and the ratio of the protruding width of the first filling member to the width of the second embankment layer may be in the range of 0.02 to 0.20.

[0025] According to a disclosed embodiment, a display device includes: a first pixel electrode and a second pixel electrode, which are arranged on a substrate to be spaced apart from each other; a pixel defining layer, which is arranged on the substrate and exposes the first pixel electrode and the second pixel electrode; a first light-emitting layer and a first common electrode, wherein the first light-emitting layer is arranged on the first pixel electrode, and the first common electrode is arranged on the first light-emitting layer; a second light-emitting layer and a second common electrode, wherein the second light-emitting layer is arranged on the second pixel electrode, and the second common electrode is arranged on the second light-emitting layer; a first bank layer, which is arranged on the pixel defining layer; and a second bank layer, which is arranged on the first bank layer, wherein a side surface of the second bank layer is more oriented toward the side surface of the first bank layer than a side surface of the first bank layer corresponding to the side surface of the second bank layer. protrudes much toward the center of the corresponding light-emitting area; a first inorganic layer is arranged on the first common electrode and the second embankment layer, wherein the first inorganic layer is spaced apart from the upper surface of the second embankment layer; a second inorganic layer is arranged on the second common electrode and the second embankment layer, wherein the second inorganic layer is spaced apart from the upper surface of the second embankment layer and from the first inorganic layer; and a first filling member is arranged between the second embankment layer and the first inorganic layer, wherein the first filling member includes a first side surface adjacent to the side surface of the second embankment layer and a second side surface opposite to the first side surface, wherein the side surface of the first inorganic layer protrudes much more than the second side surface of the first filling member corresponding to the side surface of the first inorganic layer.

[0026] In an embodiment, the display device may further include an organic encapsulation layer disposed on the first inorganic layer and the second inorganic layer, wherein the organic encapsulation layer may be in contact with a surface of the first inorganic layer facing an upper surface of the second bank layer.

[0027] According to the disclosed embodiment, the method for manufacturing a display device includes the following steps: forming a pixel electrode and a sacrificial layer on a substrate, forming a pixel defining material layer on the sacrificial layer, forming a first embankment material layer on the pixel defining material layer, and forming a second embankment material layer on the first embankment material layer, wherein the pixel electrodes are spaced apart from each other and the sacrificial layer is disposed on the pixel electrode; exposing the pixel defining material layer by etching portions of the first embankment material layer and the second embankment material layer in an area overlapping with the pixel electrode; etching the side surface of the first embankment material layer in such a manner that portions of the lower surface of the second embankment material layer are exposed; exposing the pixel electrode by etching the exposed portions of the pixel defining material layer and the sacrificial layer; forming a first light emitting layer on the first pixel electrode of the pixel electrode, and forming a first organic material layer on the second embankment material layer; forming a first common electrode on the first light emitting layer, and forming a first electrode material layer on the first organic material layer; forming a first inorganic material layer on the first common electrode and the first electrode material layer; exposing the first electrode material layer by etching a portion of the first inorganic material layer; exposing the second embankment material layer by etching the exposed portions of the first electrode material layer and the first organic material layer; and forming a first filling member on the exposed portions of the second embankment material layer.

[0028] In an embodiment, the step of forming a first filler on the exposed second bank material layer may include: applying the material of the first filler on the second bank material layer by slit coating, spin coating or inkjet printing; filling the second bank material layer and the first inorganic material layer with the material of the first filler by capillary action; and patterning the first filler by a photolithography process.

[0029] In an embodiment, the step of forming a first light-emitting layer on the first pixel electrode of the pixel electrode and the step of forming a first organic material layer on the second embankment material layer may include: cutting the organic material deposited on the substrate into a first light-emitting layer and a first organic material layer that are disconnected from each other through the protruding side surface of the second embankment material layer.

[0030] In an embodiment, the step of exposing the first electrode material layer by etching the portion of the first inorganic material layer may include: removing the portion of the first inorganic material layer by a dry etching process, and the step of exposing the second embankment material layer by etching the exposed portion of the first electrode material layer and the first organic material layer includes: removing the exposed portion of the first electrode material layer and the first organic material layer by a wet etching process.

[0031] In the display device and the method for manufacturing the display device according to the disclosed embodiment, by including a filler between the first inorganic encapsulation layer and the embankment structure, the free radicals of the etchant can be effectively prevented from penetrating between the second embankment layer and the first inorganic encapsulation layer during the etching process. Therefore, in such an embodiment, the damage of the light-emitting element due to the etchant or moisture can be effectively prevented, and the brightness difference between the light-emitting elements can be reduced.

[0032] However, the effects according to the disclosed embodiments are not limited to the effects exemplified above, and various other effects are included herein. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The above and other features of the invention will become more apparent by describing in more detail embodiments of the invention with reference to the accompanying drawings, in which: Figure 1 is a perspective view showing a display device according to an embodiment; Figure 2 Observed from the side Figure 1 A cross-sectional view of a display device; Figure 3 is a plan view showing the arrangement of a light emitting element, a first inorganic encapsulation layer, a filler, and a second bank layer of a display device according to an embodiment; Figure 4 is a cross-sectional view showing a portion of a display device according to an embodiment; Figure 5is a diagram showing the first emission region and the second emission region (specifically, Figure 4 A1) is an enlarged view of the area; Figure 6 is an enlarged view of a display device according to another embodiment; Figure 7 is an enlarged view of a display device according to yet another embodiment; Figure 8 is a cross-sectional view showing penetration of an etchant into a light emitting element when there is no filler; and Figures 9 to 20 are cross-sectional views sequentially illustrating a manufacturing process of a display device according to an embodiment. DETAILED DESCRIPTION

[0034] The invention will now be described more fully hereinafter with reference to the accompanying drawings, in which various embodiments of the invention are shown. However, the invention may be implemented in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the scope of the invention to those skilled in the art.

[0035] It will also be understood that when a layer is referred to as being “on” another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present. Throughout the specification, the same reference numerals refer to the same components.

[0036] It will be understood that although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the teachings of the invention, the first element discussed below may be referred to as the second element. Similarly, the second element may also be referred to as the first element.

[0037] The terms used herein are only for the purpose of describing a specific embodiment and are not intended to be limiting. As used herein, unless the context clearly indicates otherwise, "one", "one (kind / person)", "the (described)" and "at least one (kind / person)" do not represent the limitation of quantity, and are intended to include both the singular and the plural. Therefore, in the claims, mentioning "one (kind / person)" element and then mentioning "the (described)" element includes one element and multiple elements. For example, unless the context clearly indicates otherwise, "one (kind / person) element" has the same meaning as "at least one (kind / person) element". "At least one (kind / person)" should not be interpreted as limiting "one" or "one (kind / person)". "Or" means "and / or". As used herein, the term "and / or" includes any combination and all combinations of one or more of the relevant listed items. It will also be understood that when the terms "include" and / or "comprises" or their variations are used in this specification, it indicates the presence of the stated features, regions, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components and / or groups thereof.

[0038] In addition, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe the relationship of one element to another element as shown in the figure. It will be understood that relative terms are intended to cover different orientations of the device in addition to the orientation depicted in the figure. For example, if the device in a figure is turned over, the element described as being on the "lower" side of the other elements will then be oriented on the "upper" side of the other elements. Therefore, depending on the specific orientation of the figure, the term "lower" can include both "lower" and "upper" orientations. Similarly, if the device in a figure is turned over, the element described as "below" or "below" other elements will then be oriented as "above" the other elements. Therefore, the term "below" or "below" can cover both upper and lower orientations.

[0039] As used herein, "about" or "almost" is inclusive of the stated value and means within an acceptable range of deviation of the particular value determined by one of ordinary skill in the art taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, or ±5% of the stated value.

[0040] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will also be understood that terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0041] Embodiments are described herein with reference to schematically illustrated cross-sectional views of idealized embodiments. As such, variations in the shapes of the illustrations due to, for example, manufacturing techniques and / or tolerances are contemplated. Therefore, the embodiments described herein should not be construed as limited to a particular shape of the region as shown herein, but rather include shape deviations, for example, caused by manufacturing. For example, a region shown or described as flat may typically have rough and / or nonlinear features. In addition, the sharp corners shown may be rounded (rounded). Therefore, the regions shown in the figures are schematic in nature, and their shapes are not intended to illustrate the precise shape of the region, and are not intended to limit the scope of the claims given.

[0042] Hereinafter, disclosed embodiments will be described in detail with reference to the accompanying drawings.

[0043] Figure 1 is a perspective view showing a display device according to an embodiment.

[0044] Reference Figure 1 The display device 10 according to the embodiment may be included in an electronic device on which a screen is provided. The electronic device may refer to all electronic devices that provide a display screen, for example, a television set, a laptop computer, a monitor, a billboard, an Internet of Things (IoT) device, a mobile phone, a smart phone, a tablet personal computer (PC), an electronic watch, smart glasses, a smart watch, a watch phone, a head-mounted display, a mobile communication terminal, an electronic notebook, an electronic book, a portable multimedia player (PMP), a navigation device, a game console, a digital camera, a video camera, etc. that provide a display screen may be included in the electronic device.

[0045] The shape of the display device 10 may be modified in various ways. In an embodiment, for example, the display device 10 may have a shape similar to a rectangular shape having a short side in the first direction DR1 and a long side in the second direction DR2. A third direction DR3 perpendicular to the first direction DR1 and the second direction DR2 may be a thickness direction of the display device 10. A corner where the short side in the first direction DR1 and the long side in the second direction DR2 meet may be a circle (or rounded) with a curvature, but is not limited thereto, and may also be a right angle. The shape of the display device 10 in a plan view is not limited to a rectangular shape, and may be a shape similar to other polygonal shapes, a circular shape, or an elliptical shape.

[0046] The display device 10 may include a display panel 100, a display driver 200, a circuit board 300, and a touch driver 400 (eg, Figure 2 ).

[0047] The display panel 100 may include a main area MA and a sub area SBA.

[0048] The main area MA may include: a display area DA including pixels for displaying an image; and a non-display area NDA disposed around the display area DA. The display area DA may emit light from a plurality of emission areas or a plurality of opening areas. In an embodiment, for example, the display panel 100 may include a pixel circuit including a switching element, a pixel defining layer defining an emission area or an opening area, and a self-luminous element.

[0049] For example, the self-luminous element may include at least one selected from an organic light emitting diode (LED) including an organic light emitting layer, a quantum dot LED including a quantum dot light emitting layer, an inorganic LED including an inorganic semiconductor, and a micro LED, but is not limited thereto.

[0050] A plurality of pixels, a plurality of scan lines, a plurality of data lines, and a plurality of power lines may be provided in the display area DA. Each of the plurality of pixels may be defined as a minimum unit for emitting light, and each of the self-luminous elements described above may be each of the pixels. The plurality of scan lines may supply a scan signal received from a scan driver to the plurality of pixels. The plurality of data lines may supply a data voltage received from a display driver 200 to the plurality of pixels. The plurality of power lines may supply a source voltage received from a display driver 200 to the plurality of pixels.

[0051] The non-display area NDA may be an area outside the display area DA. The non-display area NDA may be defined as an edge area of ​​the main area MA of the display panel 100. The non-display area NDA may include a scan driver for supplying a scan signal to a scan line and a fan-out line for connecting the display driver 200 and the display area DA to each other.

[0052] The sub-region SBA may be a region extending from one side of the main region MA. The sub-region SBA may include a flexible material that may be bent, folded, and curled. In an embodiment, for example, when the sub-region SBA is bent, the sub-region SBA may overlap with the main region MA in the thickness direction (third direction DR3). The sub-region SBA may include a display driver 200 and a pad (or pad or pad) portion connected to the circuit board 300. In another embodiment, the sub-region SBA may be omitted, and the display driver 200 and the pad portion may be disposed in the non-display area NDA.

[0053] The display driver 200 may output a signal and a voltage for driving the display panel 100. The display driver 200 may supply a data voltage to a data line. The display driver 200 may supply a source voltage to a power line, and supply a scan control signal to a scan driver. The display driver 200 may be formed as an integrated circuit (IC), and may be mounted on the display panel 100 in a chip on glass (COG) manner, a chip on plastic (COP) manner, or an ultrasonic bonding manner. In an embodiment, for example, the display driver 200 may be disposed in a sub-region SBA, and may overlap with the main region MA in a thickness direction (third direction DR3) by bending the sub-region SBA. In an embodiment, for example, the display driver 200 may be mounted on a circuit board 300.

[0054] The circuit board 300 may be attached to the pad portion of the display panel 100 using an anisotropic conductive film (ACF). Leads of the circuit board 300 may be electrically connected to the pad portion of the display panel 100. The circuit board 300 may be a flexible printed circuit board, a printed circuit board, or a flexible film such as a chip on film.

[0055] Figure 2 Observed from the side Figure 1 Specifically, Figure 2 Shows Figure 1 A side surface of the display device in a state in which the display device is folded.

[0056] Reference Figure 2 In an embodiment, the display panel 100 may include a substrate SUB, a thin film transistor layer TFTL, a light emitting element layer EML, a thin film encapsulation layer TFEL, and a color filter layer CFL.

[0057] The substrate SUB may be a base substrate or a base member. The substrate SUB may be a flexible substrate that can be bent, folded, and rolled. In an embodiment, for example, the substrate SUB may include a polymer resin such as polyimide (PI), but is not limited thereto. In another embodiment, the substrate SUB may include a glass material or a metal material.

[0058] The thin film transistor layer TFTL may be disposed on the substrate SUB. The thin film transistor layer TFTL may include a plurality of thin film transistors constituting a pixel circuit of a pixel. The thin film transistor layer TFTL may also include a scan line, a data line, a power line, a scan control line, a fan-out line connecting the display driver 200 and the data line to each other, and a lead connecting the display driver 200 and the pad portion to each other. Each of the thin film transistors may include a semiconductor region, a source electrode, a drain electrode, and a gate electrode. In an embodiment in which, for example, a scan driver is disposed or formed on one side of the non-display area NDA of the display panel 100, the scan driver may include a thin film transistor.

[0059] The thin film transistor layer TFTL may be disposed in the display area DA, the non-display area NDA, and the sub-area SBA. The thin film transistor, the scan line, the data line, and the power line of each pixel of the thin film transistor layer TFTL may be disposed in the display area DA. The scan control line and the fan-out line of the thin film transistor layer TFTL may be disposed in the non-display area NDA. The lead line of the thin film transistor layer TFTL may be disposed in the sub-area SBA.

[0060] The light emitting element layer EML may be disposed on the thin film transistor layer TFTL. The light emitting element layer EML may include a plurality of light emitting elements that emit light and a pixel defining layer that defines pixels, each light emitting element including a first electrode, a second electrode and a light emitting layer. The plurality of light emitting elements of the light emitting element layer EML may be disposed in the display area DA.

[0061] In an embodiment, the light emitting layer may be an organic light emitting layer including an organic material. The light emitting layer may include a hole transport layer, an organic light emitting layer, and an electron transport layer. When the first electrode receives an anode voltage through the thin film transistor of the thin film transistor layer TFTL and the second electrode receives a cathode voltage, holes and electrons may move to the organic light emitting layer through the hole transport layer and the electron transport layer, respectively, and may be combined with each other in the organic light emitting layer to emit light.

[0062] In another embodiment, the light emitting element may include a quantum dot LED including a quantum dot light emitting layer, an inorganic LED including an inorganic semiconductor, or a micro LED.

[0063] The thin film encapsulation layer TFEL may cover the upper surface and the side surface of the light emitting element layer EML and may protect the light emitting element layer EML. The thin film encapsulation layer TFEL may include at least one inorganic layer and at least one organic layer for encapsulating the light emitting element layer EML.

[0064] The color filter layer CFL may be disposed on the thin film encapsulation layer TFEL. The color filter layer CFL may include a plurality of color filters each corresponding to a plurality of emission regions. Each of the color filters may selectively allow light of a specific wavelength to be transmitted therethrough, and block or absorb light of other wavelengths. The color filter layer CFL may absorb some of the light introduced from the outside of the display device 10 to reduce light reflected due to external light. Therefore, the color filter layer CFL may effectively prevent color distortion due to external light reflection.

[0065] In an embodiment in which the color filter layer CFL is directly disposed on the thin film encapsulation layer TFEL, the display device 10 may not include a separate substrate for the color filter layer CFL. Therefore, the thickness of the display device 10 may be relatively thin.

[0066] In some embodiments, the display device 10 may further include an optical device. The optical device may emit or receive light in an infrared band, light in an ultraviolet band, and light in a visible light band. In an embodiment, for example, the optical device may be an optical sensor that senses light incident on the display device 10, such as a proximity sensor, an illumination sensor, a camera sensor, a fingerprint sensor, or an image sensor.

[0067] Figure 3 is a plan view showing a part of a display device according to an embodiment. Figure 3 is a plan view showing the arrangement of the light emitting elements ED1 , ED2 , and ED3 , the first inorganic encapsulation layers TL1 , TL2 , and TL3 , the fillers FIL1 , FIL2 , and FIL3 , and the second bank layer BN2 in the display area DA of the display device 10 .

[0068] Reference Figure 3 In an embodiment, the second bank layer BN2 may cover the display area DA but expose a portion of the display area DA. An opening ( Figure 3 The first inorganic encapsulation layer TL1, TL2, and TL3 may cover the light emitting elements ED1, ED2, and ED3 in the openings, and may partially cover the boundary portions of the openings or the second bank layer BN2 defining the openings and the side surfaces of the fillers FIL1, FIL2, and FIL3. The portion of the first inorganic encapsulation layer TL1, TL2, and TL3 covering the boundary portions of the openings may be referred to as a wing, and each of the wing portions may have a width d2 of a predetermined distance. In an embodiment, as Figure 3 As shown in FIG. 1 , a width d1 of each of the fillers FIL1 , FIL2 , and FIL3 may be greater than a width d2 of a wing portion of each of the first inorganic encapsulation layers TL1 , TL2 , and TL3 , but the disclosure is not limited thereto.

[0069] In an embodiment, Figure 3 As shown in , the exposed area not covered by the second bank layer BN2 may have a circular shape, but is not limited thereto. In an embodiment, the exposed area not covered by the second bank layer BN2 may have a polygonal shape such as a triangular shape, a quadrilateral shape, or a hexagonal shape, and the shapes of the first inorganic encapsulation layers TL1, TL2, and TL3 covering the exposed area and the peripheral portion of the exposed area may also be changed or modified. Portions (wings) of the first inorganic encapsulation layers TL1, TL2, and TL3 and the fillers FIL1, FIL2, and FIL3 may be disposed at a level above the second bank layer BN2, and the light emitting elements ED1, ED2, and ED3 may be disposed at a level below the second bank layer BN2.

[0070] The exposed regions not covered by the second bank layer BN2 may be disposed to be spaced apart from each other in the first direction DR1, and may also be disposed to be spaced apart from each other in the second direction DR2. The shape and arrangement of the exposed regions not covered by the second bank layer BN2 are not limited to Figure 3 and the exposed area not covered by the second bank layer BN2 can be formed in the shape and arrangement shown in PENTILE ® Type settings.

[0071] Figure 4 is a cross-sectional view showing a portion of a display device according to an embodiment. Specifically, Figure 4 It is along Figure 3 A cross-sectional view taken along line BB, and showing the arrangement of Figure 3 The organic encapsulation layer TFE2, the second inorganic encapsulation layer TFE3, the color filters CF1, CF2 and CF3, the light blocking layer BM and the overcoat layer OC are shown in the plan view. Figure 4 The cross sections of the substrate SUB, the thin film transistor layer TFTL, the light emitting element layer EML, the thin film encapsulation layer TFEL, and the color filter layer CFL are shown.

[0072] In an embodiment, the thin film transistor layer TFTL may include a first buffer layer BF1, a bottom metal layer BML, a second buffer layer BF2, a thin film transistor TFT, a gate insulating layer GI, a first interlayer insulating layer ILD1, a capacitor electrode CPE, a second interlayer insulating layer ILD2, a first connection electrode CNE1, a first passivation layer PAS1, a second connection electrode CNE2, and a second passivation layer PAS2.

[0073] The first buffer layer BF1 may be disposed on the substrate SUB. The first buffer layer BF1 may include an inorganic layer capable of preventing air or moisture from penetrating. In an embodiment, for example, the first buffer layer BF1 may include a plurality of inorganic layers alternately stacked.

[0074] The bottom metal layer BML may be disposed on the first buffer layer BF1. In an embodiment, for example, the bottom metal layer BML may be formed as a single layer or multiple layers, each of which includes at least one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), and combinations thereof (e.g., alloys) or is made of at least one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), and combinations thereof (e.g., alloys).

[0075] The second buffer layer BF2 may cover the first buffer layer BF1 and the bottom metal layer BML. The second buffer layer BF2 may include an inorganic layer capable of preventing air or moisture from penetrating. In an embodiment, for example, the second buffer layer BF2 may include a plurality of inorganic layers alternately stacked.

[0076] The thin film transistor TFT may be disposed on the second buffer layer BF2 and may constitute a pixel circuit of each of the plurality of pixels. In an embodiment, for example, the thin film transistor TFT may be a driving transistor or a switching transistor of the pixel circuit. The thin film transistor TFT may include a semiconductor layer ACT, a source electrode SE, a drain electrode DE, and a gate electrode GE.

[0077] The semiconductor layer ACT may be disposed on the second buffer layer BF2. The semiconductor layer ACT may overlap the bottom metal layer BML and the gate electrode GE in the thickness direction DR3, and may be insulated from the gate electrode GE by the gate insulating layer GI. The material of the semiconductor layer ACT in the portion of the semiconductor layer ACT may become a conductor to form the source electrode SE and the drain electrode DE.

[0078] The gate electrode GE may be disposed on the gate insulating layer GI. The gate electrode GE may overlap the semiconductor layer ACT in the thickness direction DR3 with the gate insulating layer GI interposed therebetween.

[0079] The gate insulating layer GI may be disposed on the semiconductor layer ACT. In an embodiment, for example, the gate insulating layer GI may cover the semiconductor layer ACT and the second buffer layer BF2 and may insulate the semiconductor layer ACT and the gate electrode GE from each other. The gate insulating layer GI may be provided with a contact hole through which the first connection electrode CNE1 extends.

[0080] The first interlayer insulating layer ILD1 may cover the gate electrode GE and the gate insulating layer GI. The first interlayer insulating layer ILD1 may be provided with a contact hole through which the first connection electrode CNE1 extends. The contact hole of the first interlayer insulating layer ILD1 may be connected to the contact hole of the gate insulating layer GI and the contact hole of the second interlayer insulating layer ILD2.

[0081] The capacitor electrode CPE may be disposed on the first interlayer insulating layer ILD1. The capacitor electrode CPE may overlap the gate electrode GE in the thickness direction DR3. The capacitor electrode CPE and the gate electrode GE may form a capacitor.

[0082] The second interlayer insulating layer ILD2 may cover the capacitor electrode CPE and the first interlayer insulating layer ILD1. The second interlayer insulating layer ILD2 may be provided with a contact hole through which the first connection electrode CNE1 extends. The contact hole of the second interlayer insulating layer ILD2 may be connected to the contact hole of the first interlayer insulating layer ILD1 and the contact hole of the gate insulating layer GI.

[0083] The first connection electrode CNE1 may be disposed on the second interlayer insulating layer ILD2. The first connection electrode CNE1 may electrically connect the drain electrode DE of the thin film transistor TFT and the second connection electrode CNE2 to each other. The first connection electrode CNE1 may be disposed in a contact hole defined or formed in the second interlayer insulating layer ILD2, the first interlayer insulating layer ILD1, and the gate insulating layer GI to contact the drain electrode DE of the thin film transistor TFT.

[0084] The first passivation layer PAS1 may cover the first connection electrode CNE1 and the second interlayer insulating layer ILD2. The first passivation layer PAS1 may protect the thin film transistor TFT. The first passivation layer PAS1 may be provided with a contact hole through which the second connection electrode CNE2 extends.

[0085] The second connection electrode CNE2 may be disposed on the first passivation layer PAS1. The second connection electrode CNE2 may electrically connect the first connection electrode CNE1 and the pixel electrodes AE1, AE2, and AE3 of the light emitting elements ED1, ED2, and ED3 to each other. The second connection electrode CNE2 may be disposed in a contact hole defined or formed in the first passivation layer PAS1 to contact the first connection electrode CNE1.

[0086] The second passivation layer PAS2 may cover the second connection electrode CNE2 and the first passivation layer PAS1. The second passivation layer PAS2 may be provided with contact holes through which the pixel electrodes AE1, AE2, and AE3 of the light emitting elements ED1, ED2, and ED3 extend.

[0087] The light emitting element layer EML may be disposed on the thin film transistor layer TFTL. The light emitting element layer EML may include light emitting elements ED1, ED2, and ED3, a pixel defining layer PDL, a capping layer CAP, and a bank structure BNS. The light emitting elements ED1, ED2, and ED3 may include pixel electrodes AE1, AE2, and AE3, light emitting layers EL1, EL2, and EL3, and common electrodes CE1, CE2, and CE3.

[0088] Figure 5is a diagram showing the first emission region and the second emission region (specifically, Figure 4 Magnified view of area A1).

[0089] Apart from Figure 4 In addition, refer to Figure 5 In an embodiment, the display device 10 may include a plurality of emission areas EA1, EA2, and EA3 disposed or defined in the display area DA. The emission areas EA1, EA2, and EA3 may include areas where light is emitted from the light emitting elements ED1, ED2, and ED3 and passes through the color filter layer CFL in the third direction DR3. The emission areas EA1, EA2, and EA3 may include a first emission area EA1, a second emission area EA2, and a third emission area EA3 that are spaced apart from each other and emit light of the same color or different colors from each other.

[0090] In an embodiment, the area or size of the first emission area EA1, the second emission area EA2, and the third emission area EA3 may be the same as each other. In an embodiment, for example, in the display device 10, the first emission area EA1, the second emission area EA2, and the third emission area EA3 may have the same area as each other. However, the disclosure is not limited thereto. In an embodiment of the display device 10, the area or size of the first emission area EA1, the second emission area EA2, and the third emission area EA3 may be different from each other. In an embodiment, for example, the area of ​​the second emission area EA2 may be larger than the area of ​​the first emission area EA1 and the third emission area EA3, and the area of ​​the third emission area EA3 may be larger than the area of ​​the first emission area EA1. The intensity of the light emitted from the emission areas EA1, EA2, and EA3 may be changed according to the areas of the emission areas EA1, EA2, and EA3, and the color sense of the screen displayed on the display device 10 may be controlled by adjusting the areas of the emission areas EA1, EA2, and EA3. Figure 4 An embodiment is shown in which the areas of the emission areas EA1, EA2, and EA3 are the same as each other, but the disclosure is not limited thereto.

[0091] In an embodiment of the display device 10, one first emission area EA1, one second emission area EA2, and one third emission area EA3 disposed adjacent to each other may form a pixel group. One pixel group may include emission areas EA1, EA2, and EA3 that emit light of different colors to express a white grayscale. However, the disclosure is not limited thereto, and the combination of emission areas EA1, EA2, and EA3 constituting one pixel group may be variously modified according to the arrangement of the emission areas EA1, EA2, and EA3, the color of the light emitted by the emission areas EA1, EA2, and EA3, and the like.

[0092] A plurality of openings formed in the embankment structure BNS of the light emitting element layer EML are defined along the boundary of the embankment structure BNS. The first embankment layer BN1 and the second embankment layer BN2 of the embankment structure BNS may have a shape surrounding the emission areas EA1, EA2, and EA3. The openings may include the first emission area EA1, the second emission area EA2, and the third emission area EA3.

[0093] The display device 10 may include a plurality of light emitting elements ED1, ED2, and ED3 disposed in respective emission areas EA1, EA2, and EA3. The light emitting elements ED1, ED2, and ED3 may include a first light emitting element ED1 disposed in a first emission area EA1, a second light emitting element ED2 disposed in a second emission area EA2, and a third light emitting element ED3 disposed in a third emission area EA3.

[0094] The light emitting elements ED1, ED2 and ED3 may include pixel electrodes AE1, AE2 and AE3, light emitting layers EL1, EL2 and EL3, and common electrodes CE1, CE2 and CE3, respectively, and the light emitting elements ED1, ED2 and ED3 disposed in the corresponding emission areas EA1, EA2 and EA3 may emit light of different colors according to the materials of the light emitting layers EL1, EL2 and EL3, respectively. In an embodiment, for example, the first light emitting element ED1 disposed in the first emission area EA1 may emit a first light (which is red light) having a peak wavelength in the range of about 610 nanometers (nm) to about 650 nm, the second light emitting element ED2 disposed in the second emission area EA2 may emit a second light (which is green light) having a peak wavelength in the range of about 510 nm to about 550 nm, and the third light emitting element ED3 disposed in the third emission area EA3 may emit a third light (which is blue light) having a peak wavelength in the range of about 440 nm to about 480 nm. The first emission area EA1, the second emission area EA2, and the third emission area EA3 constituting one pixel may include light emitting elements ED1, ED2, and ED3 that emit light of different colors to express a white grayscale. Optionally, the light emitting layers EL1, EL2, and EL3 may include two or more materials for emitting light of different colors, so that one light emitting layer may emit mixed light. In an embodiment, for example, the light emitting layers EL1, EL2, and EL3 may include both a red light emitting material and a green light emitting material to emit yellow light, or include all of a red light emitting material, a green light emitting material, and a blue light emitting material to emit white light.

[0095] The pixel electrodes AE1, AE2, and AE3 may be disposed on the second passivation layer PAS2. The pixel electrodes AE1, AE2, and AE3 may be disposed in a plurality of emission areas EA1, EA2, and EA3, respectively. The pixel electrodes AE1, AE2, and AE3 may include a first pixel electrode AE1 disposed in a first emission area EA1, a second pixel electrode AE2 disposed in a second emission area EA2, and a third pixel electrode AE3 disposed in a third emission area EA3. The first pixel electrode AE1, the second pixel electrode AE2, and the third pixel electrode AE3 may be disposed on the second passivation layer PAS2 to be spaced apart from each other, respectively. In an embodiment, as Figure 4 As shown in the figure, the first pixel electrode AE1, the second pixel electrode AE2 and the third pixel electrode AE3 can be spaced apart from each other in the first direction DR1, but the disclosure is not limited thereto, and the first pixel electrode AE1, the second pixel electrode AE2 and the third pixel electrode AE3 can be spaced apart from each other in any direction within a plane formed by the first direction DR1 and the second direction DR2.

[0096] The pixel electrodes AE1, AE2, and AE3 may be electrically connected to the drain electrode DE of the thin film transistor TFT through the first connection electrode CNE1 and the second connection electrode CNE2. The edges of the pixel electrodes AE1, AE2, and AE3 spaced apart from each other are covered by the pixel defining layer PDL so that the first pixel electrode AE1, the second pixel electrode AE2, and the third pixel electrode AE3 may be insulated from each other.

[0097] The pixel electrodes AE1, AE2, and AE3 may include a transparent electrode material and / or a conductive metal material. The conductive metal material may include at least one selected from silver (Ag), copper (Cu), aluminum (Al), nickel (Ni), lanthanum (La), titanium (Ti), and titanium nitride (TiN). The transparent electrode material may include at least one selected from indium tin oxide (ITO), indium zinc oxide (IZO), and indium tin zinc oxide (ITZO). The pixel electrodes AE1, AE2, and AE3 may have a multilayer structure including a transparent electrode material and a conductive metal material.

[0098] The pixel defining layer PDL may be disposed on the second passivation layer PAS2, the residual pattern RP, and the pixel electrodes AE1, AE2, and AE3. The pixel defining layer PDL may be disposed entirely on the second passivation layer PAS2, but may expose portions of the upper surfaces of the pixel electrodes AE1, AE2, and AE3 by covering the side surfaces of the pixel electrodes AE1, AE2, and AE3 and the residual pattern RP. In an embodiment, for example, the pixel defining layer PDL may expose the first pixel electrode AE1 in the first emission area EA1, and the first light emitting layer EL1 may be disposed directly on the first pixel electrode AE1.

[0099] The pixel defining layer PDL may include an inorganic insulating material and may include at least one selected from silicon nitride, silicon oxynitride, silicon oxide, titanium oxide, aluminum oxide, tantalum oxide, hafnium oxide, zinc oxide, and an amorphous silicon layer, but is not limited thereto.

[0100] According to an embodiment, the pixel defining layer PDL may be disposed on the pixel electrodes AE1, AE2, and AE3, but may be spaced apart from the upper surfaces of the pixel electrodes AE1, AE2, and AE3. The pixel defining layer PDL may not be in direct contact with the upper surfaces of the pixel electrodes AE1, AE2, and AE3 while partially overlapping the upper surfaces of the pixel electrodes AE1, AE2, and AE3 along the thickness direction DR3 of the substrate SUB, and the residual pattern RP may be disposed between the pixel defining layer PDL and the pixel electrodes AE1, AE2, and AE3. However, the pixel defining layer PDL may be in direct contact with the side surfaces of the pixel electrodes AE1, AE2, and AE3. The side surface of the pixel defining layer PDL may protrude much more toward the emission areas EA1, EA2, and EA3 than the side surface of the second bank layer BN2.

[0101] The residual patterns RP may be disposed on the edges of the pixel electrodes AE1, AE2, and AE3, respectively. Due to the residual patterns RP, the pixel defining layer PDL may not be in direct contact with the upper surfaces of the pixel electrodes AE1, AE2, and AE3. The residual patterns RP may be formed by removing the sacrificial layer SFL (see FIG. 1 ) disposed on the pixel electrodes AE1, AE2, and AE3 in the manufacturing process of the display device 10. Fig. 9 ) portion. The remaining pattern RP may include a metal, an oxide semiconductor, or a transparent conductive oxide (TCO). The figure shows an embodiment in which the side surface of the remaining pattern RP facing the emission areas EA1, EA2, and EA3 is aligned with the side surface of the pixel defining layer PDL, but the disclosure is not limited thereto. The side surface of the remaining pattern RP may protrude more than the side surface of the pixel defining layer PDL toward the center of the corresponding emission area in the emission areas EA1, EA2, and EA3, or may be more recessed than the side surface of the pixel defining layer PDL.

[0102] The light-emitting layers EL1, EL2 and EL3 may be disposed on the pixel electrodes AE1, AE2 and AE3, respectively. The light-emitting layers EL1, EL2 and EL3 may be organic light-emitting layers formed or made of organic materials, and may be formed on the pixel electrodes AE1, AE2 and AE3, respectively, by a deposition process. The light-emitting layers EL1, EL2 and EL3 may have a multilayer structure, and hole injection materials, hole transport materials, light-emitting materials, electron transport materials and / or electron injection materials may constitute the layers of the light-emitting layers EL1, EL2 and EL3, respectively. When the thin film transistor TFT applies a predetermined voltage to the pixel electrodes AE1, AE2 and AE3 of the light-emitting elements ED1, ED2 and ED3, and the common electrodes CE1, CE2 and CE3 of the light-emitting elements ED1, ED2 and ED3 receive a common voltage or a cathode voltage, holes and electrons may be injected and transported, respectively, and may be recombined with each other in the light-emitting layers EL1, EL2 and EL3 to emit light.

[0103] The light-emitting layers EL1, EL2, and EL3 may include a first light-emitting layer EL1, a second light-emitting layer EL2, and a third light-emitting layer EL3, each of which is disposed in a corresponding emission area EA1, EA2, and EA3. The first light-emitting layer EL1 may be disposed on the first pixel electrode AE1 in the first emission area EA1, the second light-emitting layer EL2 may be disposed on the second pixel electrode AE2 in the second emission area EA2, and the third light-emitting layer EL3 may be disposed on the third pixel electrode AE3 in the third emission area EA3. The plurality of light-emitting layers EL1, EL2, and EL3 may emit light of different colors, respectively, or one light-emitting layer EL1, EL2, or EL3 may emit mixed light. In an embodiment, the first light-emitting layer EL1 may emit red light, the second light-emitting layer EL2 may emit green light, and the third light-emitting layer EL3 may emit blue light. In another embodiment, the first light-emitting layer EL1 may emit yellow light as a mixture of red light and green light, and the second light-emitting layer EL2 may emit blue light. In yet another embodiment, the first light-emitting layer EL1 may emit white light as a mixture of red light, green light, and blue light.

[0104] In an embodiment, the thickness of the light emitting layers EL1 , EL2 , and EL3 may be in a range of about 1,500 angstroms (Å) to about 2,500 Å. The thickness of the light emitting layers EL1 , EL2 , and EL3 may vary according to light emitted from the light emitting layers EL1 , EL2 , and EL3 .

[0105] The light emitting layers EL1, EL2, and EL3 may be disposed on an upper surface of the pixel defining layer PDL. The light emitting layers EL1, EL2, and EL3 may be disposed in a space between the pixel electrodes AE1, AE2, and AE3 and the pixel defining layer PDL. The light emitting layers EL1, EL2, and EL3 may contact the pixel defining layer PDL, the residual pattern RP, and the pixel electrodes AE1, AE2, and AE3.

[0106] The common electrodes CE1, CE2, and CE3 may be disposed on the light emitting layers EL1, EL2, and EL3, respectively. The common electrodes CE1, CE2, and CE3 may include a transparent conductive material to emit light generated from the light emitting layers EL1, EL2, and EL3. The common electrodes CE1, CE2, and CE3 may receive a common voltage or a low potential voltage. When the pixel electrodes AE1, AE2, and AE3 receive a voltage corresponding to the data voltage and the common electrodes CE1, CE2, and CE3 receive a low potential voltage, a potential difference is formed between the pixel electrodes AE1, AE2, and AE3 and the common electrodes CE1, CE2, and CE3, so that the light emitting layers EL1, EL2, and EL3 may emit light.

[0107] The common electrodes CE1, CE2, and CE3 may include a first common electrode CE1, a second common electrode CE2, and a third common electrode CE3, each of which is disposed in the corresponding emission areas EA1, EA2, and EA3. The first common electrode CE1 may be disposed on the first light emitting layer EL1 in the first emission area EA1, the second common electrode CE2 may be disposed on the second light emitting layer EL2 in the second emission area EA2, and the third common electrode CE3 may be disposed on the third light emitting layer EL3 in the third emission area EA3. The first common electrode CE1, the second common electrode CE2, and the third common electrode CE3 may be spaced apart from each other.

[0108] The cover layer CAP may be disposed on the common electrodes CE1, CE2, and CE3. The cover layer CAP may include an organic insulating material or an inorganic insulating material and cover the pattern disposed on the light emitting elements ED1, ED2, and ED3. The cover layer CAP may prevent the light emitting elements ED1, ED2, and ED3 from being damaged due to external air. In an embodiment, the cover layer CAP may include an organic material (such as α-NPD, NPB, TPD, m-MTDATA, Alq 3 , LiF and / or CuPc) or an inorganic material (such as aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride and / or silicon oxynitride).

[0109] The display device 10 may include a plurality of embankment structures BNS disposed on the pixel defining layer PDL. The embankment structure BNS may have a structure in which embankment layers BN1 and BN2 including different materials are sequentially stacked, may include a plurality of openings including emission areas EA1, EA2, and EA3, and may be disposed to overlap with a light blocking layer BM to be described later. The light emitting elements ED1, ED2, and ED3 of the display device 10 may be disposed to overlap with the openings of the embankment structure BNS.

[0110] The bank structure BNS may include a first bank layer BN1 and a second bank layer BN2 sequentially stacked on the pixel defining layer PDL.

[0111] The first bank layer BN1 may be disposed on the pixel defining layer PDL. A side surface of the first bank layer BN1 may be more recessed than a side surface of the pixel defining layer PDL in a direction opposite to a direction toward a center of a corresponding emission region among the emission regions EA1, EA2, and EA3. A side surface of the first bank layer BN1 may be more recessed than a side surface of a second bank layer BN2 to be described later in a direction opposite to a direction toward a center of a corresponding emission region among the emission regions EA1, EA2, and EA3.

[0112] According to an embodiment, the first bank layer BN1 may include a metal material. In an embodiment, the first bank layer BN1 may include aluminum (Al) or an alloy of aluminum (Al).

[0113] In an embodiment, the thickness of the first bank layer BN1 may be in the range of about 4,000 Å to about 7,000 Å. In such an embodiment in which the thickness of the first bank layer BN1 is within the above range, the light emitting layers EL1, EL2, and EL3 and the common electrodes CE1, CE2, and CE3 spaced apart from each other may be effectively formed by a deposition process and an etching process without using a mask process.

[0114] According to an embodiment, the common electrodes CE1, CE2, and CE3 may be in direct contact with the side surface of the first bank layer BN1. The common electrodes CE1, CE2, and CE3 of different light emitting elements ED1, ED2, and ED3 may be in direct contact with the first bank layer BN1, respectively, and the first bank layer BN1 may include a metal material so that the common electrodes CE1, CE2, and CE3 may be electrically connected to each other through the first bank layer BN1.

[0115] The light emitting layers EL1, EL2, and EL3 may be in direct contact with the side surface of the first bank layer BN1. The contact area between the common electrodes CE1, CE2, and CE3 and the side surface of the first bank layer BN1 may be greater than the contact area between the light emitting layers EL1, EL2, and EL3 and the side surface of the first bank layer BN1. On the side surface of the first bank layer BN1, the common electrodes CE1, CE2, and CE3 may be arranged to have an area larger than that of the light emitting layers EL1, EL2, and EL3, or on the side surface of the first bank layer BN1, the common electrodes CE1, CE2, and CE3 may be arranged to a height higher than that of the light emitting layers EL1, EL2, and EL3. Since the common electrodes CE1, CE2, and CE3 of different light emitting elements ED1, ED2, and ED3 are electrically connected to each other through the first bank layer BN1, it may be advantageous for the common electrodes CE1, CE2, and CE3 to contact the first bank layer BN1 with a larger area.

[0116] The second bank layer BN2 may be disposed on the first bank layer BN1. The second bank layer BN2 may include a tip, which is a region protruding toward the center of the corresponding emission region among the emission regions EA1, EA2, and EA3 more than the first bank layer BN1. Towards the center of the corresponding emission region among the emission regions EA1, EA2, and EA3, a side surface of the second bank layer BN2 may protrude more than a side surface of the first bank layer BN1, that is, a side surface of the second bank layer BN2 may protrude more toward the center of the corresponding emission region among the emission regions EA1, EA2, and EA3 more than a side surface of the first bank layer BN1.

[0117] The side surfaces of the second bank layer BN2 have a shape in which they protrude much more than the side surfaces of the first bank layer BN1 toward the center of the corresponding emission area among the emission areas EA1, EA2 and EA3, and therefore, the undercut structure of the first bank layer BN1 can be formed under the tip of the second bank layer BN2.

[0118] In the display device 10 according to the embodiment, the bank structure BNS includes a tip protruding toward the center of the corresponding emission area in the emission areas EA1, EA2 and EA3, so the light-emitting layers EL1, EL2 and EL3 and the common electrodes CE1, CE2 and CE3 can be formed by a deposition process and an etching process without using a mask process. In such an embodiment, different layers can be formed separately in different emission areas EA1, EA2 and EA3 even by a deposition process. In an embodiment, for example, even if the light-emitting layers EL1, EL2 and EL3 and the common electrodes CE1, CE2 and CE3 of the light-emitting elements ED1, ED2 and ED3 are formed by a deposition process without using a mask, the deposited materials can be disconnected from each other by the bank structure BNS placed therebetween due to the tip of the second bank layer BN2, rather than being connected to each other between the emission areas EA1, EA2 and EA3. By forming the material for forming a specific layer on the entire surface of the display device 10, and then etching and removing the layer formed in the unnecessary area, different layers can be formed separately in different emission areas EA1, EA2 and EA3. In this embodiment of the display device 10, different light-emitting elements ED1, ED2 and ED3 can be formed for each of the emission areas EA1, EA2 and EA3 through a deposition process and an etching process without using a mask process, undesirable components can be omitted from the display device 10, and the area of ​​the non-display area NDA can be minimized.

[0119] The side surface shape of the bank structure BNS may be a structure formed due to the difference in etching rate between the first bank layer BN1 and the second bank layer BN2 in the etching process because the first bank layer BN1 and the second bank layer BN2 include materials different from each other. According to an embodiment, the second bank layer BN2 may include a material having an etching rate slower (or lower) than that of the first bank layer BN1, and the first bank layer BN1 may be further etched in the etching process, so that the lower surface of the tip of the second bank layer BN2 may be exposed, and an undercut may be formed below the tip of the second bank layer BN2.

[0120] The second bank layer BN2 may include a metal material different from the metal material of the first bank layer BN1. The metal material of the second bank layer BN2 may be any material that is removed by dry etching together with the metal material of the first bank layer BN1 but has an etching rate significantly slower than that of the first bank layer BN1 or is not etched relative to wet etching. In an embodiment, the first bank layer BN1 may include aluminum (Al), and the second bank layer BN2 may include titanium (Ti).

[0121] The tip of the second bank layer BN2 may overlap with the common electrodes CE1, CE2, and CE3 in a direction perpendicular to the substrate SUB or in a third direction DR3. In addition, the tip of the second bank layer BN2 may overlap with the light-emitting layers EL1, EL2, and EL3 in a direction perpendicular to the substrate SUB or in a third direction DR3. In addition, the tip of the second bank layer BN2 may overlap with the pixel defining layer PDL in a direction perpendicular to the substrate SUB or in a third direction DR3. The common electrodes CE1, CE2, and CE3 may be formed below the lower surface of the tip of the second bank layer BN2. The maximum vertical distance from the substrate SUB to each of the common electrodes CE1, CE2, and CE3 may be less than the maximum vertical distance from the substrate SUB to the second bank layer BN2.

[0122] The thin film encapsulation layer TFEL may be disposed on the light emitting elements ED1, ED2, and ED3 and the embankment structure BNS, and may cover the plurality of light emitting elements ED1, ED2, and ED3 and the embankment structure BNS. The thin film encapsulation layer TFEL may include at least one inorganic layer to prevent oxygen or moisture from penetrating into the light emitting element layer EML. The thin film encapsulation layer TFEL may include at least one organic layer to protect the light emitting element layer EML from foreign matter such as dust.

[0123] In an embodiment, the thin film encapsulation layer TFEL may include a first inorganic encapsulation layer TFE1 , an organic encapsulation layer TFE2 , and a second inorganic encapsulation layer TFE3 which are sequentially stacked.

[0124] Each of the first and second inorganic encapsulating layers TFE1 and TFE3 may include one or more inorganic insulating materials, such as aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and / or silicon oxynitride.

[0125] The organic encapsulation layer TFE2 may include a polymer material. The polymer material may include acrylic resin, epoxy resin, polyimide, polyethylene, etc. In an embodiment, for example, the organic encapsulation layer TFE2 may include an acrylic resin such as polymethyl methacrylate or polyacrylic acid. The organic encapsulation layer TFE2 may be formed by curing a monomer or applying a polymer.

[0126] The first inorganic encapsulation layer TFE1 may be disposed on the light emitting elements ED1, ED2, and ED3 and the embankment structure BNS. The first inorganic encapsulation layer TFE1 may include a first inorganic layer TL1, a second inorganic layer TL2, and a third inorganic layer TL3 that are disposed to correspond to different emission areas EA1, EA2, and EA3, respectively. The first inorganic layer TL1, the second inorganic layer TL2, and the third inorganic layer TL3 may include an inorganic insulating material and cover the light emitting elements ED1, ED2, and ED3, respectively. The first inorganic layer TL1, the second inorganic layer TL2, and the third inorganic layer TL3 may prevent the light emitting elements ED1, ED2, and ED3 from being damaged due to external air.

[0127] The first inorganic encapsulation layer TFE1 (TL1, TL2, and TL3) may be formed by chemical vapor deposition (CVD), and thus may be formed along the steps on which the layers thereof are deposited. In an embodiment, for example, the first inorganic layer TL1, the second inorganic layer TL2, and the third inorganic layer TL3 may form a thin film even below the undercut of the tip of the bank structure BNS. In an embodiment, as Figures 4 to 6 As shown in the figure, the first inorganic encapsulation layers TL1, TL2 and TL3 can seal the light-emitting elements ED1, ED2 and ED3 with uneven thickness along the outer surfaces of the light-emitting elements ED1, ED2 and ED3, but are not limited thereto. Alternatively, the first inorganic encapsulation layers TL1, TL2 and TL3 can be arranged with uniform thickness along the upper surface, side surface and lower surface of the second bank layer BN2, the side surface of the first bank layer BN1 and the upper surface of the common electrodes CE1, CE2 and CE3.

[0128] The first inorganic layer TL1 may not overlap with the second opening and the third opening, and may be disposed only in the first opening, on the first light-emitting element ED1, and on the embankment structure BNS surrounding the first opening and the first light-emitting element ED1. The second inorganic layer TL2 may not overlap with the first opening and the third opening, and may be disposed only in the second opening, on the second light-emitting element ED2, and on the embankment structure BNS surrounding the second opening and the second light-emitting element ED2. The third inorganic layer TL3 may not overlap with the first opening and the second opening, and may be disposed only in the third opening, on the third light-emitting element ED3, and on the embankment structure BNS surrounding the third opening and the third light-emitting element ED3.

[0129] The first inorganic layer TL1 may be formed after forming the first common electrode CE1, the second inorganic layer TL2 may be formed after forming the second common electrode CE2, and the third inorganic layer TL3 may be formed after forming the third common electrode CE3. The first inorganic layer TL1, the second inorganic layer TL2, and the third inorganic layer TL3 may be disposed on the bank structure BNS to be spaced apart from each other.

[0130] The first inorganic encapsulation layer TL1, TL2 and TL3 may include: a main body TL1_M and TL2_M surrounded by a bank structure BNS; wing portions TL1_W and TL2_W spaced apart from the upper surface of the second bank layer BN2 and overlapping the second bank layer BN2 in the thickness direction of the substrate SUB or in the third direction DR3; and connecting portions TL1_C and TL2_C connecting the main body TL1_M and TL2_M and the wing portions TL1_W and TL2_W, respectively. Although the main body, wing and connecting portions of the third inorganic layer TL3 are not shown in the figure, it will be understood by those skilled in the art that the main body, wing and connecting portions of the third inorganic layer TL3 are not shown in the figure. Figure 5 The main portions TL1_M and TL2_M, the wing portions TL1_W and TL2_W, and the connecting portions TL1_C and TL2_C of the first inorganic layer TL1 and the second inorganic layer TL2 shown in FIG. 1 are substantially the same.

[0131] The main body TL1_M and TL2_M of the first inorganic encapsulation layer TL1, TL2 and TL3 may be in contact with the lower surface of the second bank layer BN2 and the side surface of the first bank layer BN1, and may cover the cover layer CAP and the common electrodes CE1, CE2 and CE3. The wing portions TL1_W and TL2_W of the first inorganic encapsulation layer TL1, TL2 and TL3 may be regions overlapping with the second bank layer BN2 on top of the second bank layer BN2. The width d2 of each of the wing portions TL1_W and TL2_W may be the maximum distance, that is, the maximum width in the first direction DR1 of the region where the first inorganic encapsulation layer TL1, TL2 and TL3 on top of the second bank layer BN2 overlaps with the second bank layer BN2. The width d2 of the wing portion may be the same throughout the first inorganic layer TL1, the second inorganic layer TL2 and the third inorganic layer TL3, or may be different from each other.

[0132] The fillers FIL1, FIL2, and FIL3 may be disposed on the second bank layer BN2 and may be disposed between the first inorganic encapsulation layers TL1, TL2, and TL3. The fillers FIL1, FIL2, and FIL3 may fill the space between the upper surface of the second bank layer BN2 and the wing portions TL1_W and TL2_W of the first inorganic encapsulation layers TL1, TL2, and TL3. The exposed sides of the connection portions TL1_C and TL2_C of the first inorganic encapsulation layers TL1, TL2, and TL3 may be covered by the fillers FIL1, FIL2, and FIL3.

[0133] Each of the fillers FIL1, FIL2, and FIL3 may have a first side surface FIL1_S11 adjacent to a side surface or a tip of a corresponding connection portion among the connection portions TL1_C and TL2_C of the first inorganic encapsulation layers TL1, TL2, and TL3 or the second bank layer BN2. The fillers FIL1, FIL2, and FIL3 may have a second side surface FIL1_S21 as a surface opposite to the first side surface FIL1_S11.

[0134] The width d1 of the fillers FIL1 , FIL2 , and FIL3 may be a maximum distance in the first direction DR1 in a cross-sectional view. Figure 5 An embodiment is shown in which the width d1 of the filling members FIL1, FIL2 and FIL3 is greater than the width d2 of the wing portions TL1_W and TL2_W of the first inorganic encapsulation layer, and the second side surface FIL1_S21 of each of the filling members FIL1, FIL2 and FIL3 protrudes much more than the side surface TL1_S of each of the first inorganic encapsulation layers TL1, TL2 and TL3 in a direction opposite to the direction toward the center of the corresponding emission area among the emission areas EA1, EA2 and EA3. Figure 6 Shows the corresponding Figure 5 The embodiment of area A1_1 of area A1 and showing that the width d1_1 of each of the filling members FIL1_1 and FIL2_1 is the same as or similar to the width d2 of each of the wing portions TL1_W and TL2_W of the first inorganic encapsulation layer, and the second side surface FIL1_S22 of each of the filling members FIL1_1 and FIL2_1 is aligned with the side surface TL1_S of each of the first inorganic encapsulation layers TL1, TL2 and TL3, respectively, to form a flat surface. Figure 7 Shows the corresponding Figure 5 Another embodiment is shown in which the width d1_2 of each of the fillers FIL1_2 and FIL2_2 is smaller than the width d2 of each of the wing portions TL1_W and TL2_W of the first inorganic encapsulation layer, and the side surface TL1_S of each of the first inorganic encapsulation layers TL1, TL2, and TL3 protrudes more than the second side surface FIL1_S23 of each of the fillers FIL1_2 and FIL2_2 in the direction opposite to the direction toward the center of the corresponding emission area in the emission areas EA1, EA2, and EA3. Here, the fact that the side A protrudes more than the side B may refer to the case where the side A is located outside the extended side of the side B.

[0135] In an embodiment, after forming the first light emitting layer EL1, the first common electrode CE1 and the first inorganic layer TL1 in the first emission area EA1, the second light emitting layer EL2, the second common electrode CE2 and the second inorganic layer TL2 may be formed in the second emission area EA2. In such an embodiment, the material is deposited on the substrate SUB as a whole, so that Fig.17 As shown in , the second light-emitting material layer ELL2, the second electrode material layer CEL2 and the second inorganic material layer TLL2 may be formed on the first inorganic layer TL1 covering the first emission region EA1 and the periphery of the first emission region EA1. The second light-emitting material layer ELL2 may include the same material as the second light-emitting layer EL2 or be made of the same material as the second light-emitting layer EL2, and the second electrode material layer CEL2 may include the same material as the second common electrode CE2 or be made of the same material as the second common electrode CE2.

[0136] In the case where the fillers FIL1, FIL2, and FIL3 are not provided on the top surface of the second bank layer BN2 and between the first inorganic encapsulation layers TL1, TL2, and TL3, due to the undercut structure under the wing portion TL1_W of the first inorganic layer TL1, the second light emitting material layer ELL2 and the second electrode material layer CEL2 are disconnected from each other at the boundary of the first inorganic layer TL1 and have a gap therebetween, as shown in FIG. Figure 8 As shown in . After the second inorganic material layer TLL2 is formed above the second light-emitting material layer ELL2 and the second electrode material layer CEL2, only the second inorganic layer TL2 arranged in and around the second emission area EA2 is left, and the second inorganic material layer TLL2 arranged in the remaining area is removed by an etching process. In this case, the free radicals of the etchant used to remove the second inorganic material layer TLL2 penetrate into the gap between the second light-emitting material layer ELL2 and the second electrode material layer CEL2 that are disconnected from each other. The free radicals that penetrate into the gap remove the first inorganic layer TL1 and weaken the adhesion or encapsulation between the embankment structure BNS and the first inorganic layer TL1. This may cause damage to the first light-emitting element ED1 and become a dark spot in the display device 10.

[0137] In an embodiment, the fillers FIL1, FIL2, and FIL3 are disposed on the top surface of the second bank layer BN2 and between the first inorganic encapsulation layers TL1, TL2, and TL3, so that the second light-emitting material layer ELL2 and the second electrode material layer CEL2 can completely cover the outer surface of the first inorganic layer TL1, the first filler FIL1, and the second bank layer BN2 without being disconnected. In such an embodiment, when the first filler FIL1 is disposed, the step coverage can be improved. The first inorganic layer TL1 is surrounded by the first filler FIL1 and / or the second light-emitting material layer ELL2, and thus is not exposed to the etchant. Therefore, in such an embodiment, damage to the first light-emitting element ED1 can be effectively prevented, and the brightness difference between the light-emitting elements ED1, ED2, and ED3 can be reduced.

[0138] The width d1 of the fillers FIL1, FIL2, and FIL3 may be greater than or less than or substantially equal to the width d2 of the wings TL1_W and TL2_W of the first inorganic encapsulation layers TL1, TL2, and TL3. In embodiments where the width d1 of the fillers FIL1, FIL2, and FIL3 is greater than the width d2 of the wings TL1_W and TL2_W of the first inorganic encapsulation layers TL1, TL2, and TL3, the protruding width (d1-d2) of the fillers FIL1, FIL2, and FIL3 may be defined as the width of the second side surface FIL1_S21 of the fillers FIL1, FIL2, and FIL3 protruding from the side surface TL1_S of the first inorganic encapsulation layers TL1, TL2, and TL3. In embodiments where the value of the width d1 is greater than the value of the width d2, the effect of preventing the radical penetration of the etchant may be maximized. In embodiments, the width d1 of the fillers FIL1, FIL2, and FIL3 may be in the range of about 3,000Å to about 200,000Å. A width d1 of each of the first filler FIL1 , the second filler FIL2 , and the third filler FIL3 may be the same as or different from each other.

[0139] The width d3 of the second bank layer BN2 may be Figure 3 The minimum distance between the areas not covered by the second bank layer BN2 and exposed in the cross-sectional view of . In an embodiment, the second bank layer BN2 may include one end and another end (or an opposite end), the one end may be adjacent to the first common electrode CE1 or the first light-emitting element ED1, and the other end (or the opposite end) may be adjacent to the second common electrode CE2 or the second light-emitting element ED2 opposite to the one end. The width d3 of the second bank layer BN2 may be defined as the distance between the one end and the other end (or the opposite end) of the second bank layer BN2. The width d3 of the second bank layer BN2 may be the same between multiple emission regions, or may vary between emission regions.

[0140] In an embodiment, a ratio (d2 / d3) of a width d2 of the wings TL1_W and TL2_W of the first inorganic encapsulation layers TL1, TL2, and TL3 relative to a width d3 of the second bank layer BN2 may be in a range of 0.20 to 0.50. In such an embodiment where the ratio (d2 / d3) is in the above range, the wings TL1_W and TL2_W may maintain their shapes without bending even during a washing process and an etching process.

[0141] In an embodiment, a ratio (d1 / d3) of a width d1 of the fillers FIL1, FIL2, and FIL3 relative to a width d3 of the second bank layer BN2 may be in a range of 0.15 to 0.50. In such an embodiment where the ratio (d1 / d3) is in the above range, the fillers FIL1, FIL2, and FIL3 may be disposed adjacent to the connection portions TL1_C and TL2_C of the first inorganic encapsulation layers TL1, TL2, and TL3, and increase adhesion to the first inorganic encapsulation layers TL1, TL2, and TL3, thereby preventing penetration of the etchant. In an embodiment where the first filler FIL1 and the second filler FIL2 disposed on the second bank layer BN2 each have a d1 / d3 value of 0.5, the entire upper surface of the second bank layer BN2 disposed between the first emission area EA1 and the second emission area EA2 may be covered by the first filler FIL1 and the second filler FIL2.

[0142] The first inorganic encapsulation layer TL1 , TL2 , and TL3 may contact the first side surfaces FIL1_S11 and upper surfaces of the fillers FIL1 , FIL2 , and FIL3 and the bottom surface of the second bank layer BN2 to prevent moisture penetration from external air or penetration of plasma or etchant.

[0143] In an embodiment, a ratio ((d1-d2) / d3) of the protruding width (d1-d2) of the fillers FIL1, FIL2, and FIL3 relative to the width d3 of the second bank layer BN2 may be in a range of 0.02 to 0.20. In such an embodiment, the ratio ((d1-d2) / d3) is within the above range, which can improve the step coverage of the organic material layer and the electrode material layer, and can effectively prevent the penetration of free radicals of the etchant.

[0144] The filling members FIL1, FIL2, and FIL3 fill the region where the organic material layers (or light emitting material layers) ELL1, ELL2, and ELL3, the electrode material layers CEL1, CEL2, and CEL3, and the capping material layer CAPL are formed and then removed, and the thickness of the filling members FIL1, FIL2, and FIL3 may be the same as or similar to the sum of the thickness of the light emitting layers EL1, EL2, and EL3, the common electrodes CE1, CE2, and CE3, and the capping layer CAP. In an embodiment, the thickness of the filling members FIL1, FIL2, and FIL3 may be in the range of about 1,500Å to about 2,500Å.

[0145] The fillers FIL1, FIL2 and FIL3 may include an organic material. In an embodiment, the fillers FIL1, FIL2 and FIL3 may include at least one selected from polyimide, polyamide, benzocyclobutene, phenolic resin, acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, urethane resin, cellulose resin and perylene resin. The fillers FIL1, FIL2 and FIL3 may include an opaque material and a transparent material. The fillers FIL1, FIL2 and FIL3 may include an organic material different from the organic material of the organic encapsulation layer TFE2 or be made of an organic material different from the organic material of the organic encapsulation layer TFE2. In addition, the fillers FIL1, FIL2 and FIL3 may include a material different from the material of the light-emitting layers EL1, EL2 and EL3.

[0146] The organic encapsulation layer TFE2 is disposed on the second bank layer BN2, the first inorganic encapsulation layers TL1, TL2 and TL3, and the fillers FIL1, FIL2 and FIL3. Portions of the organic encapsulation layer TFE2 may be disposed between the plurality of fillers FIL1, FIL2 and FIL3. Portions of the second bank layer BN2 may be in direct contact with the fillers FIL1, FIL2 and FIL3 and the organic encapsulation layer TFE2. In an embodiment where the value of the width d2 is greater than the width d1_2, a portion of the organic encapsulation layer TFE2 may be in contact with the surface of the first inorganic encapsulation layers TL1, TL2 and TL3 facing the upper surface of the second bank layer BN2 and the upper surface of the second bank layer BN2.

[0147] The second inorganic encapsulation layer TFE3 may be disposed on the organic encapsulation layer TFE2. The second inorganic encapsulation layer TFE3 may include aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and / or silicon oxynitride.

[0148] Return to reference Figure 4, the light blocking layer BM may be disposed on the thin film encapsulation layer TFEL. The light blocking layer BM may include a plurality of holes OPT1, OPT2, and OPT3 disposed to overlap with the emission areas EA1, EA2, and EA3. In an embodiment, for example, the first hole OPT1 may be defined to overlap with the first emission area EA1. The second hole OPT2 may be defined to overlap with the second emission area EA2, and the third hole OPT3 may be defined to overlap with the third emission area EA3. The area or size of each of the holes OPT1, OPT2, and OPT3 may be larger than the area or size of each of the emission areas EA1, EA2, and EA3. The holes OPT1, OPT2, and OPT3 of the light blocking layer BM may be defined or formed to be larger than the emission areas EA1, EA2, and EA3, and therefore, the light emitted from the emission areas EA1, EA2, and EA3 may be seen by the user not only from the front surface of the display device 10, but also from the side surface of the display device 10.

[0149] The light blocking layer BM may include a light absorbing material. In an embodiment, for example, the light blocking layer BM may include an inorganic black pigment or an organic black pigment. The inorganic black pigment may be carbon black, and the organic black pigment may include at least one selected from lactam black, perylene black, and aniline black, but the disclosure is not limited thereto. The light blocking layer BM may effectively prevent color mixing caused by penetration of visible light between the first emission area EA1, the second emission area EA2, and the third emission area EA3, thereby improving the color gamut of the display device 10.

[0150] The display device 10 may include a plurality of color filters CF1, CF2, and CF3 disposed on the emission areas EA1, EA2, and EA3. The plurality of color filters CF1, CF2, and CF3 may be disposed to correspond to the emission areas EA1, EA2, and EA3, respectively. In an embodiment, for example, the color filters CF1, CF2, and CF3 may be disposed on a light blocking layer BM including a plurality of holes OPT1, OPT2, and OPT3 disposed to correspond to the emission areas EA1, EA2, and EA3. The holes OPT1, OPT2, and OPT3 of the light blocking layer BM may be formed to overlap with the emission areas EA1, EA2, and EA3 or the openings of the embankment structure BNS, and may form a light emitting area through which light emitted from the emission areas EA1, EA2, and EA3 is emitted. Each of the color filters CF1, CF2, and CF3 may have an area larger than each of the holes OPT1, OPT2, and OPT3 of the light blocking layer BM, and may completely cover the light emitting area formed by each of the holes OPT1, OPT2, and OPT3.

[0151] The color filters CF1, CF2, and CF3 may include a first color filter CF1, a second color filter CF2, and a third color filter CF3 that are arranged to correspond to different emission areas EA1, EA2, and EA3, respectively. The color filters CF1, CF2, and CF3 may include a colorant (such as a dye or a pigment) that absorbs light of a wavelength band other than light of a specific wavelength band, and may be arranged to correspond to the color of the light emitted from the emission areas EA1, EA2, and EA3. In an embodiment, for example, the first color filter CF1 may be a red color filter that is arranged to overlap with the first emission area EA1 and allows only the first light as red light to be transmitted through. The second color filter CF2 may be a green color filter that is arranged to overlap with the second emission area EA2 and allows only the second light as green light to be transmitted through, and the third color filter CF3 may be a blue color filter that is arranged to overlap with the third emission area EA3 and allows only the third light as blue light to be transmitted through.

[0152] A plurality of color filters CF1, CF2 and CF3 may be spaced apart from other adjacent color filters CF1, CF2 and CF3 on the light blocking layer BM. The color filters CF1, CF2 and CF3 may have an area larger than the holes OPT1, OPT2 and OPT3 of the light blocking layer BM while covering the holes OPT1, OPT2 and OPT3 of the light blocking layer BM respectively, but may have an area sufficient to be spaced apart from other color filters CF1, CF2 and CF3 on the light blocking layer BM. However, the disclosure is not limited thereto. A plurality of color filters CF1, CF2 and CF3 may be arranged to partially overlap with other adjacent color filters CF1, CF2 and CF3. Different color filters CF1, CF2 and CF3 may overlap each other on the light blocking layer BM, which is an area not overlapped with the emission areas EA1, EA2 and EA3. In an embodiment of the display device 10, the color filters CF1, CF2 and CF3 are arranged to overlap each other, so that the intensity of light reflected by external light can be reduced. In such an embodiment, by adjusting the arrangement, shape, area, etc. of the color filters CF1, CF2, CF3 in a plan view, the color sense of the light reflected by the external light can be controlled.

[0153] An overcoat layer OC may be disposed on the color filters CF1, CF2, and CF3 to flatten the upper ends of the color filters CF1, CF2, and CF3. The overcoat layer OC may be a colorless light-transmitting layer having no color in the visible light band. For example, the overcoat layer OC may include a colorless light-transmitting organic material such as acrylic resin.

[0154] Hereinafter, a manufacturing process of the display device 10 according to the embodiment (ie, processes of a method of manufacturing the display device 10 ) will be described with reference to other drawings.

[0155] Figures 9 to 20are detailed cross-sectional views sequentially illustrating a manufacturing process of a display device according to an embodiment.

[0156] exist Figures 9 to 20 , a process of forming a dam structure BNS and light-emitting elements ED1, ED2, and ED3 as a light-emitting element layer EML and a thin film encapsulation layer TFEL of the display device 10 is schematically shown. Hereinafter, a description of a detailed process of forming corresponding layers in a manufacturing process of the display device 10 will be omitted, and an order of forming corresponding layers will be described.

[0157] Reference Fig. 9 In an embodiment, a plurality of pixel electrodes AE1, AE2, and AE3, a sacrificial layer SFL, a pixel defining material layer PDLL, and a plurality of bank material layers BNL1 and BNL2, which are spaced apart from each other, are integrally formed on the second passivation layer PAS2.

[0158] Despite Fig. 9 1. However, a thin film transistor layer TFTL may be provided on the substrate SUB, and the structure of the thin film transistor layer TFTL is the same as that of the above reference. Figure 4 The structures described are the same and any repeated detailed description thereof will be omitted.

[0159] Then, refer to Fig.10 , a photoresist (not shown) is formed on the second bank material layer BNL2, and a first etching process is performed to etch portions of the first bank material layer BNL1 and the second bank material layer BNL2 using the photoresist as a mask. Through the first etching process, a hole may be formed. The photoresist may be disposed to be spaced apart from each other on the second bank material layer BNL2, and may be disposed to expose an area overlapping the plurality of pixel electrodes AE1, AE2, and AE3.

[0160] In an embodiment, anisotropic dry etching may be performed as the first etching process. A hole may be formed in a region overlapping the plurality of pixel electrodes AE1, AE2, and AE3, and an opening of the bank structure BNS may be formed.

[0161] Next, refer to Fig.11 , through the second etching process, an undercut structure of the first bank layer BN1 may be formed. The first bank material layer BNL1 may have a faster (or higher) etching rate than the second bank material layer BNL2, and the side surface of the second bank layer BN2 may be formed to protrude more than the side surface of the first bank layer BN1. The side surface of the second bank layer BN2 protrudes more toward the hole than the side surface of the first bank layer BN1 to form a tip, and an undercut may be formed below the tip.

[0162] In an embodiment, the second etching process may be an isotropic wet etching process. In the second etching process, an alkali-based etchant may be used. Through the second etching process, a bank structure BNS including a first bank layer BN1 and a second bank layer BN2 may be obtained.

[0163] Then, if Fig.12 As shown in , through the third etching process, the pixel defining material layer PDLL may be removed, and the sacrificial layer SFL may also be removed. The third etching process may include a dry etching step for removing the pixel defining material layer PDLL and a wet etching process for removing the sacrificial layer SFL.

[0164] The sacrificial layer SFL may protect the pixel electrodes AE1, AE2, and AE3 from the plasma in the dry etching step. The portion of the sacrificial layer SFL exposed by the hole and the portion of the sacrificial layer SFL between the first bank material layer BNL1 and the pixel electrodes AE1, AE2, and AE3 may be removed. However, the sacrificial layer SFL may not be completely removed and may remain as a residual pattern RP of a portion between the pixel defining layer PDL and the pixel electrodes AE1, AE2, and AE3.

[0165] Through the third etching process, the pixel electrodes AE1, AE2, and AE3 may be exposed. Thereafter, the photoresist (not shown) may be removed.

[0166] Then, if Fig.13 As shown in , a first light emitting layer EL1, a first common electrode CE1 and a capping layer CAP are deposited on the first pixel electrode AE1 to form a first light emitting element ED1. In this process, the first light emitting layer EL1, the first common electrode CE1 and the capping layer CAP are formed on the entire surface of the substrate SUB, and therefore, the first light emitting material layer ELL1, the first electrode material layer CEL1 and the capping material layer CAPL may also be formed on the second bank layer BN2.

[0167] The first light emitting layer EL1 and the first light emitting material layer ELL1 may be separated from each other due to the tip of the second bank layer BN2, the first common electrode CE1 and the first electrode material layer CEL1 may be separated from each other due to the tip of the second bank layer BN2, and the capping layer CAP and the capping material layer CAPL may be separated from each other due to the tip of the second bank layer BN2. The first light emitting layer EL1 is formed on the first pixel electrode AE1, and the first light emitting material layer ELL1 may be formed on the second bank layer BN2. The first common electrode CE1 is formed on the first light emitting layer EL1, and the first electrode material layer CEL1 may be formed on the first light emitting material layer ELL1.

[0168] In an embodiment, the first light emitting layer EL1 and the first common electrode CE1 may be formed by a deposition process. Due to the tip of the second bank layer BN2, the material may not be smoothly deposited in the opening. However, the material of the first light emitting layer EL1 and the first common electrode CE1 is deposited in a direction inclined relative to the upper surface of the substrate SUB, rather than in a direction perpendicular to the upper surface of the substrate SUB, and thus may be deposited in an area blocked or covered by the tip of the second bank layer BN2.

[0169] The deposition process for forming the common electrodes CE1, CE2, and CE3 may be performed in an inclined direction relatively close to the horizontal direction than the deposition process for forming the light-emitting layers EL1, EL2, and EL3. Therefore, the common electrodes CE1, CE2, and CE3 may contact the side surface of the first bank layer BN1 with an area larger than that of the light-emitting layers EL1, EL2, and EL3. Alternatively, the common electrodes CE1, CE2, and CE3 may be deposited on the side surface of the first bank layer BN1 to a position higher than that of the light-emitting layers EL1, EL2, and EL3. Different common electrodes CE1, CE2, and CE3 may contact the first bank layer BN1 having high conductivity to be electrically connected to each other.

[0170] Subsequently, a first inorganic material layer TLL1 is formed to cover the first light emitting element ED1 and the cover layer CAP. The first inorganic material layer TLL1 may be formed to completely cover the outer surfaces of the first light emitting element ED1, the bank layers BN1 and BN2, the cover layer CAP, the first light emitting material layer ELL1, the first electrode material layer CEL1, and the cover material layer CAPL without any disconnected portions. Specifically, the first inorganic material layer TLL1 is formed on the upper surface of the first common electrode CE1, the upper surface of the cover layer CAP, the side surface of the first bank layer BN1, the lower surface and side surface of the second bank layer BN2, and the upper surfaces of the first electrode material layer CEL1 and the cover material layer CAPL.

[0171] Next, refer to Fig.14 , a fourth etching process of exposing the capping material layer CAPL is performed by removing a portion of the first inorganic material layer TLL1. In an embodiment, the fourth etching process may be anisotropic dry etching. The first inorganic layer TL1 remains in a region overlapping the first emission region EA1 and in an edge region surrounding the first emission region EA1, and the first inorganic material layer TLL1 in the remaining region is removed.

[0172] Then, refer to Fig.15, a fifth etching process for removing the first light-emitting material layer ELL1, the first electrode material layer CEL1 and the covering material layer CAPL is performed to expose the second bank layer BN2. In an embodiment, the fifth etching process may be an isotropic wet etching operation. Not only the covering material layer CAPL, the first electrode material layer CEL1 and the first light-emitting material layer ELL1 disposed on the second bank layer BN2 may be removed, but also the first light-emitting material layer ELL1, the first electrode material layer CEL1 and the covering material layer CAPL of the second emission area EA2 and the third emission area EA3 that are not covered by the first inorganic layer TL1 may be removed. Therefore, the first light-emitting material layer ELL1, the first electrode material layer CEL1 and the covering material layer CAPL disposed between the wing portion TL1_W of the first inorganic layer TL1 and the second bank layer BN2 may also be removed, and an undercut structure of the first inorganic layer TL1 may be formed.

[0173] Next, if Fig.16 As shown in , a first filler FIL1 may be formed. In an embodiment, a filler material is applied on the second bank layer BN2 by slit coating, spin coating, or inkjet printing, so that the filler material may fill the undercut structure of the first inorganic layer TL1 due to capillary action. That is, the space between the second bank layer BN2 and the first inorganic layer TL1 may be filled with the first filler FIL1. Thereafter, the width d1 of the first filler FIL1 may be adjusted by patterning the first filler FIL1 through a photolithography process. When the first inorganic layer TL1 is used as a mask, as shown in FIG. Fig.16 As shown in FIG. 1 , the second side surface FIL1_S22 of the first filler FIL1 is aligned with the side surface TL1_S of the first inorganic layer TL1 to form a flat surface. When a photoresist covering the first inorganic layer TL1 and the surrounding area is used as a mask, as shown in FIG. Figure 5 As shown in FIG. 1 , the second side surface FIL1_S21 of the first filler FIL1 may protrude more than the side surface TL1_S of the first inorganic layer TL1 . In the embodiment, as described above, an organic material may be used as the filler material.

[0174] Then, if Fig.17 As shown in FIG. 1 , a second light emitting layer EL2, a second common electrode CE2 and a capping layer CAP are deposited on the second pixel electrode AE2 to form a second light emitting element ED2. Thereafter, a second inorganic material layer TLL2 is formed to cover the second light emitting element ED2 and the capping layer CAP. In this process, as shown in FIG. Fig.17As shown in , materials are deposited on the entire surface of the substrate SUB, and the second light emitting material layer ELL2, the second electrode material layer CEL2 and the covering material layer CAPL can cover the first inorganic layer TL1, the first filler FIL1 and the second bank layer BN2 without disconnection. The second light emitting material layer ELL2 can include the same material as the second light emitting layer EL2 or be made of the same material as the second light emitting layer EL2.

[0175] Next, if Fig.18 As shown in FIG, by removing a portion of the second inorganic material layer TLL2, a second inorganic layer TL2 overlapping the second emission area EA2 and surrounding the edge of the second emission area EA2 may be formed. Fig.14 The dry etching step of removing the first inorganic material layer TLL1 and Fig.15 The process is performed by a wet etching step of removing the capping material layer CAPL, the first electrode material layer CEL1 and the first light emitting material layer ELL1.

[0176] Next, if Fig.19 As shown in FIG. 1 , the second filler FIL2 may be formed in the undercut structure of the second inorganic layer TL2. Fig.16 The process is performed according to the process shown in .

[0177] Thereafter, when similarly executing Fig.17 and Fig.18 When the process shown in Fig. 20 As shown in FIG. 1 , a third light emitting element ED3 and a third inorganic layer TL3 may be formed in the third emission area EA3 .

[0178] Subsequently, although not shown in the drawings, the display device 10 is manufactured by forming an organic encapsulation layer TFE2 and a second inorganic encapsulation layer TFE3 of a thin film encapsulation layer TFEL, a light blocking layer BM, a color filter layer CFL, and an overcoat layer OC on the light emitting elements ED1, ED2, and ED3 and the dam structure BNS. The structures of the thin film encapsulation layer TFEL, the light blocking layer BM, the color filter layer CFL, and the overcoat layer OC are the same as those of the thin film encapsulation layer TFEL, the light blocking layer BM, the color filter layer CFL, and the overcoat layer OC described above, and thus any repeated detailed description thereof will be omitted.

[0179] The invention should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the invention to those skilled in the art.

[0180] While the invention has been particularly shown and described with reference to embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit or scope of the invention as defined by the appended claims.

Claims

1. A display device, comprising: A first pixel electrode is disposed on the substrate; a pixel defining layer, disposed on the substrate and exposing the first pixel electrode; A first light-emitting layer is disposed on the first pixel electrode; A first common electrode, disposed on the first light-emitting layer; A first bank layer is disposed on the pixel defining layer; a second bank layer disposed on the first bank layer, wherein a side surface of the second bank layer protrudes more toward a center of a corresponding light emitting region than a side surface of the first bank layer corresponding to the side surface of the second bank layer; a first inorganic layer disposed on the first common electrode and the second bank layer, wherein the first inorganic layer is spaced apart from an upper surface of the second bank layer; and A first filling member is disposed between the second bank layer and the first inorganic layer, wherein the first filling member includes a material different from a material of the first light emitting layer.

2. The display device according to claim 1, in, The first filler includes at least one selected from polyimide, polyamide, benzocyclobutene, phenolic resin, acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, urethane resin, cellulose resin and perylene resin.

3. The display device according to claim 1, in, The width of the first filler is in the range of 3,000Å to 200,000Å.

4. The display device according to claim 1, in, The thickness of the first filler is in the range of 1,500Å to 2,500Å.

5. The display device according to claim 1, further comprising: a second pixel electrode, disposed on the substrate and spaced apart from the first pixel electrode; A second light emitting layer is disposed on the second pixel electrode; a second common electrode, disposed on the second light-emitting layer and spaced apart from the first common electrode; a second inorganic layer disposed on the second common electrode and the second bank layer, wherein the second inorganic layer is spaced apart from the upper surface of the second bank layer; and a second filling member disposed between the second bank layer and the second inorganic layer, wherein the second filling member comprises a material different from that of the second light emitting layer, Wherein, one end of the second bank layer is adjacent to the first common electrode, An opposite end of the second bank layer is adjacent to the second common electrode, The width of the second bank layer is the distance between the one end and the opposite end of the second bank layer, The first inorganic layer includes a wing portion that is spaced apart from the upper surface of the second bank layer and overlaps the second bank layer in a thickness direction of the substrate, and A ratio of a width of the wing portion of the first inorganic layer to a width of the second bank layer is in a range of 0.20 to 0.

50.

6. The display device according to claim 5, in, A ratio of a width of the first filler to the width of the second bank is in a range of 0.15 to 0.

50.

7. The display device according to claim 1, in, The first filling member includes a first side surface adjacent to a side surface of the second bank layer and a second side surface opposite to the first side surface, and The second side surface of the first filler protrudes more than a side surface of the first inorganic layer corresponding to the second side surface of the first filler.

8. The display device according to claim 1, in, The first filling member includes a first side surface adjacent to a side surface of the second bank layer and a second side surface opposite to the first side surface, and The second side surface of the first filler is aligned with a side surface of the first inorganic layer corresponding to the second side surface of the first filler to form a flat surface.

9. The display device according to claim 1, in, The first filling member includes a first side surface adjacent to a side surface of the second bank layer and a second side surface opposite to the first side surface, and A side surface of the first inorganic layer protrudes more than a second side surface of the first filler corresponding to the side surface of the first inorganic layer.

10. The display device according to claim 7, in, The first inorganic layer contacts the first side surface and the upper surface of the first filler and the lower surface of the second bank layer.

11. The display device according to claim 1, The display device further includes an organic encapsulation layer disposed on the first inorganic layer, and in, The organic encapsulating layer includes a material different from the material of the first filler.

12. The display device according to claim 5, in, The first common electrode and the second common electrode are spaced apart from each other, and The first common electrode and the second common electrode are in contact with the side surface of the first bank layer.

13. The display device according to claim 1, The display device further includes a residual pattern, in, The pixel defining layer is spaced apart from an upper surface of the first pixel electrode, and The remaining pattern is disposed between the pixel defining layer and the upper surface of the first pixel electrode.

14. A display device, comprising: A first pixel electrode and a second pixel electrode are arranged on the substrate to be spaced apart from each other; a pixel defining layer, disposed on the substrate and exposing the first pixel electrode and the second pixel electrode; a first light-emitting layer and a first common electrode, wherein the first light-emitting layer is disposed on the first pixel electrode, and the first common electrode is disposed on the first light-emitting layer; a second light-emitting layer and a second common electrode, the second light-emitting layer being disposed on the second pixel electrode, and the second common electrode being disposed on the second light-emitting layer; A first bank layer is disposed on the pixel defining layer; a second bank layer disposed on the first bank layer, wherein a side surface of the second bank layer protrudes more toward a center of a corresponding light emitting region than a side surface of the first bank layer corresponding to the side surface of the second bank layer; a first inorganic layer disposed on the first common electrode and the second bank layer, wherein the first inorganic layer is spaced apart from an upper surface of the second bank layer; a second inorganic layer disposed on the second common electrode and the second bank layer, wherein the second inorganic layer is spaced apart from the upper surface of the second bank layer and is spaced apart from the first inorganic layer; and a first filling member disposed between the second bank layer and the first inorganic layer, wherein the first filling member includes a first side surface adjacent to the side surface of the second bank layer and a second side surface opposite to the first side surface, The second side surface of the first filler is more protruded than a side surface of the first inorganic layer corresponding to the second side surface of the first filler.

15. The display device according to claim 14, The display device further includes an organic encapsulation layer disposed on the first filler, the second bank layer, and the first inorganic layer. in, The second bank layer contacts the first filler and the organic encapsulation layer.

16. The display device according to claim 14, in, One end of the second bank layer is adjacent to the first common electrode, An opposite end of the second bank layer is adjacent to the second common electrode, The width of the second bank layer is the distance between the one end and the opposite end of the second bank layer, The protrusion width of the first filler is a width of the second side surface of the first filler protruding from the side surface of the first inorganic layer, and A ratio of the protrusion width of the first filler to the width of the second bank is in a range of 0.02 to 0.

20.

17. A display device, comprising: A first pixel electrode and a second pixel electrode are arranged on the substrate to be spaced apart from each other; a pixel defining layer, disposed on the substrate and exposing the first pixel electrode and the second pixel electrode; a first light-emitting layer and a first common electrode, wherein the first light-emitting layer is disposed on the first pixel electrode, and the first common electrode is disposed on the first light-emitting layer; a second light-emitting layer and a second common electrode, the second light-emitting layer being disposed on the second pixel electrode, and the second common electrode being disposed on the second light-emitting layer; A first bank layer is disposed on the pixel defining layer; a second bank layer disposed on the first bank layer, wherein a side surface of the second bank layer protrudes more toward a center of a corresponding light emitting region than a side surface of the first bank layer corresponding to the side surface of the second bank layer; a first inorganic layer disposed on the first common electrode and the second bank layer, wherein the first inorganic layer is spaced apart from an upper surface of the second bank layer; a second inorganic layer disposed on the second common electrode and the second bank layer, wherein the second inorganic layer is spaced apart from the upper surface of the second bank layer and is spaced apart from the first inorganic layer; and a first filling member disposed between the second bank layer and the first inorganic layer, wherein the first filling member includes a first side surface adjacent to the side surface of the second bank layer and a second side surface opposite to the first side surface, The side surface of the first inorganic layer protrudes more than the second side surface of the first filler corresponding to the side surface of the first inorganic layer.

18. The display device according to claim 17, The display device further includes an organic encapsulation layer disposed on the first inorganic layer and the second inorganic layer. in, The organic encapsulating layer is in contact with a surface of the first inorganic layer facing the upper surface of the second bank layer.

19. A method for manufacturing a display device, the method comprising the following steps: forming a pixel electrode and a sacrificial layer on a substrate, forming a pixel defining material layer on the sacrificial layer, forming a first bank material layer on the pixel defining material layer, and forming a second bank material layer on the first bank material layer, wherein the pixel electrodes are spaced apart from each other and the sacrificial layer is disposed on the pixel electrodes; exposing the pixel defining material layer by etching portions of the first bank material layer and the second bank material layer in a region overlapping the pixel electrode; etching a side surface of the first bank material layer in such a manner that a portion of a lower surface of the second bank material layer is exposed; exposing the pixel electrode by etching the exposed portion of the pixel definition material layer and the sacrificial layer; forming a first light emitting layer on a first pixel electrode of the pixel electrode, and forming a first organic material layer on the second bank material layer; forming a first common electrode on the first light-emitting layer, and forming a first electrode material layer on the first organic material layer; forming a first inorganic material layer on the first common electrode and the first electrode material layer; exposing the first electrode material layer by etching a portion of the first inorganic material layer; exposing the second bank material layer by etching the exposed portion of the first electrode material layer and the first organic material layer; and A first filling member is formed on the exposed portion of the second bank material layer.

20. The method according to claim 19, in, The step of forming the first filling member on the exposed second bank material layer comprises the following steps: applying the material of the first filler on the second bank material layer by slit coating, spin coating or inkjet printing; Filling the space between the second bank material layer and the first inorganic material layer with the material of the first filler by capillary action; and The first filling member is patterned by a photolithography process.

21. The method according to claim 19, in, The steps of forming the first light-emitting layer on the first pixel electrode of the pixel electrode and forming the first organic material layer on the second embankment material layer include: cutting the organic material deposited on the substrate into the first light-emitting layer and the first organic material layer that are disconnected from each other through the protruding side surface of the second embankment material layer.

22. The method according to claim 19, in, The step of exposing the first electrode material layer by etching the portion of the first inorganic material layer comprises: removing the portion of the first inorganic material layer by a dry etching process, and Exposing the second bank material layer by etching the exposed portion of the first electrode material layer and the first organic material layer includes removing the exposed portion of the first electrode material layer and the first organic material layer through a wet etching process.

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