485 differential signal transmission circuit and communication equipment

By designing the 485 differential signal transmission circuit, the use of signal amplification and recovery module enhances the driver and anti -interference capacity of RS485, solved the problem of limited RS485 transmission distance, achieved longer -distance communication and reduced costs.

CN119382645APending Publication Date: 2025-01-28深圳市三旺通信股份有限公司
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Patent Information

Application Number
CN202411432673.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-14
Publication Date
2025-01-28

AI Technical Summary

Technical Problem

The RS485 bus has limited transmission distance and speed in industrial communication scenarios, which is difficult to meet the communication needs of longer distances, and the cost is increased.

Method used

Design a 485 differential signal transmission circuit, including the signal amplifier module and the signal recovery module. By synchronizing amplification and reference voltage recovery, the driving capacity and anti -interference ability of the differential signal are enhanced, and the transmission distance is extended.

Benefits of technology

The RS485's driving capacity and signal anti -interference ability have been improved, the transmission distance is extended, more device connections are supported, and the risk of increasing cost increases.

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Abstract

The invention relates to the technical field of differential transmission, and discloses a 485 differential signal transmission circuit and communication equipment, the 485 differential signal transmission circuit comprises a first signal amplification module, a second signal amplification module, a first signal recovery module and a second signal recovery module; the first signal amplification module and the second signal amplification module are respectively used for synchronously amplifying the reference voltage of the first voltage signal and the reference voltage of the second voltage signal output by the RS485 chip to obtain 485 differential signals output outwards; and the first signal recovery module and the second signal recovery module are respectively used for performing reference voltage recovery on the received two paths of voltage signals so as to obtain 485 differential signals which can be identified by the RS485 chip. According to the 485 differential signal transmission circuit, the driving capability, the on-load node capability and the signal anti-interference capability of the RS485 are enhanced, and the RS485 transmission distance is prolonged.
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Description

Technical Field

[0001] The present application relates to the field of differential transmission technology, and in particular to a 485 differential signal transmission circuit and communication equipment. Background Art

[0002] RS485 bus is one of the commonly used communications in the field of industrial communications. It is often used in smart instruments, smart homes, industrial control and other fields. RS485 used in industrial scenarios supports multi-point communication, allowing a gateway to connect to multiple RS485 devices at the same time. However, based on actual operations, the number of devices connected to RS485 is not satisfactory. Under ideal conditions, such as no electromagnetic interference, no physical damage and no temperature changes, the theoretical maximum transmission distance and rate of RS485 are limited. If a longer transmission distance is required, it can be achieved by adding devices in the middle, but the cost will increase relatively. Summary of the invention

[0003] In view of this, the embodiments of the present application provide a 485 differential signal transmission circuit and a communication device to enhance the driving capability, node carrying capability and signal anti-interference capability of RS485 and extend the transmission distance of RS485.

[0004] In a first aspect, an embodiment of the present application provides a 485 differential signal transmission circuit, comprising a first signal amplification module, a second signal amplification module, a first signal recovery module, a second signal recovery module and an RS485 chip;

[0005] The first end of the first signal amplifying module is connected to the first signal pin of the RS485 chip, and the first end of the second signal amplifying module is connected to the second signal pin of the RS485 chip;

[0006] The first signal amplification module and the second signal amplification module are respectively used to synchronously amplify the reference voltages of the first voltage signal and the second voltage signal output by the RS485 chip to obtain a 485 differential signal outputted externally;

[0007] The second end of the first signal amplifying module is connected to the first end of the first signal recovery module, and the second end of the first signal recovery module is connected to the first signal pin of the RS485 chip;

[0008] The second end of the second signal amplifying module is connected to the first end of the second signal recovery module, and the second end of the second signal recovery module is connected to the second signal pin of the RS485 chip;

[0009] The first signal recovery module and the second signal recovery module are respectively used to perform reference voltage recovery on the two received voltage signals to obtain a 485 differential signal that can be recognized by the RS485 chip.

[0010] In a first possible embodiment of the first aspect, the first signal amplification module and the second signal amplification module both include a primary forward transmission unit and a secondary forward transmission unit, the power supply voltage of the primary forward transmission unit is a first power supply, and the power supply voltage of the secondary forward transmission unit is a second power supply;

[0011] The first-level forward transmission unit and the second-level forward transmission unit are used to perform level comparison and voltage conversion on the first voltage signal and the second voltage signal in sequence to synchronously amplify the reference voltages of the first voltage signal and the second voltage signal.

[0012] In a second possible embodiment of the first aspect, the first signal recovery module and the second signal recovery module include a primary reverse transmission unit and a secondary reverse transmission unit, a power supply voltage of the primary reverse transmission unit is the second power supply, and a power supply voltage of the secondary reverse transmission unit is the first power supply;

[0013] The first-level reverse transmission unit and the second-level reverse transmission unit are used to sequentially perform multiple level comparisons and voltage conversions on the first voltage signal and the second voltage signal after the reference voltage is amplified, so as to restore the reference voltage of the first voltage signal and the second voltage signal.

[0014] In a third possible embodiment of the first aspect, a voltage of the second power supply is greater than a voltage of the first power supply.

[0015] In a fourth possible embodiment of the first aspect, the first-level forward transmission unit includes a first NAND gate, and the second-level forward transmission unit includes a second NAND gate;

[0016] The first end of the first NAND gate is connected to the first signal pin or the second signal pin, the second end of the first NAND gate is connected to the first power supply, the third end of the first NAND gate is connected to the first end and the second end of the second NAND gate, the power supply end of the first NAND gate is connected to the first power supply, and the ground end of the first NAND gate is grounded;

[0017] The third end of the second NAND gate is connected to the first end of the first signal recovery module or the second signal recovery module, the power supply end of the second NAND gate is connected to the second power supply, and the ground end of the second NAND gate is grounded.

[0018] In a fifth possible embodiment of the first aspect, the first-level reverse transmission unit includes a third NAND gate, and the second-level reverse transmission unit includes a fourth NAND gate;

[0019] The first end of the third NAND gate is connected to the third end of the second NAND gate, the second end of the third NAND gate is connected to the second power supply, the third end of the third NAND gate is connected to the first end and the second end of the fourth NAND gate, and the third end of the fourth NAND gate is connected to the first signal pin or the second signal pin.

[0020] In a sixth possible embodiment of the first aspect, the 485 differential signal transmission circuit further includes a current limiting module;

[0021] The first end of the current limiting module is respectively connected to the first signal pin of the RS485 chip and the parallel node of the first signal amplification module and the first signal recovery module, and the second end of the current limiting module is respectively connected to the first power supply and the power supply end of the RS485 chip.

[0022] In a seventh possible embodiment of the first aspect, the 485 differential signal transmission circuit further includes a protection module;

[0023] The first end of the protection module is respectively connected to the second signal pin of the RS485 chip and the parallel node of the second signal amplification module and the second signal recovery module, and the second end of the protection module is grounded.

[0024] In an eighth possible embodiment of the first aspect, the voltage of the second power supply is determined according to the transmission distance of the RS485 chip.

[0025] In a second aspect, an embodiment of the present application provides a communication device, including the above-mentioned 485 differential signal transmission circuit.

[0026] The embodiments of the present application have the following beneficial effects:

[0027] The 485 differential signal transmission circuit of this embodiment includes a first signal amplification module, a second signal amplification module, a first signal recovery module and a second signal recovery module; the first signal amplification module and the second signal amplification module are respectively used to synchronously amplify the reference voltages of the first voltage signal and the second voltage signal output by the RS485 chip to obtain the 485 differential signal output to the outside; the first signal recovery module and the second signal recovery module are respectively used to recover the reference voltage of the two received voltage signals to obtain the 485 differential signal that can be recognized by the RS485 chip. Based on the above scheme, the 485 differential signal transmission circuit can increase the driving capability of the differential signal by amplifying the reference voltage of the differential signal, improve the network's node carrying capacity, and enable the network to support more device connections. The 485 differential signal transmission circuit further improves the signal's anti-interference ability by recovering the reference voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0029] Figure 1 A first structural schematic diagram of a differential signal transmission circuit in embodiment 485 of the present application is shown;

[0030] Figure 2 A second structural schematic diagram of the differential signal transmission circuit of embodiment 485 of the present application is shown;

[0031] Figure 3 A circuit schematic diagram of a differential signal transmission circuit of embodiment 485 of the present application is shown.

[0032] Description of main component symbols:

[0033] 100-485 differential signal transmission circuit; 110-first signal amplification module; 111-first level forward transmission unit; 112-second level forward transmission unit; 120-second signal amplification module; 130-first signal recovery module; 131-first level reverse transmission unit; 132-second level reverse transmission unit; 140-second signal recovery module; 150-RS485 chip; 160-current limiting module; 170-protection module. DETAILED DESCRIPTION

[0034] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.

[0035] The components of the embodiments of the present application generally described and shown in the drawings herein may be arranged and designed in various configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application claimed for protection, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present application.

[0036] Hereinafter, the terms "including", "having" and their cognates that can be used in various embodiments of the present application are intended only to indicate specific features, numbers, steps, operations, elements, components or a combination of the foregoing items, and should not be understood as first excluding the existence of one or more other features, numbers, steps, operations, elements, components or a combination of the foregoing items or increasing the possibility of one or more features, numbers, steps, operations, elements, components or a combination of the foregoing items. In addition, the terms "first", "second", "third" and the like are only used to distinguish descriptions and cannot be understood as indicating or implying relative importance.

[0037] Unless otherwise defined, all terms (including technical terms and scientific terms) used herein have the same meanings as those generally understood by those skilled in the art to which the various embodiments of the present application belong. The terms (such as those defined in generally used dictionaries) will be interpreted as having the same meanings as the contextual meanings in the relevant technical field and will not be interpreted as having idealized meanings or overly formal meanings unless clearly defined in the various embodiments of the present application.

[0038] In conjunction with the accompanying drawings, some embodiments of the present application are described in detail below. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0039] Usually, in order to increase the transmission distance of RS485, the fast-fading differential signal of long-distance transmission can be received into a repeater, and then a new differential signal is sent out by the repeater, but the cost will increase relatively. Therefore, the present application proposes a 485 differential signal transmission circuit to solve the above problems. The 485 differential signal transmission circuit can break through the traditional communication distance of RS485, is suitable for a longer transmission space, and can achieve long-distance communication of several kilometers or even more than ten kilometers. The 485 differential signal transmission circuit can also enhance the driving ability of RS485 and increase the number of nodes connected to the device in actual work.

[0040] The 485 differential signal transmission circuit 100 is described below in conjunction with some specific embodiments.

[0041] Figure 1 A structural schematic diagram of a 485 differential signal transmission circuit 100 of an embodiment of the present application is shown. Exemplarily, the 485 differential signal transmission circuit 100 includes a first signal amplification module 110, a second signal amplification module 120, a first signal recovery module 130 and a second signal recovery module 140. Specifically, the first signal amplification module 110 is connected to the first signal recovery module 130, and the second signal amplification module 120 is connected to the second signal recovery module 140, so as to amplify the reference voltages of the first voltage signal and the second voltage signal, and then recover the reference voltages of the first voltage signal and the second voltage signal.

[0042] In this embodiment, the first end of the first signal amplifying module 110 is connected to the first signal pin A of the RS485 chip 150, and the first end of the second signal amplifying module 120 is connected to the second signal pin B of the RS485 chip 150; the first signal amplifying module 110 and the second signal amplifying module 120 are respectively used to synchronously amplify the reference voltages of the first voltage signal and the second voltage signal output by the RS485 chip 150 to obtain a 485 differential signal output to the outside; the second end of the first signal amplifying module 110 is connected to the first end of the first signal recovery module 130, and the second end of the first signal recovery module 130 is connected to the first signal pin A of the RS485 chip 150; the second end of the second signal amplifying module 120 is connected to the first end of the second signal recovery module 140, and the second end of the second signal recovery module 140 is connected to the second signal pin B of the RS485 chip 150; the first signal recovery module 130 and the second signal recovery module 140 are respectively used to perform reference voltage recovery on the two received voltage signals to obtain a 485 differential signal that can be recognized by the RS485 chip 150. Specifically, the reference voltage is the voltage magnitude of the first voltage signal and the second voltage signal, that is, the voltage value of the first signal pin A and the second signal pin B.

[0043] Exemplarily, the 485 differential signal transmission circuit 100 uses differential signals to perform half-duplex communication through the RS485 chip 150. The RS485 chip 150 includes a first signal pin A and a second signal pin B, providing a transmission line for the differential signal. The 485 differential signal transmission circuit 100 performs current limiting protection through the current limiting module 160. The 485 differential signal transmission circuit 100 includes a protection module 170, which plays a role in reducing interference, improving signal quality and protecting the circuit.

[0044] For example, in one embodiment, Figure 2 As shown, the 485 differential signal transmission circuit 100 also includes a current limiting module 160 and a protection module 170; the first end of the current limiting module 160 is respectively connected to the first signal pin B of the RS485 chip, and the parallel node of the first signal amplification module 110 and the first signal recovery module 130, and the second end of the current limiting module 160 is respectively connected to the first power supply VCC1 and the power supply end of the RS485 chip 150. The first end of the protection module 170 is respectively connected to the second signal pin B of the RS485 chip 150, and the parallel node of the second signal amplification module 120 and the second signal recovery module 140, and the second end of the protection module 170 is grounded GND.

[0045] In order to better understand the 485 differential signal transmission circuit 100, each component in the 485 differential signal transmission circuit 100 is described in detail below.

[0046] In this embodiment, the first signal amplification module 110 and the second signal amplification module 120 include a first-level forward transmission unit 111 and a second-level forward transmission unit 112, the power supply voltage of the first-level forward transmission unit 111 is the first power supply VCC1, and the power supply voltage of the second-level forward transmission unit 112 is the second power supply VCC2; the first-level forward transmission unit 111 and the second-level forward transmission unit 112 are used to perform level comparison and voltage conversion on the first voltage signal and the second voltage signal in turn to synchronously amplify the reference voltages of the first voltage signal and the second voltage signal.

[0047] Exemplary, such as Figure 3 As shown, the first-level forward transmission unit 111 includes a first NAND gate UA, and the second-level forward transmission unit 112 includes a second NAND gate UB; the first end of the first NAND gate UA is connected to the first signal pin A or the second signal pin B, the second end of the first NAND gate UA is connected to the first power supply VCC1, the third end of the first NAND gate UA is connected to the first end and the second end of the second NAND gate UB, the power end of the first NAND gate UA is connected to the first power supply VCC1, and the ground GND end of the first NAND gate UA is grounded GND; the third end of the second NAND gate UB is connected to the first end of the first signal recovery module 130 or the second signal recovery module 140, the power end of the second NAND gate UB is connected to the second power supply VCC2, and the ground GND end of the second NAND gate UB is grounded GND.

[0048] Optionally, the voltage of the second power supply VCC2 is greater than the voltage of the first power supply VCC1, and the voltage of the second power supply VCC1 is determined according to the transmission distance of the RS485 chip 150. For example, the voltage of the first power supply VCC1 may be 5V, and the voltage of the second power supply VCC2 may be 9V, 12V or higher. It is understood that the higher the voltage of the second power supply VCC2, the farther the transmission distance of the RS485 chip 150 can be achieved.

[0049] Specifically, the voltage of the second power supply VCC2 is greater than the voltage of the first power supply VCC1, and the output signal voltage of the first NAND gate UA and the second NAND gate UB is determined by their own power supply voltage. Since the power supply voltage of the first NAND gate UA is less than the power supply voltage of the second NAND gate UB, the first NAND gate UA and the second NAND gate UB can sequentially convert the reference voltages of the first voltage signal and the second voltage signal while performing level comparison to achieve amplification of the reference voltage. For example, the voltage of the first power supply VCC1 is 5V, the voltage of the second power supply VCC2 is 12V, and when the first signal pin A of the RS485 chip 150 outputs a first voltage signal of 5V, after comparison by the first NAND gate UA, a first voltage signal of 0V is output, and after conversion by the second NAND gate UB, a first voltage signal of 12V is output. When the first signal pin A of the RS485 chip 150 outputs a first voltage signal of 0V, after comparison by the first NAND gate UA, a first voltage signal of 5V is output, and after conversion by the second NAND gate UB, the first voltage signal remains at 0V output. When the second signal pin B of the RS485 chip 150 outputs a second voltage signal of 0V, it outputs a second voltage signal of 5V after comparison by the first NAND gate UA, and then after conversion by the second NAND gate UB, the second voltage signal remains output at 0V. When the second signal pin B of the RS485 chip 150 outputs a second voltage signal of 5V, it outputs a second voltage signal of 0V after comparison by the first NAND gate UA, and then after conversion by the second NAND gate UB, it outputs a second voltage signal of 12V.

[0050] It can be understood that the 485 differential signal transmission circuit 100 synchronously amplifies and outputs the differential signal, which will not only not affect the original 485 data, but also because the differential receiver only focuses on the voltage difference between the first voltage signal and the second voltage signal, and can improve the performance of the circuit in many aspects, such as enhancing the driving capability, improving the load node capability, extending the transmission distance, and improving the signal anti-interference capability. The amplification of the differential signal can directly increase the amplitude of the first voltage signal and the second voltage signal on the transmission line, which helps to overcome the signal attenuation caused by the resistance and inductance on the line, thereby enhancing the driving capability of the differential signal. Stronger driving capability means that the differential signal can be transmitted to a farther distance more stably, while reducing the signal distortion or error caused by the attenuation of the differential signal. In the RS485 network, a transmitter may need to drive multiple receivers at the same time. By amplifying the differential signal, it can be ensured that each receiver can receive a differential signal of sufficient strength even when there are multiple loads in the network, which improves the load node capability of the network and enables the network to support more device connections. As mentioned above, amplifying the reference voltage of the differential signal helps to overcome the attenuation of the differential signal during transmission. Therefore, by amplifying the signal, the transmission distance of the differential signal can be extended without sacrificing the quality of the differential signal, which is especially important for application scenarios that require long-distance communication.

[0051] In this embodiment, the first signal recovery module 130 and the second signal recovery module 140 include a primary reverse transmission unit 131 and a secondary reverse transmission unit 132, the power supply voltage of the primary reverse transmission unit 131 is the second power supply VCC2, and the power supply voltage of the secondary reverse transmission unit 132 is the first power supply VCC1; the primary reverse transmission unit 131 and the secondary reverse transmission unit 132 are used to perform multiple level comparisons and voltage conversions on the first voltage signal and the second voltage signal after the reference voltage is amplified in sequence, so as to recover the reference voltage of the first voltage signal and the second voltage signal. Exemplarily, as Figure 3 As shown, the first-level reverse transmission unit 131 includes a third NAND gate UC, and the second-level reverse transmission unit 132 includes a fourth NAND gate UD; the first end of the third NAND gate UC is connected to the third end of the second NAND gate UB, the second end of the third NAND gate UC is connected to the second power supply VCC2, the third end of the third NAND gate UC is connected to the first end and the second end of the fourth NAND gate UD, and the third end of the fourth NAND gate UD is connected to the first signal pin A or the second signal pin B.

[0052] Specifically, the output signal voltage of the third NAND gate UC and the fourth NAND gate UD is determined by their own power supply voltage. Since the power supply voltage of the third NAND gate UC is greater than the power supply voltage of the fourth NAND gate UD, the third NAND gate UC and the fourth NAND gate UD can sequentially convert the reference voltages of the first voltage signal and the second voltage signal while performing level comparison, thereby realizing the recovery of the reference voltage. For example, the voltage of the first power supply VCC1 is 5V, and the voltage of the second power supply VCC2 is 12V. When the first voltage signal maintains 12V output, the reference voltage of the first voltage signal is converted to 0V after comparison by the third NAND gate UC, and the voltage returned to the RS485 chip 150 after level comparison and conversion by the fourth NAND gate UD is 5V. When the first voltage signal maintains 0V output, the reference voltage of the first voltage signal is converted to 12V after comparison by the third NAND gate UC, and the voltage returned to the RS485 chip 150 after level comparison and conversion by the fourth NAND gate UD is 0V. When the second voltage signal maintains 0V output, the reference voltage of the second voltage signal is converted to 12V after comparison by the third NAND gate UC, and the voltage returned to the RS485 chip 150 after level comparison and conversion by the fourth NAND gate UD is 0V. When the second voltage signal maintains 12V output, the reference voltage of the second voltage signal is converted to 0V after comparison by the third NAND gate UC, and the voltage returned to the RS485 chip 150 after level comparison and conversion by the fourth NAND gate UD is 5V.

[0053] It can be understood that the first signal recovery module 130 and the second signal recovery module 140 recover the first voltage signal and the second voltage signal after the reference voltage is amplified, so that the RS485 chip 150 receives the first voltage signal and the second voltage signal adapted to itself, and avoids the RS485 chip 150 receiving the first voltage signal and the second voltage signal of the larger voltage, causing unnecessary damage. The differential signal itself has a certain anti-interference ability, because they transmit information through the voltage difference between the first voltage signal and the second voltage signal. When the first voltage signal and the second voltage signal are amplified, although the noise may also be amplified at the same time, since the differential receiver only pays attention to the voltage difference between the first voltage signal and the second voltage signal, the influence of the noise on the quality of the differential signal is relatively small. In addition, the first signal recovery module 130 and the second signal recovery module 140 realize the recovery function to further improve the anti-interference ability of the differential signal.

[0054] In this embodiment, the current limiting module 160 includes a first current limiting resistor R1, and the protection module 170 includes a second current limiting resistor R2. The first end of the first current limiting resistor R1 is respectively connected to the first power supply and the power supply terminal VCC of the RS485 chip 150, and the second end of the first current limiting resistor R1 is respectively connected to the parallel node of the first signal amplification module 110 and the first signal recovery module 130, and the first signal pin A of the RS485 chip 150. The first end of the second current limiting resistor R2 is respectively connected to the second signal pin B of the RS485 chip 150, and the parallel node of the second signal amplification module 120 and the second signal recovery module 140, and the second end of the second current limiting resistor R2 is grounded GND.

[0055] The present application also provides a communication device, including the 485 differential signal transmission circuit 100 of any of the above embodiments. Specifically, the communication device can be industrial automation equipment, security monitoring equipment, vehicle-mounted terminal equipment, building automation system equipment, etc. The communication device can achieve high-speed data transmission and sharing between multiple devices through data transmission, thereby improving efficiency and convenience.

[0056] The above are only specific implementation methods of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be covered by the protection scope of the present application.

Claims

1. A 485 differential signal transmission circuit, characterized in that: It includes a first signal amplifying module, a second signal amplifying module, a first signal recovery module, a second signal recovery module and an RS485 chip; The first end of the first signal amplifying module is connected to the first signal pin of the RS485 chip, and the first end of the second signal amplifying module is connected to the second signal pin of the RS485 chip; The first signal amplification module and the second signal amplification module are used to synchronously amplify the reference voltages of the first voltage signal and the second voltage signal output by the RS485 chip, respectively, to obtain a 485 differential signal outputted externally; The second end of the first signal amplifying module is connected to the first end of the first signal recovery module, and the second end of the first signal recovery module is connected to the first signal pin of the RS485 chip; The second end of the second signal amplifying module is connected to the first end of the second signal recovery module, and the second end of the second signal recovery module is connected to the second signal pin of the RS485 chip; The first signal recovery module and the second signal recovery module are respectively used to recover the reference voltage of the two received voltage signals to obtain a 485 differential signal that can be recognized by the RS485 chip.

2. The 485 differential signal transmission circuit according to claim 1, characterized in that: The first signal amplification module and the second signal amplification module each include a primary forward transmission unit and a secondary forward transmission unit, the primary forward transmission unit is powered by a first power supply, and the secondary forward transmission unit is powered by a second power supply; The first-level forward transmission unit and the second-level forward transmission unit are used to perform level comparison and voltage conversion on the first voltage signal and the second voltage signal in sequence to synchronously amplify the reference voltages of the first voltage signal and the second voltage signal.

3. The 485 differential signal transmission circuit according to claim 2, characterized in that: The first signal recovery module and the second signal recovery module include a primary reverse transmission unit and a secondary reverse transmission unit, the primary reverse transmission unit is supplied with the second power supply, and the secondary reverse transmission unit is supplied with the first power supply; The first-level reverse transmission unit and the second-level reverse transmission unit are used to sequentially perform multiple level comparisons and voltage conversions on the first voltage signal and the second voltage signal after the reference voltage is amplified, so as to restore the reference voltage of the first voltage signal and the second voltage signal.

4. The 485 differential signal transmission circuit according to claim 3, characterized in that: The voltage of the second power supply is greater than the voltage of the first power supply.

5. The 485 differential signal transmission circuit according to claim 2, characterized in that: The first-level forward transmission unit includes a first NAND gate, and the second-level forward transmission unit includes a second NAND gate; The first end of the first NAND gate is connected to the first signal pin or the second signal pin, the second end of the first NAND gate is connected to the first power supply, the third end of the first NAND gate is connected to the first end and the second end of the second NAND gate, the power supply end of the first NAND gate is connected to the first power supply, and the ground end of the first NAND gate is grounded; The third end of the second NAND gate is connected to the first end of the first signal recovery module or the second signal recovery module, the power supply end of the second NAND gate is connected to the second power supply, and the ground end of the second NAND gate is grounded.

6. The 485 differential signal transmission circuit according to claim 3, characterized in that: The first-level reverse transmission unit includes a third NAND gate, and the second-level reverse transmission unit includes a fourth NAND gate; The first end of the third NAND gate is connected to the third end of the second NAND gate, the second end of the third NAND gate is connected to the second power supply, the third end of the third NAND gate is connected to the first end and the second end of the fourth NAND gate, and the third end of the fourth NAND gate is connected to the first signal pin or the second signal pin.

7. The 485 differential signal transmission circuit according to claim 1, characterized in that: It also includes a current limiting module; The first end of the current limiting module is respectively connected to the first signal pin of the RS485 chip and the parallel node of the first signal amplification module and the first signal recovery module, and the second end of the current limiting module is respectively connected to the first power supply and the power supply end of the RS485 chip.

8. The 485 differential signal transmission circuit according to claim 1, characterized in that: Also includes protection modules; The first end of the protection module is respectively connected to the second signal pin of the RS485 chip and the parallel node of the second signal amplification module and the second signal recovery module, and the second end of the protection module is grounded.

9. The 485 differential signal transmission circuit according to claim 4, characterized in that: The voltage of the second power supply is determined according to the transmission distance of the RS485 chip.

10. A communication device, characterized in that: It comprises a 485 differential signal transmission circuit as described in any one of claims 1-9.