Display device and manufacturing method thereof

By setting the light -blocking pattern in the packaging layer of the display device, the contradiction between the light direction control and the thinness of the equipment in the existing technology, and the effect of the light direction control and the reduction of total thickness.

CN119384187APending Publication Date: 2025-01-28SAMSUNG DISPLAY CO LTD
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Patent Information

Application Number
CN202410990261.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-07-25
Filing Date
2024-07-23
Publication Date
2025-01-28

AI Technical Summary

Technical Problem

When the existing multimedia display device controls the directionality of light, the total thickness increases, making it difficult to ensure both light direction control and equipment thinness.

Method used

The packaging layer with a light -blocking pattern is used to set the light -blocking pattern in the packaging layer to control the directionability of the light, while reducing the total thickness of the display device.

Benefits of technology

In the case of not increasing the total thickness of the display device, the directionability of the light is controlled, reducing the dielectric constant, and increasing the sensitivity of the signal -to -noise ratio and the sensor layer.

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Abstract

The invention relates to a display device and a manufacturing method thereof. A display device having a light-emitting region and a non-light-emitting region surrounding the light-emitting region includes: a substrate layer; a light emitting element layer disposed on the base layer and including a light emitting element; a pixel defining layer disposed on the base layer and provided with a light emitting opening overlapping the light emitting element; a partition wall including a first partition wall layer disposed on the pixel defining layer and a second partition wall layer disposed on the first partition wall layer, in which the partition wall is provided with a partition wall opening overlapping the light emitting opening; an encapsulation layer covering the light emitting element; and a sensor layer disposed on the encapsulation layer. The encapsulation layer includes a second capping layer provided with a groove portion defined therein and a light blocking pattern disposed in the groove portion.
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Description

[0001] This application claims priority to and all benefits derived from Korean Patent Application No. 10-2023-0096966, filed on Jul. 25, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0002] The present disclosure relates to a display device including an encapsulation layer having a function of controlling directivity of light. Background Art

[0003] Multimedia display devices such as televisions, mobile phones, tablet computers, navigation devices, and gaming devices include a display device that displays an image. It is desirable to control the directivity of light traveling through the display device to protect the privacy of a user, however, when the display device includes a separate light control member to control the directivity of light, the overall thickness of the display device increases. Summary of the invention

[0004] The present disclosure provides a display device including an encapsulation layer having a function of controlling directivity of light.

[0005] The present disclosure provides a method of manufacturing a display device including an encapsulation layer having a function of controlling directivity of light.

[0006] An embodiment of the present invention provides a display device having a light-emitting area and a non-light-emitting area surrounding the light-emitting area, comprising: a substrate layer; a light-emitting element layer disposed on the substrate layer and comprising a light-emitting element; a pixel defining layer disposed on the substrate layer and provided with a light-emitting opening overlapping with the light-emitting element in a plan view; a partition wall comprising a first partition wall layer disposed on the pixel defining layer and a second partition wall layer disposed on the first partition wall layer, wherein the partition wall is provided with a partition wall opening overlapping with the light-emitting opening in a plan view; an encapsulation layer covering the light-emitting element; and a sensor layer disposed on the encapsulation layer. The encapsulation layer comprises: a first covering layer covering the light-emitting element layer and the partition wall; a second covering layer disposed on the first covering layer and provided with a groove portion, wherein the groove portion is defined in the second covering layer by recessing some portions of the second covering layer from the upper surface of the second covering layer and is spaced apart from each other; a third covering layer disposed on the second covering layer; and a light-blocking pattern disposed in the groove portion.

[0007] The light-blocking patterns may be arranged in one direction, and each of the light-blocking patterns may have a rectangular shape in a cross-section parallel to the one direction and substantially perpendicular to an upper surface of the base layer.

[0008] The light blocking pattern may include carbon black or graphene.

[0009] The light blocking pattern may have a dielectric constant equal to or greater than 1 farad per meter (F / m) and equal to or less than 3 F / m.

[0010] Each of the groove portions may have a width equal to or greater than 0.1 micrometers and equal to or less than 10 micrometers, and a spacing distance between two of the groove portions adjacent to each other may be equal to or greater than 0.1 micrometers and equal to or less than 10 micrometers.

[0011] Each of the light-blocking patterns may have a width equal to or greater than 1 micron and equal to or less than 1.5 microns, each of the light-blocking patterns may have a height equal to or greater than 4.5 microns and equal to or less than 10 microns, and a spacing distance between two adjacent light-blocking patterns may be equal to or greater than 1 micron and equal to or less than 100 microns.

[0012] The first capping layer may include at least one of silicon nitride, silicon oxynitride, silicon oxide, titanium oxide, and aluminum oxide, the second capping layer may include at least one of acrylic resin, epoxy resin, and silicon oxycarbide, and the third capping layer may include at least one of silicon oxide, metal oxide, and metal.

[0013] At least a portion of the first capping layer covering the upper surface of the second barrier wall layer may be partially exposed through the groove in the non-emission region and contact the third capping layer.

[0014] The light blocking pattern may include a first light blocking pattern having a first height and a second light blocking pattern having a second height greater than the first height, the first light blocking pattern may be spaced apart from the partition wall, and the second light blocking pattern may overlap the partition wall in a plan view.

[0015] The light blocking pattern may further include a third light blocking pattern having a third height, the third light blocking pattern may be spaced apart from the partition wall in a plan view, and the third height may be different from the second height.

[0016] The groove portions may each have a depth in the non-luminescent region that is less than a distance from an upper surface of the second covering layer to an upper surface of the first covering layer, and a portion of the first covering layer covering an upper surface of the second isolation wall layer may be spaced apart from the third covering layer, with the second covering layer being interposed between the first covering layer and the third covering layer.

[0017] The light blocking patterns may be arranged in one direction, and each of the light blocking patterns may have a shape whose width decreases in a direction from a lower portion to an upper portion thereof in a cross section parallel to the one direction and substantially perpendicular to the base layer.

[0018] Each of the light-emitting elements may include: a first electrode arranged in a corresponding isolation wall opening in the isolation wall opening; a light-emitting layer arranged on the first electrode; and a second electrode arranged on the light-emitting layer, and the second electrode may be in contact with the first isolation wall layer, the first isolation wall layer may include aluminum, and the second isolation wall layer may include titanium.

[0019] The sensor layer may include: a first sensing insulating layer disposed on the third covering layer; a first conductive layer disposed on the first sensing insulating layer; a second sensing insulating layer disposed on and covering the first conductive layer; and a second conductive layer disposed on the second sensing insulating layer.

[0020] The display device may further include: an optical layer disposed on the sensor layer; an adhesive layer disposed on the optical layer; and a window disposed on the adhesive layer, and the optical layer may be attached to the window through the adhesive layer.

[0021] A side surface of the second partition wall layer may protrude more than the first partition wall layer, and a protruding portion of the side surface of the second partition wall layer may overlap a portion of the light emitting element in a plan view.

[0022] The pixel defining layer may be disposed between the first electrode and the first isolation wall layer to prevent the first electrode from being electrically connected to the first isolation wall layer.

[0023] An embodiment of the present invention provides a method for manufacturing a display device. The method includes: providing a preliminary display device, the preliminary display device including: a substrate layer; a light-emitting element layer, which is disposed on the substrate layer and includes a light-emitting element; a pixel defining layer, which is disposed on the substrate layer and provided with a light-emitting opening overlapping with the light-emitting element in a plan view; a partition wall, including a first partition wall layer disposed on the pixel defining layer and a second partition wall layer disposed on the first partition wall layer, wherein the partition wall is provided with a partition wall opening overlapping with the light-emitting opening in a plan view; forming a first covering layer to cover the light-emitting element layer and the partition wall; forming a second covering layer on the first covering layer; forming a groove portion defined in the second covering layer and spaced apart from each other by removing some portions of the second covering layer from the upper surface of the second covering layer; forming a third covering layer to cover the side surface of the groove portion and the upper surface of the second covering layer; forming a light-blocking pattern in the inner space of the groove portion; and forming a sensor layer on the third covering layer.

[0024] The forming of the recessed portion may include dry etching portions of the second capping layer from an upper surface of the second capping layer.

[0025] The forming of the light blocking pattern may include removing an upper residual layer including a material for the light blocking pattern and disposed outside the groove portion. The removing of the upper residual layer may be performed by a chemical mechanical polishing process or an ashing process.

[0026] According to the above, since the pattern for controlling the directivity of light is provided in the encapsulation layer, the total thickness of the display device is reduced while controlling the directivity of light, thereby effectively reducing the dielectric constant of the display device. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The above and other advantages of the present disclosure will become apparent by referring to the following detailed description when considered in conjunction with the accompanying drawings, in which:

[0028] Figure 1 is a perspective view of a display device according to an embodiment of the present disclosure;

[0029] Figure 2 is a cross-sectional view of a display device according to an embodiment of the present disclosure;

[0030] Figure 3A is a cross-sectional view of a display device according to an embodiment of the present disclosure;

[0031] Figure 3B is an enlarged cross-sectional view of a portion of a display device according to an embodiment of the present disclosure;

[0032] Figure 4A is a cross-sectional view of a display device according to another embodiment of the present disclosure;

[0033] Figure 4B is a cross-sectional view of a display device according to yet another embodiment of the present disclosure;

[0034] Figure 4C is a cross-sectional view of a display device according to yet another embodiment of the present disclosure;

[0035] Figure 4D is a cross-sectional view of a display device according to yet another embodiment of the present disclosure; and

[0036] FIG. 5A to FIG. 5K A cross-sectional view illustrating a method of manufacturing a display device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0037] The present disclosure can be modified in various ways and implemented in many different forms, and therefore specific embodiments will be illustrated in the drawings and described in detail below. However, the present disclosure should not be limited to a specific disclosure form, and should be interpreted as including all modifications, equivalents or substitutes included in the spirit and scope of the present disclosure.

[0038] In the present disclosure, it will be understood that when an element (or region, layer or portion) is referred to as being "on," "connected to" or "coupled to" another element or layer, it can be directly on, connected to or coupled to the other element or layer, or intervening elements or layers may be present.

[0039] The same reference numerals refer to the same elements throughout the text, and in the accompanying drawings, the thickness, proportion and dimension of the components are exaggerated for effectively describing the technical content. As used herein, the term "and / or" may include any and all combinations of one or more of the related listed items.

[0040] It will be understood that although the terms first, second, etc. may be used in this article to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. Therefore, the first element discussed below may be referred to as the second element without departing from the teachings of the present disclosure. As used in this article, the singular forms "a", "an", and "said" are intended to also include plural forms unless the context clearly indicates otherwise.

[0041] Spatially relative terms, such as “below,” “below,” “below,” “above,” and “upper,” etc., may be used herein for ease of description to describe the relationship of one element or feature to another element or feature as shown in the figures.

[0042] It will be further understood that the term “comprising” when used in this specification indicates the presence of stated features, integers, steps, operations, elements and / or components, but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0043] Unless otherwise defined, all terms used herein, including technical and scientific terms, have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and will not be interpreted in an idealized or overly formal sense unless explicitly so defined herein.

[0044] It will be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Therefore, the "first element", "component", "region", "layer" or "section" discussed below may be referred to as the second element, component, region, layer or section without departing from the teachings herein. Hereinafter, embodiments of the present disclosure will be described with reference to the attached drawings.

[0045] Figure 1 is a perspective view of a display device 1000 according to an embodiment of the present disclosure.

[0046] Figure 1 The display device 1000 shown in FIG. 1 may be a center information display (“CID”) for a vehicle.

[0047] refer to Figure 1, the display device 1000 may include a display area 1000DA and a non-display area 1000NDA. An image is displayed through the display area 1000DA. Figure 1 A traffic condition is shown as an example of an image. The image is not displayed by the non-display area 1000NDA. The display area 1000DA may be substantially parallel to a plane defined by a first direction DR1 and a second direction DR2 intersecting the first direction DR1.

[0048] The display device 1000 may be activated in response to an electrical signal. The display device 1000 may be applied to various embodiments. For example, the display device 1000 may be applied to various vehicles, such as automobiles, bicycles, motorcycles, ships, airplanes, etc., however, this is only an example. The display device 1000 may be applied to other electronic devices as long as they do not deviate from the invention of the present disclosure.

[0049] The display device 2000 may be provided in the form of a display included in a digital instrument panel. The display device 2000 may include a display area and a non-display area defined therein, and the display area and the non-display area of ​​the display device 2000 may correspond to the display area 1000DA and the non-display area 1000NDA of the display device 1000. Therefore, redundant explanations are omitted.

[0050] In the following description, the upper (or front) surface and the lower (or rear) surface of each component may be defined relative to the direction in which the image is displayed (i.e., the third direction DR3). The upper surface and the lower surface may face each other in the third direction DR3, and the normal direction of each of the upper surface and the lower surface may be substantially parallel to the third direction DR3. As used herein, a "plan view" is a view in the normal direction (i.e., the third direction DR3). At the same time, the directions indicated by the first direction DR1, the second direction DR2, and the third direction DR3 may be related to each other and may be changed to other directions. Hereinafter, the first direction, the second direction, and the third direction are respectively represented by the same reference numerals as the directions indicated by the first direction DR1, the second direction DR2, and the third direction DR3.

[0051] Figure 2 is a cross-sectional view of a display device 1000 according to an embodiment of the present disclosure.

[0052] refer to Figure 2 , the display device 1000 may include the display layer 100 , the sensor layer 200 , the optical layer 300 , the adhesive layer 400 , and the window 500 , however, this is only an example. The display device 1000 may not include the window 500 .

[0053] The display layer 100 may include a base layer 110 , a circuit layer 120 , a light emitting element layer 130 , and an encapsulation layer 140 .

[0054] The base layer 110 may be disposed at the lowest position of the display device 1000, and may provide a base surface on which other components of the display device 1000 are disposed. The base layer 110 may be a glass substrate, a metal substrate, a silicon substrate, or a polymer substrate, however, the present disclosure should not be limited thereto or thereby. According to an embodiment, the base layer 110 may be an inorganic layer, an organic layer, or a composite material layer.

[0055] The circuit layer 120 may be disposed on the base layer 110. The circuit layer 120 may include an insulating layer, a semiconductor pattern, a conductive pattern, and a signal line. The insulating layer, the semiconductor layer, and the conductive layer may be formed on the base layer 110 by a coating or deposition process. Then, the insulating layer, the semiconductor layer, and the conductive layer may be selectively patterned by several photolithography processes. Thus, the semiconductor pattern, the conductive pattern, and the signal line included in the circuit layer 120 may be formed.

[0056] The light emitting element layer 130 may be disposed on the circuit layer 120. The light emitting element layer 130 may include a light emitting element 100PE (refer to Figure 3A In one embodiment, for example, the light emitting element layer 130 may include an organic light emitting material, an inorganic light emitting material, an organic-inorganic light emitting material, a quantum dot, a quantum rod, a micro LED or a nano LED.

[0057] The encapsulation layer 140 may be disposed on the light emitting element layer 130. The encapsulation layer 140 may protect the light emitting element layer 130 from moisture, oxygen, and foreign matter such as dust particles. Therefore, the encapsulation layer 140 may improve the reliability of the display device 1000. In addition, the encapsulation layer 140 may include a light blocking pattern BM (refer to Figure 3A ). Therefore, the encapsulation layer 140 may control light transmitted therethrough, and the details thereof will be described later.

[0058] The sensor layer 200 may be disposed on the display layer 100. The sensor layer 200 may be formed on the display layer 100 through a continuous process. In this case, the sensor layer 200 may be expressed as being directly placed on the display layer 100. In the present disclosure, the expression “the sensor layer 200 is directly disposed on the display layer 100” means that there is no intervening element between the sensor layer 200 and the display layer 100. That is, a separate bonding member may not be disposed between the sensor layer 200 and the display layer 100.

[0059] According to an embodiment, the sensor layer 200 may be coupled to the display layer 100 by an adhesive member. The adhesive member may include a conventional adhesive. The sensor layer 200 may convert an input from the outside of the display device 1000 into an electrical signal.

[0060] The optical layer 300 may be disposed on the sensor layer 200, however, it should not be limited thereto or thereby. According to an embodiment, a bonding member may be disposed between the optical layer 300 and the sensor layer 200. The optical layer 300 may be a reflection reduction layer that may reduce reflectivity with respect to external light incident thereon from the outside of the display device 1000. The optical layer 300 may be formed on the sensor layer 200 through a continuous process.

[0061] In one embodiment, for example, the optical layer may include a polarizing film including a retarder and / or a polarizer, a multi-layer reflective layer that allows reflected light to destructively interfere with each other, or a color filter arranged to correspond to the arrangement and emission color of the pixels of the display unit. In one embodiment, for example, in the case where the optical layer 300 includes a color filter, the color filter may be arranged by considering the emission color of the pixels included in the display layer 100. According to one embodiment, the optical layer 300 may be omitted.

[0062] The adhesive layer 400 may be disposed on the optical layer 300. The adhesive layer 400 may attach the optical layer 300 to the window 500. The adhesive layer 400 may include an optically clear adhesive ("OCA"), however, this is only an example. According to an embodiment, the adhesive layer 400 may include another optically transparent material.

[0063] The window 500 may be disposed on the adhesive layer 400. The window 500 may be disposed at the highest position of the display device 1000 and may protect the display device 1000 from external impact. The window 500 may include an optically transparent insulating material. In one embodiment, for example, the window 500 may include glass or a plastic material.

[0064] The window 500 may have a single-layer or multi-layer structure. In one embodiment, for example, the window 500 may include a plurality of plastic films or glass substrates coupled to each other by an adhesive and a plastic film coupled to a glass substrate by an adhesive.

[0065] Figure 3A is a cross-sectional view of a display device 1000 according to an embodiment of the present disclosure. Figure 3B is an enlarged cross-sectional view of a portion of a display device 1000 according to an embodiment of the present disclosure. Figure 3B Shown in Figure 3A An enlarged portion of area A in FIG.

[0066] refer to Figure 3A and Figure 3B , the display device 1000 may include a base layer 110, a circuit layer 120, a light emitting element layer 130, an encapsulation layer 140, a sensor layer 200, an optical layer 300, an adhesive layer 400, and a window 500. Figure 3A and Figure 3B In the same / similar reference numerals, Figure 2The same / similar elements are described herein, and thus detailed description of the same / similar elements will be omitted.

[0067] Display area 1000DA (reference Figure 1 ) may include a light emitting area PXA and a non-light emitting area NPXA surrounding the light emitting area PXA. The light emitting area PXA may be defined as an area where the upper surface of the second electrode CE is exposed through the light emitting opening PDL-OP described later. The non-light emitting area NPXA may define a boundary between the light emitting areas PXA and may prevent color mixing between the light emitting areas PXA.

[0068] The light emitting element layer 130 may be disposed on the circuit layer 120. The light emitting element layer 130 may include a pixel defining layer PDL, a partition wall PW, and a light emitting element 100PE.

[0069] The pixel defining layer PDL may be disposed on the circuit layer 120. A light emitting opening PDL-OP may be defined through the pixel defining layer PDL. The light emitting opening PDL-OP may overlap the light emitting element 100PE, for example, the first electrode AE, in a plan view, and at least a portion of the first electrode AE ​​may be exposed through the light emitting opening PDL-OP of the pixel defining layer PDL.

[0070] The pixel defining layer PDL may include an inorganic insulating material. In one embodiment, for example, the pixel defining layer PDL may include silicon nitride (SiN x ). The pixel defining layer PDL may be disposed between the first electrode AE ​​and the first isolation wall layer L1, and may prevent the first electrode AE ​​from being electrically connected to the first isolation wall layer L1.

[0071] The partition wall PW may be disposed on the pixel defining layer PDL. A partition wall opening PW-OP may be defined by the partition wall PW, the partition wall opening PW-OP may correspond to the light emitting opening PDL-OP, and at least a portion of the first electrode AE ​​may be exposed through the partition wall opening PW-OP.

[0072] When viewed in cross section, the partition wall PW may have an undercut shape. The partition wall PW may include a plurality of layers stacked in sequence, and at least one of the layers may be more recessed than the other layers. Therefore, the partition wall PW may include a terminal portion PW-TP described later.

[0073] The partition wall PW may include a first partition wall layer L1 disposed on the pixel defining layer PDL and a second partition wall layer L2 disposed on the first partition wall layer L1 .

[0074] The length of the first partition wall layer L1 may be less than that of the second partition wall layer L2 in the first direction DR1. Therefore, the first partition wall layer L1 may be recessed from the emission area PXA than the second partition wall layer L2, and the second partition wall layer L2 may include a tip portion PW-TP as a protruding side surface.

[0075] The first spacer layer L1 may include a material having a greater conductivity than that of the second spacer layer L2. In one embodiment, for example, the first spacer layer L1 may include aluminum, and the second spacer layer L2 may include titanium.

[0076] The light emitting element 100PE may be disposed on the base layer 110. The light emitting element 100PE may emit light having a predetermined brightness in response to a current supplied from the pixel circuit.

[0077] The light emitting element 100PE may include a first electrode AE, a light emitting layer EL, and a second electrode CE. According to an embodiment, the first electrode AE ​​may be referred to as an anode, and the second electrode CE may be referred to as a cathode.

[0078] The first electrode AE ​​may be disposed on the circuit layer 120. The first electrode AE ​​may be disposed inside the light emitting opening PDL-OP. The light emitting layer EL may cover a portion of the upper surface of the pixel defining layer PDL exposed through the light emitting opening PDL-OP.

[0079] The first electrode AE ​​may be electrically connected to a connection signal line via a connection electrode, and may be electrically connected to a corresponding circuit element (not shown).

[0080] The first electrode AE ​​may have a single-layer or multi-layer structure. In one embodiment, for example, the first electrode AE ​​may include a layer including indium tin oxide ("ITO", hereinafter referred to as a lower ITO layer), a layer including silver (Ag, hereinafter referred to as an Ag layer) disposed on the lower ITO layer, and a layer including ITO and disposed on the Ag layer (hereinafter referred to as an upper ITO layer).

[0081] The sacrificial pattern SP may be disposed between the first electrode AE ​​and the pixel defining layer PDL. The sacrificial opening SP-OP may be defined to pass through the sacrificial pattern SP to expose a portion of the upper surface of the first electrode AE. The sacrificial opening SP-OP may overlap with the light emitting opening PDL-OP in a plan view. The sacrificial pattern SP may include an amorphous transparent conductive oxide. The sacrificial pattern SP may include an azo compound. In one embodiment, for example, the sacrificial pattern SP may include zinc oxide (ZnO) doped with aluminum (Al). x In this case, the content of aluminum (Al) may be equal to or greater than 2 at % and equal to or less than 5 at %.

[0082] The light emitting layer EL may be disposed on the first electrode AE. The light emitting layer EL may be disposed inside the light emitting opening PDL-OP. The light emitting layer EL may cover the above-mentioned portion of the upper surface of the pixel defining layer PDL exposed by the light emitting opening PDL-OP. The light emitting layer EL may be a region where electrons and holes recombine to emit light. The light emitting layer EL may include a light emitting material.

[0083] Figure 3A A structure in which the light emitting layer EL contacts the side surface L1-SS of the first spacer layer L1 is shown as a representative example, however, the present disclosure should not be limited thereto or thereby. According to an embodiment, the light emitting layer EL may not contact the side surface L1-SS of the first spacer layer L1.

[0084] The second electrode CE may be disposed on the light emitting layer EL, the second electrode CE may be disposed inside the light emitting opening PDL-OP, and the second electrode CE may contact the side surface L1-SS of the first isolation wall layer L1. The isolation wall PW may include a conductive material and may receive a driving voltage. Therefore, the second electrode CE electrically connected to the isolation wall PW may receive a driving voltage.

[0085] According to an embodiment, the light emitting element 100PE may be generally formed using an open mask, but may be divided in units of pixels by the partition wall PW. Therefore, unlike the case where the light emitting element 100PE is patterned using a fine metal mask ("FMM"), there is no need to provide a support spacer protruding from the partition wall, and defects in the display device 1000 caused when the support spacer is damaged by the fine metal mask can be prevented.

[0086] In addition, since the light emitting element 100PE can be patterned even without providing a separate supporting spacer protruding from the partition wall PW, the size of the light emitting area PXA can be reduced. Therefore, the display device 1000 can have a high resolution.

[0087] In addition, the light emitting elements 100PE adjacent to each other can be physically separated from each other. Therefore, current leakage and color mixing between the adjacent light emitting elements 100PE can be effectively prevented.

[0088] According to an embodiment, the light emitting element layer 130 may further include a capping pattern (not shown). The capping pattern may be disposed in the partition wall opening PW-OP and may be disposed on the second electrode CE. The capping pattern may be patterned by the end portion PW-TP formed in the partition wall PW.

[0089] The encapsulation layer 140 may be disposed on the light emitting element layer 130 .

[0090] The encapsulation layer 140 may include a first capping layer CL1 , a second capping layer CL2 defining a groove portion GR therein, a light blocking pattern BM, and a third capping layer CL3 .

[0091] The first cover layer CL1 may be disposed on the light emitting element 100PE and the partition wall PW to cover at least a portion of the light emitting element 100PE and the partition wall PW. The first cover layer CL1 may cover the upper surface of the second electrode CE, the side surface L1-SS of the first partition wall layer L1 in contact with the second electrode CE, at least a portion of the lower surface of the second partition wall layer L2 that is not covered by the first partition wall layer L1 and is exposed, and the side surface and upper surface of the second partition wall layer L2.

[0092] The first cover layer CL1 may be an inorganic layer. The first cover layer CL1 may protect the light emitting element layer 130 from moisture and oxygen. The first cover layer CL1 may include at least one of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer.

[0093] The second cover layer CL2 may be disposed on the first cover layer CL1. The second cover layer CL2 may cover the first cover layer CL1. The second cover layer CL2 may be formed by a process of depositing an organic material, however, the method of forming the second cover layer CL2 should not be limited thereto or thereby. According to an embodiment, the second cover layer CL2 may be formed using an inkjet method that forms an organic layer by providing a liquid monomer on the second cover layer CL2, however, the present disclosure should not be limited thereto or thereby.

[0094] Each of the groove portions GR may be formed by recessing at least a portion of the second cover layer CL2 in a direction from the upper surface of the second cover layer CL2 toward the lower surface of the second cover layer CL2, and may be defined by the outer surface of the second cover layer CL2. The groove portion GR may include a groove portion side surface S substantially parallel to the third direction DR3. In addition, the groove portion GR may further include a groove portion lower surface B facing the base layer 110 in an area overlapping the non-light emitting area NPXA.

[0095] refer to Figure 3A , the second cover layer CL2 may be completely removed in a portion of a region overlapping the non-light emitting area NPXA in a direction from the upper surface toward the lower surface. That is, the groove portion GR overlapping the non-light emitting area NPXA may be formed to completely penetrate the second cover layer CL2 from the upper surface to the lower surface of the second cover layer CL2.

[0096] Therefore, the second cover layer CL2 may have a shape partially disconnected by the groove portion GR in a region overlapping the non-light emitting area NPXA.

[0097] On the contrary, in the portion of the area overlapping with the light emitting region PXA, only a portion of the second cover layer CL2 may be removed in the direction from the upper surface to the lower surface. Therefore, at least a portion of the second cover layer CL2 may remain under the groove portion GR overlapping with the light emitting region PXA. That is, the second cover layer CL2 may not completely penetrate in the light emitting region PXA, and the second cover layer CL2 may exist between the first cover layer CL1 and the third cover layer CL3.

[0098] When viewed in a cross section, the groove portions GR may be arranged in the first direction DR1. The groove portions GR may be arranged at a constant spacing distance GR-S. In one embodiment, for example, the spacing distance GR-S between the groove portions GR adjacent to each other in the first direction DR1 may be equal to or greater than 0.1 micrometers (μm) and equal to or less than 10 μm, however, the present disclosure should not be limited thereto or thereby. According to one embodiment, the groove portions GR may be arranged at an irregular spacing distance GR-S.

[0099] When viewed in cross section, each of the groove portions GR may have a rectangular shape. A width GR-W of each of the groove portions GR in the first direction DR1 may be equal to or greater than 0.1 μm and equal to or less than 10 μm, however, the present disclosure should not be limited thereto or thereby. According to an embodiment, each of the groove portions GR may have a shape other than a rectangular shape in cross section, such as a polygonal shape and a figure having at least one curved side, and the width GR-W should not be limited to the above range.

[0100] When viewed in a cross section, a depth D of the groove portion GR may be substantially the same as a thickness of the second capping layer CL2 in the non-light emitting area NPXA in the third direction DR3.

[0101] The light-blocking pattern BM may be accommodated in the inner space GR-SP (refer to Figure 5E ), the inner space GR-SP is defined by removing the second cover layer CL2, and the shape and arrangement of the light blocking pattern BM may be determined by the groove portion GR.

[0102] Since the groove portion GR overlapping the non-emission area NPXA completely penetrates the second cover layer CL2 from the upper surface to the lower surface of the second cover layer CL2, at least a portion CL1-U of the upper surface of the first cover layer CL1 covering the second isolation wall layer L2 (e.g., the upper surface thereof) in the region overlapping the non-emission area NPXA may be exposed through the groove portion GR in the non-emission area NPXA without being covered by the second cover layer CL2 (see Figure 3B , and may be in contact with the third cover layer CL3.

[0103] The third cover layer CL3 may cover the groove portion side surface S and the upper surface of the second cover layer CL2. In addition, the third cover layer CL3 may cover the groove portion lower surface B or the first cover layer CL1. In one embodiment, for example, since the groove portion GR is formed to completely penetrate the second cover layer CL2 in the region overlapping the non-light emitting area NPXA, the third cover layer CL3 may cover the first cover layer CL1.

[0104] The third cover layer CL3 may be formed by an atomic layer deposition ("ALD") method. Therefore, thickness variation of the third cover layer CL3 may be mitigated, and thus step coverage may be improved. That is, the third cover layer CL3 may cover the upper surface of the second cover layer CL2, the groove portion lower surface B included in each of the groove portions GR, and the groove portion side surface S included in each of the groove portions GR, and thus, irregularities formed on the groove portion lower surface B and the groove portion side surface S during a process of forming the groove portion GR may be smoothed.

[0105] The third capping layer CL3 may include a material having a hydrophilic property, and the light blocking pattern BM may easily fill the inner space GR-SP (refer to Figure 5E In one embodiment, for example, the third capping layer CL3 may include silicon oxide (SiO x ), metal oxides or metal materials, but should not be limited thereto or thereby.

[0106] The light-blocking pattern BM may be disposed in the inner space GR-SP (refer to Figure 5E The inner space GR-SP of the groove portion GR may correspond to a space surrounded by the groove portion side surface S in the second cover layer CL2.

[0107] Since the light-blocking pattern BM is arranged in the inner space GR-SP (refer to Figure 5E ), so the arrangement of the light-blocking pattern BM may be determined by the arrangement of the groove portion GR. Figure 3A 1 shows a structure in which the light-blocking patterns BM are arranged at a uniform spacing distance in the first direction DR1. Therefore, the light-blocking patterns BM may be arranged at a uniform spacing distance BM-S in the first direction DR1. In one embodiment, for example, the spacing distance BM-S between adjacent light-blocking patterns BM may be equal to or greater than 1 μm and equal to or less than 100 μm, however, the present disclosure should not be limited thereto or thereby. According to another embodiment, the light-blocking patterns BM may be arranged at a non-uniform spacing distance BM-S.

[0108] According to the present embodiment, the ratio of the number of groove portions GR and the number of light blocking patterns BM arranged in the non-luminescent area NPXA to the number of groove portions GR and the number of light blocking patterns BM arranged in the luminescent area PXA may be 4:5, however, the present disclosure should not be limited to or thereby.

[0109] The light-blocking pattern BM may be disposed in the inner space GR-SP (refer to Figure 5E ), and thus, each of the light-blocking patterns BM may have a shape determined by the shape of the groove portion GR.

[0110] The light-blocking pattern BM may have a rectangular shape in a cross section. According to an embodiment, the cross section may be parallel to the first direction DR1 and substantially perpendicular to the upper surface of the base layer 110. In this case, each of the light-blocking patterns BM may have a uniform width W and a uniform height H. In an embodiment, for example, the width W of each of the light-blocking patterns BM may be equal to or greater than 1 μm and equal to or less than 1.5 μm, and the height H of each of the light-blocking patterns BM may be equal to or greater than 4.5 μm and equal to or less than 10 μm, however, the present disclosure should not be limited thereto or thereby. According to an embodiment, the shape of the light-blocking pattern BM in a cross section may have a shape different from a rectangular shape, such as a polygonal shape and a figure having at least one curved side.

[0111] Figure 3A and Figure 3B A structure in which the widths W of the light-blocking patterns BM are the same is shown. However, the present disclosure should not be limited thereto or thereby, and the widths W of the light-blocking patterns BM may be different.

[0112] Figure 3A and Figure 3B A structure in which the heights H of the light-blocking patterns BM are the same is shown.

[0113] Because the heights H of the light blocking patterns BM are the same, lower surfaces of the light blocking patterns BM may be aligned with each other in the first direction DR1. However, the present disclosure should not be limited thereto or thereby, and the heights H of the light blocking patterns BM may be different.

[0114] Upper surfaces of the light-blocking patterns BM may be aligned with each other in the first direction DR1.

[0115] The light-blocking pattern BM may transmit or absorb light emitted from the light emitting element layer 130 to limit an emission angle of the light.

[0116] The light-blocking pattern BM may include a light-shielding material having a low dielectric constant. In one embodiment, for example, the light-blocking pattern BM may include carbon black or graphene, and the dielectric constant of the light-blocking pattern BM may be equal to or greater than 1 F / m and equal to or less than 3 F / m. However, the material of the light-blocking pattern BM should not be particularly limited as long as the material has a light-shielding property and a low dielectric constant.

[0117] In the case where light incident into the light-blocking pattern BM travels through the space between the light-blocking patterns BM, the light path may be limited, and thus the light emission angle may be limited. The light emission angle may be an angle formed between light incident into the second cover layer CL2 from the light emitting element 100PE and an imaginary line (hereinafter referred to as a normal line) represented by a third direction DR3. The normal line may be substantially perpendicular to the upper and lower surfaces of the second cover layer CL2.

[0118] Since the light emission angle is limited by the light blocking pattern BM, the angle range for viewing the image displayed on the display device 1000 can be limited. In addition, the image displayed on the display device 1000 can be prevented from being reflected into other electronic products.

[0119] In one embodiment, for example, the image of the display device 1000 may be prevented from being reflected in the windshield of a vehicle equipped with the display device 1000. Because the image of the display device 1000 is not reflected in the windshield of the vehicle, the driver's field of vision may not be disturbed by the reflected image.

[0120] The structure of the encapsulation layer 140 should not be limited thereto or thereby, and may further include additional elements. In one embodiment, for example, the encapsulation layer 140 may further include an inorganic layer or an organic layer.

[0121] The sensor layer 200 may be disposed on the encapsulation layer 140. The sensor layer 200 may include a first sensing insulating layer 201, a first conductive layer 202, a second sensing insulating layer 203, a second conductive layer 204, and a cover insulating layer 205.

[0122] The first sensing insulating layer 201 may be disposed on the encapsulation layer 140, such as the third cover layer CL3. The first sensing insulating layer 201 may protect the light emitting element layer 130 from moisture and oxygen. The first sensing insulating layer 201 may include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0123] The sensor layer 200 may further include a base insulating layer disposed between the first sensing insulating layer 201 and the first conductive layer 202. The base insulating layer may be an inorganic layer including at least one of silicon nitride, silicon oxynitride, and silicon oxide. In addition, the base insulating layer may be an organic layer including epoxy resin, acrylic resin, or imide resin. The base insulating layer may have a single-layer structure or a multi-layer structure of layers stacked in the third direction DR3.

[0124] Each of the first conductive layer 202 and the second conductive layer 204 may have a single-layer structure or a multi-layer structure of layers stacked in the third direction DR3. The conductive layer having a single-layer structure may include a metal layer or a transparent conductive layer. The metal layer may include molybdenum, silver, titanium, copper, aluminum or an alloy thereof. The transparent conductive layer may include a transparent conductive oxide such as indium tin oxide ("ITO"), indium zinc oxide ("IZO"), zinc oxide ("ZnO") or indium zinc tin oxide ("IZTO"). In addition, the transparent conductive layer may include a conductive polymer (e.g., poly-3,4-ethylenedioxythiophene: PEDOT), a metal nanowire or graphene, etc.

[0125] The conductive layer having a multi-layer structure may include a plurality of metal layers. The metal layer may have a three-layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti). The conductive layer having a multi-layer structure may include at least one metal layer and at least one transparent conductive layer.

[0126] At least one of the second sensing insulating layer 203 and the capping insulating layer 205 may include an inorganic layer. The inorganic layer may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0127] At least one of the second sensing insulating layer 203 and the cover insulating layer 205 may include an organic layer. The organic layer may include at least one of acrylic resin, methacrylic resin, polyisoprene resin, vinyl resin, epoxy resin, urethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin.

[0128] The optical layer 300, the adhesive layer 400, and the window 500 may be sequentially stacked on the sensor layer 200. Description and reference to the stacking structure of the optical layer 300, the adhesive layer 400, and the window 500 Figure 2 Those described are substantially the same, and details of the same elements will not be repeated.

[0129] According to an embodiment, the display device 1000 may not include a separate layer on which the light blocking pattern BM is disposed, and the light blocking pattern BM may be disposed in the encapsulation layer 140. Therefore, the encapsulation layer 140 as a single layer may perform a function of blocking moisture and oxygen from penetrating into the light emitting element layer 130 and a function of limiting an emission angle of light emitted from the light emitting element layer 130. Therefore, the overall thickness of the display device 1000 may be reduced.

[0130] In addition, since the total thickness of the display device 1000 is reduced, the dielectric constant of the display device 1000 can be reduced. Therefore, noise caused by the coupling between the sensor layer 200 and the second electrode CE can be reduced. Therefore, the signal-to-noise ratio (SNR) can be reduced, and the display device 1000 can include the sensor layer 200 with improved sensitivity.

[0131] Figure 4A is a cross-sectional view of a display device 1000 a according to another embodiment of the present disclosure.

[0132] In the following, reference will be made to Figure 4A The stacked structure of the display device 1000 a is described.

[0133] The display device 1000 a may include a base layer 110 , a circuit layer 120 , a light emitting element layer 130 , an encapsulation layer 140 a , a sensor layer 200 , an optical layer 300 , an adhesive layer 400 , and a window 500 .

[0134] exist Figure 4A In the Figure 3A and Figure 3B The same / similar elements in the present invention will be omitted, and detailed description of the same / similar elements will be omitted. The following description will focus on different features.

[0135] The encapsulation layer 140a may be disposed on the light emitting element layer 130. The encapsulation layer 140a may include a first capping layer CL1, a second capping layer CL2a defining a groove portion GRa therein, a light blocking pattern BMa, and a third capping layer CL3a.

[0136] Each of the groove portions GRa may be defined by an outer surface of the second cover layer CL2a by removing at least a portion of the second cover layer CL2a from an upper surface to a lower surface of the second cover layer CL2a.

[0137] The groove portion GRa may include a first groove portion GRa1 and a second groove portion GRa2. The description about the first groove portion GRa1 may correspond to the reference Figure 3A and Figure 3B The description is about the description of the groove portion GR overlapping with the non-light emitting area NPXA. Therefore, the second groove portion GRa2 will be mainly described.

[0138] The second groove portion GRa2 may be disposed in the light emitting region PXA. The second groove portion GRa2 may include a second groove portion side surface Sa2 substantially parallel to the third direction DR3 and a second groove portion lower surface Ba2 facing the base layer 110.

[0139] In the area overlapping with the light emitting region PXA, only a portion of the second cover layer CL2a may be removed in a direction from the upper surface to the lower surface of the second cover layer CL2a. Therefore, at least a portion of the second cover layer CL2a may remain under the second groove portion GRa2 overlapping with the light emitting region PXA. That is, the second cover layer CL2a may not completely penetrate in the light emitting region PXA, and the second cover layer CL2a may exist between the first cover layer CL1 and the third cover layer CL3a.

[0140] The second groove portion GRa2 may have a depth Da2 greater than the depth Da1 of the first groove portion GRa1. However, since the second cover layer CL2a does not completely penetrate in the light emitting region PXA, the depth Da2 of the second groove portion GRa2 may be less than the thickness of the second cover layer CL2a in the light emitting region PXA, and may be less than the distance between the upper surfaces of the second cover layer CL2a and the upper surfaces of the first cover layer CL1 in the light emitting region PXA.

[0141] The light-blocking pattern BMa may include a first light-blocking pattern BMa1 and a second light-blocking pattern BMa2 having a height different from that of the first light-blocking pattern BMa1. The light-blocking pattern BMa may include a first light-blocking pattern BMa1 having a first height Ha1 and a second light-blocking pattern BMa2 having a second height Ha2 greater than the first height Ha1. Here, the first height Ha1 and the second height Ha2 are lengths of the first light-blocking pattern BMa1 and the second light-blocking pattern BMa2, respectively, measured along a third direction DR3.

[0142] The first light blocking pattern BMa1 may be disposed in the inner space of the first groove portion GRa1. The description about the first light blocking pattern BMa1 may correspond to the reference Figure 3A and Figure 3B A description of the light blocking pattern BM disposed in the non-light emitting area NPXA is described above, and details of the same elements will not be repeated.

[0143] The second light blocking pattern BMa2 may be disposed in an inner space of the second groove portion GRa2.

[0144] Because the second height Ha2 of the second light blocking pattern BMa2 is greater than the first height Ha1 of the first light blocking pattern BMa1, at least a portion of the second light blocking pattern BMa2 may overlap the first cover layer CL1 or the partition wall PW in the first direction DR1. Figure 4AA structure in which one side of the second light blocking pattern BMa2 relatively close to the base layer 110 overlaps the first cover layer CL1 , the second isolation wall layer L2 , and the first isolation wall layer L1 in the first direction DR1 is shown as a representative example, however, the present disclosure should not be limited thereto or thereby.

[0145] Because the first light-blocking patterns BMa1 have substantially the same height as each other, eg, the first height Ha1 , lower surfaces of the first light-blocking patterns BMa1 may be aligned with each other in the first direction DR1 .

[0146] Because the second light-blocking patterns BMa2 have substantially the same height as each other, eg, the second height Ha2, lower surfaces of the second light-blocking patterns BMa2 may be aligned with each other in the first direction DR1.

[0147] In the first direction DR1 , upper surfaces of the light-blocking patterns BMa may be aligned with each other.

[0148] Because the second height Ha2 of the second light-blocking pattern BMa2 is greater than the first height Ha1 of the first light-blocking pattern BMa1, a lower surface of the second light-blocking pattern BMa2 may protrude more than a lower surface of the first light-blocking pattern BMa1 in the third direction DR3.

[0149] The first light-blocking pattern BMa1 may be spaced apart from the partition wall PW, and the second light-blocking pattern BMa2 may overlap the partition wall PW when viewed in the first direction DR1.

[0150] In addition, as the distance between the light-blocking pattern BMa and the light-emitting element layer 130 decreases, the restriction on the emission angle of light may increase. Therefore, the angle range for viewing an image displayed on the display device 1000a may become narrower.

[0151] Figure 4B is a cross-sectional view of a display device 1000 b according to yet another embodiment of the present disclosure.

[0152] In the following, reference will be made to Figure 4B The stacked structure of the display device 1000 b is described.

[0153] The display device 1000 b may include a base layer 110 , a circuit layer 120 , a light emitting element layer 130 , an encapsulation layer 140 b , a sensor layer 200 , an optical layer 300 , an adhesive layer 400 , and a window 500 .

[0154] exist Figure 4B In the Figure 3A and Figure 3B The same / similar elements in the present invention will be omitted, and detailed description of the same / similar elements will be omitted. The following description will focus on different features.

[0155] The encapsulation layer 140b may be disposed on the light emitting element layer 130. The encapsulation layer 140b may include a first capping layer CL1, a second capping layer CL2b defining a groove portion GRb therein, a light blocking pattern BMb, and a third capping layer CL3b.

[0156] Each of the groove portions GRb may be defined by an outer surface of the second cover layer CL2b by removing at least a portion of the second cover layer CL2b from an upper surface to a lower surface of the second cover layer CL2b.

[0157] The groove portion GRb may include a first groove portion GRb1, a second-first groove portion GRb2-1, and a second-second groove portion GRb2-2. The description about the first groove portion GRb1 may correspond to the reference Figure 3A and Figure 3B Therefore, the following description will focus on the second-first groove portion GRb2-1 and the second-second groove portion GRb2-2.

[0158] The second-first groove portion GRb2-1 may be disposed in the light emitting region PXA and may include a second-first groove portion side surface Sb2-1 substantially parallel to the third direction DR3 and a second-first groove portion lower surface Bb2-1 facing the base layer 110 .

[0159] The second-second groove portion GRb2-2 may be disposed in the light emitting region PXA and may include a second-second groove portion side surface Sb2-2 substantially parallel to the third direction DR3 and a second-second groove portion lower surface Bb2-2 facing the base layer 110 .

[0160] In the area overlapping with the light emitting region PXA, only a portion of the second cover layer CL2b may be removed in the direction from the upper surface to the lower surface of the second cover layer CL2b. Therefore, at least a portion of the second cover layer CL2b may remain under the second-first groove portion GRb2-1 and the second-second groove portion GRb2-2 overlapping with the light emitting region PXA. That is, the second cover layer CL2b may not completely penetrate in the light emitting region PXA, and the second cover layer CL2b may exist between the first cover layer CL1 and the third cover layer CL3b.

[0161] The second-first groove portion GRb2-1 may have a depth Db2-1 greater than the depth Db1 of the first groove portion GRb1. However, since the second cover layer CL2b is not completely penetrated in the light emitting region PXA, the depth Db2-1 of the second-first groove portion GRb2-1 may be less than the thickness of the second cover layer CL2b in the light emitting region PXA, and may be less than the distance between the upper surfaces of the second cover layer CL2b and the upper surfaces of the first cover layer CL1 in the light emitting region PXA.

[0162] The depth Db2-2 of the second-second groove portion GRb2-2 may be different from the depth Db2-1 of the second-first groove portion GRb2-1. However, since the second cover layer CL2b is not completely penetrated in the light emitting region PXA, the depth Db2-2 of the second-second groove portion GRb2-2 may be less than the distance between the upper surface of the second cover layer CL2b and the upper surface of the first cover layer CL1 in the light emitting region PXA.

[0163] The second-first groove portions GRb2-1 may be alternately arranged with the second-second groove portions GRb2-2 in the light emitting region PXA.

[0164] The light-blocking pattern BMb may include a first light-blocking pattern BMb1 having a first height Hb1, a second-first light-blocking pattern BMb2-1 having a second-first height Hb2-1, and a second-second light-blocking pattern BMb2-2 having a second-second height Hb2-2. The second-first height Hb2-1, the first height Hb1, and the second-second height Hb2-2 may be different from each other. However, according to an embodiment, the first height Hb1 may be substantially the same as the second-second height Hb2-2.

[0165] In the present specification, the second-first light-blocking pattern BMb2-1 may also be referred to as a "second light-blocking pattern", and the second-second light-blocking pattern BMb2-2 may also be referred to as a "third light-blocking pattern". In this case, the second-first height Hb2-1 may be referred to as a "second height", and the second-second height Hb2-2 may be referred to as a "third height". According to an embodiment, the third light-blocking pattern may be spaced apart from the isolation wall PW, and the second light-blocking pattern may overlap the isolation wall PW in the first direction DR1.

[0166] In the first direction DR1 , upper surfaces of the light-blocking patterns BMb may be aligned with each other.

[0167] Because the second-first height Hb2-1 of the second-first light blocking pattern BMb2-1 is greater than the first height Hb1 of the first light blocking pattern BMb1, a lower surface of the second-first light blocking pattern BMb2-1 may protrude more than a lower surface of the first light blocking pattern BMb1 in the third direction DR3.

[0168] According to one embodiment, when the second-second height Hb2-2 of the second-second light-blocking pattern BMb2-2 is greater than the second-first height Hb2-1 of the second-first light-blocking pattern BMb2-1, the lower surface of the second-second light-blocking pattern BMb2-2 may protrude more than the lower surface of the second-first light-blocking pattern BMb2-1 in the third direction DR3.

[0169] Figure 4C is a cross-sectional view of a display device 1000 c according to yet another embodiment of the present disclosure.

[0170] In the following, reference will be made to Figure 4C The stacked structure of the display device 1000c is described.

[0171] The display device 1000 c may include a base layer 110 , a circuit layer 120 , a light emitting element layer 130 , an encapsulation layer 140 c , a sensor layer 200 , an optical layer 300 , an adhesive layer 400 , and a window 500 .

[0172] exist Figure 4C In the same / similar reference numerals, Figure 3A and Figure 3B The same / similar elements in the present invention will be omitted, and detailed description of the same / similar elements will be omitted. The following description will focus on different features.

[0173] The depth Dc of the groove portion GRc may be less than the maximum thickness TC of the second cover layer CL2c in the non-light emitting area NPXA in the third direction DR3. The maximum thickness TC of the second cover layer CL2c in the non-light emitting area NPXA is the thickness of the second cover layer CL2c in a specific area of ​​the non-light emitting area NPXA that does not overlap with the light blocking pattern BMc in a plan view. The groove portion GRc may include a groove portion side surface Sc substantially parallel to the third direction DR3 and a groove portion lower surface Bc facing the base layer 110.

[0174] The first cover layer CL1 may be spaced apart from the third cover layer CL3c, and the second cover layer CL2c is interposed between the first cover layer CL1 and the third cover layer CL3c. The second cover layer CL2c may be disposed under the groove portion GRc without being removed.

[0175] The second capping layer CL2c may have an overall continuous shape in a region overlapping the non-light emitting area NPXA without being separated or disconnected by the groove portion GRc.

[0176] Since the second cover layer CL2c has an overall continuous shape, the structural stability of the second cover layer CL2c may be increased. In addition, the height of the light blocking pattern BMc may be reduced, and thus the cost required to form the light blocking pattern BMc may be reduced.

[0177] Figure 4D is a cross-sectional view of a display device 1000d according to yet another embodiment of the present disclosure.

[0178] In the following, reference will be made to Figure 4D The stacked structure of the display device 1000d is described.

[0179] The display device 1000 d may include a base layer 110 , a circuit layer 120 , a light emitting element layer 130 , an encapsulation layer 140 d , a sensor layer 200 , an optical layer 300 , an adhesive layer 400 , and a window 500 .

[0180] exist Figure 4D In the same / similar reference numerals, Figure 3A and Figure 3B The same / similar elements in the present invention will be omitted, and detailed description of the same / similar elements will be omitted. The following description will focus on different features.

[0181] Each of the groove portions GRd may be defined by an outer surface of the second cover layer CL2d, which is formed by removing at least a portion of the second cover layer CL2d in a diagonal direction from an upper surface to a lower surface of the second cover layer CL2d. In the present disclosure, the diagonal direction may be defined as a direction between the third direction DR3 and the first direction DR1.

[0182] The groove portion GRd may include a groove portion side surface Sd inclined in a diagonal direction. In addition, the groove portion GRd may further include a groove portion lower surface Bd facing the base layer 110 in a region overlapping the non-light emitting area NPXA.

[0183] The groove portions GRd may be arranged in the first direction DR1 , and each of the light blocking patterns BMd may have a shape having a decreasing width from a lower portion to an upper portion of each of the light blocking patterns BMd when viewed in the second direction DR2 .

[0184] like Figure 4D , the cross-section of each of the light-blocking patterns BMd may have a trapezoidal shape whose bottom side is wider than the top side. However, the cross-sectional shape of the light-blocking patterns BMd should not be limited thereto or thereby, as long as the width of the cross-sectional shape of each of the light-blocking patterns BMd decreases from the lower portion to the upper portion, and may have a triangle or a shape obtained by cutting an ellipse in half.

[0185] The light blocking pattern BMd may be arranged in the first direction DR1 and may have a shape whose width decreases from a lower portion to an upper portion in a cross section defined by the first direction DR1 and the third direction DR3 , wherein the width becomes narrower from the lower portion to the upper portion.

[0186] Reference Figure 4D, the second cover layer CL2d may be completely removed in a diagonal direction from the upper surface to the lower surface in a portion of the region overlapping the non-light emitting area NPXA. That is, the groove portion GRd overlapping the non-light emitting area NPXA may be formed to completely penetrate the second cover layer CL2d from the upper surface to the lower surface of the second cover layer CL2d.

[0187] Since the width BMd-W of the cross-sectional shape of each of the light-blocking patterns BMd decreases from the lower portion to the upper portion, the distance BMd-S between the light-blocking patterns BMd adjacent to each other may increase from the lower portion to the upper portion. Therefore, among the light entering between the light-blocking patterns BMd adjacent to each other, the proportion of the light that travels in the third direction DR3 and exits to the outside of the display device 1000d may increase.

[0188] FIG. 5A to FIG. 5K is a cross-sectional view illustrating a method of manufacturing a display device according to an embodiment of the present disclosure.

[0189] Reference Figure 5A and Figure 5B A process for forming a first capping layer is described.

[0190] For convenience of explanation, the preliminary display device P1000 refers to the display device 1000 in a state that is not yet completed in the manufacturing process of the display device 1000 (refer to Figure 5K ).

[0191] The prepared display device P1000 may include: a base layer 110; a light emitting element layer 130 disposed on the base layer 110 and including a light emitting element 100PE; a pixel defining layer PDL disposed on the base layer 110 and provided with a light emitting opening PDL-OP defined therethrough so as to overlap with the light emitting element in a plan view; and an isolation wall PW including a first isolation wall layer L1 disposed on the pixel defining layer PDL and a second isolation wall layer L2 disposed on the first isolation wall layer L1 and provided with an isolation wall opening PW-OP defined therethrough so as to overlap with the light emitting opening PDL-OP in a plan view. FIG. 5A to FIG. 5K In the same / similar reference numerals, Figure 3A The same / similar elements will be described herein and detailed description of the same / similar elements will be omitted.

[0192] After providing the preliminary display device P1000, a process of forming a first cover layer CL1 may be performed to cover the light emitting element layer 130 and the partition wall PW. The process of forming the first cover layer CL1 may be performed using a chemical vapor deposition ("CVD") method or an atomic layer deposition ("ALD") method.

[0193] When a chemical vapor deposition (“CVD”) method or an atomic layer deposition (“ALD”) method is performed, the first covering layer CL1 may be deposited to cover the upper surface of the second electrode CE, the side surface L1-SS of the first isolation wall layer L1 in contact with the second electrode CE, at least a portion of the lower surface of the second isolation wall layer L2 that is not covered by the first isolation wall layer L1 and is exposed, and the side surface and upper surface of the second isolation wall layer L2.

[0194] The first cover layer CL1 may protect the light emitting element layer 130 from moisture and oxygen. The first cover layer CL1 may include at least one of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer.

[0195] Then, refer to FIG. 5C to FIG. 5F A process of forming the second cover layer CL2 and a process of etching the second cover layer CL2 to form the groove portion GR in the preliminary display device P1000 are described.

[0196] After forming the first capping layer CL1 , a process of forming a second capping layer CL2 on the first capping layer CL1 may be performed.

[0197] The process of forming the second capping layer CL2 may be performed by an organic material deposition process. The second capping layer CL2 may be formed by a deposition process and may provide a flat upper surface thereon, and in the case where the second capping layer CL2 is formed by a deposition process, an organic material other than a liquid monomer may be provided.

[0198] The process of forming the second capping layer CL2 should not be limited thereto or thereby, and the second capping layer CL2 may be formed by an inkjet method of providing a liquid organic material on the first capping layer CL1 to form an organic layer.

[0199] The organic material for the second cover layer CL2 may include a monomer or a polymer. In one embodiment, for example, the second cover layer CL2 may include at least one of an acrylic resin, an epoxy resin, and silicon oxycarbide (SiOC). However, the organic material for the second cover layer CL2 should not be limited thereto or thereby.

[0200] The process of forming the second cover layer CL2 may be performed at a temperature equal to or greater than 25 degrees Celsius (° C.) and equal to or less than 100° C. Since the second cover layer CL2 is formed at a low temperature, layers and various elements under the second cover layer CL2 may be prevented from being thermally damaged.

[0201] After the pattern mask MK is disposed on the second cover layer CL2, a photoresist process may be performed on the second cover layer CL2. Since the upper surface of the second cover layer CL2 is flat, the pattern mask MK may be disposed on the second cover layer CL2. The pattern mask MK may be provided with a pattern opening MK-OP defined therethrough, and the shape and arrangement of the pattern opening MK-OP in a plan view may correspond to the shape and arrangement of the groove portion GR formed in the second cover layer CL2 in a plan view.

[0202] Each of the pattern openings MK-OP may have a width equal to or greater than 0.1 μm and equal to or less than 10 μm, however, should not be limited thereto or thereby.

[0203] Then, a process of removing at least a portion of the second cover layer CL2 from the upper surface of the second cover layer CL2 may be performed to form groove portions GR defined in the second cover layer CL2 and spaced apart from each other. In one embodiment, for example, the process of forming the groove portion GR may be performed by a dry etching process of etching a portion of the upper surface of the second cover layer CL2 using plasma. Therefore, the groove portion GR may be anisotropically formed in the second cover layer CL2, and thus the groove portion GR may be formed to have a sufficient depth.

[0204] When the groove portion GR is formed, the pattern mask MK disposed on the second cover layer CL2 may be removed.

[0205] In the following, reference will be made to Figure 5G to Figure 5I A process of forming the third capping layer CL3 and the light-blocking pattern BM is described.

[0206] The third cover layer CL3 may be formed to cover the groove portion side surface S and the upper surface of the second cover layer CL2. In addition, the third cover layer CL3 may be formed to cover the groove portion lower surface B or the first cover layer CL1. In one embodiment, for example, the groove portion GR may be formed to completely penetrate the second cover layer CL2 in the region overlapping the non-light emitting area NPXA, and thus the third cover layer CL3 may be formed to cover the first cover layer CL1.

[0207] The process of forming the third capping layer CL3 may be performed by an atomic layer deposition (ALD) method. Therefore, thickness variation of the third capping layer CL3 may be alleviated, and step coverage may be improved.

[0208] The third capping layer CL3 may include silicon oxide (SiO x ), metal oxide or metal. Therefore, the surface of the third cover layer CL3 may have a hydrophilic property. As described later, in the case where the material for forming the light blocking pattern BM has a hydrophilic property, the light blocking pattern BM may be easily formed to the inside of the groove portion GR.

[0209] Then, a process of forming a light blocking pattern BM in the groove portion GR may be performed. The process of forming the light blocking pattern BM in the groove portion GR may be performed by a slit coating or inkjet process. Therefore, the light shielding material including carbon black or graphene may be filled in the inner space GR-SP (refer to Figure 5E )middle.

[0210] In the process of forming the light-blocking pattern BM, a first portion BM-P1 corresponding to a material for forming the light-blocking pattern BM and filling the inner space GR-SP of the groove portion GR may be formed in the preliminary display device P1000. The first portion BM-P1 may be used as the light-blocking pattern BM in the display device 1000 (refer to Figure 3A ).

[0211] However, the material for forming the light-blocking pattern BM may also be disposed in the inner space GR-SP (refer to Figure 5E ), and may be formed as a second portion BM-P2 during a process of forming the light-blocking pattern BM in the groove portion GR. The second portion BM-P2 may be referred to as an “upper residual layer” formed during a process of forming the light-blocking pattern BM.

[0212] Then, a process of removing the second portion BM-P2 may be performed. The process of removing the second portion BM-P2 may be performed by a chemical mechanical polishing ("CMP") process or an ashing process. Thus, the upper remaining layer may be removed, and a light blocking pattern BM may be formed, such as Fig.5I shown.

[0213] refer to Figure 5J , a process of forming the sensor layer 200 on the third cover layer CL3 may be performed. The sensor layer 200 may be formed on the display layer 100 through a continuous process.

[0214] The first sensing insulating layer 201 may be formed by depositing an inorganic material on the encapsulation layer 140. The first conductive layer 202 may be formed by coating a conductive material on the first sensing insulating layer 201 and selectively patterning the coated conductive material using a photolithography process.

[0215] The second sensing insulating layer 203 may be formed on the first sensing insulating layer 201 by a deposition process, and may cover the first conductive layer 202. Then, the second conductive layer 204 may be formed by coating a conductive material on the second sensing insulating layer 203, and the cover insulating layer 205 may be formed by depositing an inorganic material on the second conductive layer 204.

[0216] refer to Figure 5K, a process of forming the optical layer 300, the adhesive layer 400, and the window 500 on the sensor layer 200 may be performed. The process of forming the optical layer 300, the adhesive layer 400, and the window 500 may be performed sequentially.

[0217] Although the embodiments of the present disclosure have been described, it should be understood that the present disclosure should not be limited to these embodiments, but a person skilled in the art may make various changes and modifications within the spirit and scope of the present disclosure as hereinafter claimed.

[0218] Therefore, the disclosed subject matter should not be limited to any single embodiment described herein, and the scope of the present invention should be determined in accordance with the appended claims.

Claims

1. A display device having a light-emitting area and a non-light-emitting area surrounding the light-emitting area, comprising: basal layer; a light emitting element layer, disposed on the base layer and comprising a light emitting element; a pixel defining layer disposed on the base layer and provided with a light emitting opening overlapping with the light emitting element in a plan view; a partition wall including a first partition wall layer disposed on the pixel defining layer and a second partition wall layer disposed on the first partition wall layer, wherein the partition wall is provided with a partition wall opening overlapping the light emitting opening in the plan view; An encapsulation layer, covering the light emitting element; as well as The sensor layer is arranged on the packaging layer, and the packaging layer comprises: a first covering layer, covering the light emitting element layer and the isolation wall; a second cover layer disposed on the first cover layer and provided with groove portions, wherein the groove portions are defined in the second cover layer by recessing some portions of the second cover layer from an upper surface of the second cover layer and are spaced apart from each other; A third covering layer disposed on the second covering layer; and The light blocking pattern is arranged in the groove portion. 2 . The display device according to claim 1 , wherein the light-blocking patterns are arranged in one direction, and each of the light-blocking patterns has a rectangular shape in a cross section parallel to the one direction and perpendicular to an upper surface of the base layer. The display device according to claim 1 , wherein the light-blocking pattern comprises carbon black or graphene. 4 . The display device of claim 1 , wherein the light-blocking pattern has a dielectric constant equal to or greater than 1 F / m and equal to or less than 3 F / m.

5. The display device according to claim 1, wherein each of the groove portions has a width equal to or greater than 0.1 micrometers and equal to or less than 10 micrometers, and a spacing distance between two adjacent ones of the groove portions is equal to or greater than 0.1 micrometers and equal to or less than 10 micrometers.

6. The display device according to claim 1, wherein each of the light-blocking patterns has a width equal to or greater than 1 micrometer and equal to or less than 1.5 micrometers, each of the light-blocking patterns has a height equal to or greater than 4.5 micrometers and equal to or less than 10 micrometers, and a spacing distance between two adjacent ones of the light-blocking patterns is equal to or greater than 1 micrometer and equal to or less than 100 micrometers.

7. The display device according to claim 1, wherein the first covering layer includes at least one of silicon nitride, silicon oxynitride, silicon oxide, titanium oxide and aluminum oxide, the second covering layer includes at least one of acrylic resin, epoxy resin and silicon oxycarbide, and the third covering layer includes at least one of silicon oxide, metal oxide and metal. 8 . The display device according to claim 1 , wherein at least a portion of an upper surface of the first cover layer covering the second barrier wall layer is partially exposed through the groove in the non-emission region and contacts the third cover layer.

9. The display device according to claim 1, wherein the light-blocking pattern comprises: a first light-blocking pattern having a first height; and a second light-blocking pattern having a second height greater than the first height, The first light blocking pattern is spaced apart from the partition wall, and the second light blocking pattern overlaps the partition wall in the plan view.

10. The display device according to claim 9, wherein the light-blocking pattern further comprises a third light-blocking pattern having a third height, The third light blocking pattern is spaced apart from the partition wall, and the third height is different from the second height.

11. The display device according to claim 1, wherein the groove portions each have a depth less than a distance from an upper surface of the second covering layer to an upper surface of the first covering layer in the non-luminous area, and a portion of the first covering layer covering the upper surface of the second isolation wall layer is spaced apart from the third covering layer, and the second covering layer is placed between the first covering layer and the third covering layer.

12. The display device according to claim 1, wherein the light-blocking patterns are arranged in one direction, and in a cross section parallel to the one direction and perpendicular to the base layer, each of the light-blocking patterns has a shape whose width decreases in a direction from a lower portion to an upper portion thereof.

13. The display device according to claim 1, wherein each of the light emitting elements comprises: a first electrode disposed in a corresponding one of the partition wall openings; a light-emitting layer disposed on the first electrode; as well as A second electrode disposed on the light-emitting layer, The second electrode is in contact with the first isolation wall layer, the first isolation wall layer includes aluminum, and the second isolation wall layer includes titanium.

14. The display device according to claim 1, wherein the sensor layer comprises: a first sensing insulating layer disposed on the third covering layer; A first conductive layer disposed on the first sensing insulating layer; a second sensing insulating layer disposed on the first sensing insulating layer and covering the first conductive layer; as well as A second conductive layer is disposed on the second sensing insulating layer.

15. The display device according to claim 1, further comprising: an optical layer disposed on the sensor layer; an adhesive layer disposed on the optical layer; as well as a window disposed on the adhesive layer, wherein the optical layer is attached to the window by the adhesive layer. 16 . The display device according to claim 1 , wherein a side surface of the second partition wall layer protrudes more than the first partition wall layer, and the protruding portion of the side surface of the second partition wall layer overlaps with at least a portion of the light emitting element in the plan view. 17 . The display device according to claim 13 , wherein the pixel defining layer is disposed between the first electrode and the first isolation wall layer to prevent the first electrode from being electrically connected to the first isolation wall layer.

18. A method for manufacturing a display device, comprising: A preliminary display device is provided, the preliminary display device comprising: a substrate layer; a light emitting element layer disposed on the substrate layer and comprising a light emitting element; a pixel defining layer disposed on the substrate layer and provided with a light emitting opening overlapping with the light emitting element in a plan view; a partition wall comprising a first partition wall layer disposed on the pixel defining layer and a second partition wall layer disposed on the first partition wall layer, wherein the partition wall is provided with a partition wall opening overlapping with the light emitting opening in the plan view; forming a first covering layer to cover the light emitting element layer and the partition wall; forming a second covering layer on the first covering layer; forming groove portions defined in the second cover layer and spaced apart from each other by removing portions of the second cover layer from an upper surface of the second cover layer; forming a third covering layer to cover the side surface of the groove portion and the upper surface of the second covering layer; forming a light-blocking pattern in an inner space of the groove portion; and A sensor layer is formed on the third cover layer. 19 . The method of claim 18 , wherein the forming of the recessed portion comprises dry etching the portions of the second capping layer from the upper surface of the second capping layer.

20. The method of claim 18, wherein the forming of the light-blocking pattern comprises removing an upper residual layer including a material for the light-blocking pattern and disposed outside the groove portion, wherein the removing of the upper residual layer is performed by a chemical mechanical polishing process or an ashing process.

Citation Information

Patent Citations

  • Communication methods and equipment

    KR1020230096966A