A dynamic key encryption device and method based on key check code

Abstract

The application belongs to the technical field of integrated circuit hardware security, and discloses a dynamic key encryption device and method based on a key check code, which comprises a dynamic key generation module, a trigger signal generation module and a dynamic key check module, an initial key signal is input into the dynamic key generation module, the dynamic key generation module outputs a dynamic key signal to the dynamic key check module, the dynamic key check module acquires an original circuit signal from an original circuit and outputs an encrypted circuit signal to the original circuit, the trigger signal generation module acquires an original circuit state machine signal from the original circuit and outputs a trigger signal to the dynamic key generation module and the dynamic key check module; the application constrains and expands the bit width of an original key by using a check bit, avoids the situation that a solver directly solves one code in a cyclic code and causes the key to be directly cracked, increases the solving space of the solver, and delays the cracking speed of reverse engineering.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit hardware security technology, and particularly relates to a dynamic key encryption device and method based on key verification codes. Background Technology

[0002] With the development of the integrated circuit industry, IP design companies are increasingly strengthening the protection of their self-developed circuits. Correspondingly, attack methods targeting these self-developed circuits are also increasing. Logic-locked encryption methods, such as combinational logic locking and sequential logic locking, are widely studied due to their high protection efficiency and strong resistance to attacks. Logic-locked encryption methods insert key gates into the existing circuit, and the original circuit can only function normally when the input key signal is correct.

[0003] However, most existing logic locking technologies are based on static keys. The characteristics of static keys make another attack method—probe detection of logic levels—effective. In reverse engineering, the logic level at the key's location can be read using a probe to obtain key information, thereby accelerating the cracking of secure circuits and causing losses to IP design companies.

[0004] To address the problems caused by static keys, an existing dynamic key encryption method involves changing the key information input to the circuit when the circuit is in a specific state during operation. This is coupled with corresponding key checking logic to verify whether the changed key meets expectations. If it does not, the key is considered incorrect, potentially damaging the original circuit signals, leading to circuit malfunction and IP failure. This dynamic key generation logic is based on cyclic codes, and its key checking logic determines whether to damage the circuit based on the parity check results of specific bits and the information regarding key changes.

[0005] However, the above method still has problems. Since the dynamic key is based on a cyclic code key group, the cyclic code leads to the existence of multiple key solutions, meaning that each key in the sequence can meet the expectations of the key checking circuit. Therefore, even if the externally input key is not the expected seed signal, the circuit can still function normally. This situation increases the number of feasible keys and the number of feasible solutions for the circuit solver, which is equivalent to reducing the solution space and thus speeding up the circuit cracking process. Summary of the Invention

[0006] The purpose of this invention is to provide a dynamic key encryption device and method based on key verification codes to solve the above-mentioned technical problems.

[0007] To solve the above-mentioned technical problems, the specific technical solution of the dynamic key encryption device and method based on key verification code of the present invention is as follows:

[0008] A dynamic key encryption device based on a key verification code includes a dynamic key generation module, a trigger signal generation module, and a dynamic key checking module. An initial key signal is input to the dynamic key generation module, which outputs a dynamic key signal to the dynamic key checking module. The dynamic key checking module obtains the original circuit signal from the original circuit and outputs the encrypted circuit signal back to the original circuit. The trigger signal generation module obtains the original circuit state machine signal from the original circuit and outputs a trigger signal to both the dynamic key generation module and the dynamic key checking module.

[0009] The dynamic key generation module is used to generate dynamic key signals;

[0010] The dynamic key checking module is used to perform parity check and key change check on the dynamic key output by the dynamic key generation module and the previous key signal, and determine whether the result meets expectations. If it does not meet expectations, the encrypted circuit signal is destroyed.

[0011] The trigger signal generation module is used to generate a corresponding trigger signal each time the state machine in the original circuit jumps to a specified state.

[0012] Furthermore, the dynamic key generation module includes an initial key checking module and a key generation module. The key generation module is used to generate a dynamic key. The inputs of the key generation module are an initial key signal, a trigger signal, and a generation enable signal, and the output is a dynamic key signal. The initial key checking module is used to regenerate the check bit of the input key and compare the original check bit with the newly generated check bit. The comparison result is used as the enable signal for the subsequent key generation module. The input of the initial key checking module is the initial key signal, and the output is the generation enable signal.

[0013] Furthermore, the initial key checking module includes a check bit generation module and a comparison module. The check bit generation module is used to generate a check bit signal. The input of the check bit generation module is the initial key signal, and the output is the generated check bit signal. The comparison module is used to compare the generated check bit signal output by the check bit generation module with the initial check bit signal. The input of the comparison module is the initial check bit signal and the generated check bit signal, and the output is the generation enable signal.

[0014] Furthermore, the key generation module includes an enable module and an LFSR module. The enable module is used to output an enable signal. The enable module takes a trigger signal as input, generates an enable signal, and outputs an enable signal. The LFSR module is used to generate a new key. The LFSR module takes an initial key signal as input and outputs a dynamic key signal.

[0015] This invention also discloses a dynamic key encryption method for a dynamic key encryption device based on a key verification code, comprising the following steps:

[0016] Step 1: The initial key signal input from the outside contains the check bit of the initial key signal. That is, the key and the check bit of the key together serve as the initial input signal of the dynamic key generation module.

[0017] Step 2: The initial key check module in the dynamic key generation module regenerates the check bit of the input key and compares the original check bit with the newly generated check bit to obtain the comparison result for the enable signal of the subsequent key generation module.

[0018] Step 3: The key generation module in the dynamic key generation module generates a dynamic key sequence through the LFSR module, and the dynamic key signal generation will only be started when the enable signal from the initial key check module is valid;

[0019] Step 4: The trigger signal generation module generates a corresponding trigger signal each time the state machine in the original circuit jumps to a specified state. The trigger signal is simultaneously sent to the dynamic key generation module to generate a new key and to the dynamic key checking module to check whether the new key meets the expectations.

[0020] Step 5: The dynamic key checking module performs parity check and key change check on the output dynamic key and the previous key signal, and determines whether the result meets expectations. If it does not meet expectations, the encrypted circuit signal is destroyed.

[0021] Furthermore, if the newly generated key verification bit does not match the verification bit in the initial key signal in step 2, the enable signal of the subsequent key generation module will remain at a low level.

[0022] Furthermore, the specified state mentioned in step 4 refers to a rare reachable state in the state machine, that is, the state in the state machine that requires the longest clock cycle to jump from the reset state to the target state.

[0023] Furthermore, the parity check in the dynamic key checking module includes parity check results for odd-parity check invariance, even-parity check invariance, and parity check conversion results for a pre-selected subset of bits in the dynamic key. Specifically, there are three cases for parity check of the selected bits: the parity check results of the current dynamic key and the previous dynamic key are both odd; the parity check results of the current dynamic key and the previous dynamic key are both even; and the parity check results of the current dynamic key and the previous dynamic key are different, if the previous result was odd, then the current result is even, and if the previous result was even, then the current result is odd.

[0024] Furthermore, when the initial key signal does not match the check bit, the circuit will exhibit the following behavior:

[0025] The initial key check module's generation enable signal will remain in an invalid state;

[0026] Even if the key generation module receives a trigger signal from the outside, it will be blocked by an invalid generation enable signal, meaning that the LFSR module cannot generate a new key normally.

[0027] When the dynamic key checking module receives a trigger signal, it begins to check the dynamic key. If it finds that the parity check of the key does not meet expectations, or if it finds that the key has not changed, it will then destroy the encryption signal output to the original circuit, causing the original circuit to malfunction.

[0028] The dynamic key encryption device and method based on key verification code of the present invention have the following advantages:

[0029] First, by using a check bit to constrain and expand the bit width of the original key, the solver is prevented from directly solving one code in the cyclic code, which would lead to the key being directly cracked. This increases the solver's solution space and slows down the cracking speed of reverse engineering.

[0030] Second, the initial key checking module only adds a check code checking and enabling module, which has a relatively small overall area cost. Moreover, it is only related to the initial key of the circuit and is not related to the specific original circuit function. Therefore, it is widely applicable to different circuits and has strong applicability.

[0031] Third, the presence of the check bit ensures that each code in the cyclic code sequence can not only be an independent key but also cannot be easily cracked. At the same time, it allows different key groups to be used in the same batch of encryption circuits, which increases the level of confusion to some extent. Attached Figure Description

[0032] Figure 1 Overall circuit block diagram of the method of this invention;

[0033] Figure 2 Circuit block diagram of the dynamic key generation module of the present invention;

[0034] Figure 3 Circuit block diagram of the initial key checking module of the method of the present invention;

[0035] Figure 4 Circuit block diagram of the key generation module of the method of the present invention. Detailed Implementation

[0036] To better understand the purpose, structure, and function of this invention, the following detailed description of a dynamic key encryption device and method based on a key verification code is provided in conjunction with the accompanying drawings.

[0037] like Figure 1 As shown, the present invention provides a dynamic key encryption device based on a key verification code, comprising a dynamic key generation module, a trigger signal generation module, and a dynamic key checking module. An initial key signal is input to the dynamic key generation module, the dynamic key generation module outputs a dynamic key signal to the dynamic key checking module, the dynamic key checking module obtains the original circuit signal from the original circuit and outputs the encrypted circuit signal to the original circuit, and the trigger signal generation module obtains the original circuit state machine signal from the original circuit and outputs a trigger signal to the dynamic key generation module and the dynamic key checking module.

[0038] The dynamic key generation module is used to generate dynamic key signals. Specifically, for example... Figure 2 As shown, the dynamic key generation module includes an initial key checking module and a key generation module. The key generation module generates a dynamic key. Its inputs are an initial key signal, a trigger signal, and a generation enable signal; its output is the dynamic key signal. The initial key checking module regenerates the checksum of the input key and compares the original checksum with the newly generated checksum. The comparison result is used as the enable signal for the subsequent key generation module. The initial key checking module's input is the initial key signal, and its output is the generation enable signal. Figure 3 As shown, the initial key checking module includes a check bit generation module and a comparison module. The check bit generation module generates a check bit signal; its input is the initial key signal, and its output is the generated check bit signal. The comparison module compares the generated check bit signal output by the check bit generation module with the initial check bit signal; its input is the initial check bit signal and the generated check bit signal, and its output is a generation enable signal. Figure 4 As shown, the key generation module includes an enable module and an LFSR module. The enable module is used to output an enable signal. The input of the enable module is a trigger signal, the generation of the enable signal is the enable signal, and the output is the enable signal. The LFSR module is used to generate a new key. The input of the LFSR module is the initial key signal, and the output is the dynamic key signal.

[0039] The dynamic key checking module is used to perform parity checks and key change checks on the dynamic key output by the dynamic key generation module and the previous key signal, and to determine whether the results meet expectations. If they do not meet expectations, the encrypted circuit signal will be destroyed.

[0040] The trigger signal generation module is used to generate a corresponding trigger signal each time the state machine in the original circuit jumps to a specified state.

[0041] The present invention provides a dynamic key encryption method based on a key verification code, comprising the following steps:

[0042] Step 1: The initial key signal input from the outside contains the check bit of the initial key signal. That is, the key and the check bit of the key together serve as the initial input signal of the dynamic key generation module.

[0043] Step 2: The initial key check module in the dynamic key generation module regenerates the check bit of the input key and compares the original check bit with the newly generated check bit. The comparison result is used as the enable signal for the subsequent key generation module.

[0044] If the newly generated key check bit does not match the check bit in the initial key signal, the enable signal of the subsequent key generation module will remain low.

[0045] Step 3: The key generation module in the dynamic key generation module generates a dynamic key sequence through the LFSR (Linear Feedback Shift Register) module, and the dynamic key signal generation will only be started when the enable signal from the initial key check module is valid.

[0046] Step 4: The trigger signal generation module generates a corresponding trigger signal each time the state machine in the original circuit jumps to a specified state. The trigger signal is simultaneously sent to the dynamic key generation module to generate a new key and to the dynamic key checking module to check whether the new key meets the expectations.

[0047] The specified state, in this method, refers to a rare reachable state in a state machine, that is, the state in a state machine that requires the longest clock cycles to transition from the reset state to the target state.

[0048] Step 5: The dynamic key checking module performs parity checks and key change checks on the output dynamic key and the previous key signal, and determines whether the results meet expectations. If they do not meet expectations, the encrypted circuit signal is destroyed.

[0049] The parity check in the dynamic key checking module includes checking the odd-invariant parity result, even-invariant parity result, and parity-conversion result for a pre-selected subset of bits in the dynamic key. Specifically, for the selected bits, the parity check can have three cases: both the current and previous dynamic keys have odd parity results; both the current and previous dynamic keys have even parity results; and the current and previous dynamic keys have different parity results—if the previous result was odd, the current result is even, and vice versa. The specific parity check algorithm can be configured. Example:

[0050] ① This method not only stores the information of the original key when storing the key, but also calculates the checksum of the key through a checksum algorithm and appends it to the key for storage.

[0051] ② The state machine selected in this method is a rare state. It can be directly specified according to the spec, or it can be simulated with random input for the circuit and the transition of each state of the state machine can be counted. The state with the longest arrival time after the reset state is selected as the specified rare state.

[0052] ③ When inputting circuit key information, the key information and checksum information need to be input together into the dynamic key generation module, such as... Figure 2 As shown. The initial key, after being input into the key generation module as a seed key, also needs to be transmitted to the initial key checking module, and the checksum signal of the initial key must be input to the initial key checking module.

[0053] ④ In the initial key check module, such as Figure 3 As shown, a new check bit is first generated for the initial key signal. Then, the newly generated check bit is compared with the initial check bit signal. If they are the same, the generation enable signal is pulled high; otherwise, the generation enable signal will remain unchanged.

[0054] ⑤ Trigger signal generation module (e.g.) Figure 1 As shown, when the selected state machine in the original circuit transitions to the specified state (as described in ②), a pulse trigger signal is generated and output to the dynamic key generation module to generate a new dynamic key. At the same time, it is also output to the dynamic key checking module to check whether the dynamically generated key meets the expectations.

[0055] ⑥ When the enable signal is valid, the key generation module (e.g.) Figure 4 As shown, the LFSR module will be enabled when the input trigger signal is valid. The LFSR module generates a new key (belonging to the cyclic code key sequence) and outputs it to the dynamic key checking module.

[0056] ⑦ Dynamic key verification module (e.g.) Figure 1 As shown, each time the trigger signal is valid, parity checks will be performed on some bits of the newly generated key and the results will be checked to see if they meet expectations. The newly generated key will be compared with the previous key signal. Only when the parity check is passed and the key signal changes will the signal logic of the original circuit input remain normal. Otherwise, the signal input of the original circuit will be destroyed and output to the original circuit, so that the original circuit cannot work properly.

[0057] When the initial key signal does not match the check bit, the circuit will behave as follows:

[0058] ① The initial key check module's generation enable signal will remain in an invalid state.

[0059] ② Even if the key generation module receives a trigger signal from the outside, it will be blocked by an invalid generation enable signal, meaning that the LFSR module cannot generate a new key normally.

[0060] ③ The dynamic key checking module receives a trigger signal and begins to check the dynamic key. If it finds that the parity check of the key does not meet expectations, or if it finds that the key has not changed, it will then destroy the encryption signal output to the original circuit, causing the original circuit to malfunction.

[0061] It is understood that the present invention has been described through some embodiments, and those skilled in the art will recognize that various changes or equivalent substitutions can be made to these features and embodiments without departing from the spirit and scope of the invention. Furthermore, under the teachings of the present invention, these features and embodiments can be modified to adapt to specific situations and materials without departing from the spirit and scope of the invention. Therefore, the present invention is not limited to the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application are within the protection scope of the present invention.

Claims

1. A dynamic key encryption device based on a key check code, characterized by, The dynamic key generation module, the trigger signal generation module and the dynamic key check module are included, the initial key signal is input into the dynamic key generation module, the dynamic key generation module outputs the dynamic key signal to the dynamic key check module, the dynamic key check module acquires the original circuit signal from the original circuit and outputs the encrypted circuit signal to the original circuit, and the trigger signal generation module acquires the original circuit state machine signal from the original circuit and outputs the trigger signal to the dynamic key generation module and the dynamic key check module. The dynamic key generation module is used for generating the dynamic key signal. The dynamic key check module is used for performing the parity check and the key change check on the dynamic key output by the dynamic key generation module and the previous key signal and judging whether the result is expected or not, and if not, the encrypted circuit signal is destroyed. The trigger signal generation module is used for generating the corresponding trigger signal when the state machine in the original circuit jumps to the specified state each time, the dynamic key generation module includes the initial key check module and the key generation module, the key generation module is used for generating the dynamic key, the key generation module inputs the initial key signal, the trigger signal and the generation enable signal and outputs the dynamic key signal, the initial key check module is used for regenerating the check bit of the input key and comparing the original check bit with the newly generated check bit to obtain the comparison result used for the enable signal of the subsequent key generation module, and the initial key check module inputs the initial key signal and outputs the generation enable signal, the initial key check module includes the check bit generation module and the comparison module, the check bit generation module is used for generating the check bit signal, the check bit generation module inputs the initial key signal and outputs the generation check bit signal, the comparison module is used for comparing the generation check bit signal output by the check bit generation module with the initial check bit signal, the comparison module inputs the initial check bit signal and the generation check bit signal and outputs the generation enable signal, the key generation module includes the enable module and the LFSR module, the enable module is used for outputting the enable signal, the enable module inputs the trigger signal and the generation enable signal and outputs the enable signal, and the LFSR module is used for generating the new key, the LFSR module inputs the initial key signal and outputs the dynamic key signal.

2. A dynamic key encryption method based on a dynamic key encryption apparatus based on a key check code as claimed in claim 1, characterized by, The steps include the following steps: Step 1: the initial key signal input from outside contains the check bit of the initial key signal, that is, the key and the check bit of the key are used as the initial input signal of the dynamic key generation module together; Step 2: the initial key check module in the dynamic key generation module regenerates the check bit of the input key and compares the original check bit with the newly generated check bit to obtain the comparison result used for the enable signal of the subsequent key generation module; Step 3: the key generation module in the dynamic key generation module generates the dynamic key sequence through the LFSR module, and the dynamic key signal generation is started only when the enable signal from the initial key check module is valid. Step 4: The trigger signal generation module generates a corresponding trigger signal each time the state machine in the original circuit jumps to a specified state, and the trigger signal is simultaneously given to the dynamic key generation module for generating a new key and to the dynamic key check module for checking whether the new key meets the expectation; Step 5: The dynamic key check module performs parity check and key change check on the output dynamic key and the previous key signal and judges whether the result meets the expectation, and if not, destroys the encrypted circuit signal.

3. The dynamic key encryption method of claim 2, wherein, If the regenerated key check bit does not match the check bit in the initial key signal, the enable signal of the subsequent key generation module will always remain low.

4. The dynamic key encryption method of claim 2, wherein, The specified state in step 4 refers to a rare reachable state in the state machine, that is, the state machine requires the longest clock cycle to jump from the reset state to the target state.

5. The dynamic key encryption method of claim 2, wherein, The parity check in the dynamic key check module includes the odd check invariant result, the even check invariant result and the parity check conversion result of the pre-selected part of the dynamic key, that is, there are three cases for the selected bit parity check: the part of the current dynamic key and the previous dynamic key check result is odd; the part of the current dynamic key and the previous dynamic key check result is even; the part of the current dynamic key and the previous dynamic key check result is different, if the previous one is odd, the current one is even, if the previous one is even, the current one is odd.

6. The dynamic key encryption method of claim 2, wherein, When the initial key signal does not match the check bit, the circuit will have the following behaviors: The generation enable signal of the initial key check module will remain in an invalid state; The key generation module will be shielded by the invalid generation enable signal even if it receives a trigger signal from the outside, that is, the LFSR module cannot normally work to generate a new key; The dynamic key check module receives a trigger signal to start checking the dynamic key, or checks that the parity check of the key does not meet the expectation, or checks that the key does not change, and then destroys the encrypted signal output to the original circuit, resulting in that the original circuit cannot work normally.

Images