DPU-based Low-latency Protocol Stack Fragmentation and Reassembly Method, Apparatus, Device, and Medium

Abstract

The present disclosure relates to a method, apparatus, device, and medium for fragment reassembly of a DPU-based low-latency protocol stack. Among them, the method for fragment reassembly of a DPU-based low-latency protocol stack includes: receiving a network data stream, where the network data stream includes fragmented data packets; judging the attribute identification of the fragmented data packets through the hardware layer; when the attribute identification of the fragmented data packets is the identification required by the hardware layer, performing fragment reassembly processing on the fragmented data packets through the hardware layer; when the attribute identification of the fragmented data packets is not the identification required by the hardware layer, performing fragment reassembly processing on the fragmented data packets through the software layer. According to the embodiments of the present disclosure, it is possible to reduce the discarding of fragmented data packets, improve the fragment reassembly efficiency, and reduce the packet loss situation.

Description

Technical Field

[0001] The present disclosure relates to the technical field of low-latency network protocol stack software, and particularly to a method, apparatus, device and medium for fragment reassembly of a low-latency protocol stack based on a DPU. Background Art

[0002] The existing Internet Protocol (IP) layer fragment reassembly technology is used to divide data packets into smaller fragments (fragments) according to the Maximum Transmission Unit (MTU), and reassemble them according to an identifier, such as a five-tuple, after reaching the destination address to form the original data packet.

[0003] In the related art, the logic of low-latency protocol stack fragment reassembly is all done by the hardware layer. However, when the network traffic is too large, the fragment reassembly logic of the hardware layer cannot support such a large-scale fragment reassembly. That is, when there are too many fragmented packets, the hardware layer will discard the redundant fragmented packets, resulting in serious packet loss during data transmission. Summary of the Invention

[0004] To solve the above technical problems, the present disclosure provides a method, apparatus, device and medium for fragment reassembly of a low-latency protocol stack based on a DPU.

[0005] In a first aspect, the present disclosure provides a method for fragment reassembly of a low-latency protocol stack based on a DPU, including:

[0006] Receiving a network data stream, where the network data stream includes fragmented data packets;

[0007] Judging the attribute identifier of the fragmented data packet through the hardware layer;

[0008] When the attribute identifier of the fragmented data packet is the identifier required by the hardware layer, performing fragment reassembly processing on the fragmented data packet through the hardware layer;

[0009] When the attribute identifier of the fragmented data packet is not the identifier required by the hardware layer, performing fragment reassembly processing on the fragmented data packet through the software layer.

[0010] In a second aspect, the present disclosure provides a device for fragment reassembly of a low-latency protocol stack based on a DPU, including:

[0011] A data receiving module, configured to receive a network data stream, where the network data stream includes fragmented data packets;

[0012] An identifier judging module, configured to judge the attribute identifier of the fragmented data packet through the hardware layer;

[0013] The first processing module is used to perform fragmentation and reassembly processing on the fragmented data packet through the hardware layer when the attribute identifier of the fragmented data packet is the identifier required by the hardware layer;

[0014] The second processing module is used to perform fragmentation and reassembly processing on the fragmented data packet through the software layer when the attribute identifier of the fragmented data packet is not the identifier required by the hardware layer.

[0015] In a third aspect, the present disclosure provides a DPU low-latency protocol stack fragmentation and reassembly device, including:

[0016] A processor;

[0017] A memory for storing executable instructions;

[0018] Wherein, the processor is used to read the executable instructions from the memory and execute the executable instructions to implement the DPU low-latency protocol stack fragmentation and reassembly method in the first aspect.

[0019] In a fourth aspect, the present disclosure provides a computer-readable storage medium storing a computer program, which when executed by a processor, causes the processor to implement the DPU low-latency protocol stack fragmentation and reassembly method in the first aspect.

[0020] The technical solutions provided by the embodiments of the present disclosure have the following advantages compared with the prior art:

[0021] The DPU low-latency protocol stack fragmentation and reassembly method, device, equipment and medium in the embodiments of the present disclosure can receive network data streams, where the network data streams include fragmented data packets, then judge the attribute identifiers of the fragmented data packets through the hardware layer, and then when the attribute identifiers of the fragmented data packets are the identifiers required by the hardware layer, perform fragmentation and reassembly processing on the fragmented data packets through the hardware layer, and finally when the attribute identifiers of the fragmented data packets are not the identifiers required by the hardware layer, perform fragmentation and reassembly processing on the fragmented data packets through the software layer. Thus, when receiving a network data stream containing fragmented data packets, according to the attribute identifiers of the fragmented data packets, perform fragmentation and reassembly processing on the fragmented data packets not processed by the hardware layer through the software layer, thereby reducing the discarding of fragmented data packets, improving the fragmentation and reassembly efficiency, and reducing the packet loss situation. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In combination with the accompanying drawings and referring to the following specific embodiments, the above and other features, advantages and aspects of the various embodiments of the present disclosure will become more obvious. Throughout the drawings, the same or similar reference numerals represent the same or similar elements. It should be understood that the drawings are schematic and the original elements and elements are not necessarily drawn to scale.

[0023] Figure 1A schematic flowchart of a method for fragment reassembly of a DPU low-latency protocol stack provided by an embodiment of the present disclosure;

[0024] Figure 2 A schematic flowchart of another method for fragment reassembly of a DPU low-latency protocol stack provided by an embodiment of the present disclosure;

[0025] Figure 3 A schematic structural diagram of a device for fragment reassembly of a DPU low-latency protocol stack provided by an embodiment of the present disclosure;

[0026] Figure 4 A schematic structural diagram of a device for fragment reassembly of a DPU low-latency protocol stack provided by an embodiment of the present disclosure. Detailed implementation manners

[0027] Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although some embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Instead, these embodiments are provided to more thoroughly and completely understand the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are only for exemplary purposes and are not used to limit the protection scope of the present disclosure.

[0028] It should be understood that the various steps recorded in the method embodiments of the present disclosure can be executed in different orders and / or in parallel. In addition, the method embodiments may include additional steps and / or omit the steps shown. The scope of the present disclosure is not limited in this regard.

[0029] The term "including" and its variants used herein are open-ended, that is, "including but not limited to". The term "based on" means "at least partially based on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments". The relevant definitions of other terms will be given in the following description.

[0030] It should be noted that the concepts such as "first" and "second" mentioned in the present disclosure are only used to distinguish different devices, modules or units, and are not used to limit the order of functions performed by these devices, modules or units or their interdependent relationships.

[0031] It should be noted that the modifications of "one" and "multiple" mentioned in the present disclosure are illustrative rather than restrictive. Those skilled in the art should understand that unless clearly stated otherwise in the context, it should be understood as "one or more".

[0032] The names of the messages or information exchanged between multiple devices in the embodiments of the present disclosure are for illustrative purposes only and are not used to limit the scope of these messages or information.

[0033] To solve the above problems, embodiments of the present disclosure provide a method, apparatus, device, and medium for fragmenting and reassembling a DPU low-latency protocol stack. The following will be combined with Figures 1 to 2 The method for fragmenting and reassembling a DPU low-latency protocol stack provided by the embodiments of the present disclosure will be described in detail.

[0034] Optionally, a data processing unit or a dedicated data processor (DPU) is a hardware accelerator for data processing, running an independent operating system, complex hardware offloading modules, and matching network, security, and storage software functions. DPU is usually used to accelerate throughput-intensive tasks in data centers, cloud computing, and edge computing, such as artificial intelligence inference, large-scale data analysis, and network security. The DPU consists of three main components, including a processing core, a network interface, and a memory interface. These components work together to enable the DPU to process data efficiently.

[0035] Figure 1 The flowchart of a method for fragmenting and reassembling a DPU low-latency protocol stack provided by the embodiments of the present disclosure is shown.

[0036] In the embodiments of the present disclosure, the method for fragmenting and reassembling a DPU low-latency protocol stack can be executed by an electronic device. Among them, the electronic device may include but is not limited to devices such as computer devices, cloud servers, or cloud server clusters.

[0037] As Figure 1 shown, the method for fragmenting and reassembling a DPU low-latency protocol stack may include the following steps.

[0038] S110. Receive a network data stream, where the network data stream includes fragmented data packets.

[0039] In the embodiments of the present disclosure, the electronic device may receive a network data stream.

[0040] Optionally, a network data stream is a data sequence transmitted in a network, and these data are transmitted and processed according to specific rules and methods. Among them, the network data stream includes fragmented data packets.

[0041] Optionally, a fragmented data packet may be a data packet including multiple data fragments.

[0042] Specifically, the electronic device may receive a network data stream including fragmented data packets.

[0043] S120. Determine the attribute identification of the fragmented data packet through the hardware layer.

[0044] In the embodiments of the present disclosure, the electronic device can determine the attribute identification of the fragmented data packet through the hardware layer.

[0045] Optionally, the hardware layer is the most basic layer in the computer system and includes all physical components.

[0046] Optionally, the attribute identification determination can be to determine the identification of the basic attributes corresponding to the data packet.

[0047] Specifically, after the electronic device receives the network data stream containing the fragmented data packet, it can determine the attribute identification of the fragmented data packet through the hardware layer, that is, determine the identification of the basic attributes corresponding to the fragmented data packet.

[0048] S130. When the attribute identification of the fragmented data packet is the identification required by the hardware layer, perform fragmentation and recombination processing on the fragmented data packet through the hardware layer.

[0049] In the embodiments of the present disclosure, when the attribute identification of the fragmented data packet is the identification required by the hardware layer, the electronic device can perform fragmentation and recombination processing on the fragmented data packet through the hardware layer.

[0050] Optionally, the attribute identification can be an identification used to characterize the basic attributes of the fragmented data packet. Among them, the attribute identification includes five-tuple information.

[0051] Optionally, the five-tuple information can include the source IP address, destination IP address, source port number, destination port number, and transport protocol.

[0052] Optionally, the identification required by the hardware layer is the identification corresponding to the fragmented data packet that the hardware layer needs to perform recombination processing on.

[0053] Optionally, the fragmentation and recombination processing can be a process of recombining the fragmented data packet.

[0054] Specifically, after the electronic device determines the attribute identification of the fragmented data packet, if the attribute identification of the fragmented data packet is the identification required by the hardware layer, that is, when it is determined through the five-tuple information that the fragmented data packet is a data packet that the hardware layer needs to process, at this time, the electronic device can perform fragmentation and recombination processing on the fragmented data packet through the hardware layer.

[0055] S140. When the attribute identification of the fragmented data packet is not the identification required by the hardware layer, perform fragmentation and recombination processing on the fragmented data packet through the software layer.

[0056] In an embodiment of the present disclosure, when the attribute identifier of the fragmented data packet is not the identifier required by the hardware layer, the electronic device may perform fragmentation and reassembly processing on the fragmented data packet through the software layer.

[0057] Specifically, after the electronic device determines the attribute identifier of the fragmented data packet, if the attribute identifier of the fragmented data packet is not the identifier required by the hardware layer, that is, when it is determined through the five-tuple information that the fragmented data packet is not a data packet that the hardware layer needs to process, at this time, the electronic device may perform fragmentation and reassembly processing on the fragmented data packet through the software layer.

[0058] Thus, in an embodiment of the present disclosure, it is possible to receive a network data stream, where the network data stream includes fragmented data packets, then perform attribute identifier determination on the fragmented data packets through the hardware layer, and then when the attribute identifier of the fragmented data packet is the identifier required by the hardware layer, perform fragmentation and reassembly processing on the fragmented data packet through the hardware layer, and finally when the attribute identifier of the fragmented data packet is not the identifier required by the hardware layer, perform fragmentation and reassembly processing on the fragmented data packet through the software layer. Thus, when receiving a network data stream containing fragmented data packets, according to the attribute identifier of the fragmented data packet, perform fragmentation and reassembly processing on the fragmented data packets not processed by the hardware layer through the software layer, thereby reducing the discarding of fragmented data packets, improving the fragmentation and reassembly efficiency, and reducing the packet loss situation.

[0059] Optionally, before S110, the fragmentation and reassembly method based on the DPU low-latency protocol stack may further include: performing data fragmentation processing on the original data packet through the hardware layer to obtain the fragmented data packet.

[0060] In an embodiment of the present disclosure, the electronic device may perform data fragmentation processing on the original data packet through the hardware layer to obtain the fragmented data packet.

[0061] Optionally, the original data packet may be a data packet that needs to be fragmented and reassembled for transmission.

[0062] Optionally, the data fragmentation processing may be a processing method of fragmenting a data packet into multiple smaller segments.

[0063] Specifically, the electronic device may perform data fragmentation processing on the original data packet through the hardware layer. For example, after obtaining the original data packet, the electronic device may divide the original data packet into multiple smaller segments according to the maximum transmission unit (MTU) through the hardware layer, thereby obtaining the fragmented data packet.

[0064] Optionally, S130 may specifically include: when the attribute identifier of the fragmented data packet is the identifier required by the hardware layer, performing fragmentation and reassembly processing on the fragmented data packet through the reassembly pool of the hardware layer to obtain the original data packet.

[0065] In an embodiment of the present disclosure, when the attribute identifier of the sharded data packet is the identifier required by the hardware layer, the electronic device may perform shard recombination processing on the sharded data packet through the recombination pool of the hardware layer to obtain the original data packet.

[0066] Optionally, the recombination pool of the hardware layer may be a structure in the hardware layer for performing shard recombination processing.

[0067] Specifically, when the attribute identifier of the sharded data packet is the identifier required by the hardware layer, the electronic device may obtain the sharded data packet through the hardware layer and place the sharded data packet into the recombination pool of the hardware layer, and the recombination pool of the hardware layer performs shard recombination processing on the sharded data packet to obtain the original data packet.

[0068] Optionally, after the attribute identifier of the sharded data packet is not the identifier required by the hardware layer, the shard recombination method based on the DPU low-latency protocol stack may further include: importing the network data stream including the sharded data packet into the DMA cache.

[0069] In an embodiment of the present disclosure, the electronic device may import the network data stream including the sharded data packet into the DMA cache.

[0070] Optionally, a Direct Memory Access (DMA) cache may be used to store the network data stream.

[0071] Specifically, if the attribute identifier of the sharded data packet is not the identifier required by the hardware layer, the electronic device may import the network data stream including the sharded data packet into the DMA cache.

[0072] Optionally, S140 may specifically include: obtaining the sharded data packet included in the network data stream from the DMA cache through the software layer; performing shard recombination processing on the sharded data packet through the recombination pool of the software layer to obtain the original data packet.

[0073] In an embodiment of the present disclosure, the electronic device may obtain the sharded data packet included in the network data stream from the DMA cache through the software layer.

[0074] Specifically, after the electronic device imports the network data stream including the sharded data packet into the DMA cache, it may obtain the sharded data packet included in the network data stream from the DMA cache through the software layer.

[0075] Furthermore, the electronic device may perform shard recombination processing on the sharded data packet through the recombination pool of the software layer to obtain the original data packet.

[0076] Optionally, the recombination pool of the software layer may be a structure in the software layer for performing shard recombination processing.

[0077] Specifically, when the attribute identifier of the fragmented data packet is not the identifier required by the hardware layer, the electronic device can obtain the fragmented data packet included in the network data stream from the DMA cache through the software layer, and put the fragmented data packet into the recombination pool of the software layer. The recombination pool of the software layer performs fragmentation recombination processing on the fragmented data packet to obtain the original data packet.

[0078] Optionally, the fragmentation recombination method based on the DPU low-latency protocol stack may further include: sending the original data packet to the transport layer.

[0079] In the embodiments of the present disclosure, the electronic device can send the original data packet obtained after recombination to the transport layer.

[0080] Figure 2 FIG. shows a schematic flowchart of another fragmentation recombination method based on the DPU low-latency protocol stack provided by the embodiments of the present disclosure.

[0081] As Figure 2 shown, the electronic device can receive a network data stream containing fragmented data packets, and then judge the attribute identifier of the fragmented data packet through the hardware layer, that is, judge the identifier of the basic attribute corresponding to the fragmented data packet. When the attribute identifier of the fragmented data packet is the identifier required by the hardware layer, that is, when it is judged through the five-tuple information that the fragmented data packet is a data packet that needs to be processed by the hardware layer, at this time, the electronic device can perform fragmentation recombination processing on the fragmented data packet through the hardware layer to obtain the original data packet, and send the original data packet to the transport layer; when the attribute identifier of the fragmented data packet is not the identifier required by the hardware layer, that is, when it is judged through the five-tuple information that the fragmented data packet is not a data packet that needs to be processed by the hardware layer, the network data stream containing the fragmented data packet can be imported into the DMA cache, and the fragmented data packet included in the network data stream can be obtained from the DMA cache through the software layer, and the fragmented data packet is put into the recombination pool of the software layer. The recombination pool of the software layer performs fragmentation recombination processing on the fragmented data packet to obtain the original data packet, and sends the original data packet to the transport layer.

[0082] Figure 3 FIG. shows a schematic structural diagram of a fragmentation recombination device based on the DPU low-latency protocol stack provided by the embodiments of the present disclosure.

[0083] As Figure 3 shown, the fragmentation recombination device 300 based on the DPU low-latency protocol stack may include a data receiving module 310, an identifier judging module 320, a first processing module 330, and a second processing module 340.

[0084] The data receiving module 310 may be configured to receive a network data stream, and the network data stream includes fragmented data packets.

[0085] The identification judgment module 320 can be used to judge the attribute identification of the sharded data packet through the hardware layer.

[0086] The first processing module 330 can be used to perform shard recombination processing on the sharded data packet through the hardware layer when the attribute identification of the sharded data packet is the identification required by the hardware layer.

[0087] The second processing module 340 can be used to perform shard recombination processing on the sharded data packet through the software layer when the attribute identification of the sharded data packet is not the identification required by the hardware layer.

[0088] Thus, in the embodiments of the present disclosure, it is possible to receive a network data stream, the network data stream includes sharded data packets, then judge the attribute identification of the sharded data packet through the hardware layer, and then perform shard recombination processing on the sharded data packet through the hardware layer when the attribute identification of the sharded data packet is the identification required by the hardware layer, and finally perform shard recombination processing on the sharded data packet through the software layer when the attribute identification of the sharded data packet is not the identification required by the hardware layer. Thus, when receiving a network data stream containing sharded data packets, according to the attribute identification of the sharded data packet, perform shard recombination processing on the sharded data packets not processed by the hardware layer through the software layer, thereby reducing the discarding of sharded data packets, improving the shard recombination efficiency, and reducing the packet loss situation.

[0089] In some embodiments of the present disclosure, the attribute identification includes five-tuple information, and the five-tuple information includes a source IP address, a destination IP address, a source port number, a destination port number, and a transport protocol.

[0090] In some embodiments of the present disclosure, the DPU low-latency protocol stack-based shard recombination device 300 may further include a third processing module.

[0091] The third processing module can be used to perform data sharding processing on the original data packet through the hardware layer to obtain the sharded data packet before receiving the network data stream.

[0092] In some embodiments of the present disclosure, the first processing module 330 may specifically include a first processing unit.

[0093] The first processing unit can be used to perform shard recombination processing on the sharded data packet through the recombination pool of the hardware layer to obtain the original data packet when the attribute identification of the sharded data packet is the identification required by the hardware layer.

[0094] In some embodiments of the present disclosure, the DPU low-latency protocol stack-based shard recombination device 300 may further include a data import module.

[0095] The data import module can be used to import the network data stream containing the sharded data packets into the DMA cache after the attribute identifier of the sharded data packets is not the identifier required by the hardware layer.

[0096] In some embodiments of the present disclosure, the second processing module 340 may specifically include a data acquisition unit and a second processing unit.

[0097] The data acquisition unit can be used to acquire the sharded data packets contained in the network data stream from the DMA cache through the software layer.

[0098] The second processing unit can be used to perform shard recombination processing on the sharded data packets through the recombination pool of the software layer to obtain the original data packet.

[0099] In some embodiments of the present disclosure, the DPU low-latency protocol stack shard recombination device 300 may further include a data sending module.

[0100] The data sending module can be used to send the original data packet to the transport layer.

[0101] It should be noted that Figure 3 the shown DPU low-latency protocol stack shard recombination device 300 can execute Figures 1 to 2 each step in the method embodiments shown, and implement Figures 1 to 2 each process and effect in the method embodiments shown, which will not be elaborated here.

[0102] Figure 4 Fig. shows a schematic structural diagram of a DPU low-latency protocol stack shard recombination device provided by an embodiment of the present disclosure.

[0103] In some embodiments of the present disclosure, Figure 4 the shown DPU low-latency protocol stack shard recombination device can be an electronic device. Specifically, the electronic device may include, but is not limited to, devices such as computer devices, cloud servers, or cloud server clusters.

[0104] Such as Figure 4 shown, the DPU low-latency protocol stack shard recombination device may include a processor 401 and a memory 402 storing computer program instructions.

[0105] Specifically, the above-mentioned processor 401 may include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of the present application.

[0106] The memory 402 may include a mass memory for information or instructions. By way of example and not limitation, the memory 402 may include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive, or a combination of two or more of these. Where appropriate, the memory 402 may include removable or non-removable (or fixed) media. Where appropriate, the memory 402 may be internal or external to the integrated gateway device. In a particular embodiment, the memory 402 is a non-volatile solid-state memory. In a particular embodiment, the memory 402 includes a read-only memory (ROM). Where appropriate, the ROM may be a mask-programmed ROM, a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable PROM (EEPROM), an electrically alterable ROM (EAROM), or a flash memory, or a combination of two or more of these.

[0107] The processor 401 reads and executes the computer program instructions stored in the memory 402 to perform the steps of the method for fragment reassembly of the DPU low-latency protocol stack provided by the embodiments of the present disclosure.

[0108] In one example, the DPU low-latency protocol stack fragment reassembly device may further include a transceiver 403 and a bus 404. Among them, as Figure 4 shown, the processor 401, the memory 402, and the transceiver 403 are connected through the bus 404 to complete communication with each other.

[0109] The bus 404 includes hardware, software, or both. By way of example and not limitation, the bus may include an Accelerated Graphics Port (AGP) or other graphics bus, an Extended Industry Standard Architecture (EISA) bus, a Front Side BUS (FSB), a Hyper Transport (HT) interconnect, an Industrial Standard Architecture (ISA) bus, an InfiniBand interconnect, a Low Pin Count (LPC) bus, a memory bus, a MicroChannel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association Local Bus (VLB) bus, or other suitable buses or a combination of two or more of these. Where appropriate, the bus 404 may include one or more buses. Although the embodiments of the present application describe and illustrate specific buses, the present application contemplates any suitable bus or interconnect.

[0110] Embodiments of the present disclosure also provide a computer-readable storage medium that may store a computer program. When the computer program is executed by a processor, the processor implements the method for fragmenting and reassembling a DPU low-latency protocol stack provided by the embodiments of the present disclosure.

[0111] The above storage medium may include, for example, a memory 402 storing computer program instructions. The above instructions may be executed by a processor 401 of a device for fragmenting and reassembling a DPU low-latency protocol stack to complete the method for fragmenting and reassembling a DPU low-latency protocol stack provided by the embodiments of the present disclosure. Optionally, the storage medium may be a non-transitory computer-readable storage medium. For example, the non-transitory computer-readable storage medium may be a ROM, a Random Access Memory (RAM), a Compact Disc ROM (CD-ROM), a magnetic tape, a floppy disk, and an optical data storage device, etc.

[0112] It should be noted that in this text, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising" is intended to cover non-exclusive inclusion, such that a process, method, article, or device that comprises a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or device.

[0113] The above are only specific embodiments of the present disclosure, enabling those skilled in the art to understand or implement the present disclosure. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present disclosure. Therefore, the present disclosure will not be limited to these embodiments described herein, but rather will conform to the broadest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for fragmenting and reassembling a DPU low-latency protocol stack, characterized in that, including: Receiving network data stream, where the network data stream contains fragmented data packets; Judging the attribute identification of the fragmented data packets through the hardware layer; When the attribute identification of the fragmented data packets is the identification required by the hardware layer, performing fragmentation and recombination processing on the fragmented data packets through the hardware layer; When the attribute identification of the fragmented data packets is not the identification required by the hardware layer, performing fragmentation and recombination processing on the fragmented data packets through the software layer.

2. The method according to claim 1, characterized in that The attribute identification includes five-tuple information, and the five-tuple information includes source IP address, destination IP address, source port number, destination port number, and transport protocol.

3. The method according to claim 1, wherein Before receiving the network data stream, the method further includes: Performing data fragmentation processing on the original data packets through the hardware layer to obtain the fragmented data packets.

4. The method according to claim 1, wherein The step of, when the attribute identification of the fragmented data packets is the identification required by the hardware layer, performing fragmentation and recombination processing on the fragmented data packets through the hardware layer, includes: When the attribute identification of the fragmented data packets is the identification required by the hardware layer, performing fragmentation and recombination processing on the fragmented data packets through the recombination pool of the hardware layer to obtain the original data packets.

5. The method according to claim 1, characterized in that, After the attribute identification of the fragmented data packets is not the identification required by the hardware layer, the method further includes: Importing the network data stream containing the fragmented data packets into the DMA cache.

6. The method according to claim 5, wherein The step of performing fragmentation and recombination processing on the fragmented data packets through the software layer includes: Obtaining the fragmented data packets contained in the network data stream from the DMA cache through the software layer; Performing fragmentation and recombination processing on the fragmented data packets through the recombination pool of the software layer to obtain the original data packets.

7. The method according to any one of claims 4 or 6, characterized in that, The method further includes: Sending the original data packets to the transport layer.

8. A DPU-based low-latency protocol stack fragmentation and reassembly device, characterized in that, including: A data receiving module, configured to receive a network data stream, where the network data stream contains fragmented data packets; An identification judgment module, configured to judge the attribute identification of the fragmented data packets through the hardware layer; A first processing module, configured to, when the attribute identification of the fragmented data packets is the identification required by the hardware layer, perform fragmentation and recombination processing on the fragmented data packets through the hardware layer; A second processing module, configured to, when the attribute identification of the fragmented data packets is not the identification required by the hardware layer, perform fragmentation and recombination processing on the fragmented data packets through the software layer.

9. A DPU-based low-latency protocol stack fragmentation and reassembly device, characterized in that, including: A processor; A memory, configured to store executable instructions; Wherein, the processor is configured to read the executable instructions from the memory and execute the executable instructions to implement the method for fragmentation and recombination of the DPU low-latency protocol stack according to any one of claims 1-7 above.

10. A non-volatile computer-readable storage medium, characterized in that, The storage medium stores a computer program, and when the computer program is executed by the processor, the processor is enabled to implement the method for fragmentation and recombination of the DPU low-latency protocol stack according to any one of claims 1-7 above.

Images