Method and system for automatically generating noise interference in communication process

Abstract

The invention discloses a method and a system for automatically generating noise interference in a communication process. The method comprises the following steps: S1, configuring the digital communication system according to preset parameters; s2, judging whether noise is inserted or not, and setting the number of current signal transmission data frames and a data read-write state; s3, sending and / or receiving data according to the number of the current signal transmission data frames; s4, processing register read-write and noise insertion operation; s5, after the noise insertion operation is completed, all state flags and storage data are removed; and S6, continuing to transmit the next frame of signal, and repeating the steps S3 to S5 until the total cycle index is reached, and ending the noise interference test work. According to the invention, the noise interference condition possibly occurring in the actual communication environment is effectively simulated. The performance and stability of the digital communication system under different interference conditions can be comprehensively evaluated by accurately controlling the insertion opportunity, width, quantity and interval of the noise.

Description

Technical Field

[0001] The invention relates to a method for automatically generating noise interference in a communication process, and also relates to a system for implementing the method, belonging to the technical field of digital design verification. Background Art

[0002] As digital circuit designs continue to increase in size and functional complexity, digital communication systems are becoming more sensitive to noise interference from external ports. This interference can cause digital communication systems to become unstable, especially at the edges of signals, where errors may be triggered or undefined behavior may occur. Noise interference can also cause data errors or loss, and in severe cases, may even cause system crashes. These problems seriously affect the correct processing and analysis of data by digital communication systems.

[0003] In the traditional digital design verification process, usually only a few specific noises are simply generated to simulate interference, and the impact of external noise interference is rarely considered comprehensively. Even if it is considered, it is often verified through irregular random interference or only on a few simple interference points (burrs). This method cannot fully simulate the noise interference that may occur in the actual environment, resulting in many problems not being discovered until the digital circuit chip is actually put into use and is interfered by environmental noise. Therefore, it is necessary to take necessary technical measures to ensure the stability and reliability of digital circuits in the face of various noise interferences.

[0004] In the Chinese invention patent with patent number ZL 202011002472.2, a general digital circuit fault simulation injection method based on FPGA is disclosed. This method simulates faults by generating white noise interference. The specific process is as follows: First, a sequence of non-zero initial values ​​is generated using the longest linear feedback shift register, which is shifted under the driving of the rising edge of the clock, and the result of the XOR operation is input as feedback to the first position of the register, and the generated state value obeys a uniform distribution. Next, the ROM configured with Gaussian white noise data is addressed using an m sequence to generate an eight-bit Gaussian white noise digital signal. Then, these digital signals are converted into analog white noise signals through a DAC module. Finally, the white noise signal is attenuated to varying degrees through a resistor array consisting of seven series resistors, and the number of resistors connected is controlled by an attenuation control signal. The change in the amplitude of the injected signal is achieved by a resistor voltage divider to complete the interference with the crystal oscillator circuit. The white noise interference signal generated in this way can simulate the crystal oscillator fault and is used to test the fault response of the digital circuit. Summary of the invention

[0005] The primary technical problem to be solved by the present invention is to provide a method for automatically generating noise interference during a communication process.

[0006] Another technical problem to be solved by the present invention is to provide a system for automatically generating noise interference during a communication process.

[0007] In order to achieve the above technical objectives, the present invention adopts the following technical solutions:

[0008] According to a first aspect of an embodiment of the present invention, there is provided a method for automatically generating noise interference during a communication process, comprising the following steps:

[0009] S1: configure the digital communication system according to preset parameters;

[0010] S2: Determine whether to insert noise, and set the number of data frames transmitted by the current signal and the data read and write status;

[0011] S3: sending and / or receiving data according to the number of data frames transmitted by the current signal;

[0012] S4: Processing register read / write and noise insertion operations;

[0013] S5: After the noise insertion operation is completed, all status flags and stored data are cleared;

[0014] S6: Continue to transmit the next frame signal and repeat steps S3 to S5 until the total number of cycles is reached, thus ending the noise interference test.

[0015] Preferably, in step S1, the delay step in the parameter is set to one third of the working clock cycle.

[0016] Preferably, in step S1, the minimum noise width in the parameters is set to 1 working clock cycle, and the maximum noise width is set to 2.5 working clock cycles.

[0017] Preferably, in step S2, an alternating mode is used to add noise to the data packet, and the alternating mode means that after adding noise to one data packet, no noise is added to the next data packet, and the cycle repeats.

[0018] Preferably, step S4 includes the following sub-steps:

[0019] Check if there are pending register read and write operations;

[0020] If there are unfinished register read and write operations, these operations are first performed until all register read and write operations and data packet noise insertion are completed, and then the process proceeds to step S5 for subsequent processing; if there are no registers that need to be read and written, or all register read and write operations have been completed, the noise insertion operation is directly performed;

[0021] When executing the noise insertion operation, noise insertion is performed by type; after the noise insertion is completed, check again whether the register read and write operations have been completed;

[0022] If the register read / write operation has been completed, or there is no read / write requirement, proceed to step S5 for subsequent processing; if the register read / write operation has not been completed, continue to perform these operations until they are completed.

[0023] Preferably, when noise insertion is performed by type, only one noise is inserted into a frame signal until the total number of cycles is met; wherein, starting from the start position of the frame, the noise is inserted after a specific delay time, and the subsequent noise is automatically added according to the set delay step, and the above process is repeated until the total number of cycles is reached.

[0024] Preferably, when noise insertion is performed by type, a specific amount of noise is inserted into a frame signal until the total number of cycles is met; wherein, noise insertion is achieved by setting a specific delay time, the amount of noise inserted into a frame signal, and the interval time between two noises, and the interval time between two noises is set between 0.5 and 1 working clock cycle.

[0025] Preferably, when noise insertion is performed by type, multiple noises are randomly inserted into a frame signal until the total number of cycles is met; wherein, noise insertion is achieved by setting a random delay time, the number of noises inserted in a frame signal, and the interval time between two noises, and the interval time between two noises is set between 0.5 and 1.5 working clock cycles.

[0026] Preferably, noise insertion is performed through the following sub-steps:

[0027] Step S01: after receiving the instruction to insert noise, randomly generate the width of the current noise between the minimum time and the maximum time of the insertion noise width;

[0028] Step S02: After waiting for a specific delay time, insert noise into the top-level signal of the digital circuit, and perform an inversion operation on the noise signal;

[0029] Step S03: after waiting for a time corresponding to the noise width, the current signal is again inverted in the top-level signal of the digital circuit;

[0030] Step S04: After completing the signal inversion, releasing the force signal to allow the signal to return to its original state or enter the next operation cycle;

[0031] Step S05: according to the interval time between two noises, continue to insert noise cyclically until the number of noises to be inserted in a frame of signal is reached.

[0032] According to a second aspect of an embodiment of the present invention, a system for automatically generating noise interference during a communication process is provided, comprising a processor and a memory; wherein the memory is coupled to the processor and is used to store a computer program, and when the computer program is executed by the processor, the processor implements the above-mentioned method for automatically generating noise interference during a communication process.

[0033] Compared with the prior art, the present invention effectively simulates the noise interference that may occur in the actual communication environment. By accurately controlling the insertion timing, width, quantity and interval of the noise, the performance and stability of the digital communication system under different interference conditions can be comprehensively evaluated. In addition, the present invention also uses an alternating mode to add noise to the data packet, and consciously introduces noise randomly at different stages of data transmission, thereby effectively simulating abnormal conditions in digital communication and providing an important testing method for the reliable operation of the digital communication system. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 A flow chart of a method for automatically generating noise interference during a communication process provided by an embodiment of the present invention;

[0035] Figure 2 A flowchart of processing register reading and writing and noise insertion operations in an embodiment of the present invention;

[0036] Figure 3 This is a flowchart of the operation of inserting noise in an embodiment of the present invention;

[0037] Figure 4 A schematic diagram of a device for automatically generating noise interference during a communication process provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0038] The technical content of the present invention is described in detail below with reference to the accompanying drawings and specific embodiments.

[0039] The technical concept of the embodiment of the present invention is to intentionally and randomly introduce noise at different stages of data transmission to simulate abnormal conditions in the digital communication process. The introduction of such noise will cause abnormal data frames, so-called interference frames, to be generated during data transmission. In order to test the data transmission capability of the digital communication system under abnormal conditions, the embodiment of the present invention allows interference frames to appear alternately with normal frames. Such a design allows technicians to observe and analyze the behavior of the digital communication system when processing interference frames, while ensuring that the transmission of normal data frames is not affected, thereby ensuring the accuracy and reliability of data transmission.

[0040] First embodiment

[0041] like Figure 1As shown, a method for automatically generating noise interference during a communication process provided by a first embodiment of the present invention includes at least the following steps:

[0042] S1: configure the digital communication system according to preset parameters;

[0043] S2: Determine whether to insert noise, and set the number of data frames transmitted by the current signal and the data read and write status;

[0044] S3: sending and / or receiving data according to the number of data frames transmitted by the current signal;

[0045] S4: Processing register read / write and noise insertion operations;

[0046] S5: After the noise insertion operation is completed, all status flags and stored data are cleared;

[0047] S6: Continue to transmit the next frame signal and repeat steps S3 to S5 until the total number of cycles is reached, thus ending the noise interference test.

[0048] Specifically, in the method of automatically generating noise interference during communication, the configuration of parameters is a key step (step S1). These parameters include delay time, the delay time of the last recording, the delay step, the unit time, the number of noises inserted in a frame signal, the minimum time of the noise insertion width, the maximum time of the noise insertion width, and the interval time between two noises.

[0049] The delay time is the time interval from the start of data transmission to the generation of noise. In order to avoid missing any state, the delay time is usually set from 0. In addition, recording the last delay time is crucial to determine whether it is a sequential traversal or random insertion of noise. This parameter is automatically accumulated to help track the timing of noise insertion.

[0050] The delay step size should be set according to the working clock cycle of the digital communication system. In order to ensure that the step size is less than one working cycle, it is recommended in the embodiment of the present invention to set it to one third of the working clock cycle. The unit time is fixed to the transmission rate, that is, the time required to transmit one bit, usually in nanoseconds. For example, if the transmission rate is 1MHz, the unit time should be set to 1000 nanoseconds.

[0051] The number of noises inserted varies according to the different stages of the signal. In the stage where only one noise is inserted in a single frame signal, the number is set to 1. In the stage where a limited number of noises are inserted, the number should match the number of bits of the signal. If the signal contains 8 working clock cycles, the number of noises should be randomly set between 4 and 12. In the stage where multiple noises are randomly inserted, the number is set between 300 and 500.

[0052] The width of the noise is also an important consideration. In one embodiment of the present invention, the minimum noise width is set to 1 working clock cycle to ensure the correctness and stability of data transmission. The maximum noise width is recommended to be set to 2.5 working clock cycles. As for the interval time between two noises, it will also vary according to the different stages of the signal. When only one noise is inserted in a single-frame signal, the interval time is invalid. In the stage of inserting a limited number of noises, the interval time should be set between 0.5 and 1 working clock cycles. In the stage of randomly inserting multiple noises, the interval time is set between 0.5 and 1.5 working clock cycles. Through these detailed parameter configurations, it can be ensured that various noise interference situations are effectively simulated in communication tests.

[0053] In step S2, the noise signal parameter is used to determine whether to introduce noise interference during the transmission process. When the noise signal parameter is set to 1, it means that noise will be introduced into the current data packet to simulate the interference that may occur in the actual communication environment. On the contrary, when the noise signal parameter is 0, it means that no noise is added to the current data packet, thereby allowing the performance of the digital communication system to be evaluated in an interference-free environment.

[0054] In order to comprehensively evaluate the performance of a digital communication system under different interference conditions, an alternating mode is used in the embodiments of the present invention to add noise to a data packet. Specifically, the alternating mode means that after adding noise to a data packet, no noise is added to the next data packet, and so on. This alternating mode helps to deeply understand the difference in the response of a digital communication system under noisy and noise-free conditions.

[0055] After determining whether to increase the noise, it is also necessary to set the number of data frames for the current signal transmission. The setting of the number of data frames requires a balance between test coverage and simulation time. If the number of data frames is too small, it may cause accidental data frames to be correctly transmitted, thereby affecting the accuracy of the test results; and if the number of data frames is too large, it will unnecessarily extend the simulation time and reduce test efficiency. Through multiple experimental tests, the inventors found that setting the number of data frames to 3 can effectively control the simulation time while ensuring test coverage, achieving a balance between test efficiency and accuracy.

[0056] In addition, the setting of data read and write status is also an important part of communication testing. The data read and write status flag is used to indicate whether the read and write operation of the data or status register has been completed. During the test process, accurate recording of this status is essential to ensure the integrity and correctness of data transmission. Especially when noise is introduced, monitoring of data read and write status can help evaluate the impact of noise on the performance of digital communication systems.

[0057] Finally, data is sent and / or received according to the set number of current signal transmission data frames (step S3). This step is a key step in evaluating the performance of the digital communication system in actual operation. Whether in a noisy or interfered environment, direct feedback on system performance can be obtained through this step.

[0058] In the communication test process, the judgment of the signal and register reading and writing conditions is crucial. This step (step S4) involves two main branches, corresponding to whether there is a register reading and writing requirement.

[0059] First, if Figure 2 As shown in the left part, if there is a register read / write requirement, or the register read / write operation has not been completed, then these read / write operations must be performed first. This process will continue until the register read / write operation and noise insertion are completed. In this case, the test process will wait for the register read / write operation to be completed before entering the next step, i.e., step S5. This waiting process ensures that all data read / write requirements are properly handled before noise insertion, thereby ensuring the integrity and accuracy of the test.

[0060] On the other hand, if there is no register read or write operation, or the register read or write operation has been completed, this step can be ignored. Figure 2 As shown in the right part, in this case, the test flow will skip the register read and write operations and directly perform the noise insertion operation.

[0061] In the noise insertion stage, if the current signal needs to insert noise, noise insertion is performed according to the type. After the noise insertion is completed, it is necessary to check again whether the register read and write operations have been completed. If the register read and write operations have been completed, or there is no read and write requirement in the test scenario, then step S5 can be smoothly entered. If the register read and write operations have not been completed, it is necessary to continue to perform these operations until they are completed.

[0062] In general, the purpose of this step is to ensure that all data read and write requirements are met before noise insertion. Through careful judgment of the signal and register read and write conditions, the test process can be ensured to proceed smoothly, and a solid foundation is laid for subsequent test steps. This process reflects the flexibility and adaptability of the test process, and can flexibly adjust the test strategy according to different test requirements and conditions.

[0063] In one embodiment of the present invention, noise insertion by type includes the following situations:

[0064] Case 1: Only one noise is inserted into a frame signal until the total number of cycles is met. The specific operation is to insert the noise after a specific delay time starting from the start position of the frame. Subsequent noise is automatically added according to the set delay step, that is, the noise is inserted after a corresponding delay time after the start position of the next frame. This process will be repeated until the predetermined total number of cycles is reached. The total number of cycles is calculated as follows:

[0065] PKG_NUM = (unit time × number of bits of a data × number of data frames transmitted by the current signal + frame header time) / delay step × 3 × 2

[0066] The frame header time refers to the data frame time including the frame header. For example, in the format of an address plus three data, the address time is the frame header time. If the data frame only contains data but not a frame header, the frame header time defaults to 0. The multiplication by 3 in the formula is because noise is divided into three types, and the multiplication by 2 is because each noise frame is followed by a normal data frame.

[0067] Case 2: A specific amount of noise will be inserted into a frame until the total number of cycles is met. The insertion of noise is performed evenly within a cycle by setting a specific delay time, the amount of noise inserted into a frame, and the interval between two noises. The interval between two noises is set between 0.5 and 1 working clock cycle. This process will be repeated until the predetermined total number of cycles is reached.

[0068] Case 3: Multiple noises are randomly inserted into a frame signal until the total number of cycles is met. Multiple noises can be inserted into a cycle by setting the random delay time, the number of noises inserted into a frame signal, and the interval time between two noises. The interval time between two noises is set between 0.5 and 1.5 working clock cycles. This process will be repeated until the predetermined total number of cycles is reached.

[0069] The above situations ensure that in communication testing, different types of noise can be flexibly inserted according to different test requirements and conditions to simulate various interference situations that may affect communication quality. By precisely controlling the insertion of noise, the performance of digital communication systems under different interference conditions can be more accurately evaluated.

[0070] In the testing of digital communication systems, noise insertion is an important step to simulate the interference that may occur in the real environment. Figure 3 The specific method of inserting noise is shown, the steps are as follows:

[0071] Step S01: After receiving the instruction to insert noise, randomly generate the width of the current noise between the minimum time and the maximum time of the inserted noise width. This randomization process helps to simulate the unpredictability of noise in a real environment.

[0072] Step S02: After waiting for a specific delay time, insert noise into the top signal of the digital circuit and perform an inversion operation on the noise signal. Here, the inversion operation refers to changing the level state of the signal from high to low or from low to high, thereby forming a burr. This step is crucial for simulating signal instability caused by noise.

[0073] Step S03: After waiting for the time corresponding to the noise width, the current signal is again inverted in the top-level signal of the digital circuit. The purpose of this step is to ensure that a glitch of the opposite level is generated on the original signal, further simulating the noise interference in the real environment.

[0074] Step S04: After completing the signal inversion, release the force signal, allowing the signal to return to its original state or enter the next operation cycle. Here, "force signal" refers to an instruction to directly force an operation on the signal of a circuit or system in a test or simulation environment. This operation can be to force the signal to be high or low, or to invert the signal to simulate noise interference. By using the force signal, testers can accurately simulate and control noise interference in a controlled test environment to evaluate the performance and stability of the module under test under different interference conditions.

[0075] Step S05: according to the interval between two noises, continue to insert noise cyclically until the number of noises predetermined to be inserted in one frame of signal is reached. This step ensures that the insertion of noise meets the test requirements and can simulate a sufficient number of interference situations in one frame of signal.

[0076] The following is a code example for inserting noise:

[0077]

[0078]

[0079] In the communication test process, once the noise insertion and related operations are completed, the next steps are critical to ensure that the test environment is clean and ready for the transmission of the next frame signal. The following is a detailed description of the steps:

[0080] Step S5: In this step, all status flags need to be cleared. Status flags are usually used to indicate various states of the system, such as data transmission status, register read and write status, etc. These flags are cleared to reset the system state and ensure that the transmission of the next frame signal will not be affected by the previous state. At the same time, this step also involves clearing the data stored in the first-in-first-out (FIFO). FIFO is a commonly used buffer storage structure for temporarily storing data. After each frame of signal processing is completed, it is necessary to clear the FIFO to avoid interference of old data with the processing of new data.

[0081] Step S6: After completing step S5, the system will enter the transmission preparation for the next frame signal. This includes repeating steps S3 to S5, that is, sending and receiving data frames, inserting noise, clearing status flags, and clearing FIFO data. This process will continue until the predetermined total number of cycles is reached. The total number of cycles is pre-set according to the test requirements and system performance, which determines the number of times the entire test process needs to be repeated. Once this number is reached, the entire test process will end.

[0082] These two steps are key to ensuring the smooth progress of the communication test process. By clearing the status flag and clearing the FIFO data, it can be ensured that the transmission of each frame signal is carried out in a clean environment, thereby obtaining accurate and reliable test results. At the same time, by repeating this process until the total number of cycles is reached, the performance of the digital communication system under different conditions can be fully evaluated, providing data support for the optimization of the digital communication system.

[0083] Second embodiment

[0084] Based on the above method, the second embodiment of the present invention provides a system for automatically generating noise interference during communication. Figure 4 As shown, the system includes one or more processors 41 and a memory 42. The memory 42 is used to store one or more programs, and when the one or more programs are executed by the one or more processors 41, the method in the above embodiment is implemented.

[0085] Wherein, the processor is used to control the overall operation of the system to complete all or part of the steps of the above method. The processor can be a central processing unit (CPU), a graphics processing unit (GPU), a field programmable gate array (FPGA), an application-specific integrated circuit (ASIC), a digital signal processing (DSP) chip, etc. The memory is used to store various types of data to support operations in the system, and these data may include, for example, instructions for any application or method for operating on the system, and application-related data. The memory can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as a static random access memory (SRAM), an electrically erasable programmable read-only memory (EEPROM), an erasable programmable read-only memory (EPROM), a programmable read-only memory (PROM), a read-only memory (ROM), a magnetic memory, a flash memory, etc.

[0086] In an exemplary embodiment, the system can be implemented by a computer chip or entity, or by a product with a certain function, for executing the above method and achieving the same technical effect as the above method. Specifically, the computer can be, for example, a personal computer, a laptop computer, a vehicle-mounted human-computer interaction device, a cellular phone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.

[0087] In another exemplary embodiment, the present invention further provides a computer-readable storage medium including program instructions, which, when executed by a processor, implements the steps of the method in any of the above embodiments. For example, the computer-readable storage medium may be the above-mentioned memory including program instructions, which may be executed by a processor to complete the above-mentioned method and achieve the same technical effect as the above-mentioned method.

[0088] It should be noted that the above embodiments are only examples, and the technical solutions of the various embodiments can be combined, all within the protection scope of the present invention.

[0089] The above is a detailed description of a method and system for automatically generating noise interference during communication provided by the present invention. For those skilled in the art, any obvious changes made to it without departing from the essence of the present invention will constitute an infringement of the patent right of the present invention and will bear corresponding legal liabilities.

Claims

1. A method for automatically generating noise interference during communication, characterized in that The steps include: S1: configure the digital communication system according to preset parameters; S2: Determine whether to insert noise, and set the number of data frames transmitted by the current signal and the data read and write status; S3: sending and / or receiving data according to the number of data frames transmitted by the current signal; S4: Processing register read / write and noise insertion operations; S5: After the noise insertion operation is completed, all status flags and stored data are cleared; S6: Continue to transmit the next frame signal and repeat steps S3 to S5 until the total number of cycles is reached, thus ending the noise interference test.

2. The method according to claim 1, characterized in that In the step S1, the delay step length in the parameters is set to one third of the working clock cycle.

3. The method according to claim 1, characterized in that In the step S1, the minimum noise width in the parameters is set to 1 working clock cycle, and the maximum noise width is set to 2.5 working clock cycles.

4. The method according to claim 1, characterized in that In the step S2, noise is added to the data packets in an alternating mode, wherein the alternating mode means that after adding noise to one data packet, no noise is added to the next data packet, and the cycle repeats.

5. The method according to claim 1, characterized in that The step S4 includes the following sub-steps: Check if there are pending register read and write operations; If there are unfinished register read and write operations, these operations are first performed until all register read and write operations and data packet noise insertion are completed, and then the process proceeds to step S5 for subsequent processing; if there are no registers that need to be read and written, or all register read and write operations have been completed, the noise insertion operation is directly performed; When executing the noise insertion operation, noise insertion is performed by type; after the noise insertion is completed, check again whether the register read and write operations have been completed; If the register read / write operation has been completed, or there is no read / write requirement, proceed to step S5 for subsequent processing; if the register read / write operation has not been completed, continue to perform these operations until they are completed.

6. The method according to claim 5, characterized in that When noise insertion is performed by type, only one noise is inserted into a frame signal until the total number of cycles is met; starting from the start position of the frame, the noise is inserted after a specific delay time, and the subsequent noise is automatically added according to the set delay step, and the above process is repeated until the total number of cycles is reached.

7. The method according to claim 5, characterized in that When noise insertion is performed by type, a specific amount of noise is inserted into a frame signal until the total number of cycles is met; wherein, noise insertion is achieved by setting a specific delay time, the amount of noise inserted into a frame signal, and the interval time between two noises, and the interval time between two noises is set between 0.5 and 1 working clock cycle.

8. The method according to claim 5, characterized in that When noise insertion is performed by type, multiple noises are randomly inserted into a frame signal until the total number of cycles is met; wherein, noise insertion is achieved by setting a random delay time, the number of inserted noises in a frame signal, and the interval time between two noises, and the interval time between two noises is set between 0.5 and 1.5 working clock cycles.

9. The method according to claim 5, characterized in that Noise insertion is performed through the following sub-steps: Step S01: after receiving the instruction to insert noise, randomly generate the width of the current noise between the minimum time and the maximum time of the insertion noise width; Step S02: After waiting for a specific delay time, insert noise into the top-level signal of the digital circuit, and perform an inversion operation on the noise signal; Step S03: after waiting for a time corresponding to the noise width, the current signal is again inverted in the top-level signal of the digital circuit; Step S04: After completing the signal inversion, releasing the force signal to allow the signal to return to its original state or enter the next operation cycle; Step S05: according to the interval time between two noises, continue to insert noise cyclically until the number of noises to be inserted in a frame of signal is reached.

10. A system for automatically generating noise interference during communication, characterized in that It comprises a processor and a memory; wherein the memory is coupled to the processor and is used to store a computer program, and when the computer program is executed by the processor, the processor implements the method for automatically generating noise interference during a communication process as described in any one of claims 1 to 9.

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