Edge detection-based capture tracking integrated frequency hopping self-synchronization circuit and method

Abstract

The present application relates to the field of communication and anti-interference technology, in particular to a kind of ultra-wideband frequency hopping circuit and fast synchronization method, using mirror frequency suppression receiving architecture to the wideband microwave frequency hopping signal is obtained to the intermediate frequency signal, and using double-channel AD differential sampling and rising edge detection and threshold detection combined mode, accurate identification and tracking to envelope detection signal phase are realized, and then the local oscillator frequency hopping signal of receiver is realized fast follow jump, solve the problems such as complex, poor acquisition accuracy and long time of synchronization process in the traditional frequency hopping synchronization process.Simultaneously with the present application, hardware resources are saved, and the time of synchronization establishment is shortened.

Description

Technical Field

[0001] This invention relates to the fields of communication and anti-interference technology, specifically to an integrated frequency hopping self-synchronization circuit and method for acquisition and tracking based on edge detection. Background Technology

[0002] With the rapid development of information technology, the massive number of wireless devices and data interactions have made limited frequency resources increasingly congested, leading to increasingly severe interference and a more complex electromagnetic environment. This makes the need for anti-interference, anti-interception, and multiple access communication more urgent. The most effective solution to this situation is to adopt spread spectrum communication technology.

[0003] Frequency hopping communication is one of the most popular spread spectrum communication technologies. Compared with traditional fixed-frequency communication, it has advantages such as anti-interference, low probability of interception, multiple access networking, and anti-fading capabilities. Frequency hopping synchronization technology refers to the process of aligning the frequency and phase of the received frequency hopping signal with the local frequency hopping signal. As one of the most critical technologies in a frequency hopping communication system, the speed and reliability of synchronization directly affect the performance of the entire system.

[0004] Traditional frequency hopping synchronization methods involve two processes: acquisition and tracking. The acquisition process performs coarse synchronization, reducing clock errors to within one hopping cycle. The tracking process performs fine synchronization, minimizing clock errors as much as possible. Existing technologies generally use phase-locked loops (PLLs) to track synchronization information. Two common PLL types are τ-jitter PLLs and delay PLLs, both belonging to the "lead-lag type." Delay PLLs require two leading and lagging frequency hopping carriers to generate an error signal, resulting in a relatively complex structure and high hardware resource consumption. τ-jitter PLLs, on the other hand, use a single PLL to detect the error signal, resulting in a simpler structure, lower hardware resource consumption, and easier hardware implementation. However, both types of PLLs require extracting the specific error magnitude between the local frequency hopping clock and the transmitting frequency hopping clock, and determining whether the local frequency hopping clock is leading or lagging. Then, based on the error magnitude and the lead / lag indication signal, the local frequency hopping clock is continuously adjusted, leading to an excessively long overall synchronization time for both coarse and fine synchronization. Therefore, it is necessary to research a relatively simple synchronization circuit architecture and method that can quickly achieve synchronization. Summary of the Invention

[0005] The purpose of this invention is to provide an integrated frequency hopping self-synchronization circuit and method based on edge detection for acquisition and tracking, so as to achieve high-security frequency hopping communication with ultra-wideband, high hopping speed and low-complexity frequency hopping de-hopping and frequency hopping synchronization.

[0006] To achieve the above objectives, the present invention adopts the following technical solution:

[0007] An edge-detection-based acquisition and tracking integrated frequency hopping self-synchronization circuit includes: an antenna, a low-noise amplifier, a mirror frequency suppression mixer, a low-pass filter, an AGC amplifier, and a control module;

[0008] The antenna is used to receive broadband frequency hopping signals and amplify the broadband frequency hopping signals through a low-noise amplifier before sending them to the image frequency suppression mixer.

[0009] The image frequency suppression mixer includes an I / Q mixer and a 90° bridge. The I / Q mixer receives the low-noise amplified frequency hopping signal and the microwave local oscillator signal. Driven by the microwave local oscillator signal, it performs image frequency suppression down-conversion on the frequency hopping signal to achieve de-hopping and obtain the intermediate frequency signal, which is then transmitted sequentially to the low-pass filter by the 90° bridge.

[0010] The low-pass filter is used to suppress high-frequency noise in the intermediate frequency signal;

[0011] The AGC amplifier receives the intermediate frequency signal output from the low-pass filter, amplifies it, and splits it into two paths. One path is output as the output signal, and the other path is transmitted to the synchronization circuit module.

[0012] The synchronization circuit module includes an envelope detector, an analog-to-digital converter (ADC), an FPGA module, a frequency synthesizer, and a bandpass filter. The envelope detector receives the intermediate frequency (IF) signal amplified by the AGC amplifier and extracts the envelope signal from the IF signal, which is then transmitted to the ADC. The ADC samples the envelope signal to obtain a digital envelope signal, which is then transmitted to the FPGA module. The FPGA module performs sequential processing on the received digital envelope signal, including filtering and debouncing, rising edge detection, threshold detection, and high-level counting. Based on the processing results, it generates a frequency control word for frequency hopping synchronization tracking. The frequency synthesizer receives the frequency control word from the FPGA module and generates a microwave local oscillator signal of the corresponding frequency, which is then transmitted to the I / Q mixer via a bandpass filter.

[0013] Furthermore, the FPGA module includes a filtering and debouncing module, a rising edge detection module, a threshold detection module, a PN code generation module, a high-level counting module, and an SPI communication module;

[0014] The filtering and de-jitter module receives the digital envelope signal provided by the analog-to-digital converter and eliminates jitter in the digital envelope signal to reduce the false alarm probability caused by jitter and ensure capture accuracy.

[0015] The rising edge detection module receives the jitter-free digital envelope signal and identifies the rising edge in the digital envelope signal. Upon identifying the rising edge, it triggers the threshold detection module to work. The threshold detection module makes a judgment on the level after the rising edge. When it is a high level, it accumulates time. After the time accumulates to a preset time threshold, it simultaneously triggers the PN code generation module to generate a pseudo-random sequence code corresponding to the frequency hopping frequency and sends it to the SPI communication module, and triggers the high level counting module to accumulate the high level for a certain period of time.

[0016] When the high-level counting module accumulates to a preset threshold time, it triggers the SPI communication module to generate a corresponding frequency control word based on the received pseudo-random sequence code and sends it to the frequency synthesizer.

[0017] Furthermore, the rising edge detection module uses two registers with a two-step delay for logical judgment to detect the rising edge; if the previous state D[1] is low and the next state D[0] is high, then it is a rising edge.

[0018] Furthermore, the cutoff frequency f of the low-pass filter T The frequency f greater than the intermediate frequency signal IF Less than the intermediate frequency signal frequency f IF The sum of the channel spacing Δf.

[0019] Furthermore, the AGC amplifier is an automatic gain control amplifier.

[0020] An edge detection-based acquisition and tracking integrated frequency hopping self-synchronization method includes the following steps:

[0021] Step 1: Receive frequency hopping signals;

[0022] Step 2: Perform image frequency suppression downconversion processing on the frequency hopping signal to obtain the intermediate frequency signal. Then, perform low-pass filtering, power amplification, and envelope detection processing on the intermediate frequency signal in sequence to obtain the envelope signal with the same frequency as the frequency hopping period.

[0023] Step 3: Use an analog-to-digital converter to sample the high-level envelope signal and the low-level envelope signal, and then perform differential processing to convert them into digital envelope signals;

[0024] Step 4: Under the system clock, use the FPGA chip to process the digital envelope signal and generate a frequency control word for controlling frequency transitions.

[0025] Step 5: Generate a microwave local oscillator signal based on the frequency control word to drive the frequency hopping signal for down-conversion processing, thereby achieving frequency hopping synchronization tracking.

[0026] By adopting the above technical solution, the present invention has the following advantages:

[0027] 1. This invention uses an automatic gain control amplifier to achieve channel compensation within the broadband frequency hopping bandwidth, which can improve the unevenness and easy loss of synchronization caused by large broadband fading variations;

[0028] 2. This invention employs a dual-channel detection and dual-channel sampling scheme, and the influence of temperature drift can be eliminated through differential calculation;

[0029] 3. This invention uses a combination of rising edge detection and threshold detection to simultaneously achieve the acquisition and tracking process in the traditional frequency hopping method, simplifying synchronization time and saving hardware resources. Attached Figure Description

[0030] Figure 1 This is a schematic diagram of the integrated frequency hopping self-synchronization circuit for acquisition and tracking based on edge detection provided in this embodiment;

[0031] Figure 2 This is a flowchart of the integrated frequency hopping self-synchronization process for capture and tracking based on edge detection;

[0032] Figure 3 This is a block diagram illustrating the principle of frequency hopping synchronization based on edge detection.

[0033] Figure 4 The waveform of the envelope detector output signal after frequency hopping synchronization provided in the embodiment is shown on an oscilloscope.

[0034] Figure label:

[0035] 1-Antenna; 2-Low-noise amplifier; 3-I / Q amplifier; 4-90° bridge; 5-Low-pass filter; 6-AGC amplifier; 7-Envelope detector; 8-Analog-to-digital converter; 9-FPGA module; 901-Filtering and debouncing module; 902-Rising edge detection module; 903-Threshold detection module; 904-PN code generation module; 905-High-level counting module; 906-SPI communication module; 10-Frequency synthesizer; 11-Bandpass filter. Detailed Implementation

[0036] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the embodiments and accompanying drawings. The illustrative embodiments and descriptions of this invention are only for explaining the invention and are not intended to limit the invention. The technical solutions of this invention are described in detail below with reference to the accompanying drawings and embodiments.

[0037] like Figure 1As shown, this embodiment discloses an integrated acquisition and tracking frequency-hopping self-synchronization circuit based on edge detection, including: an antenna, a low-noise amplifier, a mirror rejection mixer, a low-pass filter, an AGC amplifier, and a control module. The input of the low-noise amplifier is connected to the antenna, and its output is connected to the input of the AGC amplifier via the mirror rejection mixer and the low-pass filter. The first output of the AGC amplifier is the output of the entire circuit, and the second output is connected to the input of the control module. The output of the control module is connected to the mirror rejection mixer. The control module consists of an envelope detector, an analog-to-digital converter, an FPGA module, a frequency synthesizer, and a bandpass filter connected in series; wherein the envelope detector serves as the input of the control module and is connected to the second output of the AGC amplifier, and the bandpass filter serves as the output of the control module and is connected to the mirror rejection mixer. Detailed descriptions of each component are as follows:

[0038] The antenna receives broadband frequency-hopping signals and amplifies them using a low-noise amplifier before sending them to the image frequency suppression mixer.

[0039] The image frequency suppression mixer consists of an I / Q mixer and a 90° bridge. The I / Q mixer 3 is a four-port device; its RF input port is connected to the low-noise amplifier 2, its local oscillator port is connected to the bandpass filter 11, and its I and Q intermediate frequency output ports are connected to the through port and coupling port of the 90° bridge, respectively. The isolation terminal of the 90° bridge 4 is connected to a 50-ohm matching load, and its output terminal is connected to a low-pass filter. The image frequency suppression mixer is used to perform image frequency suppression down-conversion on the frequency-hopping signal under the drive of the microwave local oscillator signal, achieving de-hopping to obtain the intermediate frequency signal. In this embodiment, the image frequency suppression mixer receives the microwave local oscillator signal after bandpass filtering, that is, it only receives the upper or lower sideband of the microwave local oscillator signal, eliminating the possibility of interference caused by the frequency-hopping signal appearing at the image frequency to the synchronous detection of the frequency-hopping signal. The center frequency of the output signal of the 90° bridge 4 is f. i +f IF -f j The frequency range is the same as the receiving frequency hopping frequency range.

[0040] Low-pass filter cutoff frequency f T The frequency f must be greater than that of the intermediate frequency signal. IF Less than the intermediate frequency f IF The sum of the channel spacing Δf (f IF +△f); the stopband bandwidth must be greater than the frequency hopping bandwidth, and the stopband rejection must be greater than 20dB; used for outputs of a 90° bridge with a value higher than f. IF high-frequency signals (i.e., f) IF +n*△f) is used for filtering, so that the output signal contains only signals with a frequency of f. IF It can be either in two states: no signal or no signal.

[0041] The AGC amplifier amplifies the power of the received intermediate frequency (IF) signal. An automatic gain control (AGC) amplifier is selected as the amplifier in this embodiment. This amplifier is used, on the one hand, to compensate the gain of the IF signal output from the low-pass filter based on the channel attenuation characteristics, ensuring the signal flatness of the de-hopping signal within the frequency hopping bandwidth; on the other hand, it dynamically adjusts the receiver gain according to changes in transmission distance to compensate for path loss, ensuring that the output power level is within the optimal input power range of the envelope detector.

[0042] An envelope detector is used to perform envelope detection on the received intermediate frequency signal to obtain high-level and low-level envelope signals. The rise time of the envelope detector directly affects the synchronization accuracy. In this embodiment, the rise time is on the order of nanoseconds, which is sufficient to ensure rise-edge detection accuracy and synchronization accuracy; its detection frequency is greater than f. IF .

[0043] The analog-to-digital converter samples the high-level and low-level envelope signals, performs differential processing, and converts them into digital envelope signals. In this embodiment, the sampling rate is 50MHz.

[0044] The FPGA module, as the core module of the integrated acquisition and tracking frequency hopping self-synchronization circuit in this embodiment, consists of a filtering and debouncing module, a rising edge detection module, a threshold detection module, a PN code generation module, a high-level counting module, and an SPI communication module. The filtering and debouncing module, as the input terminal of the FPGA module, receives the digital envelope signal provided by the analog-to-digital converter; it is used to filter out jitter in the digital envelope signal, which is a glitch signal generated by the switching of internal switches in the frequency synthesizer, to reduce the false alarm probability caused by glitch signals while ensuring acquisition accuracy. In use, the filtering time of the filtering and debouncing module is slightly longer than the jitter duration T of the glitch signal. burrThe rising edge detection module uses two registers with a two-clock delay for logical judgment to detect rising edges; that is, it uses two registers to store the previous state D[1] and the next state D[0], and judges the rising edge by logical combination ~D[1]&&D[0]); if the previous state D[1] is low and the next state D[0] is high, then it is a rising edge. After the rising edge is detected, the threshold detection module is triggered to work, and the threshold indicator signal time_cnt = 0 is reset. The threshold detection module determines the level after the rising edge. If it is high, the threshold indicator signal time_cnt is incremented by 1; if it is low, the threshold detection module is reset, and the rising edge detection module is executed again. If time_cnt = Tgate, the threshold detection passes, triggering the PN code generation module to generate the next pseudo-code sequence and prepare for transmission. Simultaneously, the high-level counting module is triggered, resetting the high-level counting indicator signal high_cnt to 0. Tgate is a manually set time threshold, which should not exceed the difference between the frequency hopping period Ts and the time Tspi required for the SPI communication module to send one SPI data, i.e., Tgate ≤ Ts - Tspi. The high-level counting module is used to achieve precise control of the frequency control word transmission timing. Specifically: if it is high, high_cnt is incremented by 1; if it is low, the high-level counting module and the threshold detection module are reset, and the rising edge detection module is executed again; if high_cnt = Ts - Tspi - Tgate, the high-level counting module passes, triggering the SPI communication module. The SPI communication module sends the pseudo-random code sequence received from the PN code generation module to the frequency synthesizer, which then generates the next frequency, ensuring that the frequency is the same as the frequency of the received signal in the next frequency hopping cycle, thereby achieving frequency hopping synchronization.

[0045] Based on the aforementioned edge-detection-based integrated acquisition and tracking frequency-hopping self-synchronization circuit, this embodiment also provides an edge-detection-based integrated acquisition and tracking frequency-hopping self-synchronization method, such as... Figure 2 As shown, it includes the following steps:

[0046] Step 1: After power-on, the transmitter sends a frequency-hopping signal, and the receiver receives the frequency-hopping signal. The frequency of the frequency-hopping signal is f. i +f IF (i = 0, 1…N-1, where N is the number of frequency hopping points), with a period of Ts.

[0047] Step 2: Perform image frequency suppression downconversion processing on the frequency hopping signal to obtain the intermediate frequency signal. Then, perform low-pass filtering, power amplification, and envelope detection processing on the intermediate frequency signal to obtain an envelope signal with the same frequency as the frequency hopping period.

[0048] Step 3: Use an analog-to-digital converter to sample the high-level envelope signal and the low-level envelope signal in dual channels, and subtract them to eliminate the effect of temperature drift before converting them into digital envelope signals.

[0049] Step 4: Under a 50MHz system clock, the FPGA chip processes the digital envelope signal to generate a frequency control word for controlling frequency transitions. Specifically:

[0050] Rising edge detection: Rising edge detection is performed by using two registers with a two-clock delay for logical judgment. When the received signal voltage is higher than the threshold voltage, a rising edge is identified; otherwise, the detection state is maintained.

[0051] Threshold detection: The high level after the rising edge is accumulated over time. The detection is considered successful when the accumulated time reaches the preset threshold time. The PN code generation module is triggered to generate and provide a pseudo-random sequence code to the SPI communication module, and the high level counting module is activated.

[0052] High-level counting: High-level counting begins when the threshold detection passes; if high_cnt = Ts - Tspi - Tgate, the high-level counting module triggers the SPI communication module to send a random sequence code to the frequency synthesizer to pre-compensate for the communication time of the SPI communication module.

[0053] Step 5: The frequency synthesizer generates a microwave local oscillator signal based on the frequency control word, which is used to drive the frequency hopping signal for down-conversion processing to achieve frequency hopping synchronization tracking.

[0054] Figure 3 This is a schematic diagram of the rising edge detection principle provided in the embodiment of this disclosure. It can be seen that the rising edge time of the signal envelope and the sampling clock frequency are directly related to the tracking accuracy.

[0055] Figure 4 This is the waveform of the envelope detector output signal after frequency hopping synchronization provided in this embodiment on an oscilloscope. The rectangular square wave represents the detection signal within one frequency hopping cycle, and the gap between the rectangular square waves corresponds to the frequency switching time. The continuous detection waveform indicates that this embodiment has achieved stable synchronization of the frequency hopping signal.

[0056] In summary, the edge detection-based acquisition and tracking integrated frequency hopping self-synchronization circuit and method provided in this embodiment achieves the function of a traditional τ-jitter phase-locked loop with only one synchronization loop, and simultaneously realizes the acquisition and tracking functions in the traditional method, which saves hardware resources and shortens the synchronization establishment time.

[0057] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that any changes, modifications, substitutions, combinations, or simplifications made without departing from the spirit and principle of the present invention should be considered as equivalent substitutions and are included within the protection scope of the present invention.

Claims

1. An edge-detection-based acquisition-tracking-integrated frequency hopping self-synchronization circuit, comprising: The antenna, low noise amplifier, mirror frequency suppression mixer, low pass filter, AGC amplifier and control module are characterized in that: The antenna is used for receiving a wideband frequency hopping signal and transmitting the wideband frequency hopping signal to the mirror frequency suppression mixer after amplification by the low noise amplifier; The mirror frequency suppression mixer comprises an I / Q mixer and a 90° bridge; the I / Q mixer receives the low noise amplified frequency hopping signal and a microwave local oscillator signal, and performs mirror frequency suppression down conversion on the frequency hopping signal under the drive of the microwave local oscillator signal to realize frequency hopping demodulation to obtain an intermediate frequency signal which is sequentially transmitted to the low pass filter by the 90° bridge; The low pass filter is used for suppressing high frequency noise in the intermediate frequency signal; The AGC amplifier receives the intermediate frequency signal output by the low pass filter, and amplifies the power of the intermediate frequency signal to divide the intermediate frequency signal into two paths, one of which is output as an output signal; the other is transmitted to the control module; The control module comprises an envelope detector, an analog-to-digital converter, an FPGA module, a frequency synthesizer and a band pass filter; the envelope detector receives the amplified intermediate frequency signal from the AGC amplifier, extracts an envelope signal from the intermediate frequency signal and transmits the envelope signal to the analog-to-digital converter; the analog-to-digital converter samples the envelope signal to obtain a digital envelope signal which is transmitted to the FPGA module; the FPGA module is used for sequentially performing filtering and de-bouncing, rising edge detection, threshold detection and high level counting on the received digital envelope signal, and generating a frequency control word for realizing frequency hopping synchronous tracking according to the processing result; the frequency synthesizer receives the frequency control word provided by the FPGA module, generates a microwave local oscillator signal with a corresponding frequency according to the frequency control word, and transmits the microwave local oscillator signal to the I / Q mixer through the band pass filter; the FPGA module comprises a filtering and de-bouncing module, a rising edge detection module, a threshold detection module, a PN code generation module, a high level counting module and an SPI communication module; wherein: The filtering and de-bouncing module receives the digital envelope signal provided by the analog-to-digital converter, and eliminates the jitter in the digital envelope signal to reduce the false alarm probability caused by jitter and ensure the capture accuracy; The rising edge detection module receives the digital envelope signal after de-bouncing, identifies the rising edge in the digital envelope signal, and triggers the threshold detection module to work after identifying the rising edge; the threshold detection module judges the level after the rising edge, accumulates time when the level is high, and triggers the PN code generation module to generate a pseudo-random sequence code corresponding to the frequency hopping frequency and sends the pseudo-random sequence code to the SPI communication module and triggers the high level counting module to accumulate time when the level is high after the time accumulation reaches a preset threshold time. The high level counting module triggers the SPI communication module to generate a corresponding frequency control word according to the received pseudo-random sequence code and sends the frequency control word to the frequency synthesizer when the high level time accumulation reaches the preset threshold time.

2. The edge detection based acquisition tracking integrated frequency hopping self-synchronization circuit according to claim 1, wherein: The rising edge detection module adopts a logic judgment mode of two-register delay two taps to detect the rising edge; if the previous state D[1] is low and the next state D[0] is high, it is a rising edge.

3. The edge detection based acquisition tracking integrated frequency hopping self-synchronization circuit according to claim 1, wherein: The cutoff frequency of the low pass filter f T The frequency of the greater intermediate frequency signal f IF The frequency of the lesser intermediate frequency signal f IF The sum of the channel spacing delta f ​ 4. An edge detection based capture tracking integrated frequency hopping self-synchronization method, which uses the edge detection based capture tracking integrated frequency hopping self-synchronization circuit according to any one of claims 1 to 3, and performs the following steps: Step 1, receiving a frequency hopping signal; Step 2, performing mirror frequency suppression down-conversion processing on the frequency hopping signal to obtain an intermediate frequency signal, and performing low-pass filtering, power amplification and envelope detection processing on the intermediate frequency signal in turn to obtain an envelope signal with the same frequency and frequency hopping period; Step 3, using an analog-to-digital converter to sample the high-level envelope signal and the low-level envelope signal, and performing difference processing to convert them into a digital envelope signal; Step 4, using an FPGA module to process the digital envelope signal under a system clock to generate a frequency control word for controlling frequency hopping; Step 5, generating a microwave local oscillator signal according to the frequency control word to drive the frequency hopping signal for down-conversion processing, thereby realizing frequency hopping synchronization tracking.

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