Method and device for solving ROM (Read Only Memory) code running exception, chip and electronic equipment
By pre-built patches on the main path of the function of the ROM code and using programmable memory to receive and apply the configuration information of the patches, the problem of the code being unable to refresh without replacing the ROM when the ROM code is running abnormally, and the ROM is improved The robustness of the code and the yield of the chip.
Patent Information
- Application Number
- CN202311006800.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-08-10
- Publication Date
- 2025-02-18
AI Technical Summary
In the prior art, when the ROM code runs abnormally, the code cannot be refreshed without replacing the ROM, resulting in a low chip yield.
The patch is pre-buried on the main path of each function of the first code in the ROM. When an exception occurs, by receiving the configuration information and enable signals of the patch, the exception is repaired using programmable memory to avoid replacing the ROM or resintering the code.
No need to replace the ROM or resintered the code, it can effectively repair exceptions in the ROM code, improve the robustness of the ROM code and the yield rate of the chip.
Smart Images
Figure CN119473666A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of computer technology, and in particular to a method, device, chip and electronic device for solving abnormal operation of ROM code. Background Art
[0002] Usually, the firmware code of a chip is stored in a read-only memory (ROM). Due to the storage characteristics of ROM, once the code is burned into the ROM, it cannot be modified. If an exception occurs in the ROM code during operation, since the code in the ROM is solidified, the image in the ROM cannot be replaced without replacing the ROM, that is, the code in the ROM cannot be refreshed. The existing solution is to solve the exception by replacing the ROM. Therefore, the existing solution is likely to result in a low chip yield. Summary of the invention
[0003] The present application provides a method, device, chip and electronic device for solving abnormal operation of ROM code, which can solve the abnormality without replacing the ROM and re-firing the ROM code, thereby improving the robustness of the ROM code.
[0004] In a first aspect, the present application provides a method for solving ROM code running abnormality, comprising: Running the first code solidified in the ROM, wherein a patch is pre-embedded on a main path of the function of the first code; When the function of the first code runs abnormally, receiving the configuration information of the patch and the enabling signal of the patch, and re-running the first code solidified in the ROM; The enabled patch repairs the exception according to the received configuration information, so that the first code continues to run.
[0005] The step of receiving the configuration information of the patch and the enable signal of the patch specifically includes: receiving patch configuration information through registers of the programmable memory; The enable signal of the patch is received through the enable bit of the programmable memory.
[0006] The configuration information of the patch includes first address information written into the address register of the programmable memory and second address information written into the data register of the programmable memory, and the enable signal of the patch is an enable signal written into the enable bit of the programmable memory.
[0007] The step of receiving the configuration information of the patch and the enable signal of the patch specifically includes: Receiving first address information through an address register of a programmable memory; receiving second address information through a data register of the programmable memory; The enable signal of the patch is received through the enable bit of the programmable memory.
[0008] The step of repairing the anomaly according to the received patch configuration information specifically includes: The received second address information is written into the first address information to repair the abnormality.
[0009] The first address information is the address of the variable where the exception occurs, and the second address information is the correct address written to the address of the variable where the exception occurs.
[0010] The programmable memory is a one-time programmable memory Efuse.
[0011] In a second aspect, the present application provides a device for solving abnormal operation of ROM code, comprising: A startup module, used for running the first code solidified in the ROM, wherein the main path of the function of the first code includes a pre-embedded patch; A receiving and restarting module, used for receiving the configuration information of the patch and the enabling signal of the patch when the function of the first code runs abnormally, and re-running the first code solidified in the ROM; The repair module is used to repair the exception by enabling the patch according to the received patch configuration information, so that the first code continues to run.
[0012] In a third aspect, the present application provides a chip, comprising a readable storage medium and a processor, wherein the readable storage medium is used to store machine-executable instructions; the processor is used to read the machine-executable instructions on the readable storage medium and execute the instructions to implement the method provided in the first aspect of the present application.
[0013] In a fourth aspect, the present application provides an electronic device, comprising the chip provided in the third aspect of the present application.
[0014] In a fifth aspect, the present application provides a computer-readable storage medium, which stores computer-executable instructions. When the computer-executable instructions are executed by a processor, the computer-executable instructions prompt the processor to implement the method provided in the first aspect of the present application.
[0015] The method, device, chip and electronic device provided in the present application for solving the abnormal operation of ROM code pre-embed a patch on the main path of each function of the first code in the ROM. When the function of the first code in the ROM runs abnormally, the configuration information of the patch and the enable signal of the patch can be written into the programmable memory of the chip. After the chip is powered on again to start running the first code, the abnormality can be solved by using the configuration information in the programmable memory through the patch, and there is no need to solve the abnormality by replacing the ROM and re-firing the ROM code, thereby improving the robustness of the ROM code. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 It is a flowchart of a method for solving abnormal operation of ROM code shown in an exemplary embodiment of the present application; Figure 2 It is a structural diagram of a device for solving abnormal operation of ROM code shown in an exemplary embodiment of the present application. Implementation
[0017] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.
[0018] The terms used in this application are for the purpose of describing specific embodiments only and are not intended to limit this application. The singular forms of "a", "said" and "the" used in this application and the appended claims are also intended to include plural forms unless the context clearly indicates other meanings. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more associated listed items.
[0019] It should be understood that although the terms first, second, third, etc. may be used in the present application to describe various information, these information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of the present application, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining".
[0020] The present application provides a method for solving the abnormal operation of ROM code. The method can be applied to a chip including a read-only memory (ROM), or to an integrated circuit card including a ROM, wherein the ROM is solidified with code. The chip can be a chip based on a system on chip (SoC). The chip can be a chip such as a data processor (DPU), a central processing unit (CPU), a graphics processing unit (GPU), etc. The integrated circuit card can be an intelligent network card based on a field programmable gate array (FPGA). The method provided by the present application, when the code in the ROM runs abnormally, that is, when a bug occurs, there is no need to solve the abnormality by replacing the ROM and re-sintering the ROM code, so that the ROM code continues to run, thereby improving the robustness of the ROM code and improving the yield of the chip. The method for solving the abnormal operation of the ROM code in the present application is described in detail below in conjunction with the accompanying drawings.
[0021] See also Figure 1 , Figure 1 FIG. 1 is a flowchart of a method for solving a ROM code running abnormality shown in an exemplary embodiment of the present application. In this embodiment, the method for solving a ROM code running abnormality of the present application includes the following steps: Step 101 , running a first code solidified in a ROM, wherein a patch is pre-embedded on a main path of a function in the first code.
[0022] In this embodiment, when the chip is powered on or reset, the first code solidified in the ROM is run. The first code solidified in the ROM may include the first level boot loader (1st level Boot Loader, BL1) SCP BL1 of the system control processor (System Controll Processor, SCP). In other modified embodiments, the first code solidified in the ROM may also be other codes. SCP is the CPU mini-system that is first started after the SOC is powered on or reset. SCP runs the first code from the ROM to start executing secure boot. The first code in the ROM is pre-embedded with a patch on the main path of each function (such as a function that implements a specific function). For example, the patch can be pre-embedded in the judgment branch (i.e., if / else branch) of the function. The patch can be a preset second code, which is implanted before the first code in the solidified ROM, that is, pre-embedded in the main path of the function of the first code in the ROM, and is used to fix the Bug in the first code when it is enabled. The present application pre-embeds a patch on the main path of each function of the first code in the ROM. When an exception occurs, the exception can be solved by the patch, without replacing the ROM and re-firing the ROM code to solve the exception.
[0023] Step 102: When the function in the first code runs abnormally, receive the configuration information of the patch and the enable signal of the patch, and re-run the first code solidified in the ROM.
[0024] In this embodiment, when the first code runs to a certain function and runs abnormally at the function, the software designer checks the first code to locate the function where the abnormality occurs. After analyzing the reason for the abnormal operation of the function, the software designer writes the configuration information of the patch and the enable signal of the patch into the chip. The chip receives the configuration information of the patch and the enable signal of the patch, and restarts to run the first code solidified in the ROM. For example, when SCP BL1 in the ROM runs to the load image (load_image) function and runs abnormally at the load_image function, the software designer checks SCPBL1 to locate the abnormality of the load_image function, and analyzes that when the load_image function obtains the address of the second level boot loader (2nd level Boot Loader, BL2) SCP BL2 of the SCP, the base address of the Flash passed into the parsing function (the function in the load_image function) is abnormal, resulting in an abnormality in parsing the address of SCP BL2, and ultimately causing an error in the address of the image base address image_base variable of SCPBL2, so that the load_image function obtains the wrong address of SCP BL2, and runs after loading the SCP BL2 version from the wrong address of SCP BL2, resulting in abnormal operation. After analyzing the cause of the abnormal operation of the load_image function, the software designer writes the configuration information of the patch corresponding to the patch embedded in the main path of the load_image function and the enable signal of the patch into the chip. The chip receives the configuration information of the patch and the enable signal of the patch, and restarts the power on to run the first code solidified in the ROM.
[0025] In other modified embodiments, after analyzing the reason for the abnormal operation of the function, the software designer can write the configuration information of the patch into the register in the programmable memory of the chip, and can write the enable signal of the patch into the enable bit of the programmable memory of the chip. The chip can receive the configuration information of the patch through the register of the programmable memory, and receive the enable signal of the patch through the enable bit of the programmable memory.
[0026] Furthermore, in other modified embodiments, the configuration information of the patch includes first address information written into the address register of the programmable memory and second address information written into the data register of the programmable memory, and the enable signal of the patch is an enable signal of an enable bit written into the programmable memory.
[0027] Specifically, after analyzing the reason for the abnormal operation of the function, the software designer can write the first address information into the address register in the programmable memory of the chip, write the second address information into the data register in the programmable memory of the chip, and write the enable signal of the patch into the enable bit of the programmable memory of the chip. The chip can receive the first address information through the address register of the programmable memory, receive the second address information through the data register of the programmable memory, and receive the enable signal of the patch through the enable bit of the programmable memory. For example, after analyzing the reason for the abnormal operation of the load_image function, the software designer writes the address of the image_base variable into the address register in the programmable memory of the chip, writes the correct address written to the address of the image_base variable into the data register in the programmable memory of the chip, and writes the enable signal of the patch corresponding to the patch embedded in the main path of the load_image function into the enable bit of the programmable memory of the chip. The chip can receive the address of the image_base variable through the address register of the programmable memory, receive the correct address written to the address of the image_base variable through the data register of the programmable memory, and receive the enable signal of the patch corresponding to the patch embedded in the main path of the load_image function through the enable bit of the programmable memory, and restart to run the SCP BL1 solidified in the ROM.
[0028] Preferably, the programmable memory is a one-time programmable memory Efuse.
[0029] The present application writes the configuration information of the patch and the enable signal of the patch into the Efuse of the chip when an exception occurs. After the chip is powered on again and starts running the first code, the exception can be resolved by using the configuration information in the Efuse through the patch, without having to solve the exception by replacing the ROM and re-firing the ROM code.
[0030] Step 103: Repair the exception by enabling the patch according to the received configuration information, so that the first code continues to run.
[0031] In this embodiment, after the chip is powered on again to run the first code in the ROM, since the chip has received the enable signal of the patch and the configuration information of the patch, the patch on the main path of the function in the first code has been enabled (that is, the patch has taken effect). When the first code runs to the function, the enabled patch can use the configuration information to repair the exception so that the first code continues to run.
[0032] In other modified embodiments, the enabled patch writes the received second address information into the first address information to repair the exception. Specifically, the first address information is the address of the variable where the exception occurs. The second address information is the correct address written to the address of the variable where the exception occurs. For example, after the patch pre-embedded in the main path of the load_image function is enabled, the value stored in the Efuse data register (i.e., the correct address written to the address of the image_base variable) is written to the value stored in the Efuse address register (i.e., the address of the image_base variable) to repair the exception and allow SCP BL1 to continue running. The present application can solve the exception by writing the correct address to the address of the variable where the exception occurs through a patch, without having to solve the exception by replacing the ROM and re-firing the ROM code.
[0033] In other modified embodiments, the method for solving the abnormal operation of ROM code described in the present application also includes the step of: when the functions in the first code are running normally, continuing to run the first code.
[0034] The method for solving the abnormal operation of ROM code provided by the present application is to pre-embed a patch on the main path of each function of the first code in the ROM. When the function of the first code in the ROM runs abnormally, the configuration information of the patch and the enable signal of the patch can be written into the programmable memory of the chip. After the chip is powered on again to start running the first code, the abnormality can be solved by using the configuration information in the programmable memory through the patch. There is no need to solve the abnormality by replacing the ROM and re-firing the ROM code, thereby improving the robustness of the ROM code.
[0035] Correspondingly, the present application also provides a device for solving the abnormal operation of ROM code. The device for solving the abnormal operation of ROM code is configured in a chip. Figure 2 , Figure 2 1 is a schematic diagram of a device for solving ROM code running abnormality according to an exemplary embodiment of the present application. In this embodiment, the device 200 for solving ROM code running abnormality of the present application includes: a starting module 201, a receiving and restarting module 202, and a repairing module 203.
[0036] Specifically, the startup module 201 is used to run the first code solidified in the ROM, wherein the main path of the function of the first code includes a pre-embedded patch.
[0037] The receiving and restarting module 202 is used to receive the configuration information of the patch and the enabling signal of the patch and re-run the first code solidified in the ROM when the function of the first code runs abnormally.
[0038] The repair module 203 is used to repair the exception by enabling the patch according to the received patch configuration information, so that the first code continues to run.
[0039] In other modified embodiments, the receiving and restarting module 202 may also be used to receive the configuration information of the patch through a register of the programmable memory, and to receive the enable signal of the patch through an enable bit of the programmable memory.
[0040] In other modified embodiments, the configuration information of the patch includes first address information written into the address register of the programmable memory and second address information written into the data register of the programmable memory, and the enable signal of the patch is an enable signal written into the enable bit of the programmable memory.
[0041] In other modified embodiments, the receiving and restarting module 202 can also be used to receive the first address information through the address register of the programmable memory, to receive the second address information through the data register of the programmable memory, and to receive the enable signal of the patch through the enable bit of the programmable memory.
[0042] In other modified embodiments, the programmable memory is a one-time programmable memory Efuse.
[0043] In other modified embodiments, the repair module 203 is further configured to repair the exception by writing the received second address information into the first address information through an enabled patch.
[0044] In another modified embodiment, the first address information is the address of the variable where the abnormality occurs, and the second address information is the correct address to be written to the address of the variable where the abnormality occurs.
[0045] In other modified embodiments, the device for solving the abnormal operation of ROM code described in the present application also includes a normal operation module, which is used to continue to run the first code when the functions in the first code run normally.
[0046] As for the device embodiment, since it basically corresponds to the method embodiment, the relevant parts may refer to the partial description of the method embodiment.
[0047] For the convenience of description, the above device is described in terms of functions divided into various modules. Of course, when implementing the present application, the functions of each module can be implemented in the same or multiple software and / or hardware.
[0048] The device for solving the abnormal operation of ROM code provided by the present application pre-embeds a patch on the main path of each function of the first code in the ROM. When the function of the first code in the ROM runs abnormally, the configuration information of the patch and the enable signal of the patch can be written into the programmable memory of the chip. After the chip is powered on again to start running the first code, the abnormality can be solved by using the configuration information in the programmable memory through the patch. There is no need to solve the abnormality by replacing the ROM and re-firing the ROM code, thereby improving the robustness of the ROM code.
[0049] Accordingly, the present application also provides a chip. The chip may be a data processor, a central processing unit, a graphics processor, or the like. The chip includes a readable storage medium and a processor. The readable storage medium is used to store machine executable instructions. The processor is used to read the machine executable instructions on the readable storage medium and execute the instructions to implement the method for solving the abnormal operation of ROM code described in the present application.
[0050] Accordingly, the present application also provides an electronic device. The electronic device may include the chip described in the present application. The electronic device provided in the embodiment of the present application, from the hardware level, includes: a machine-readable storage medium and a processor, wherein: the machine-readable storage medium stores machine-executable instructions that can be executed by the processor; the processor is used to execute the machine-executable instructions.
[0051] Accordingly, the present application also provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions, and when the computer-executable instructions are called and executed by the processor, the computer-executable instructions prompt the processor to implement the method for solving the abnormal operation of ROM code described in the present application. The computer-readable storage medium can be any electronic, magnetic, optical or other physical storage device, which can contain or store information, such as executable instructions, data, etc. For example, the machine-readable storage medium can be: RAM (Radom Access Memory, random access memory), volatile memory, non-volatile memory, flash memory, storage drive (such as hard disk drive), solid state drive, any type of storage disk (such as optical disk, DVD, etc.), or similar storage medium, or a combination thereof.
[0052] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.
Claims
1. A method for solving abnormal operation of ROM code, characterized in that: include: Running the first code solidified in the ROM, wherein a patch is pre-embedded on a main path of the function of the first code; When the function of the first code runs abnormally, receiving the configuration information of the patch and the enabling signal of the patch, and re-running the first code solidified in the ROM; The enabled patch repairs the exception according to the received configuration information, so that the first code continues to run.
2. The method according to claim 1, characterized in that The step of receiving the configuration information of the patch and the enable signal of the patch specifically includes: receiving patch configuration information through registers of the programmable memory; The enable signal of the patch is received through the enable bit of the programmable memory.
3. The method according to claim 1, characterized in that The configuration information of the patch includes first address information written into the address register of the programmable memory and second address information written into the data register of the programmable memory, and the enable signal of the patch is an enable signal written into the enable bit of the programmable memory.
4. The method according to claim 3, characterized in that The step of receiving the configuration information of the patch and the enable signal of the patch specifically includes: Receiving first address information through an address register of a programmable memory; receiving second address information through a data register of the programmable memory; The enable signal of the patch is received through the enable bit of the programmable memory.
5. The method according to claim 3, characterized in that: The steps to repair the anomaly according to the received patch configuration information include: The received second address information is written into the first address information to repair the abnormality.
6. The method according to any one of claims 3 to 5, characterized in that: The first address information is the address of the variable where the abnormality occurs, and the second address information is the correct address to be written to the address of the variable where the abnormality occurs.
7. The method according to claim 3 or 4, characterized in that: The programmable memory is a one-time programmable memory Efuse.
8. A device for solving abnormal operation of ROM code, characterized in that: include: A startup module, used for running the first code solidified in the ROM, wherein the main path of the function of the first code includes a pre-embedded patch; A receiving and restarting module, used for receiving the configuration information of the patch and the enabling signal of the patch and re-running the first code solidified in the ROM when the function of the first code runs abnormally; The repair module is used to repair the exception by enabling the patch according to the received patch configuration information, so that the first code continues to run.
9. A chip, characterized in that: It comprises a readable storage medium and a processor, wherein the readable storage medium is used to store machine-executable instructions; the processor is used to read the machine-executable instructions on the readable storage medium and execute the instructions to implement the method according to any one of claims 1 to 7.
10. An electronic device, characterized in that: Comprising the chip as claimed in claim 9.
11. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-executable instructions, and when the computer-executable instructions are executed by a processor, the computer-executable instructions prompt the processor to implement the method according to any one of claims 1 to 7.