Chip security starting method and device, equipment and storage medium

Abstract

The invention discloses a chip security starting method, which is used for solving the problem that the existing chip security starting method has serious security vulnerabilities. The method comprises the steps that when it is determined that a safe starting mode is started, a chip unique identification code in an OTP is read through BootRom; second OTP safety information in the OTP is read through BootRom, and whether the chip is subjected to firmware burning upgrading for the first time or not is determined according to the second OTP safety information; when the judgment result is yes, encrypting and covering plaintext firmware information in the Flash according to the chip key to obtain ciphertext firmware information, and decrypting the ciphertext firmware information into a random access memory (RAM) to run; and when the judgment result is no, performing upgrade verification on firmware burning upgrade through BootRom, after the upgrade verification is passed, performing encryption coverage on plaintext firmware information according to the chip secret key to obtain ciphertext firmware information, and decrypting the ciphertext firmware information into a random access memory (RAM) to operate, thereby completing the safe startup of the chip.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a chip secure startup method, device, equipment, and storage medium. Background Art

[0002] With the development of economy and technology and the improvement of people's living standards, chips have been widely used in people's production and life, bringing endless convenience to people's production and life.

[0003] In the execution process of any chip, booting is the prerequisite for ensuring the subsequent operation of the chip. If the boot loading software of the chip is modified, it will cause a series of security problems. Therefore, a safe way to boot the chip is needed. The core of the traditional single-board secure boot technology is a chip containing a one-time programmable (OTP) storage space, and the chip supports secure encryption algorithms.

[0004] The existing secure boot scheme generally encrypts the chip's external non-volatile memory (Flash) firmware on the host side in a development and test environment, and stores the encryption key in a one-time programmable memory (OTP). When the chip is subsequently started, the host encryption tool is provided to the lower-level embedded device (Device) for decryption. The traditional chip secure boot process is as follows: the central processing unit (CPU) starts its internal fixed user boot program in rom (BootRom) program and initializes it. After initialization, the CPU calls the key pre-stored in the one-time programmable memory (OTP) to perform integrity verification and decryption on the encrypted Flash firmware before running it, thereby completing the secure boot process.

[0005] However, in the prior art, since the key stored in the OTP is readable and the encryption tool is easily leaked and cracked during transmission, the existing chip security boot solution has serious security vulnerabilities. Summary of the invention

[0006] The embodiment of the present application provides a chip security boot method to solve the problem that the existing chip security boot method needs to rely on the encryption tool on the host side for encryption and decryption boot, and because the encryption tool on the host side is easy to leak and crack, the existing chip security boot solution has serious security vulnerabilities.

[0007] The embodiment of the present application also provides a chip security boot device to solve the problem that the existing chip security boot method needs to rely on the encryption tool on the host side for encryption and decryption boot, and because the encryption tool on the host side is easy to leak and crack, the existing chip security boot solution has serious security vulnerabilities.

[0008] The embodiment of the present application also provides a chip security boot device to solve the problem that the existing chip security boot method needs to rely on the encryption tool on the host side for encryption and decryption boot, and because the encryption tool on the host side is easy to leak and crack, the existing chip security boot solution has serious security vulnerabilities.

[0009] The embodiment of the present application also provides a computer-readable storage medium to solve the problem that the existing chip security boot method needs to rely on the encryption tool on the host side for encryption and decryption boot, and because the encryption tool on the host side is easy to leak and crack, the existing chip security boot solution has serious security vulnerabilities.

[0010] The embodiment of the present application also provides a computer program product to solve the problem that the existing chip security boot method needs to rely on the encryption tool on the host side for encryption and decryption boot, and because the encryption tool on the host side is easy to leak and crack, the existing chip security boot solution has serious security vulnerabilities.

[0011] The present application embodiment adopts the following technical solutions: A chip security boot method comprises: in the case of enabling a security boot mode, reading a chip unique identification code in the OTP through a read-only memory boot program BootRom, and using the chip unique identification code as a chip key for encryption and decryption; reading second OTP security information in the OTP through the BootRom, and determining whether the chip is undergoing a first firmware burn and upgrade according to the second OTP security information; when it is determined that the chip is undergoing a first firmware burn and upgrade, encrypting and overwriting plaintext firmware information in a non-volatile memory Flash of the chip according to the chip key to obtain ciphertext firmware information, and decrypting the ciphertext firmware information into a random access memory RAM for execution, thereby completing the chip security boot; when it is determined that the chip is not undergoing a first firmware burn and upgrade, performing an upgrade verification on the firmware burn and upgrade through the BootRom, and when the upgrade verification passes, encrypting and overwriting the plaintext firmware information in the Flash according to the chip key to obtain ciphertext firmware information, and decrypting the ciphertext firmware information into a random access memory RAM for execution, thereby completing the chip security boot.

[0012] A chip security boot device comprises: a chip key acquisition unit, which is used to read the chip unique identification code in the OTP through a read-only memory boot program BootRom when a secure boot mode is turned on, and use the chip unique identification code as a chip key for encryption and decryption; a firmware burning and upgrading identification unit, which is used to read the second OTP security information in the OTP through the BootRom, and determine whether the chip is the first time to burn and upgrade the firmware according to the second OTP security information; a secure boot unit, which is used to, when the firmware burning and upgrading identification unit determines that the chip is the first time to burn and upgrade the firmware, according to the chip key, The plaintext firmware information in the non-volatile memory Flash is encrypted and overwritten to obtain the ciphertext firmware information, and the ciphertext firmware information is decrypted to the random access memory RAM for running, so as to complete the chip security startup; the security startup unit is used for performing an upgrade verification on the firmware burning upgrade through the BootRom when the firmware burning upgrade identification unit determines that the chip is not the first firmware burning upgrade, and when the upgrade verification passes, the plaintext firmware information in the Flash is encrypted and overwritten according to the chip key to obtain the ciphertext firmware information, and the ciphertext firmware information is decrypted to the random access memory RAM for running, so as to complete the chip security startup.

[0013] A chip secure boot device, comprising: A processor; and a memory arranged to store computer executable instructions, wherein the executable instructions, when executed, cause the processor to perform the following operations: in the case of enabling the secure boot mode, read the chip unique identification code in the OTP through the read-only memory startup program BootRom, and use the chip unique identification code as the chip key for encryption and decryption; read the second OTP security information in the OTP through the BootRom, and determine whether the chip is the first time for firmware burning and upgrading according to the second OTP security information; when it is determined that the chip is the first time for firmware burning and upgrading, encrypt and overwrite the plaintext firmware information in the chip external non-volatile memory Flash according to the chip key to obtain ciphertext firmware information, and decrypt the ciphertext firmware information into the random access memory RAM for execution, thereby completing the secure booting of the chip; when it is determined that the chip is not the first time for firmware burning and upgrading, perform an upgrade verification on the firmware burning and upgrading through the BootRom, and when the upgrade verification passes, encrypt and overwrite the plaintext firmware information in the Flash according to the chip key to obtain ciphertext firmware information, and decrypt the ciphertext firmware information into the random access memory RAM for execution, thereby completing the secure booting of the chip.

[0014] A computer-readable storage medium stores one or more programs. When the one or more programs are executed by an electronic device including multiple application programs, the electronic device performs the following operations: when a secure boot mode is turned on, a unique chip identification code in the OTP is read through a read-only memory startup program BootRom, and the unique chip identification code is used as a chip key for encryption and decryption; second OTP security information in the OTP is read through the BootRom, and whether the chip is the first firmware upgrade is determined according to the second OTP security information; when it is determined that the chip is the first firmware upgrade During the burning and upgrading, according to the chip key, the plaintext firmware information in the chip's external non-volatile memory Flash is encrypted and overwritten to obtain the ciphertext firmware information, and the ciphertext firmware information is decrypted into the random access memory RAM for running, thereby completing the chip security startup; when it is determined that the chip is not the first firmware burning and upgrading, the firmware burning and upgrading is verified through the BootRom, and when the upgrade verification passes, according to the chip key, the plaintext firmware information in the Flash is encrypted and overwritten to obtain the ciphertext firmware information, and the ciphertext firmware information is decrypted into the random access memory RAM for running, thereby completing the chip security startup.

[0015] A computer program product comprises a computer program, which is implemented when executed by a processor: in the case of enabling a secure boot mode, a chip unique identification code in the OTP is read through a read-only memory boot program BootRom, and the chip unique identification code is used as a chip key for encryption and decryption; second OTP security information in the OTP is read through the BootRom, and whether the chip is undergoing a firmware burn-in and upgrade for the first time is determined according to the second OTP security information; when it is determined that the chip is undergoing a firmware burn-in and upgrade for the first time, plaintext firmware information in a non-volatile memory Flash of the chip is encrypted and overwritten according to the chip key to obtain ciphertext firmware information, and the ciphertext firmware information is decrypted into a random access memory RAM for execution, thereby completing the secure booting of the chip; when it is determined that the chip is not undergoing a firmware burn-in and upgrade for the first time, an upgrade verification is performed on the firmware burn-in and upgrade through the BootRom, and when the upgrade verification passes, plaintext firmware information in the Flash is encrypted and overwritten according to the chip key to obtain ciphertext firmware information, and the ciphertext firmware information is decrypted into a random access memory RAM for execution, thereby completing the secure booting of the chip.

[0016] At least one of the above technical solutions adopted in the embodiments of the present application can achieve the following beneficial effects: By adopting the chip security boot method provided in the embodiment of the present application, when performing chip security boot, the read-only memory boot program BootRom can be started, and the first OTP security information in the one-time programmable memory OTP can be read through BootRom, and when it is determined to turn on the secure boot mode according to the first OTP security information, the chip unique identification code in the OTP is read through BootRom as the chip key for encryption and decryption; the second OTP security information in the OTP is read through BootRom, and when it is determined that the chip is the first time to burn and upgrade the firmware according to the second OTP security information, the plaintext firmware information in the chip external non-volatile memory Flash is encrypted and overwritten according to the chip key to obtain the ciphertext firmware information, and the ciphertext firmware information is decrypted into the random access memory RAM for execution, and the chip security boot is completed; and when it is determined that the chip is not the first time to burn and upgrade the firmware, the firmware burning upgrade is upgraded through BootRom. When the upgrade verification passes, the plaintext firmware information in the Flash is encrypted and overwritten according to the chip key to obtain the ciphertext firmware information, and the ciphertext firmware information is decrypted into the random access memory RAM for execution, and the chip security boot is completed. The chip secure boot method provided in the embodiment of the present application uses a read-only memory boot program BootRom instead of the existing host tool to implement the firmware encryption and decryption processing during the secure boot process. The encryption and decryption processing is all handled by BootRom, thereby avoiding the problem that the encryption tool is easily leaked and cracked during the prior art encryption by the Host end and decryption by the Device end, resulting in serious security vulnerabilities in the existing chip secure boot solution. At the same time, the method provided in the embodiment of the present application performs security protection on the chip access interface at the BootRom stage, writes the interface security access authorization data into the chip security module through BootRom, and subsequently, when the internal data of the chip needs to be accessed, the verification code received by the interface needs to be compared and verified with the interface security access authorization data in the chip security module. Only after verification is it allowed to access the storage resources in the chip through the interface, thereby protecting the firmware and interface access security of the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings: Figure 1 A schematic diagram of the internal structure of a chip provided in an embodiment of the present application; Figure 2 A schematic diagram of a specific process of a chip secure startup method provided in an embodiment of the present application; Figure 3A specific flow chart of a chip interface security access method provided in an embodiment of the present application Figure 4 A schematic diagram of the specific structure of a chip secure startup device provided in an embodiment of the present application; Figure 5 A schematic diagram of the specific structure of a chip secure boot device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical solution and advantages of the present application clearer, the technical solution of the present application will be clearly and completely described below in combination with the specific embodiments of the present application and the corresponding drawings. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present application.

[0019] The technical solutions provided by various embodiments of the present application are described in detail below in conjunction with the accompanying drawings.

[0020] A chip security boot method provided in an embodiment of the present application is used to solve the problem that the existing chip security boot method needs to rely on the encryption tool on the host side for encryption and decryption boot, and because the encryption tool on the host side is easy to leak and crack, the existing chip security boot solution has serious security vulnerabilities.

[0021] In one embodiment, the internal structure of the chip is as follows Figure 1 As shown, it includes: core CORE, external non-volatile memory (also known as flash memory) FLASH, random access memory RAM, read-only memory startup program BootRom, one-time programmable memory OTP and joint test interface JTAG and ports for command transmission with the host computer and the main control platform (for example, UART / can / SPI, etc.), among which the core CORE is respectively connected to the flash memory FLASH, random access memory RAM, read-only memory startup program BootRom, one-time programmable memory OTP, joint test interface (Joint Test Action Group, JTAG) and port (UART / SPI).

[0022] In a specific embodiment, the core CORE may be an ARM architecture, a MIPS architecture, or an X86 architecture, etc. The embodiment of the present application does not limit the specific architecture used by the core CORE.

[0023] FLASH is used to store the code or firmware running on the chip. It will not be lost when power is off and can be read and written repeatedly.

[0024] The random access memory RAM is used to store the firmware running on the chip and the data in the running of the random access firmware program. The data is lost after power failure. The data used in the entire program that needs to be rewritten is stored in the RAM.

[0025] BootRom is used to store secure firmware, which will not be lost during power failure. It performs security verification on the next-level startup firmware and encrypts and decrypts the Flash firmware during the secure startup process of the chip.

[0026] OTP is mainly used to store the security attributes of the chip, such as the keys and hash values ​​required in the security verification process. In one implementation, the security information stored in the OTP can be as shown in Table 1 below. It should be noted here that the security information stored in the OTP is not limited to the content shown in Table 1. All attributes and information in the security field can be stored in this area. After the program is burned into the OTP, it cannot be changed or cleared again.

[0027] Table 1 Security information stored in OTP

[0028] JTAG is an international standard test protocol, which is mainly used for chip internal testing, program downloading and online debugging. In the embodiment of the present application, the JTAG interface is mainly used for chip debugging.

[0029] Based on the above chip, the specific implementation flow diagram of the chip secure startup method provided in this application is as follows: Figure 2 As shown, it mainly includes the following steps: Step 11, power on the chip.

[0030] Step 12: Start the read-only memory boot program BootRom, and read the first OTP security information in the one-time programmable memory OTP through BootRom.

[0031] In one embodiment, the first OTP security information may refer to the "OTP_FW_SECURE_EN" information as shown in Table 1 above, and then BootRom may determine whether the current chip has enabled the secure boot mode based on the value of the read "OTP_FW_SECURE_EN" information. Specifically, when the default value of "OTP_FW_SECURE_EN" is 0, it indicates that the secure boot mode is not currently enabled on the chip. Generally, during the development and testing phase of the Flash firmware, the chip's "OTP_FW_SECURE_EN" maintains the default value of 0; and when the value of "OTP_FW_SECURE_EN" is 1, it indicates that the chip has currently enabled the secure boot mode. Generally, when the Flash firmware is officially mass-produced and burned, the chip's "OTP_FW_SECURE_EN" value may be rewritten to 1 to enable the secure boot mode.

[0032] When the value of "OTP_FW_SECURE_EN" read by BootRom is 0, execute step 18. When the value of "OTP_FW_SECURE_EN" read by BootRom is 1, execute step 13.

[0033] Step 13, after it is determined that the chip is in secure boot mode by executing step 12, the unique chip identification code in the OTP is read through BootRom.

[0034] BootRom can use the read chip unique identification code as the chip key (i.e., OTP_UID shown in Table 1) for encryption and decryption. The OTP_UID is burned into the chip during mass production, and the OTP_UID of each chip is different, which increases the difficulty of cracking and improves the security of chip secure boot.

[0035] Step 14: read the first Flash security information in the Flash through BootRom, and determine whether the Flash firmware corresponding to the chip is a newly upgraded Flash firmware according to the first Flash security information.

[0036] In one implementation, the security information stored in the Flash may be, but is not limited to, the content shown in Table 2 below.

[0037] Table 2 Security information stored in Flash

[0038] Among them, "FL_UPGRADE_FLAG" is used to indicate that the current Flash firmware is a newly upgraded plain text. When "FL_UPGRADE_FLAG" is set, it indicates that the current Flash firmware is a newly upgraded one and needs to be encrypted and decrypted. Otherwise, it only needs to be decrypted and run.

[0039] In the embodiment of the present application, the first Flash security information read by BootRom may refer to the "FL_UPGRADE_FLAG" information as shown in Table 2 above, and then BootRom may determine whether the value corresponding to the read "FL_UPGRADE_FLAG" is a preset fixed value.

[0040] When the judgment result is yes, it means that the current upgrade for the Flash firmware is a new upgrade, and then continue to perform step 15.

[0041] When the judgment result is no, it means that the current Flash firmware is not a new upgrade, that is, when the value of FL_UPGRADE_FLAG indicates a non-new upgrade, BootRom can read the ciphertext firmware information in the Flash, such as FL_IMAGE_CIPHER shown in Table 2 above, and decrypt the encrypted Flash firmware stored in the Flash to the random access memory RAM according to the chip key obtained by executing step 13 to complete the chip security boot.

[0042] Step 15, when the judgment result obtained by executing step 14 is yes, read the second OTP security information in the OTP through BootRom, and determine whether the chip is the first firmware burning upgrade according to the second OTP security information; In one implementation, the second OTP security information may refer to the "OTP_UPGRADE_AGAIN" information shown in Table 1 above, and then BootRom may determine whether the current chip is undergoing the first firmware upgrade according to the value of the read "OTP_UPGRADE_AGAIN" information.

[0043] Specifically, when the value of "OTP_UPGRADE_AGAIN" is 0, it means that the chip is currently undergoing the first firmware upgrade. When the value of "OTP_UPGRADE_AGAIN" is 1, it means that the chip is currently undergoing a non-first firmware upgrade.

[0044] In the embodiment of the present application, when BootRom determines that the current chip is undergoing firmware upgrade for the first time according to the value of "OTP_UPGRADE_AGAIN", it enters the first-time firmware upgrade encryption operation process and executes step 16; and when BootRom determines that the current chip is not undergoing firmware upgrade for the first time according to the value of "OTP_UPGRADE_AGAIN", it enters the firmware upgrade encryption operation process and executes step 17. Through the above steps, BootRom can distinguish between the first-time firmware upgrade chip and the non-first-time firmware upgrade chip, and perform different encryption processing processes for different types of chips, which not only improves the security of encryption processing for the first-time firmware upgrade chip, but also avoids the problem that the non-first-time firmware upgrade chip may be cracked, which may lead to the leakage of the encryption scheme.

[0045] Step 16, when it is determined by executing step 15 that the chip is being upgraded for the first time, the plaintext firmware information in the chip's external non-volatile memory Flash is encrypted and overwritten according to the chip key, and the ciphertext firmware information is decrypted into the random access memory RAM for execution, completing the chip secure boot.

[0046] Specifically, in the embodiment of the present application, step 16 may include the following sub-steps: Sub-step 1601, according to the chip key obtained by executing step 13, encrypt and overwrite the plaintext firmware information in the Flash to obtain the ciphertext firmware information.

[0047] Specifically, BootRom can read the plaintext firmware information FL_IMAGE in the Flash, and encrypt the FL_IMAGE using an encryption algorithm according to the chip key OTP_UID obtained by executing step 13 to obtain the ciphertext firmware information FL_IMAGE_CIPHER, and save the encrypted FL_IMAGE_CIPHER again to overwrite the original FL_IMAGE address of the Flash to implement encryption processing of the firmware.

[0048] It should be noted here that in the embodiment of the present application, BootRom can encrypt and decrypt plaintext firmware information through a symmetric encryption algorithm. The embodiment of the present application does not limit the specific symmetric encryption algorithm used. For example, the DES algorithm (Data Encryption Standard), 3DES algorithm (Triple DES), AES algorithm (Advanced Encryption Standard) or RC4 algorithm (Rivest Cipher 4) can be used.

[0049] In sub-step 1602, BootRom modifies the second OTP security information so that the modified second OTP security information is used to indicate that the chip is not being upgraded by firmware burning for the first time.

[0050] Specifically, in an embodiment of the present application, BootRom can rewrite the value of OTP_UPGRADE_AGAIN from 0 to 1.

[0051] Sub-step 1603, BootRom reads the security authorization data in the Flash, writes the security authorization data into the OTP, and obtains the OTP security authorization data.

[0052] Specifically, in the embodiment of the present application, BootRom can read the security authorization data FL_FW_AUTHDATA in the Flash, and write FL_FW_AUTHDATA into the OTP, thereby obtaining the OTP_FW_AUTHDATA information in Table 1.

[0053] Sub-step 1604, deleting the security authorization data and the first Flash security information in the Flash.

[0054] In the embodiment of the present application, BootRom can delete FL_FW_AUTHDATA and FL_UPGRADE_FLAG in Flash to avoid conflicts between newly written security authorization data and original security authorization data.

[0055] Sub-step 1605, according to the chip key OTP_UID obtained by executing step 13, the ciphertext firmware information is decrypted into the random access memory RAM for execution, thereby completing the chip secure boot.

[0056] Step 17, when it is determined by executing step 15 that the chip is not the first firmware burning and upgrading, the firmware burning and upgrading is upgraded through BootRom. When the upgrade verification passes, the plaintext firmware information in the Flash is encrypted and overwritten according to the chip key to obtain the ciphertext firmware information, and the ciphertext firmware information is decrypted into the random access memory RAM for running, thereby completing the chip security startup.

[0057] Specifically, in the embodiment of the present application, step 17 may include the following sub-steps: Sub-step 1701, reading the security authorization data FL_FW_AUTHDATA in the Flash through BootRom.

[0058] Sub-step 1702, reading the OTP security authorization data OTP_FW_AUTHDATA in the OTP through BootRom.

[0059] Sub-step 1703, by determining whether FL_FW_AUTHDATA matches OTP_FW_AUTHDATA, the upgrade verification of the firmware burning upgrade is completed.

[0060] When the verification result is a match, sub-step 1704 is executed; when the verification result is a mismatch, the chip security boot process is terminated, thereby preventing the normal startup of the chip that has been illegally cracked and upgraded by the attacker, and avoiding the problem that the attacker reads the BootRom plaintext and the key in the OTP by starting the illegally upgraded chip, thereby cracking the entire trust chain.

[0061] Sub-step 1704, when the upgrade verification passes, the plaintext firmware information in the Flash is encrypted and overwritten according to the chip key to obtain the ciphertext firmware information.

[0062] Specifically, BootRom can read the plaintext firmware information FL_IMAGE in the Flash, and encrypt the FL_IMAGE using an encryption algorithm according to the chip key OTP_UID obtained by executing step 13 to obtain the ciphertext firmware information FL_IMAGE_CIPHER, and save the encrypted FL_IMAGE_CIPHER again to overwrite the original FL_IMAGE address of the Flash.

[0063] Sub-step 1705, deleting the security authorization data and the first Flash security information in the Flash.

[0064] In the embodiment of the present application, BootRom can delete FL_FW_AUTHDATA and FL_UPGRADE_FLAG in Flash.

[0065] Sub-step 1706, according to the chip key OTP_UID obtained by executing step 13, the ciphertext firmware information is decrypted into the random access memory RAM for execution, thereby completing the chip secure boot.

[0066] Step 18, jump directly to Flash to execute the Flash firmware plaintext.

[0067] In addition, in order to prevent attackers from reading the Flash plaintext firmware information through the access interface, and upgrading the Flash firmware to illegal firmware according to the Flash plaintext firmware information, and then reading the internal storage of the chip through the illegal firmware, the security policy of the chip security boot process can be obtained, the entire trust chain can be cracked, and the chip security is threatened. The embodiment of the present application also provides a chip interface security access solution, which writes the interface security access authorization data in the OTP into the chip's security module through BootRom, and then when the chip's internal storage needs to be accessed later, the access party needs to send security authorization data through the access interface, and the chip compares and verifies the security authorization data received by the interface with the interface security access authorization data in the security module in the chip, and only after the verification is passed will the access party be allowed to access the storage resources in the chip through the interface.

[0068] Generally speaking, the access interfaces provided by the chip device can mainly include the following categories: 1. Master-slave bus interface. In this access mode, the Host, as the Master, accesses the internal storage (Slave Chip Device Memory) resources of the slave chip through the bus. At this time, it can be directly accessed without the cooperation of the Device-side software protocol. This type of master-slave bus interface can include: SPI, I2C, SMI, PCIE, USB, etc. Here, the SPI interface can be taken as an example; 2. Debug interface, namely JTAG interface; 3. Asynchronous data communication interface. This type of interface needs to rely on the cooperation of the device-side software protocol. Such interfaces can include UART or Network, etc. Here we take the UART interface as an example.

[0069] In one implementation, the specific implementation flow diagram of the interface security access method provided in this application is as follows: Figure 3 As shown, it mainly includes the following steps: Step 21, reading the third OTP security information in the OTP through BootRom, and determining whether to enable the interface security access mode according to the third OTP security information; In one implementation, the third OTP security information may refer to the "OTP_JTAG_SECURE_EN" information and "OTP_INTF_SECURE_EN" as shown in Table 1 above, and then BootRom may determine whether the current chip has enabled the interface security access mode based on the read values ​​of "OTP_JTAG_SECURE_EN" and "OTP_INTF_SECURE_EN".

[0070] Specifically, during the development and testing phase, the development user can keep the values ​​of "OTP_JTAG_SECURE_EN" and "OTP_INTF_SECURE_EN" in OTP as 0, that is, the interface security access mode is not enabled, so as to facilitate access during the development and testing process. When the chip is burned uniformly during mass production, the values ​​of "OTP_JTAG_SECURE_EN" and "OTP_INTF_SECURE_EN" in OTP are written to 1, which means that the chip has enabled the interface security access mode. The ChipSlave interface security access authorization data OTP_INTF_AUTHDATA and JTAG interface security access authorization data OTP_JTAG_AUTHDATA with specific values ​​are burned in OTP for subsequent access authorization authentication.

[0071] Step 22, when it is determined to enable the interface security access mode by executing step 21, reading the interface security access authorization data in the OTP through BootRom; Specifically, after determining that the current chip has enabled the interface security access mode, the OTP_INTF_AUTHDATA and OTP_JTAG_AUTHDATA in the OTP can be read through the BootRom.

[0072] Step 23, write OTP_INTF_AUTHDATA and OTP_JTAG_AUTHDATA into the security module of the chip through BootRom; Subsequently, when the Host wants to access the chip memory storage resources through the SPI interface, the access authorization data INTF_AUTHDATA will be transmitted to the security module first, so that the security module is allowed only after determining that the access authorization data obtained from the Host matches the interface security access authorization data.

[0073] Similarly, when the Host subsequently wants to access the chip memory storage resources through the JTAG interface, it will first transmit JTAG_AUTHDATA to the security module, so that the security module is allowed only after determining that the access authorization data obtained from the Host matches the interface security access authorization data.

[0074] In addition, when it is necessary to load the user program into RAM through the asynchronous data communication interface UART and run it directly, BootRom will read the OTP_FW_AUTHDATA in the OTP, and compare and match the OTP_FW_AUTHDATA with the UART_FW_AUTHDATA carried in the UART loaded firmware. The firmware will only be run after the comparison and verification pass.

[0075] By adopting the chip security boot method provided in the embodiment of the present application, when performing chip security boot, the read-only memory boot program BootRom can be started, and the first OTP security information in the one-time programmable memory OTP can be read through BootRom, and when it is determined to turn on the secure boot mode according to the first OTP security information, the chip unique identification code in the OTP is read through BootRom as the chip key for encryption and decryption; the second OTP security information in the OTP is read through BootRom, and when it is determined that the chip is the first time to burn and upgrade the firmware according to the second OTP security information, the plaintext firmware information in the chip external non-volatile memory Flash is encrypted and overwritten according to the chip key to obtain the ciphertext firmware information, and the ciphertext firmware information is decrypted into the random access memory RAM for execution, and the chip security boot is completed; and when it is determined that the chip is not the first time to burn and upgrade the firmware, the firmware burning upgrade is upgraded through BootRom. When the upgrade verification passes, the plaintext firmware information in the Flash is encrypted and overwritten according to the chip key to obtain the ciphertext firmware information, and the ciphertext firmware information is decrypted into the random access memory RAM for execution, and the chip security boot is completed. The chip secure boot method provided in the embodiment of the present application uses a read-only memory boot program BootRom instead of the existing host tool to implement the firmware encryption and decryption processing during the secure boot process. The encryption and decryption processing is all handled by BootRom, thereby avoiding the problem that the encryption tool is easily leaked and cracked during the prior art encryption by the Host end and decryption by the Device end, resulting in serious security vulnerabilities in the existing chip secure boot solution. At the same time, the method provided in the embodiment of the present application performs security protection on the chip access interface at the BootRom stage, writes the interface security access authorization data into the chip security module through BootRom, and subsequently, when the internal data of the chip needs to be accessed, the verification code received by the interface needs to be compared and verified with the interface security access authorization data in the chip security module. Only after verification is it allowed to access the storage resources in the chip through the interface, thereby protecting the firmware and interface access security of the chip.

[0076] In one implementation, the present application also provides a chip security boot device to solve the problem that the existing chip security boot method needs to rely on the encryption tool on the host side for encryption and decryption boot, and because the encryption tool on the host side is easy to leak and be cracked, the existing chip security boot solution has serious security vulnerabilities. The specific structural diagram of the chip security boot device is as follows Figure 4 As shown, it includes: a secure boot mode identification unit 41, a chip key acquisition unit 42, a firmware burning and upgrading identification unit 43 and a secure boot unit 44.

[0077] The secure boot mode identification unit 41 is used to start the read-only memory boot program BootRom, read the first OTP security information in the one-time programmable memory OTP through the BootRom, and determine whether to start the secure boot mode according to the first OTP security information; A chip key acquisition unit 42 is used to read the chip unique identification code in the OTP through the BootRom when the secure boot mode identification unit determines to turn on the secure boot mode, and the chip unique identification code is used as the chip key for encryption and decryption; The firmware burning and upgrading identification unit 43 is used to read the second OTP security information in the OTP through the BootRom, and determine whether the chip is being firmware burned and upgraded for the first time according to the second OTP security information; The secure boot unit 44 is used to encrypt and overwrite the plaintext firmware information in the chip's external non-volatile memory Flash to obtain ciphertext firmware information according to the chip key when the firmware upgrade identification unit determines that the chip is being upgraded for the first time, and decrypt the ciphertext firmware information to the random access memory RAM for execution, thereby completing the secure boot of the chip; The secure boot unit 44 is used to perform an upgrade verification on the firmware burning upgrade through the BootRom when the firmware burning upgrade identification unit determines that the chip is not the first firmware burning upgrade. When the upgrade verification passes, the plaintext firmware information in the Flash is encrypted and overwritten according to the chip key to obtain the ciphertext firmware information, and the ciphertext firmware information is decrypted into the random access memory RAM for execution, thereby completing the secure boot of the chip.

[0078] In one embodiment, it also includes a firmware upgrade verification unit, which is specifically used to: read the first Flash security information in the Flash through the BootRom, and determine whether the Flash firmware corresponding to the chip is a newly upgraded Flash firmware according to the first Flash security information; when the judgment result is no, read the ciphertext firmware information in the Flash, and decrypt the ciphertext firmware information into the random access memory RAM according to the chip key to complete the chip security startup; when the judgment result is yes, read the second OTP security information in the OTP through the BootRom, and determine whether the chip is the first firmware burning upgrade according to the second OTP security information.

[0079] In one embodiment, the secure boot unit 44 is specifically used to: encrypt and overwrite the plaintext firmware information in the Flash according to the chip key to obtain the ciphertext firmware information; modify the second OTP security information so that the modified second OTP security information is used to indicate that the chip is not the first firmware burning and upgrading; read the security authorization data in the Flash, write the security authorization data into the OTP, and obtain the OTP security authorization data; delete the security authorization data in the Flash and the first Flash security information; decrypt the ciphertext firmware information according to the chip key to the random access memory RAM for execution, and complete the chip secure boot.

[0080] In one embodiment, the secure boot unit 44 is specifically used to: perform upgrade verification on the firmware burning upgrade through the BootRom; when the upgrade verification passes, encrypt and overwrite the plaintext firmware information in the Flash according to the chip key to obtain the ciphertext firmware information; delete the security authorization data and the first Flash security information in the Flash; according to the chip key, decrypt the ciphertext firmware information into the random access memory RAM for execution, and complete the chip secure boot.

[0081] In one embodiment, the firmware upgrade verification unit is specifically used to: read the security authorization data in the Flash through the BootRom; read the OTP security authorization data in the OTP through the BootRom; and complete the upgrade verification of the firmware burning upgrade by determining whether the security authorization data matches the OTP security authorization data.

[0082] In one implementation, the secure boot unit 44 is specifically configured to: encrypt the plaintext firmware information using a symmetric encryption algorithm according to the chip key to obtain ciphertext firmware information; and overwrite the plaintext firmware information in the Flash according to the ciphertext firmware information.

[0083] In one embodiment, it also includes an interface security access unit, which is specifically used to: read the third OTP security information in the OTP through the BootRom, and determine whether to enable the interface security access mode according to the third OTP security information; when it is determined to enable the interface security access mode, read the interface security access authorization data in the OTP through the BootRom; write the interface security access authorization data into the security module of the chip through the BootRom, so that after the chip determines through the security module that the access authorization data obtained from the Host end matches the interface security access authorization data, the Host end is allowed to access the internal storage resources of the chip through the interface.

[0084] The chip security boot device provided by the embodiment of the present application uses the read-only memory boot program BootRom instead of the existing host tool to implement the firmware encryption and decryption processing during the secure boot process. The encryption and decryption processing is all handled by BootRom, thereby avoiding the problem that the encryption tool is easily leaked and cracked during the prior art encryption by the Host end and decryption by the Device end, resulting in serious security vulnerabilities in the existing chip security boot solution. At the same time, the method provided by the embodiment of the present application performs security protection on the chip access interface at the BootRom stage, writes the interface security access authorization data into the chip security module through BootRom, and when the internal data of the chip needs to be accessed later, the verification code received by the interface needs to be compared and verified with the interface security access authorization data in the chip security module. Only after verification is it allowed to access the storage resources in the chip through the interface, thereby protecting the firmware and interface access security of the chip.

[0085] Figure 5 This is a schematic diagram of the structure of an electronic device according to an embodiment of the present application. Figure 5 At the hardware level, the electronic device includes a processor, and optionally also includes an internal bus, a network interface, and a memory. The memory may include a memory, such as a high-speed random access memory (RAM), and may also include a non-volatile memory (non-volatile memory), such as at least one disk storage. Of course, the electronic device may also include hardware required for other services.

[0086] The processor, network interface and memory can be interconnected through an internal bus, which can be an ISA (Industry Standard Architecture) bus, a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 5 Only one bidirectional arrow is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0087] The memory is used to store the program. Specifically, the program may include a program code, and the program code includes a computer operation instruction. The memory may include a memory and a non-volatile memory, and provides instructions and data to the processor.

[0088] The processor reads the corresponding computer program from the non-volatile memory into the memory and then runs it, forming a chip security boot device at the logical level. The processor executes the program stored in the memory and is specifically used to execute the chip security boot method provided in the above embodiment.

[0089] The above application Figure 5 The method for executing a chip security startup electronic device disclosed in the illustrated embodiment can be applied to a processor or implemented by a processor. The processor may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by an integrated logic circuit of hardware in the processor or an instruction in software form. The above processor may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. The methods, steps and logic block diagrams disclosed in the embodiments of the present application can be implemented or executed. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc. The steps of the method disclosed in conjunction with the embodiments of the present application can be directly embodied as being executed by a hardware decoding processor, or executed by a combination of hardware and software modules in a decoding processor. The software module can be located in a storage medium mature in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory, or an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory, and the processor reads the information in the memory and completes the steps of the above method in combination with its hardware.

[0090] Of course, in addition to software implementation methods, the electronic device of the present application does not exclude other implementation methods, such as logic devices or a combination of software and hardware, etc. That is to say, the execution subject of the following processing flow is not limited to each logic unit, but can also be hardware or logic devices.

[0091] The embodiment of the present application also provides a computer-readable storage medium, which stores one or more programs, wherein the one or more programs include instructions, which, when executed by a portable electronic device including a plurality of application programs, enable the portable electronic device to execute Figure 1The method of the illustrated embodiment is specifically used to execute the chip secure startup method provided in the above embodiment.

[0092] It will be appreciated by those skilled in the art that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0093] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0094] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0095] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0096] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0097] Memory may include non-permanent storage in a computer-readable medium, in the form of random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of a computer-readable medium.

[0098] Computer readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include temporary computer readable media (transitory media), such as modulated data signals and carrier waves.

[0099] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0100] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems or computer program products. Therefore, the present application may take the form of a complete hardware embodiment, a complete software embodiment or an embodiment combining software and hardware. Moreover, the present application may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0101] The above is only an embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.

Claims

1. A chip secure boot method, characterized in that: include: When the secure boot mode is turned on, the unique chip identification code in the OTP is read through the read-only memory startup program BootRom, and the unique chip identification code is used as the chip key for encryption and decryption; Reading the second OTP security information in the OTP through the BootRom, and determining whether the chip is being upgraded by firmware burning for the first time according to the second OTP security information; When it is determined that the chip is undergoing firmware upgrade for the first time, the plaintext firmware information in the chip's external non-volatile memory Flash is encrypted and overwritten according to the chip key to obtain ciphertext firmware information, and the ciphertext firmware information is decrypted and executed in the random access memory RAM to complete the secure boot of the chip; When it is determined that the chip is not the first time to burn and upgrade the firmware, the firmware burning and upgrade is verified through the BootRom. When the upgrade verification passes, the plaintext firmware information in the Flash is encrypted and overwritten according to the chip key to obtain the ciphertext firmware information, and the ciphertext firmware information is decrypted into the random access memory RAM for execution, thereby completing the secure startup of the chip.

2. The method according to claim 1, characterized in that Before reading the second OTP security information in the OTP through the BootRom, the method further includes: Reading the first Flash security information in the Flash through the BootRom, and determining whether the Flash firmware corresponding to the chip is a newly upgraded Flash firmware according to the first Flash security information; When the judgment result is no, the ciphertext firmware information in the Flash is read, and according to the chip key, the ciphertext firmware information is decrypted into the random access memory RAM for execution, thereby completing the chip security boot.

3. The method according to claim 1, characterized in that When it is determined that the chip is being upgraded for the first time, the plaintext firmware information in the chip's external non-volatile memory Flash is encrypted and overwritten to obtain ciphertext firmware information according to the chip key, and the ciphertext firmware information is decrypted and executed in the random access memory RAM to complete the chip secure boot, specifically including: Modify the second OTP security information so that the modified second OTP security information indicates that the chip is not being upgraded by firmware burning for the first time; Read the security authorization data in the Flash, write the security authorization data into the OTP, and obtain the OTP security authorization data; According to the chip key, the plaintext firmware information in the Flash is encrypted and overwritten to obtain the ciphertext firmware information; Deleting the security authorization data and the first Flash security information in the Flash; According to the chip key, the ciphertext firmware information is decrypted into the random access memory RAM for execution, thereby completing the chip secure boot.

4. The method according to claim 1, characterized in that: When it is determined that the chip is not the first firmware burning and upgrading, the firmware burning and upgrading is verified by the BootRom. When the upgrade verification passes, the plaintext firmware information in the Flash is encrypted and overwritten according to the chip key to obtain the ciphertext firmware information, and the ciphertext firmware information is decrypted and executed in the random access memory RAM to complete the chip security startup, which specifically includes: Read the security authorization data in the Flash through the BootRom; Read the OTP security authorization data in the OTP through the BootRom; By judging whether the security authorization data matches the OTP security authorization data, the firmware burning upgrade is verified; When the upgrade verification is passed, the plaintext firmware information in the Flash is encrypted and overwritten according to the chip key to obtain the ciphertext firmware information; Deleting the security authorization data and the first Flash security information in the Flash; According to the chip key, the ciphertext firmware information is decrypted into the random access memory RAM for execution, thereby completing the chip secure boot.

5. The method according to any one of claims 1 to 4, characterized in that: After the chip secure boot is completed, the method further includes: Read the third OTP security information in the OTP through the BootRom, and determine whether to enable the interface security access mode according to the third OTP security information; When it is determined to enable the interface security access mode, the interface security access authorization data in the OTP is read through the BootRom; The interface security access authorization data is written into the security module of the chip through the BootRom, so that after the chip determines through the security module that the access authorization data obtained from the Host end matches the interface security access authorization data, the Host end is allowed to access the internal storage resources of the chip through the interface.

6. A chip secure boot device, characterized in that: include: A chip key acquisition unit is used to read the chip unique identification code in the OTP through the read-only memory startup program BootRom when the secure startup mode is turned on, and use the chip unique identification code as the chip key for the device; A firmware burning and upgrading identification unit, used for reading the second OTP security information in the OTP through the BootRom, and determining whether the chip is being firmware burned and upgraded for the first time according to the second OTP security information; A secure boot unit is used to encrypt and overwrite the plaintext firmware information in the chip's external non-volatile memory Flash to obtain ciphertext firmware information when the firmware upgrade identification unit determines that the chip is being upgraded for the first time, according to the chip key, and decrypt the ciphertext firmware information to the random access memory RAM for execution, thereby completing the secure boot of the chip; The secure boot unit is used to perform an upgrade verification on the firmware burning and upgrading through the BootRom when the firmware burning and upgrading identification unit determines that the chip is not the first firmware burning and upgrading. When the upgrade verification passes, the plaintext firmware information in the Flash is encrypted and overwritten according to the chip key to obtain the ciphertext firmware information, and the ciphertext firmware information is decrypted into the random access memory RAM for running, so as to complete the secure boot of the chip.

7. The device according to claim 6, characterized in that The secure boot unit is specifically used for: Modify the second OTP security information so that the modified second OTP security information indicates that the chip is not being upgraded by firmware burning for the first time; Read the security authorization data in the Flash, write the security authorization data into the OTP, and obtain the OTP security authorization data; According to the chip key, the plaintext firmware information in the Flash is encrypted and overwritten to obtain the ciphertext firmware information; Deleting the security authorization data and the first Flash security information in the Flash; According to the chip key, the ciphertext firmware information is decrypted into the random access memory RAM for execution, thereby completing the chip secure boot.

8. The device according to claim 6, characterized in that The secure boot unit is specifically used for: Read the security authorization data in the Flash through the BootRom; Read the OTP security authorization data in the OTP through the BootRom; By judging whether the security authorization data matches the OTP security authorization data, the firmware burning upgrade is verified; When the upgrade verification is passed, the plaintext firmware information in the Flash is encrypted and overwritten according to the chip key to obtain the ciphertext firmware information; Deleting the security authorization data and the first Flash security information in the Flash; According to the chip key, the ciphertext firmware information is decrypted into the random access memory RAM for execution, thereby completing the chip secure boot.

9. A chip secure boot device, comprising: processor; A memory arranged to store computer executable instructions, wherein when the executable instructions are executed, the processor executes the chip secure boot method as claimed in any one of claims 1 to 5.

10. A computer-readable storage medium storing one or more programs, which, when executed by an electronic device including a plurality of application programs, enables the electronic device to execute the chip security boot method as described in any one of claims 1 to 5.

Images