Groove structure for enhancing hydrophilic bonding of semiconductor wafer and preparation method thereof

By etching groove structures on the wafer oxide layer to store unwanted gases, the bubble problem during wafer bonding was solved, resulting in higher bonding success rate and compatibility, and shorter annealing time.

CN119480655BActive Publication Date: 2026-05-29CHONGQING UNIV

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
CHONGQING UNIV
Filing Date
2024-10-25
Publication Date
2026-05-29

AI Technical Summary

Technical Problem

During the hydrophilic bonding process of wafers, the generation and aggregation of bubbles can lead to bonding failure, especially on large-size wafers where the problem is more serious. Existing technologies are unable to effectively prevent bubble formation.

Method used

Grooves are etched into the oxide layer of the wafer to store unwanted gases generated during the bonding reaction. The vacuum environment and the pressure difference between the inside and outside of the grooves promote gas diffusion, thereby enhancing bonding strength and compatibility.

Benefits of technology

It effectively reduces bubbles at the bonding interface, improves bonding success rate, shortens annealing time, enhances inter-wafer contact, and increases fault tolerance and compatibility.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The application provides a recess structure for enhancing hydrophilic bonding of a semiconductor wafer and a preparation method, which comprises a first semiconductor substrate, a second semiconductor substrate, and an oxide layer formed on the second semiconductor substrate; a recess is formed in the oxide layer, and the recess penetrates through the oxide layer; the first semiconductor substrate and the oxide layer on the second semiconductor substrate are bonded under a vacuum environment to form a vacuum recess; and an annealing process is performed to strengthen the bonding strength. The recess structure is used to store and discharge the undesirable gases (water and hydrogen) generated in the hydrophilic bonding process of the semiconductor wafer, so that the effect of removing the bubbles at the bonding interface is achieved, the situation that a large area of the wafer is separated due to the gathering of the interface bubbles in the annealing process is avoided, the effective bonding area of the wafer is ensured, the yield of the bonded product is increased, and the application prospect in the wafer bonding field is wide.
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Description

Technical Field

[0001] This application relates to the field of semiconductor integrated circuit manufacturing, specifically to a groove structure and preparation method for enhancing hydrophilic bonding of semiconductor wafers. Background Technology

[0002] As the semiconductor field continues to develop, the demands for device performance are also constantly increasing. Traditional silicon materials are gradually failing to meet these performance requirements. Therefore, the current integration field needs to integrate many different materials with excellent properties. For example, III-V compounds are direct bandgap semiconductors, and they can act as light-emitting active materials, which is impossible with traditional silicon materials. Heterogeneous integration of III-V compound semiconductors onto traditional silicon substrates forms a unique heterogeneous material platform, which has become one of the most promising materials for advanced device applications in integrated photonics and high-speed electronics. However, due to severe lattice mismatch and thermal mismatch between many heterogeneous materials, this greatly limits the heterogeneous integration achieved through epitaxial processes. Bonding processes can solve this problem. Wafer hydrophilic bonding is one of the common methods in bonding processes, which can connect two wafers together at room temperature without any adhesives or other materials.

[0003] However, bubble formation is a serious problem for hydrophilic bonding of wafers. Bubbles mainly arise from the unavoidable generation of unwanted gases (water, hydrogen) during the hydrophilic bonding reaction. The bubble problem worsens with increasing wafer size, and bubbles can even coalesce during annealing, ultimately leading to large-area debonding and bonding failure. Therefore, there is an urgent need to develop an effective process to prevent bubble formation at the bonding interface of hydrophilic wafer bonding. Summary of the Invention

[0004] To address the shortcomings of existing technologies, this invention proposes a groove structure and its fabrication method to enhance hydrophilic bonding in semiconductor wafers. The core component of this structure is the groove on the oxide layer. The groove space can store unwanted gases (water, hydrogen) generated during the hydrophilic bonding reaction at the interface, thereby significantly reducing the presence of bubbles at the bonding interface.

[0005] To achieve the above objectives, the technical solution adopted by the present invention is: a method for preparing a groove structure to enhance hydrophilic bonding of semiconductor wafers, comprising:

[0006] S1: A first semiconductor substrate (101) and a second semiconductor substrate (103) are provided, and an oxide layer (102) is formed on the second semiconductor substrate (103), wherein the oxide layer has a considerable thickness.

[0007] At 300 nanometers;

[0008] S2: Using a wet etching process, etching is performed on the oxide layer of the second semiconductor substrate (103) to form...

[0009] Groove (203);

[0010] S3: Oxide layer (102) on the first semiconductor substrate (101) and the second semiconductor substrate (103)

[0011] A hydrophilic surface is obtained by performing surface activation treatment;

[0012] S4: The oxide layer (102) bonding the first semiconductor substrate (101) and the second semiconductor substrate (103);

[0013] S5: Perform an annealing process to strengthen the bonding strength between the oxide layer (102) of the first semiconductor substrate (101) and the second semiconductor substrate (103).

[0014] In one embodiment, the groove extends through the oxide layer, meaning the groove depth is the same as the oxide layer thickness.

[0015] In one embodiment, S3 uses a solution hydrophilization treatment combined with plasma activation treatment to perform surface activation treatment on the oxide layers of the first semiconductor substrate and the second semiconductor substrate (103).

[0016] In one embodiment, the bonding process described in S4 is completed in a vacuum atmosphere, creating a certain degree of vacuum within the groove.

[0017] In one embodiment, the annealing process, used to strengthen the bonding strength between the oxide layers of the first semiconductor substrate and the second semiconductor substrate (103), is performed at a temperature between 200 and 400°C.

[0018] Based on the above preparation method, a groove structure for enhancing hydrophilic bonding of semiconductor wafers is formed, characterized by comprising:

[0019] First semiconductor substrate (101);

[0020] The oxide layer (102) of the second semiconductor substrate is used to form a groove (203) and is bonded to the first semiconductor substrate;

[0021] Second semiconductor substrate (103);

[0022] The groove (203) is used to store unwanted gases generated during the hydrophilic bonding process.

[0023] Furthermore, the thickness of the oxide layer is not less than 300 nanometers.

[0024] Furthermore, the groove is cuboid in shape, and rectangular in shape when viewed from above.

[0025] Furthermore, the side length of the groove is greater than 100 micrometers, and the groove spacing is no greater than 4000 micrometers.

[0026] Compared with the prior art, the present invention has the following advantages:

[0027] The groove structure and fabrication method for enhancing hydrophilic bonding of semiconductor wafers provide a pressure difference between the inside and outside of the groove during bonding in a vacuum environment, thereby enhancing the contact between bonded wafers. The vacuum effect within the groove structure also allows gases generated during the bonding reaction to diffuse into the groove, enhancing its venting and retention capabilities. Furthermore, the vacuum in the groove accelerates the diffusion of unwanted gases, thus speeding up the bonding reaction and shortening the annealing time. The presence of the groove allows for some roughness and defects at the bonding interface, increasing the tolerance and compatibility of hydrophilic bonding. Attached Figure Description

[0028] The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings:

[0029] Figure 1 A schematic diagram of a groove structure for enhancing hydrophilic bonding of semiconductor wafers is shown in an embodiment of the present invention;

[0030] Figure 2 This illustrates a second semiconductor substrate and an oxide layer on the second semiconductor substrate provided in an embodiment of the present invention;

[0031] Figure 3 The second semiconductor substrate, the oxide layer of the second semiconductor substrate, and the groove are shown in an embodiment of the present invention;

[0032] Figure 4 , 5 This diagram illustrates the oxide layer bonding process between the first semiconductor substrate and the second semiconductor substrate in an embodiment of the present invention.

[0033] Figure 6 This diagram illustrates the situation where undesirable gases are generated at the bonding interface during the initial annealing process after the oxide layers of the first semiconductor substrate and the second semiconductor substrate are bonded together in an embodiment of the present invention.

[0034] Figure 7 A schematic diagram illustrating the diffusion of unwanted gases generated during annealing after the oxide layers of the first semiconductor substrate and the second semiconductor substrate are bonded.

[0035] Figure 8 This diagram illustrates the diffusion of undesirable gases after annealing, following oxide layer bonding between the first and second semiconductor substrates.

[0036] In the figure: 101, first semiconductor substrate; 102, oxide layer of second semiconductor substrate; 103, second semiconductor substrate; 201, silicon substrate; 202, oxide layer; 203, groove; 204, indium phosphide substrate; 205, hydroxyl group; 301, water; 302, hydrogen. Detailed Implementation

[0037] To illustrate the present invention in more detail, the technical solution of the present invention will be further described below with reference to preferred embodiments and accompanying drawings.

[0038] like Figure 1 As shown, this embodiment provides a method for fabricating a groove structure that enhances hydrophilic bonding in semiconductor wafers. The fabrication method includes:

[0039] S1: A first semiconductor substrate (101) and a second semiconductor substrate (103) are provided, and an oxide layer (102) is formed on the second semiconductor substrate, wherein the thickness of the oxide layer is not less than 300 nm.

[0040] nanometer;

[0041] S2: A groove (203) is etched on the oxide layer of the second semiconductor substrate using a wet etching process;

[0042] S3: Perform oxide layer (102) treatment on the first semiconductor substrate (101) and the second semiconductor substrate.

[0043] Surface activation treatment yields a hydrophilic surface;

[0044] S4: Bonding the oxide layer (102) of the first semiconductor substrate (101) to the second semiconductor substrate;

[0045] S5: Perform an annealing process to strengthen the bonding strength between the oxide layer (102) of the first semiconductor substrate (101) and the second semiconductor substrate.

[0046] Example 1:

[0047] like Figures 2-8 As shown, this embodiment 1 provides a method for fabricating a groove structure that enhances hydrophilic bonding in semiconductor wafers. The fabrication method includes:

[0048] S1: As Figure 2As shown, an indium phosphide substrate (204) and a silicon substrate (201) are provided, and an oxide layer (202) is formed on the surface of the silicon substrate (201) using a thermal oxidation process. In this embodiment, the thermal oxidation process is a dry thermal oxidation process, and the oxidation temperature range is 900-1200℃, specifically 1000℃. The thickness of the oxide layer (202) is not less than 300 nanometers, and the thickness of the oxide layer (202) can be determined according to the temperature and time of the thermal oxidation process.

[0049] S2: As Figure 3 As shown, the oxide layer (202) is etched by wet etching with BOE solution to form a groove (203) that penetrates into the oxide layer (202).

[0050] S3: As Figure 4 As shown, the indium phosphide substrate (204) and oxide layer (202) are treated by a combination of NH4OH:H2O2:H2O (volume ratio of 1:1:5) solution and oxygen plasma treatment, so that the surfaces of the indium phosphide substrate (204) and oxide layer (202) are capped with hydroxyl groups (205).

[0051] S4: As Figure 5 As shown, the indium phosphide substrate (204) and the oxide layer (202) are bonded in a vacuum environment, with the indium phosphide substrate (204) sealing the groove (203). This provides vacuum conditions for the groove (203) while enhancing the contact between the indium phosphide substrate (204) and the oxide layer (202).

[0052] S5: As Figure 6 As shown, an annealing process is performed to strengthen the bond strength between the indium phosphide substrate (204) and the oxide layer (202). Figure 6 As shown, during the annealing process, a large amount of water (301) and hydrogen gas (302) are generated at the interface between the indium phosphide substrate (204) and the oxide layer (202) due to the hydrophilic bonding reaction. Figure 7 As shown, due to its vacuum degree, the groove (203) allows water (301) and hydrogen (302) generated at the interface to diffuse into the groove (203) under the action of the internal and external pressure difference, where they are stored. Simultaneously, some water (301) and hydrogen (302) are discharged from the material through the oxide layer (202), thus ensuring that as little water (301) and hydrogen (302) as possible exists at the contact interface. Ultimately, as... Figure 8 As shown, some water (301) and hydrogen (302) are still stored in the groove (203), giving the groove (203) an internal pressure similar to the external atmospheric pressure. The pressure on the groove (203) structure is relatively small, and its structure is not easily damaged by the pressure difference between the inside and outside. Specifically, the annealing process uses an annealing temperature between 200 and 400°C.

[0053] Finally, it should be noted that the above-described embodiments are merely preferred examples for clearly illustrating the present invention, but they are not intended to limit the implementation of the present invention. Those skilled in the art should understand that other modifications or equivalent substitutions of some technical features can be made based on the above specific embodiments. It is impossible to exhaustively list all embodiments here. Therefore, any modifications, improvements, equivalent substitutions, etc., derived from the technical solutions of the present invention within the spirit and principles of the present invention should be within the scope of protection claimed by the present invention.

Claims

1. A method for fabricating a groove structure to enhance hydrophilic bonding in semiconductor wafers, characterized in that, The preparation method includes: S1: Provide a first semiconductor substrate (101) and a second semiconductor substrate (103), and prepare an oxide layer (102) on the second semiconductor substrate, wherein the oxide layer (102) has a thickness of not less than 300 nanometers; S2: Using a wet etching process, a cuboid-shaped groove (203) is etched on the oxide layer (102) of the second semiconductor substrate. The groove (203) penetrates the oxide layer (102), and the groove depth is the same as the thickness of the oxide layer (102). The side length of the groove is greater than 100 micrometers, and the groove spacing is not greater than 4000 micrometers. S3: The oxide layers (102) of the first semiconductor substrate (101) and the second semiconductor substrate are surface activated by a solution of NH4OH:H2O2:H2O with a volume ratio of 1:1:5 combined with oxygen plasma treatment to obtain a hydrophilic surface capped with hydroxyl groups (205). S4: Bond the first semiconductor substrate (101) and the oxide layer (102) of the second semiconductor substrate in a vacuum atmosphere, so that there is a certain vacuum in the groove (203). The bonding reaction is accelerated by the pressure difference inside and outside the groove and the undesirable gas is guided to diffuse into the groove (203). S5: Annealing is performed at a temperature of 200℃~400℃ to strengthen the bonding strength between the first semiconductor substrate (101) and the oxide layer (102) of the second semiconductor substrate. At the same time, the groove (203) is used to store the water (301) and hydrogen (302) generated by the bonding reaction, so as to avoid the aggregation of bubbles at the bonding interface leading to debonding.

2. The method for preparing the groove structure for enhancing hydrophilic bonding of semiconductor wafers according to claim 1, characterized in that, In step S3, the oxide layers (102) of the first semiconductor substrate (101) and the second semiconductor substrate are surface activated by a combination of solution hydrophilization treatment and plasma activation treatment.

3. A groove structure for enhancing hydrophilic bonding in semiconductor wafers, characterized in that, Based on claim 1 The groove structure formed by the method for preparing the groove structure for enhancing hydrophilic bonding of semiconductor wafers according to any one of the claims 2 includes: First semiconductor substrate (101); The oxide layer (102) of the second semiconductor substrate is used to form a groove (203) and is bonded to the first semiconductor substrate (101); Second semiconductor substrate (103); The groove (203) is used to store unwanted gases generated during the hydrophilic bonding process.