Load balancing flexible routing method, device and equipment based on switch chip

Abstract

The invention discloses a load balancing flexible routing method, device and equipment based on a switch chip, and the method comprises the steps: receiving a to-be-forwarded message, and carrying out the calculation of a Hash value through a Hash engine according to the hashkey of the message; according to the profile id and the esmp / lag group id, a current mapping table is determined from the flexible routing logic unit; performing remainder operation on the hash value and a member count value of the current mapping table, and calculating to obtain an index position of a member corresponding to the current hash value in the current mapping table; and obtaining a real index position of the member corresponding to the index position in the esmp / lag group, and performing final esmp / lag routing according to the real index position. According to the invention, a user can flexibly configure multi-link load balancing according to service scene requirements, and the routing balance degree and reliability of a load balancing mechanism are improved.

Description

Technical Field

[0001] The present invention relates to the field of chips, and in particular to a load balancing flexible routing method, device and equipment based on a switching chip. Background Art

[0002] The new data center in the AI ​​era requires high-performance computing and high-performance networks to support artificial intelligence applications. High-performance computing can be achieved using a distributed GPU cluster computing architecture, while high-performance networks are used to connect a large number of GPU nodes for distributed high-performance computing to achieve distributed AI model training and generative AI. High-performance networks in data centers with large bandwidth, low latency, and high reliability are particularly important for the construction of large AI models. The development of data center networks is leading the progress of the AI ​​era. In the context of linear expansion of cluster computing power, designing an efficient network architecture with scale restrictions, hierarchical division, load balancing, and stability assurance is a very difficult system engineering.

[0003] Figure 1 A high-performance AI network architecture is proposed, which is divided into two parts: the back-end GPU interconnection network and the front-end storage + VPC network. The back-end GPU interconnection network has a large-scale switching capacity and adopts an efficient parameter switching architecture. The front-end storage and VPC network are storage networks that realize storage and computing separation, and multiple computing clusters share a high-performance file storage cluster.

[0004] AI large models are usually calculated using distributed training, which requires synchronization of huge amounts of data such as parameters, gradients, and intermediate variables between multiple hosts. The large amount of data interaction required for AI large model applications places high bandwidth requirements on the bearer network.

[0005] AI large model training also puts forward the requirement of low latency for the bearer network. Large model training generally mixes multiple parallel modes such as data parallelism, pipeline parallelism, tensor parallelism, etc. to fully utilize the computing power of the cluster. However, all parallel modes involve All Reduce collective communication. Multiple All Reduces need to complete each point-to-point communication, so there is a barrel effect in collective communication, and the completion time is determined by the slowest communication time. Uneven load on any link will cause network congestion, greatly increase latency, and seriously affect training efficiency.

[0006] Unlike traditional application workloads that typically run on Ethernet, AI generates heterogeneous traffic that is bursty and highly sensitive to network failures. For example, when a link from a leaf switch to a spine switch fails, this affects multiple GPU nodes in multiple racks and significantly degrades All-to-All performance. Data center networks require a high-reliability mechanism that allows for rapid communication recovery when a link fails, saving the communication cost of expensive data retransmissions due to link failures.

[0007] Distributed AI model training and generative AI in data centers require a powerful network to connect a large number of GPU nodes. Traditional load balancing maps different flows to different paths by hashing the five-tuple. When the network traffic is characterized by a large number of small flows, it can balance the network load relatively well. The traffic characteristics of AI training are small number of flows and large single-flow traffic. In order to improve the bandwidth and reliability of the network, a load balancing mechanism is often used to carry the business.

[0008] The traditional load balancing mechanism has a fixed routing method and cannot flexibly select routes for load balancing according to needs. It is easy to forward multiple large-bandwidth flows to the same link, resulting in load imbalance, network congestion and high latency. Since the performance of AI operations depends on the performance of the network in the worst case, the load imbalance problem will cause the model training time to be higher than expected and very unpredictable, which will lead to a decrease in overall training efficiency. Summary of the invention

[0009] In view of the above problems, the purpose of the embodiments of the present invention is to provide a load balancing flexible routing method, device and equipment based on a switching chip to improve the above problems.

[0010] The embodiment of the present invention provides a load balancing flexible routing method based on a switching chip, which includes:

[0011] Receive a message to be forwarded, and calculate a hash value using a hash engine according to the hash_key of the message;

[0012] According to the profile id and ecmp / lag group id, determine the current mapping table from the flexible routing logic unit;

[0013] Perform a modulo operation on the hash value and the member count value of the current mapping table to calculate the index position of the member corresponding to the current hash value in the current hash mapping table;

[0014] The real index position of the member corresponding to the index position in the ecmp / lag group is obtained, and the final ecmp / lag routing is performed according to the real index position.

[0015] Preferably, the core of the flexible routing logic unit is composed of a series of mapping tables indexed by profile id+ecmp / lag groupid, and each mapping table is composed of an index position subset of a group flexibly selected by a user and a member count value.

[0016] Preferably, the profile id and ecmp / lag group id are determined based on the network's port, mac, vlan, ip and user-defined fields.

[0017] Preferably, the flexible routing logic unit is configured with a priority; if a message matches multiple flexible routing logic units at the same time, the flexible routing logic unit with the highest priority takes effect.

[0018] Preferably, it also includes:

[0019] Pre-configure a number of flexible routing logic units to implement hash value mapping to different group member subsets; when a member in a group member subset fails, use a new flexible routing logic unit mapped by other subsets that do not contain the member, and update the profile associated with the forwarding table entry to the new flexible routing logic unit to achieve rapid fault recovery.

[0020] Preferably, it also includes:

[0021] After a member failure is detected, the mapping table of the flexible routing logic unit is modified to restore the failed service.

[0022] The embodiment of the present invention further provides a load balancing flexible routing device based on a switching chip, which includes:

[0023] A hash value calculation unit, used for receiving a message to be forwarded, and calculating a hash value by a hash engine according to a hash_key of the message;

[0024] A mapping table determination unit, used to determine a current mapping table from the flexible routing logic unit according to a profile id and an ecmp / lag group id;

[0025] An index position calculation unit, used to perform a modulo operation on the hash value and the member count value of the current mapping table to calculate the index position of the member corresponding to the current hash value in the current hash mapping table;

[0026] The routing unit is used to obtain the real index position of the member corresponding to the index position in the ecmp / lag group, and perform final ecmp / lag routing according to the real index position.

[0027] An embodiment of the present invention also provides a load balancing flexible routing device based on a switching chip, which includes a memory and a processor, wherein the memory stores a computer program, and the computer program can be executed by the processor to implement the load balancing flexible routing method based on a switching chip as described above.

[0028] In summary, this embodiment designs a flexible load balancing routing architecture, which allows users to flexibly configure multi-link load balancing according to business scenario requirements, and improves the routing balance and reliability of the load balancing mechanism. Compared with the prior art, this embodiment has at least the following advantages:

[0029] (1) This embodiment can implement 1:1 / 1:N mapping of selected ports on the basis of common load balancing.

[0030] (2) This embodiment can superimpose port, MAC, IP and other user-defined matching rules on the basis of ordinary load balancing to achieve flexible scheduling based on flow, such as flexible load balancing scheduling based on flow classification based on dot 1p and dscp.

[0031] (3) This embodiment can achieve more uniform and deterministic load balancing, and can support fast fault switching, thereby improving the communication efficiency and reliability of the computing network. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the technical solution of the present invention, the drawings required for use in the implementation mode will be briefly introduced below. Obviously, the drawings described below are only some implementation modes of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0033] Figure 1 This is the existing AI high-performance network architecture diagram.

[0034] Figure 2 It is a schematic diagram of the basic load-bearing solution of the ECMP group.

[0035] Figure 3 It is a flow chart of a load balancing flexible routing method based on a switching chip provided in the first embodiment of the present invention.

[0036] Figure 4 This is a schematic diagram of a load balancing flexible routing method based on a switching chip.

[0037] Figure 5 is a schematic diagram of a failover scheme for updating an associated profile.

[0038] Figure 6 It is a structural diagram of a load balancing flexible routing device based on a switching chip provided in the second embodiment of the present invention. DETAILED DESCRIPTION

[0039] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0040] Multiple embodiments of the present invention provide a load balancing flexible routing method, apparatus and device based on a switching chip, which can realize user-defined refined load balancing control and support a fast fault switching mechanism.

[0041] To facilitate understanding of the present invention, common terms, relevant standards and protocols related to this embodiment and a basic bearing solution of an ECMP group are first introduced below.

[0042] 1. Common terms

[0043] ECMP——Equal Cost Multiple Path Routing

[0044] WCMP——Weight Cost Multiple Path Routing

[0045] 2. Relevant standards and protocols

[0046] RFC 2991——Multipath Issues in Unicast and Multicast Next-HopSelection

[0047] RFC 2992——Analysis of an Equal-Cost Multi-Path Algorithm

[0048] RFC 4928——Avoiding Equal Cost Multipath Treatment in MPLS Networks

[0049] RFC 6438——Using the IPv6 Flow Label for Equal Cost MultipathRouting and Link Aggregation in Tunnels

[0050] RFC 6754——Protocol Independent Multicast Equal-Cost Multipath(ECMP)Redirect

[0051] RFC 7190——Use of Multipath with MPLS and MPLS Transport Profile (MPLS-TP)

[0052] RFC 7226——Requirements for Advanced Multipath in MPLS Networks

[0053] RFC 7325——MPLS Forwarding Compliance and PerformanceRequirementsRFC 7424——Mechanisms for Optimizing Link Aggregation Group(LAG)and Equal-Cost Multipath(ECMP)Component Link Utilization in Networks

[0054] 3. Basic load-bearing solution of ECMP group

[0055] like Figure 2 As shown in the figure, the basic load-bearing scheme of the ECMP group is that the hash engine uses the hash_key of the message to calculate the hash_value, and then obtains the forwarding path selected by the message through the operation of the path_selection module corresponding to the ecmp group. The selected_path finds the corresponding path_x from the ECMP member array, and uses the nexthop_y path corresponding to path_x to forward the message, thereby finally completing the load sharing of traffic forwarding.

[0056] Based on the above basic load-bearing solution, please refer to Figure 3 The first embodiment of the present invention provides a load balancing flexible routing method based on a switching chip, which includes:

[0057] S101, receiving a message to be forwarded, and using a hash engine to calculate a hash value according to a hash_key of the message.

[0058] In this embodiment, each message has a hash_key, and a hash engine can calculate a hash value, ie, a hash value, according to the hash_key.

[0059] S102: Determine a current mapping table from the flexible routing logic unit according to the profile id and the ecmp / lag group id.

[0060] S103, performing a modulo operation on the hash value and the member count value of the current mapping table to calculate the index position of the member corresponding to the current hash value in the current hash mapping table.

[0061] S104, obtaining the real index position of the member corresponding to the index position in the ecmp / lag group, and performing final ecmp / lag routing according to the real index position.

[0062] Specifically, Figure 4 As shown, the core of the flexible routing logic unit hash mapping profile is composed of a series of mapping tables indexed by profile id+ecmp / lag group id. Each mapping table is composed of a subset of the index position (member index) of the group member flexibly selected by the user and a member count value (member cnt). The members in the group member are arranged in the order specified by the user.

[0063] Among them, this embodiment can realize flexible binding of the mapping table of hash mapping profile based on matching conditions such as port, mac, vlan, ip, user-defined fields, etc., and further realize flexible load balancing routing. The format of the mapping table of hashmapping profile is shown in Table 1, and the hash index can be flexibly mapped to a member of the load balancing group.

[0064] Table 1 Hash mapping profile mapping table format

[0065]

[0066] In this embodiment, when selecting a route, the system calculates the hash value calculated by the hash engine, and then performs a modulo operation with the member cnt of the current mapping table to calculate the index position of the member corresponding to the current hash value in the current mapping table, and then takes out the real index position of the member corresponding to the index position in the ecmp / lag group, and obtains the menmber corresponding to the real index position, thereby obtaining the final ecmp / lag routing.

[0067] In this embodiment, it should be noted that the hashmapping profile can be flexibly associated at each stage of message forwarding processing. The priority of the profile associated with the message can be flexibly set. If the message matches multiple profiles at the same time, the profile with the highest priority takes effect.

[0068] In addition, the flexible routing logic unit hash mapping profile can also run in parallel with the ordinary hash routing mechanism, and the flexible routing logic unit has a higher priority than the ordinary hash routing mechanism.

[0069] In particular, this embodiment supports selecting a forwarding path based on a basic common hash routing mechanism first, and then superimposing a flexible load balancing adjustment scheme. The invention also supports flexible load balancing routing for all index positions. If there is a routing result of a member mapping table, the routing result of the member mapping table is preferably used as the load balancing forwarding path; if there is no selection result of a member mapping table, the routing result of the traditional hash routing mechanism is used as the load balancing forwarding path.

[0070] When forwarding a specific message, a member is selected as a further forwarding path according to the profile matched by the message and the routing mechanism selection logic. As shown in Table 2, the invention supports three dimensions of flexibility.

[0071] Table 2 Flexibility of the three dimensions of the flexible routing mechanism

[0072] Serial number Flexibility Description 1 Flexible association of profiles at each stage of forwarding processing 2 Flexible control of the priority of each profile 3 Flexible mapping of profiles to hash indexes to group member subsets

[0073] The solution for realizing rapid service recovery after a path failure in this embodiment is described in detail below.

[0074] Specifically, this embodiment naturally supports two fast failover methods:

[0075] Solution 1: By configuring multiple flexible routing logic unit hash mapping profiles, different group member subsets can be mapped to index locations. When a fault occurs, the associated profile ID is updated to achieve fast fault recovery.

[0076] like Figure 5 As shown in the figure, for solution 1, multiple hash mapping profiles are pre-configured to implement hashindex mapping to different group member subsets; when a member member in a group member subset fails, a new hash mapping profile mapped by other subsets that do not contain the member is used, and the profile associated with the forwarding table entry is updated to the new hash mapping profile, so that fast fault recovery can be achieved. In this solution, in the multi-member failure scenario, excellent fault switching performance can be achieved by updating the associated profile and using the new group member subset to carry the forwarding service.

[0077] When a forwarding path fails, the failed path can be replaced in the hash mapping profile table to achieve fast fault recovery and ensure network reliability. The switching process is independent of the number of services associated with the profile, and fast fault switching can be achieved.

[0078] For solution 2, quickly adjust the member ID mapped in the hash mapping profile and use the spare member to replace the failed member to achieve fast fault recovery.

[0079] Specifically, after a member failure is detected, the failed service can be quickly restored and carried by modifying the hash mapping profile table.

[0080] As shown in Table 3, if member 1 of the load balancing group fails, member x of the load balancing group can be selected to replace member 1 to achieve rapid service recovery. The newly selected member x can be a member with a lighter load or a dedicated standby member. The network user can flexibly plan and set it according to the reliability requirements and bandwidth resource utilization.

[0081] Table 3 Hash mapping profile mapping table after failover

[0082]

[0083] In summary, this embodiment designs a flexible load balancing routing architecture, which allows users to flexibly configure multi-link load balancing according to business scenario requirements, and improves the routing balance and reliability of the load balancing mechanism. Compared with the prior art, this embodiment has at least the following advantages:

[0084] (1) This embodiment can implement 1:1 / 1:N mapping of selected ports on the basis of common load balancing.

[0085] (2) This embodiment can implement flexible flow-based scheduling by superimposing port, MAC, IP and other user-defined matching rules on the basis of ordinary load balancing, such as flexible load balancing scheduling based on flow classification based on dot 1p and dscp.

[0086] (3) This embodiment can achieve more uniform and deterministic load balancing, and can support fast fault switching, thereby improving the communication efficiency and reliability of the computing network.

[0087] See also Figure 6 The second embodiment of the present invention further provides a load balancing flexible routing device based on a switching chip, which includes:

[0088] The hash value calculation unit 210 is used to receive a message to be forwarded, and calculate a hash value by a hash engine according to a hash_key of the message;

[0089] A mapping table determination unit 220, configured to determine a current mapping table from the flexible routing logic unit according to the profile id and the ecmp / lag group id;

[0090] An index position calculation unit 230, configured to perform a modulo operation on the hash value and the member count value of the current mapping table to calculate the index position of the member corresponding to the current hash value in the current hash mapping table;

[0091] The routing unit 240 is used to obtain the real index position of the member corresponding to the index position in the ecmp / lag group, and perform final ecmp / lag routing according to the real index position.

[0092] The third embodiment of the present invention also provides a load balancing flexible routing device based on a switching chip, which includes a memory and a processor, wherein the memory stores a computer program, and the computer program can be executed by the processor to implement the load balancing flexible routing method based on the switching chip as described above.

[0093] In several embodiments provided in the embodiments of the present invention, it should be understood that the disclosed apparatus and method can also be implemented in other ways. The apparatus and method embodiments described above are merely schematic. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the apparatus, method and computer program product according to multiple embodiments of the present invention. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of a code, and the module, program segment or a part of the code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart can be implemented with a dedicated hardware-based system that performs a specified function or action, or can be implemented with a combination of dedicated hardware and computer instructions.

[0094] In addition, the functional modules in the various embodiments of the present invention may be integrated together to form an independent part, or each module may exist independently, or two or more modules may be integrated to form an independent part.

[0095] If the functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention is essentially or the part that contributes to the prior art or the part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions to enable a computer device (which can be a personal computer, an electronic device, or a network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk. It should be noted that, in this article, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements that are not explicitly listed, or also includes elements inherent to such a process, method, article or device. Without more constraints, an element defined by the phrase "comprising a..." does not exclude the existence of other identical elements in the process, method, article or apparatus comprising the element.

[0096] The terms used in the embodiments of the present invention are only for the purpose of describing specific embodiments, and are not intended to limit the present invention. The singular forms "a", "said" and "the" used in the embodiments of the present invention and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.

[0097] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0098] The word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrases "if it is determined" or "if (stated condition or event) is detected" may be interpreted as "when it is determined" or "in response to determining" or "when detecting (stated condition or event)" or "in response to detecting (stated condition or event)", depending on the context.

[0099] The "first\second" mentioned in the embodiments is only to distinguish similar objects, and does not represent a specific order for the objects. It is understandable that the "first\second" can be interchanged with the specific order or sequence where permitted. It should be understood that the objects distinguished by "first\second" can be interchanged where appropriate, so that the embodiments described herein can be implemented in an order other than those illustrated or described herein.

[0100] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A load balancing flexible routing method based on a switching chip, characterized in that: include: Receive a message to be forwarded, and calculate a hash value using a hash engine according to the hash_key of the message; According to the profile id and ecmp / lag group id, determine the current mapping table from the flexible routing logic unit; Perform a modulo operation on the hash value and the member count value of the current mapping table to calculate the index position of the member corresponding to the current hash value in the current mapping table; The real index position of the member corresponding to the index position in the ecmp / lag group is obtained, and the final ecmp / lag routing is performed according to the real index position.

2. The load balancing flexible routing method based on a switching chip according to claim 1, characterized in that: The core of the flexible routing logic unit is composed of a series of mapping tables indexed by profile id+ecmp / lag group id, each of which is composed of an index position subset of a group flexibly selected by a user and a member count value.

3. The load balancing flexible routing method based on a switching chip according to claim 1, characterized in that: The profile id and ecmp / lag group id are determined based on the network's port, mac, vlan, ip and user-defined fields.

4. The load balancing flexible routing method based on a switching chip according to claim 1, characterized in that: The flexible routing logic unit is configured with a priority; if a message matches multiple flexible routing logic units at the same time, the flexible routing logic unit with the highest priority takes effect.

5. The load balancing flexible routing method based on a switching chip according to claim 1, characterized in that: Also includes: Pre-configure multiple flexible routing logic units to map hash values ​​to different group member subsets; If a member of a group member subset fails, a new flexible routing logic unit mapped by other subsets that do not contain the member is used, and the profile associated with the forwarding table entry is updated to the new flexible routing logic unit to achieve rapid fault recovery.

6. The load balancing flexible routing method based on a switching chip according to claim 1, characterized in that: Also includes: After a member failure is detected, the mapping table of the flexible routing logic unit is modified to restore the failed service.

7. A load balancing flexible routing device based on a switching chip, characterized in that: include: A hash value calculation unit, used for receiving a message to be forwarded, and calculating a hash value by a hash engine according to a hash_key of the message; A mapping table determination unit, used to determine a current mapping table from the flexible routing logic unit according to a profile id and an ecmp / lag group id; An index position calculation unit, used to perform a modulo operation on the hash value and the member count value of the current mapping table to calculate the index position of the member corresponding to the current hash value in the current hash mapping table; The routing unit is used to obtain the real index position of the member corresponding to the index position in the ecmp / lag group, and perform final ecmp / lag routing according to the real index position.

8. A load balancing flexible routing device based on a switching chip, characterized in that: It comprises a memory and a processor, wherein the memory stores a computer program, and the computer program can be executed by the processor to implement the load balancing flexible routing method based on a switching chip as described in any one of claims 1 to 6.

Images