System for maintaining reversible dynamic range control information associated with parametric audio encoder

Abstract

The invention relates to a system for maintaining reversible dynamic range control information associated with a parametric audio encoder. On the basis of a bitstream (P), an n-channel audio signal (X) is reconstructed by deriving an m-channel core signal (Y) and a multi-channel coding parameter (alpha) from the bitstream, where 1 < = m < n. A pre-processing dynamic range control parameter, i.e., a pre-processing DRC parameter (DRC2), that quantizes the encoder-side dynamic range limitation of the core signal is also derived from the bitstream. The n-channel audio signal is obtained by parameter synthesis according to the multi-channel encoding parameters while eliminating any encoder-side dynamic range limitations based on the pre-processing DRC parameters. In particular embodiments, the reconstruction further includes the use of compensated post-processing DRC parameters that quantify possible decoder-side dynamic range compression. Preferably, encoder-side range limit cancellation and range compression are performed by different decoder-side components. Cancellation and compression may be coordinated by a DRC preprocessor.

Description

[0001] The present application is a divisional application of the invention patent application with application number 202011087994.7, application date May 2, 2013, and invention name “System for maintaining reversible dynamic range control information associated with a parametric audio encoder”. The invention patent application with application number 202011087994.7 is a divisional application of the invention patent application with application number 201710814631.0, application date May 2, 2013, and invention name “System for maintaining reversible dynamic range control information associated with a parametric audio encoder”. The invention patent application with application number 201710814631.0 is a divisional application of the invention patent application with application number 201380025886.9, application date May 2, 2013, and invention name “System for maintaining reversible dynamic range control information associated with a parametric audio encoder”.

[0002] CROSS-REFERENCE TO RELATED APPLICATIONS

[0003] This application claims priority to U.S. Provisional Patent Application No. 61 / 649,036 filed on May 18, 2012, U.S. Provisional Patent Application No. 61 / 664,507 filed on July 25, 2012, and U.S. Provisional Patent Application No. 61 / 713,005 filed on October 12, 2012, the entire contents of which are incorporated herein by reference. Technical Field

[0004] The invention disclosed herein generally relates to audiovisual media distribution. In particular, it relates to an adaptive distribution format that allows both higher bit rate mode and lower bit rate mode as well as seamless mode switching during decoding. The invention further relates to methods and apparatus for encoding and decoding signals according to the distribution format. Background Art

[0005] Parametric stereo and multi-channel coding methods are known to be scalable and efficient in terms of listening quality, which makes them particularly attractive in low bit rate applications. However, in cases where the bit rate limitations are of a temporary nature (e.g., network jitter, load variations), all the benefits of the available network resources can be obtained by using an adaptive distribution format, where a relatively high bit rate is used during normal conditions and a lower bit rate is used when the network function is poor.

[0006] Existing adaptive distribution formats and associated encoding (decoding) techniques can be improved from the perspective of their bandwidth efficiency, computational efficiency, robustness to errors, algorithmic delays and further in the distribution of audiovisual media with respect to how noticeable the bitrate switching event is to the person enjoying the decoded media. The fact that legacy decoders can be expected to remain in parallel use with newer, dedicated equipment places limits on such potential improvements insofar as backward compatibility must be maintained.

[0007] Dynamic range control (DRC) techniques for ensuring a more consistent dynamic range during playback of audiovisual signals are well known in the art. See T. Carroll and J. Riedmiller, "Audio for Digital Tevision", published as chapter 5.18 of EA Williams et al. (eds.), NAB Engineering Handbook, 10 th ed. (2007), Academic Press and references cited therein for an overview. Such techniques may allow a receiver to modify the dynamic range of an audiovisual signal to accommodate relatively unsophisticated playback equipment when the signal itself is broadcast at full dynamic range, enabling more sophisticated equipment. A simple implementation of DRC may use a metadata field encoding a gain factor in the interval from 0 to 1, which the decoder may choose to apply or not.

[0008] Using known DRC techniques, the encoded audiovisual signal can be transmitted with metadata that enables the user to compress or boost the playback dynamic range to suit his or her preferences or to artificially adapt the dynamic range to the available playback equipment. However, known DRC techniques may be incompatible with adaptive bitrate encoding, and switching between two bitrates may sometimes be accompanied by dynamic range inconsistencies, especially in conventional equipment. The present invention addresses this concern. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Embodiments of the present invention will now be described with reference to the accompanying drawings, in which:

[0010] Figure 1a , 1b , 3, 7 and 10 are generalized block diagrams of audio encoding systems according to exemplary embodiments of the present invention.

[0011] Figure 2a , 2b , 2c, 4, 6 and 13 are generalized block diagrams of audio decoding systems according to example embodiments of the present invention.

[0012] Figure 5A part of a parameter analysis stage in an audio coding system is shown.

[0013] Figure 8 The calculation of compensated post-processing DRC parameter values ​​based on pre-processing and post-processing DRC parameters involving time blocks of the same length is illustrated.

[0014] Fig. 9 The calculation of compensated post-processing DRC parameter values ​​based on pre-processing and post-processing DRC parameters involving time blocks of different lengths is illustrated.

[0015] Fig.11 and 12 A part of a parametric synthesis stage in an audio decoding system is shown.

[0016] All the figures are schematic and generally show only parts which are necessary for explaining the invention, while other parts may be omitted or merely suggested. Unless otherwise indicated, similar reference numerals in different figures refer to similar parts. DETAILED DESCRIPTION

[0017] Ⅰ. Overview

[0018] As used herein, an "audio signal" may be an audio-only signal or an audio portion of an audiovisual signal or a multimedia signal.

[0019] Example embodiments of the present invention propose methods and devices that allow distribution of audiovisual media in a bandwidth-economical manner. In particular, the example embodiments propose encoding formats for distribution of audiovisual media that allow both legacy receivers and more modern devices to output audio portions with consistent dialog levels. In particular, the example embodiments propose encoding formats with adaptive bitrates, wherein switching between two bitrates need not be accompanied by sharp dialog level changes, which might otherwise become perceptible artifacts in the audio signal or audio portions of the signal during playback.

[0020] Exemplary embodiments of the present invention provide an encoding method, an encoder, a decoding method, a decoder, a computer program product, and a media encoding format having the features set forth in the embodiments.

[0021] A first embodiment of the present invention provides a decoding system for reconstructing an n-channel audio signal X based on a bit stream P. The decoding system is operable at least in a parametric coding mode and comprises:

[0022] Demultiplexer, which receives the bit stream and outputs the coded core signal and one or more multi-channel encoding parameters, the one or more multi-channel encoding parameters collectively indicated by α;

[0023] A core signal decoder, for receiving the encoded core signal and outputting an m-channel core signal, where 1≤m<n;

[0024] A parameter synthesis stage for receiving the core signal and the multi-channel coding parameters and forming a linear combination of the channels of the core signal using gains that depend on the multi-channel coding parameters to output an n-channel signal.

[0025] In this first embodiment, the bitstream further includes one or more pre-processing DRC parameters DRC2, which quantitatively characterize the dynamic range limiting operations that have been performed in the encoder that produces the bitstream. Based on the pre-processing DRC parameters, the decoding system is operable to eliminate the encoder-side dynamic range limitation. Preferably, the signal is divided into time blocks and the pre-processing DRC parameter DRC2 is defined to have a resolution of a time block of the signal; thus, each value of the parameter DRC2 is applied to at least one time block, and each time block may be associated with a specific value specific to the time block. Still without departing from the scope of the present invention, the value of the parameter DRC2 can be constant for several consecutive blocks. For example, the value of the parameter DRC2 can be updated only once per time frame (which includes multiple time blocks), so that the parameter DRC2 is constant on the time frame.

[0026] An advantage associated with the first exemplary embodiment is that the pre-processing DRC parameters DRC2 provide the decoding system with the option of restoring the audio signal to its original dynamic range at such time intervals, regardless of the fact that the encoder has performed dynamic range limitation (or compression) at such time intervals for any reason. The restoration may be equivalent to removing the dynamic range limitation, i.e., improving (or increasing) the dynamic range. One possible reason for limiting the dynamic range in the encoder may be to avoid clipping. Whether the restoration is applied may depend, for example, on a manually entered user input, automatically detected characteristics of the playback device, a target DRC level obtained from an external source, or other factors. The target DRC level may express a portion of the original post-processing dynamic range control (quantized by the post-processing DRC parameters DRC1) to be applied by the decoding system. It can be represented by a parameter f∈[0,1], which modifies the amount of DRC to be applied from DRC1 to f×DRC1 (in logarithmic units).

[0027] In a simple embodiment, the DRC2 parameter can be encoded in the form of a broad spectrum (or broadband) gain factor expressed in logarithmic form as a positive dB value, which quantifies the relative amplitude reduction that the signal has undergone. Thus, assuming DRC2 = x>0, the relative amplitude change at the encoder side is 10 -x / 20 <1, so this elimination can then be included at the decoder side with 10 +x / 20 >1 for signal amplification.

[0028] The actual reduction can be complete or partial, depending on the target DRC level and the input DRC level (or decoder input DRC level), i.e., the DRC level that the n-channel audio signal would have after reconstruction without any dynamic range compression or dynamic range expansion. The input DRC level can be the original dynamic range reduced by an amount corresponding to the preprocessing DRC parameter DRC2. The target DRC level can be the original dynamic range reduced by an amount corresponding to the product of the parameter f and the postprocessing DRC parameter DRC1, i.e., f×DRC1 (in logarithmic form). In the simple implementation mentioned above, the condition f×DRC1 < DRC2 can imply partial reduction, i.e., reduction by an amount corresponding to DRC2 - f×DRC1 rather than DRC2. For example, if the target DRC level corresponds to the input DRC level (i.e., the dynamic range of the audio signal originally encoded by the encoder generating the bitstream), which can be expressed as f = 0, then complete reduction by the amount DRC2 is required. If the target DRC level is less than the input DRC level, as in the case of 0 < f < 1 and f×DRC1 < DRC2, then partial reduction of the dynamic range limit is sufficient. If the target DRC level is greater than the input DRC level, as in f×DRC1 > DRC2, the specified DRC level can be achieved by performing further dynamic range compression in the decoder, i.e., compressing by an amount corresponding to f×DRC1 - DRC2. In this case, no initial reduction of the preprocessing DRC is required. Finally, if the target DRC level is the full DRC amount quantized by DRC1, as expressed by f = 1, then depending on whether DRC1 < DRC2 or DRC1 > DRC2, partial reduction or further compression of the encoder-side dynamic range limit is performed.

[0029] In a second embodiment, a method for reconstructing an n-channel audio signal X based on a bitstream is provided. According to this method, a bitstream containing the encoded core signal each of one or more multi-channel encoding parameters α and the preprocessing DRC parameter DRC2 (as defined above) triggers the following actions:

[0030] · The encoded core signal is encoded into an m-channel core signal Y, where 1 ≤ m < n;

[0031] · Parameter space synthesis is performed such that the n-channel signal is reconstructed based on the core signal and the multi-channel encoding parameters.

[0032] According to a second exemplary embodiment, decoding includes removing the encoder-side dynamic range limit based on the parameter DRC2.

[0033] The first and second exemplary embodiments are functionally similar and basically share the same advantages.

[0034] In a further development of the first exemplary embodiment, the decoding system further receives as part of the bitstream and remains so when the system is in the parametric coding mode one or more compensated post-processing DRC parameters DRC3, which quantify the DRC that can be applied by the decoder. The application of the DRC may be subject to manual user input, automatically detected characteristics of the playback device, etc.; thus, the DRC to be applied by the decoder may be fully implemented, partially implemented, or not implemented at all. In general, the pre-processing DRC parameters DRC2 are useful in increasing the dynamic range relative to the input DRC level, while the compensated post-processing DRC parameters DRC3 are useful in making any adjustments to the dynamic range from the input DRC level (also including range compression). The DRC3 parameters can be expressed in logarithmic form as positive or negative dB values. Therefore, assuming DRC3=y>0, the relative amplitude change that will occur on the decoder side is related to 10 -y / 20 Proportional to , this value is a scalar in the interval (0,1). Conversely, negative values ​​of DRC3 will cause dilation on the decoder side.

[0035] In a further development of the above, the decoding system comprises a DRC processor operable to remove encoder-side dynamic range compression based on parameter DRC2. Alternatively, the DRC processor is operable to remove dynamic range compression already applied at the encoder side, as expressed by parameter f discussed above.

[0036] In a further development, the decoding system further comprises a DRC preprocessor that controls the DRC processor and the core signal decoder and is responsible for achieving a target DRC level. In this way, the DRC preprocessor can determine whether the target DRC level (e.g., f×DRC1) is greater than or less than the input DRC level, which can be the dynamic range of the audio signal initially encoded and subsequently reduced by the encoder-side DRC quantized by the preprocessing DRC parameter DRC2. If, based on the result of this decision, the decoded audio signal needs to be enhanced, then the DRC preprocessor (i) instructs the DRC processor to partially or completely eliminate the encoder-side dynamic range limitation. On the contrary, if the decoded audio signal needs to be compressed (e.g., f×DRC1>DRC2, then the DRC preprocessor instructs the DRC processor (ii) to partially or completely implement the decoder-side DRC to be applied as quantized by the parameter DRC3. If the target DRC level is not much different from the input DRC level (e.g., f×DRC1≈DRC2), then the DRC preprocessor does not need to take any action. In normal operation, both operation (i) and operation (ii) are not performed with respect to the same time block.

[0037] In an exemplary embodiment, the decoding system is further operable in a discrete decoding mode to decode the n-channel signal based on the encoded n-channel signal. The bit stream reconstructs the audio signal. Therefore, this embodiment provides a dual-mode or multi-mode decoding system. From the perspective of adaptive coding, the discrete coding mode can represent a high bit rate mode, while the parameter coding mode typically corresponds to a lower bit rate mode.

[0038] In an exemplary embodiment, the decoding system is of dual-mode type, i.e., it can operate in either parameter coding mode or discrete coding mode. The decoding system is allowed to apply decoder-side DRC in each of these modes. In discrete coding mode, the decoding system uses post-processing DRC parameters DRC1 as a guide for DRC. However, in parameter coding mode, at least in certain time blocks, an n-channel audio signal is generated based on a core signal that is derived potentially in relation to the dynamic range limitation on the encoder side. In order to cope with the dynamic range changes that have occurred (i.e., the dynamic range limitation in certain time blocks), the decoding system uses compensated post-processing DRC parameters DRC3 as a guide for DRC. Both parameters DRC1 and DRC3 can be derived from the bitstream, but during normal operation of the system, both parameter types cannot be obtained in a given time block but only one of them. Including both parameters DRC1 and DRC3 will be equivalent to sending redundant information when parameter DRC2 exists. The decoding system of this exemplary embodiment uses parameter DRC2 to adapt parameter DRC1 to the scale of parameter DRC1 or to adapt parameter DRC3 to the scale of parameter DRC1. For example, the decoding system may include a DRC down-compensator that receives parameters DRC2 and DRC3 and based thereon outputs restored post-processing DRC parameters to be applied by the decoder system. The restored post-processing DRC parameters will then be comparable (at the same scale) to the post-processing DRC parameters DRC1. In other words, the decoder-side DRC expressed by the restored DRC parameters is quantitatively equivalent to the combination of the encoder-side dynamic range limit of the core signal and the decoder-side DRC expressed by the compensated post-processing DRC parameters DRC3. In the simple implementation mentioned above, the relationship between the various DRC parameters may be as follows: the restored DRC parameters are obtained by DRC2+DRC3, which are equal to DRC1.

[0039] In a second aspect of the present invention, an exemplary embodiment provides a coding system for encoding an n-channel audio signal X divided into time blocks into a bit stream P. The coding system comprises:

[0040] a parametric analysis stage for receiving an n-channel signal and outputting, based thereon and in a parametric coding mode of the coding system, an m-channel core signal Y and one or more multi-channel coding parameters α, where 1≤m<n; and

[0041] Core signal encoder, used to receive the core signal and output the encoded core signal In the coding system, the parameter analysis stage is configured to perform adaptive dynamic range limitation on a time period basis and output pre-processed DRC parameters DRC2 that quantize the dynamic range limitation applied. The time period can be a time block or multiple consecutive time blocks, such as a time frame containing six time blocks. The coding system is configured to transmit the pre-processed DRC parameters DRC2 together with the bit stream, preferably but not necessarily as part of it. By transmitting the pre-processed DRC parameters DRC2, the coding system allows the decoding system to receive the bit stream to eliminate the dynamic range limitation that the parameter analysis stage has imposed on the core signal. If the dynamic range limitation is performed on a time block basis, the parameter DRC2 has a time block resolution. Alternatively, if the dynamic range limitation is performed on a frame basis, the parameter DRC2 has a resolution of one frame. In other words, each time block is associated with a specific value of the parameter DRC2 or with a reference to a previously defined value, but the value can be updated on a frame basis or on a block basis. Furthermore, dynamic range limiting in the parameter analysis stage may be performed directly on the core signal (eg, by applying dynamic range limiting on the core signal) or indirectly (eg, by applying dynamic range limiting on a signal from which the core signal is derived).

[0042] According to a further development of the previous exemplary embodiment, the encoding system can operate in both parameter encoding mode and discrete encoding mode. In order to allow DRC on the decoder side, the encoder is configured to derive one or more post-processing DRC parameters DRC1 that quantize the decoder side DRC to be applied. Parameter DRC1 is output in discrete encoding mode. However, in parameter encoding mode, parameter DRC1 has been compensated to cope with any dynamic range limitation that has been performed by the parameter analysis stage. The output of this compensation process includes compensated post-processing DRC parameters DRC3. The dominant principle of the compensation process can be that the decoder side DRC expressed by the post-processing DRC parameters will be quantitatively equivalent to the combination of the dynamic range limitation (such as quantized by parameter DRC2) and the decoder side DRC (such as quantized by the compensated post-processing DRC parameters DRC3) imposed by the parameter analysis stage. Preferably, all three parameter types are expressed in compatible scales, for example by using corresponding linear or logarithmic units. In the simple implementation mentioned above, the relationship between the DRC parameters can be as follows (still on a logarithmic scale): the compensated post-processing DRC parameters are obtained as DRC1-DRC2.

[0043] In a further exemplary embodiment within the second aspect, the encoding method comprises:

[0044] · receiving an n-channel audio signal X divided into time blocks;

[0045] Generating an m-channel core signal Y and one or more multi-channel coding parameters α while performing dynamic range limitation on a time block basis and generating one or more pre-processing DRC parameters DRC2 (which quantify the applied dynamic range limitation);

[0046] as well as

[0047] Output a bitstream P containing a core signal, multi-channel encoding parameters and pre-processing DRC parameters DRC2.

[0048] In a further exemplary embodiment, the present invention provides a computer program product comprising a computer-readable medium having computer executable instructions for executing the decoding method or encoding method according to the exemplary embodiments described above. The computer program product can be executed in a general-purpose computer that does not necessarily include dedicated hardware components.

[0049] In a further exemplary embodiment, the present invention provides a data structure for audio signal storage or transmission. The structure includes an m-channel core signal Y, one or more mixing parameters α, and one or more pre-processing DRC parameters DRC2 that quantize the dynamic range limit on the encoder side. The structure allows for decoding by a linear combination of n channels of a downmixed signal channel (and possibly, channels in a decorrelated signal) (wherein the one or more mixing parameters control at least one gain in the linear combination) and by eliminating the dynamic range limit on the encoder side. In particular, the present invention provides a computer-readable medium for storing information constructed according to the above data structure. In the data structure, the pre-processing DRC parameter DRC2 can be encoded as a 3-bit field representing an exponent and an associated 4-bit field representing a mantissa; when decoding, the exponent and mantissa are combined into a scalar value corresponding to a gain value. Alternatively, the pre-processing DRC parameter DRC2 can be encoded as a 2-bit field representing an exponent and an associated 5-bit field representing a mantissa.

[0050] Further exemplary embodiments are defined in the dependent claims.It is noted that the invention relates to all combinations of features, even if these are recited in mutually different claims.

[0051] II. Exemplary Embodiment: Encoding Side

[0052] Figure 1a A dual-mode encoding system 1 according to an exemplary embodiment is shown in the form of a generalized block diagram. An n-channel audio signal X is provided to each of an upper part, which is operative at least in a discrete encoding mode of the encoding system 1, and a lower part, which is operative at least in a parametric encoding mode of the system 1.

[0053] The upper part generally includes a discrete-mode DRC analyzer 10 arranged in parallel with an encoder 11, both of which receive an audio signal X as an input. Based on this signal, the encoder 11 outputs an encoded n-channel signal while the DRC analyzer 10 outputs one or more post-processing DRC parameters DRC1 of a decoder-side DRC to be applied for quantization. The parallel outputs from both the DRC analyzer 10 and the encoder 11 are collected by a discrete-mode multiplexer 12, which outputs a bitstream P.

[0054] The lower part of the encoding system 1 includes a parameter analysis stage 22 arranged in parallel with a parameter-mode DRC analyzer 21, and the parameter-mode DRC analyzer 21 and the parameter analysis stage 22 receive an n-channel audio signal X. Based on the n-channel audio signal X, the parameter analysis stage 22 outputs one or more multi-channel encoding parameters (collectively expressed by α), and an m-channel (1 ≤ m < n) core signal Y, and the core signal Y is then processed by a core signal encoder 23, which outputs an encoded core signal based on this. As indicated by reference numeral g↓, the parameter analysis stage 22 implements dynamic range limiting in the required time blocks. Possible conditions for controlling when to apply dynamic range control can be the "no clipping condition" or the "in-range condition", meaning that during a time period when the core signal has a high amplitude, the signal is processed to fit within a defined range. This condition can be implemented based on a single time block or a time frame containing several time blocks. Preferably, this condition is implemented by applying a wide-spectrum gain reduction rather than just clipping the peaks or using similar methods. As is well known in the art, there are techniques for making the temporary dynamic range limiting operation less noticeable (for example, gradually applying and / or releasing the limitation if the limitation is only required for a specific set of time blocks). In particular, the system 1 can include a feedback loop (not shown) configured to smooth the DRC parameters. For example, the current parameter value to be output can be obtained as the sum of a part 0 < a < 1 of the parameter value of the previous segment and a part (1 - a) of the parameter value generated by the implementation of the "no clipping condition" in the current segment. The post-processing DRC parameter DRC1 and the pre-processing DRC parameter DRC2 can of course be smoothed independently and with different constant a values.

[0055] Figure 5 A possible implementation of the parameter analysis stage 22 is shown, which includes a pre-processor 527 and a parameter analysis processor 528. The pre-processor 527 is responsible for performing dynamic range limiting on the n-channel signal X, so it outputs a dynamically range-limited n-channel signal X C, which is supplied to the parameter analysis processor 528. The preprocessor 527 further outputs block-by-block or frame-by-frame values ​​of the preprocessed DRC coefficients DRC2. Together with the multi-channel encoding parameters α and the m-channel core signal Y from the parameter analysis processor 528, the parameters DRC2 are included in the output of the parameter analysis stage 22.

[0056] Again, reference Figure 1a , note that the discrete mode DRC analyzer 10 functions similarly to the parameter mode DRC analyzer 21, whose output quantizes one or more post-processing DRC parameters DRC1 on the decoder side to be applied. However, the parameters DRC1 provided by the parameter mode DRC analyzer 21 are not included in the bitstream in the parametric coding mode, but undergo compensation so that the dynamic range limitation performed by the parameter analysis stage 22 is coped with. For this purpose, a DRC up compensator 24 receives the post-processing DRC parameters DRC1 and the pre-processing DRC parameters DRC2. For each time block, the DRC up compensator 24 derives the value of one or more compensated post-processing DRC parameters DRC3, which value is such that the combined action of the compensated post-processing DRC parameters DRC3 and the pre-processing DRC parameters DRC2 is quantitatively equivalent to the DRC quantized by the post-processing DRC parameters DRC1. In other words, the DRC upper compensator 24 is configured to reduce the post-processing DRC parameters output by the DRC analyzer 21 by sharing (if any) the post-processing DRC parameters already implemented by the parameter analysis stage 22. What will be included in the bitstream is the compensated post-processing DRC parameters DRC3. Still referring to the lower part of the system 1, the parameter mode multiplexer 25 collects the compensated post-processing DRC parameters DRC3, the pre-processing DRC parameters DRC2, the multi-channel coding parameters α and the coding core signal and form the bitstream P based on them. In a possible implementation, the compensated post-processing DRC parameters DRC3 and the pre-processing DRC parameters DRC2 can be encoded in logarithmic form as dB values ​​that affect the amplitude scaling on the decoder side. The compensated post-processing DRC parameters DRC3 can have any sign. However, the pre-processing DRC parameters DRC2 resulting from the implementation of the "no clipping condition" etc. can be represented by non-negative dB values ​​at all times.

[0057] Common to both the upper and lower parts of the coding system 1, a selector 26 (representing any hardware or software implemented signal selection means) determines, depending on the actual coding mode, whether the bit stream from the upper or lower part of the coding system 1 constitutes the final output of the coding system 1. Similarly, a switch ( Figure 1a The input side switch 26 may be driven correspondingly to the output side switch 26.

[0058] refer to Figure 1a As will be discussed below, the bitstream P may be encoded in a format compliant with Dolby Digital Plus (DD+ or EAC3, Enhanced AC3). The bitstream then includes at least the metadata fields dynrng and compr. According to one provision of DD+, dynrng has a resolution of one time block, while compr has a resolution of one frame (comprising four or six time blocks). In terms of the importance of these metadata fields, the post-processing DRC parameters DRC1 defined above correspond to dynrng or compr, depending on whether, for example, "serious compression" is activated, which acts in a way to ensure that the mono downmix will not exceed a certain peak level. In general, both the dynrng and nompr fields are transmitted, and it is the responsibility of the decoder to decide which one to use. Therefore, the post-processing DRC parameters DRC1 (which can therefore have a block resolution or a frame resolution) can be transmitted in the traditional part of the format and will be understood by traditional decoders. However, the pre-processing DRC parameters DRC2 lack an equivalent part in the DD+ format and are preferably encoded in the new metadata field. The pre-processing DRC parameter DRC2 is related to the part of dynrng and / or compr that ensures that the signal will not clip when down-mixed from a 5.1 format (n=6) to a stereo format (m=2). The compensated post-processing DRC parameter DRC3 is the result after compensating the dynrng or compr value by deducting the clipping resistance quantized by the pre-processing DRC parameter DRC2; therefore it can be transmitted in the dynrng or compr field in the DD+ bitstream.

[0059] The new metadata field for the pre-processing DRC parameter DRC2 may include 7 bits (xxyyyyy), where the bits at the x position represent an integer in [0, 3] and the bits at the y position represent an integer in [0, 31]. The pre-processing DRC parameter DRC2 is a gain factor (1+y / 32)×2 x is obtained.

[0060] Another metadata parameter in the DD+ format is dialnorm, which is the volume level of the content (possibly averaged over time). In an example embodiment, the target output reference level L T is a setting in the decoder configuration and may be controlled by the user. To achieve the target output reference level L T , the decoding system will apply the difference dialnorm-L Tquantized static attenuation. To obtain the total attenuation to be applied, the decoding system will expand this difference by any additional attenuation specified by the (uncompensated) post-processing DRC parameters DRC1 or the compensated post-processing DRC parameters DRC3 or the target DRC expressed as a fraction f×DRC1 of the post-processing DRC parameters. This will yield: dialnorm-L, respectively. T +DRC1 or dialnorm-L T +DRC3 or dialnorm-L T +f x DRC1. If one of these three linear combinations has a positive sign, then it specifies that a non-zero amount of total attenuation will be applied in the decoding system; a negative sign specifies that the signal will effectively be boosted.

[0061] Figure 7 According to a further example embodiment, Figure 1a The coding system 1 shown in FIG. 1 is functionally similar to the coding system 701. Since similar reference symbols have been used and the reference numerals associated with the signals are the same as those in FIG. Figure 1a 701, a detailed description of the working principle of the encoding system 701 is not considered necessary. However, an important difference lies in the fact that a DRC analyzer 721 completes Figure 1a The DRC analyzer 721 performs the tasks of both the discrete mode DRC analyzer 10 and the parameter mode DRC analyzer 21. For this purpose, the DRC analyzer 721 receives the n-channel audio signal X to be encoded by the encoding system 701; it provides the post-processing DRC parameters DRC1 (which are generated by the analyzer 721 on the basis of the n-channel audio signal X) to both the discrete mode multiplexer 712 and the DRC upper compensator 724, wherein the latter component 724 is connected to the DRC analyzer 721. Figure 1a The upper compensator 24 in the encoding system 1 has the same function.

[0062] Figure 3 shows a coding system 301, which is Figure 1a The one in is relatively simple because it does not produce any post-processing DRC parameters as output. As such, a decoder receiving the bitstream P produced by the encoding system 301 will not necessarily be able to perform dynamic range compression. However, such a decoder will be able to remove the dynamic range limitation applied by the encoding system 301; typically, this amounts to increasing the dynamic range in time blocks where the n-channel audio signal X includes peaks of relatively high amplitude.

[0063] exist Figure 3 In the embodiment, the upper part of the encoding system 301 (at least operating in the discrete encoding mode of the encoding system 301) at most needs to include a device configured to provide an encoded n-channel signal based on the n-channel signal X to be encoded by the system 301 The lower part corresponding to the discrete coding mode contains Figure 1a , i.e., a parameter analysis stage 322 which outputs pre-processing DRC parameters DRC2, multi-channel encoding parameters α and an m-channel core signal Y based on the n-channel audio signal X. After the core signal Y has been processed in the core signal encoder 323 (which transforms it into an encoded core signal ), the set of outputs of the parameter analysis stage 322 are combined into a bitstream P by a parameter mode multiplexer 325. A selector 326 arranged downstream of both the upper part and the lower part of the encoding system 301 is responsible for outputting the bitstream produced by either the upper part or the lower part depending on the current encoding mode of the encoding system 301.

[0064] exist Fig.10 The coding system 1001 shown in represents a further simplification. The coding system 1001 is adapted to process an n-channel audio signal X in a format suitable for storage or transmission without further coding operations. Thus, in a discrete coding mode, the audio signal may be output from the coding system 1001 without any further processing, such as Fig.10 1026 is shown in the position of the selector 1026 shown in . In the parametric encoding mode, the parameter analysis stage 1022 analyzes the n-channel audio signal X to output pre-processing DRC parameters DRC2, multi-channel encoding parameters α and m-channel core signal Y. When the n-channel audio signal is in a format suitable for transmission or storage as described, the parameter analysis stage 22 is also configured to operate on the n-channel audio signal. Fig.10 In the coding system in , the core signal Y is also in a format that allows transmission or storage, so that the signal and the multi-channel coding parameter α and the parameter DRC2 can be combined by the parameter mode multiplexer 1025 into a bit stream to be output from the coding system 1001 in the parameter coding mode.

[0065] Figure 1b A single-mode encoding system according to an example embodiment is illustrated. An n-channel audio signal X is provided to a DRC analyzer 21 and a parameter analysis stage 22, both of which are arranged in parallel. Based on the n-channel audio signal X, the parameter analysis stage 22 outputs one or more multi-channel encoding parameters (collectively denoted by α) and an m-channel (1≤m<n) core signal Y, which is then processed by a core signal encoder 23, which outputs an encoded core signal based on the core signal The parameter analysis stage 22 implements dynamic range limitation in the time blocks where dynamic range limitation is required. The DRC upper compensator 24 receives the post-processing DRC parameters DRC1 and the pre-processing DRC parameters DRC2. For each time block (in this example, the resolution of generating the value of the post-processing DRC parameters DRC1 is one time block), the DRC upper compensator 24 derives one or more compensated post-processing DRC parameters DRC3 values ​​that make the combined action of the compensated post-processing DRC parameters DRC3 and the pre-processing DRC parameters DRC2 quantitatively equivalent to the DRC quantized by the post-processing DRC parameters DRC1.

[0066] Figure 8 One possible function of the DRC upper compensators 24, 724 in FIGS. 1 and 7 is illustrated in more detail. Each DRC upper compensator 24, 724 is configured to generate compensated post-processing DRC parameters DRC3 based on pre-processing DRC parameters DRC2 and post-processing DRC parameters DRC1. Each bar refers to a time frame of the signal. Each time frame is associated with a value of a pre-processing DRC parameter DRC2 and a value of a post-processing DRC parameter DRC1; Figure 8 and 9 They can be dB with a negative sign FS Unit. As shown in the figure, the solid line shows the post-processing DRC parameter DRC1, while the other two DRC parameter types correspond to different shading patterns. Each value of the compensated post-processing DRC parameter DRC3 is generated based on the combined action of the pre-processing DRC parameter DRC2 and the compensated post-processing DRC parameter DRC3 being quantitatively equivalent to the condition of the decoder-side DRC expressed by the post-processing DRC parameter DRC1. However Figure 8 and 9 Simplified to the extent that the effects of DRC parameters according to certain methods (see the above-cited paper by Carroll and Riedmiller) may not be faithfully illustrated by scalar, linear quantities. Figure 8 and Fig. 9 A relatively complete diagram of the simplified embodiment discussed above is presented, in which the DRC parameters are encoded as scalars.

[0067] Figure 8 The diagram illustrates a case where the post-processing DRC parameters DRC1 are constant within each time frame, similar to the parameters in the DD+ format as explained above. This need not always be the case. For example, a conventional type DRC analyzer may be configured to analyze a fixed number of p 1 time blocks, where p 1can be equal to 4, 6, 8, 16, 24, 32, 64, or some other integer that is significantly smaller than the number of time blocks that typically appear in an entire program (e.g., a song, track, or episode of a radio show). 1 The number of frames between each update of the preprocessing DRC parameters may or may not be matched 2 . Figure 8 Indicates p 1 =6 and p 2 =6. Preferably, the number p 1 Small enough so that the post-processing DRC parameters DRC1 are re-estimated at least once per second of the audio signal X, more preferably, tens or hundreds of times per second of the audio signal X.

[0068] Fig. 9 Shows the dynrng parameters, p 1 = 1. However, each time based on p 2 =6 time blocks, the dynamic range limitation in the parameter analysis stage 22, 722 is performed, so that as a result, a new value of the pre-processing DRC parameter DRC2 is generated for each sixth time block. Each narrowest bar represents a time block. The upper compensator 24, 724 can be configured to determine each value of the compensated post-processing DRC parameter DRC3 in such a way that the decoder-side DRC expressed by the post-processing DRC parameter DRC1 is quantitatively equivalent to the combination of the dynamic range limitation imposed on each time block by the respective parameter analysis stage 22, 722 and the decoder-side DRC quantified by the compensated post-processing DRC parameter DRC3.

[0069] III. Example Embodiment: Decoder Side

[0070] Figure 2a A single-mode decoding system 51 is shown for reconstructing an n-channel audio signal based on a bit stream P. The bit stream P comprises a coded core signal The multi-channel encoding parameters α, the pre-processing DRC parameters DRC2 and the compensated post-processing DRC parameters DRC3 are extracted from the bitstream by a demultiplexer 70 arranged at the input of the decoding system 51. The core signal decoder 71 receives the encoded core signal And based on it, an m-channel core signal Y (1≤m<n) is output. In connection with decoding, the core signal decoder 71 further performs DRC as quantized by the compensated post-processing DRC parameters DRC3. The core signal decoder 71 can be operated to implement the full DRC or a portion thereof represented by the compensated post-processing DRC parameters DRC3; this decision can be manually controlled by the user, or can be based on the detection of the characteristics of the playback device. A DRC processor 74 is arranged downstream of the signal decoder 71, which restores the dynamic range limitation of the core signal by eliminating the dynamic range limitation imposed on the encoder side as quantized by the pre-processing DRC parameters DRC2, as indicated by the reference numeral g↑. The DRC processor 74 outputs the intermediate signal Y C , which is identical to the core signal Y except for the dynamic range, and is input to the parameter synthesis stage 72. The parameter synthesis stage 72 forms the intermediate signal Y C The linear combination in the parameter synthesis stage 72 may further include the n-channel linear combination of the m channels in the intermediate signal Y, where the applied gain may be controlled by the multi-channel coding parameter α, and outputs a reconstructed n-channel audio signal X. C or a decorrelated signal derived from the core signal Y. The decorrelated signal may additionally undergo nonlinear processing, such as artifact attenuation. The decorrelated signal may be generated in a core signal modification unit or decorrelator (not shown). In the simple embodiment outlined in the above paragraph, the elimination of the dynamic range limitation applied to the encoder side in the DRC processor 74 may amount to scaling the signal in a wide spectrum manner by a factor corresponding to the inverse of the parameter DRC2 of the quantization preprocessing range limitation.

[0071] Figure 2b A decoding system 51 is shown, which is more Figure 2a The system in is further developed. The decoding system 51 provides a DRC pre-processor 77 that coordinates the DRC-related behaviors of the core signal decoder 71 and the DRC processor 74, respectively. On the other hand, the core signal decoder 71 can be operated to compress the dynamic range of the signal until the limit defined by the compensated post-processing DRC parameters DRC3, or to compress the dynamic range. On the other hand, the DRC processor 74 can be operated to fully increase the dynamic range until it has a level before encoding, or to partially increase the dynamic range. With such a setting, a given target DRC level can typically be achieved by activating DRC processing in only one of the core signal decoder 71 and the DRC processor 74. If the compensated post-processing DRC parameters DRC3 indicate dynamic range compression, then operating the two units simultaneously may mean a certain degree of mutual antagonism (mutual cancellation), which may have a negative impact on the output quality.

[0072] The DRC preprocessor 77 receives both the preprocessing DRC parameters DRC2 and the compensated post-processing DRC parameters DRC3. The DRC preprocessor 77 further accesses a predefined or variable (e.g., user-defined) DRC target level (expressed by parameter f, e.g., f×DRC1) and an input DRC level corresponding to the signal with the original dynamic range reduced by DRC2. The DRC preprocessor 77 determines, based on a comparison of the two DRC levels, whether to achieve the DRC target level by dynamic range compression in the core signal decoder 71 or dynamic range increase in the DRC processor 74. For this purpose, the DRC preprocessor 77 outputs a dedicated control signal k 71 , k 74 , these signals are provided to each of the core signal decoder 71 and the DRC processor 74.

[0073] The control signals k to be provided from the DRC preprocessor 77 to the core signal decoder 71 and the DRC processor 74, respectively, will now be discussed. 71 , k 74 The first control signal k 71 controls which part of the decoder-side DRC, as quantized by the compensated post-processing DRC signal DRC3, will be applied by the core signal decoder 71. In the simple embodiment discussed previously, the resulting relative gain change is given by the factor Given, the maximum value k 71 = 1 corresponds to maximum dynamic range compression, while the minimum signal value corresponds to no dynamic range compression. 74 Controls the extent to which the DRC processor 74 removes encoder-side dynamic range limitations. In the simple embodiment discussed above, the DRC 74 factors Change the gain, where the minimum value k 74=0 corresponds to no elimination and the maximum value corresponds to complete elimination, restoring the signal to 100% of its original dynamic range. The DRC preprocessor 77 can be configured to perform the target level differently depending on whether the target level corresponds to a dynamic range increase or a dynamic range compression compared to the input DRC level, and the input DRC level is understood as the original dynamic range reduced (or compressed) by the amount DRC2. In addition, the DRC preprocessor 77 can be configured to interpolate between the minimum and maximum values ​​to achieve a target DRC level corresponding to a portion of the compensated post-processing DRC parameter DRC3 or the pre-processing DRC parameter DRC2. Interpolation can also be used to achieve a target DRC level expressed by a portion of the uncompensated post-processing DRC parameter DRC1. Each of the parts of DRC2 and DRC3 can be calculated based on the parameters f and DRC1, as follows. How the DRC preprocessor 77 can respond to a specific target DRC level expressed by the part f of the post-processing DRC parameter DRC1 will now be described in the context of the simple embodiment. In view of the discussion in the previous paragraph, the DRC preprocessor 77 assigns the value in [0, 1] to the parameter k in the following formula 71 , k 74

[0074] f×DRC1=k 74 ×DRC2+k 71 ×DRC3,

[0075] Here it is predefined that f∈[0,1], DRC2≥0 and DRC1=DRC2+DRC3 (logarithmic scale). From the above, it can be concluded that DRC1 and DRC2 can be positive or negative. As pointed out above, if the action of the core signal decoder 71 is range-suppressed (DRC3=y>0), then it is usually desirable to avoid operating the core signal decoder 71 and the DRC processor 74 simultaneously. This is equivalent to taking k 71 =0 or k 74 =0 to solve the above equation.

[0076] A further possible representation is a loudness dependent gain factor, possibly on a logarithmic scale. For example, a pair of gain factors may be transmitted together with the dialog level. The first gain factor will be applied in time periods that are louder than the dialog level, while the second gain factor will be applied in quieter time periods. Because the first and second gain factors can be assigned independent values, this allows for dynamic range compression and expansion.

[0077] Figure 2c A dual mode decoding system 51 is shown, which is configured to receive a bit stream P containing an audio signal that is parametrically encoded or discretely encoded. In the parametric mode of the decoding system 51, the upper part downstream of the parametric mode demultiplexer 70 is active, similar to Figure 2aThe functionality of the system shown in FIG. 1 provides an n-channel audio signal X. In discrete mode, the bit stream P is provided to a discrete mode demultiplexer 60 which extracts the encoded n-channel signal and one or more post-processing DRC parameters DRC1. Selectors 52, 82 (characterizing any hardware or software implemented signal selection means) at the input and output sides of the decoding system 51 are operated according to the present mode; these selectors may be operated in tandem so that both are always in their upper position or their lower position. In discrete mode, the encoded n-channel signal is processed by the decoder 61, which is operable to perform DRC according to the post-processing DRC parameters DRC1. The consistency of the dialogue level between the discrete and parametric coding modes is ensured by the fact that the decoding system 51 is configured to use the compensated post-processing DRC parameters DRC3 in the discrete mode instead of the (uncompensated) post-processing DRC parameters DRC1. The relationship between the parameters DRC1 and DRC3 has been discussed previously.

[0078] Figure 4 is a generalized block diagram of a simplified decoding system 451 that lacks the ability to perform post-processing DRC. However, Figure 4 The decoding system 451 in is operable to remove the dynamic range limitation applied at the encoder side as quantified by the pre-processing DRC parameters DRC2, more precisely, the parameter synthesis stage 472 is configured to completely or partially remove this dynamic range limitation, as represented by the symbol g↑.

[0079] Fig.11 and Fig.12 Show Figure 4 Two possible implementations of parameter synthesis stage 472 appearing in . Similar implementations are in Fig.13 The type of coding system shown in is also useful, as will be discussed further below. In a first possible implementation, such as Fig.11 As shown in FIG. 1 , the pre-conditioner 1174 performs dynamic range limitation elimination on the m-channel core signal Y, thereby obtaining the m-channel intermediate signal Y C The intermediate signal Y C It is then processed by the parameter synthesis processor 1175, which forms the intermediate signal Y C A linear combination of the channels in the multi-channel encoding (possibly additional decorrelated signals), wherein the gain applied within the linear combination can be controlled by a multi-channel encoding parameter α, which is also supplied to the parameter synthesis processor 1175.

[0080] Fig.12The second implementation shown in 1 represents an alternative implementation. In the second implementation, parameter synthesis is located as a processing step before the dynamic range limitation removal. This fact itself shows that the parameter synthesis processor 1275 is arranged upstream of the post-regulator 1276. The post-regulator 1276 is responsible for removing the encoder-side dynamic range limitation as quantified by the pre-processing DRC parameters DRC2. Therefore, the signal provided from the parameter synthesis processor 1275 to the post-regulator 1276 is the same as the dynamic range limited n-channel signal X C Related.

[0081] Fig.13 A decoding system 1351 according to a further example embodiment is shown, wherein the decoder-side DRC is effected by a DRC processor 1383 arranged downstream of both the discrete mode portion and the parametric mode portion of the system 1351. As already mentioned with reference Figure 2a , 2b , 2c and 4, the present decoding system 1351 can also remove any dynamic range limitation already applied on the encoder side, as quantized by the pre-processing DRC parameters DRC2. The DRC processor 1383 is intended to function in both discrete coding mode (where the (uncompensated) post-processing DRC parameters DRC1 are included in the received bitstream P) and parametric coding mode (where the compensated post-processing DRC parameters DRC3 are received). Note that the decoding system 1351 and Figure 2b The system 51 shown in FIG. 5 differs in that the post-processing DRC is implemented on the n-channel output signal, i.e., downstream of the parameter synthesis stage 1372. Figure 2b In the system 51 , the corresponding operations occur in the core signal decoder 71 .

[0082] The DRC processor 1383 receives a target DRC level f from a user, a memory, hardware diagnostics performed on a playback device, or some other external or internal data source. For example, the target DRC level f may represent a portion of the full post-processing DRC that the user wishes the decoding system 1351 to implement. As will be seen, the architecture of the decoding system 1351 has the following advantages: only the DRC processor 1383 is required to consider the value of the parameter f; this facilitates the implementation of a partial DRC. For this purpose, a DRC down compensator 1373 is provided that is configured to convert the compensated post-processing DRC parameters DRC3 into a scale of the (non-compensated) post-processing DRC parameters DRC1. In practice, the n-channel audio signal X output from the parameter synthesis stage 1372 will have undergone the elimination of the encoder-side dynamic range limitation; therefore, applying DRC based on the compensated post-processing DRC parameters DRC3 will suffer very little range compression. To prevent this, the DRC lower compensator 1373 restores the compensated post-processing DRC parameters DRC3 based on the pre-processing DRC parameters DRC2, so that the restored post-processing DRC parameters are obtained and supplied to the DRC processor 1383 in the parametric coding mode. As already pointed out, the decoder-side DRC expressed by the restored DRC parameters is quantitatively equivalent to the combination of the encoder-side dynamic range limitation already applied on the core signal and the decoder-side DRC expressed by the compensated post-processing DRC parameters DRC3, as Figure 8 and 9 shown.

[0083] In an alternative embodiment, the decoding system 1351 may be implemented without the discrete mode demultiplexer 1360 and the decoder 1361 . Fig.13 The DRC parameter selectors 1381, 1382 in are then replaced by a DRC processor 1383 and connections between each DRC lower compensator 1373 (from which the recovered post-processing DRC parameters are received) and the parameter synthesis stage 1372 (which provides the n-channel audio signal X). This alternative embodiment is simplified because it operates in a single, parametric encoding mode. Further, it may be simpler to implement because a conventional type DRC processor 1383 (which does not have to be configured to process compensated post-processing DRC parameters) can be used.

[0084] Figure 6 A conventional decoding system 651 is shown for decoding a received bit stream P into an m-channel audio signal. In the parametric coding mode, the upper part located downstream of the parametric mode demultiplexer 670 operates to output the encoded m-channel core signal and compensated post-processing DRC parameters DRC3. Encoding m-channel core signal is decoded by the first decoder 671 into an m-channel core signal Y. In the discrete coding mode, the audio signal to be output is generated by the lower part located downstream of the discrete mode demultiplexer 660, which extracts the encoded n-channel signal from the bit stream P. and (uncompensated) post-processing DRC parameters DRC1. Encoded n-channel signal Decoded by the second decoder 661, it is then downmixed in the downmix stage 662 into an m-channel signal Y. Both this signal Y and the signal Y mentioned in relation to the parameter mode are supplied to a DRC processor 683 common to both modes. In the parameter mode, the quantization characteristics of the DRC processor 683 are controlled by the compensated post-processing DRC parameters DRC3, while in the discrete mode, these characteristics are controlled by the (uncompensated) post-processing DRC parameters DRC1. In this way, a consistent dialogue level of the m-channel audio signal output from the decoding system 651 can be maintained. It should be noted that the present decoding system 651 can be of conventional type, since it can treat the compensated and uncompensated post-processing DRC parameters in a similar (if not identical) manner.

[0085] IV. Reference numerals in the drawings

[0086]

[0087]

[0088]

[0089] V. Equivalence, extension, substitution and others

[0090] After those skilled in the art learn the above description, further embodiments of the present invention will become apparent. Although the present description and the accompanying drawings disclose embodiments and examples, the present invention is not limited to these specific examples. Many modifications and variations can be made without departing from the scope of the present invention, the scope of the present invention is defined by the appended claims. Any reference numerals appearing in the claims should not be construed as limiting their scope.

[0091] The systems and methods disclosed above in the text can be implemented as software, hardware, or a combination thereof. In hardware implementation, the task division between the functional units mentioned in the above description does not necessarily correspond to the division of physical units; on the contrary, a physical element can have multiple functions, and a task can be completed by several physical elements in collaboration. Some components or all components can be implemented as software executed by a digital signal processor or a microprocessor, or as hardware or an application-specific integrated circuit. Such software can be distributed on a computer-readable medium, which may include a computer storage medium (or non-transient medium) and a communication medium (or transient medium). As is well known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for the storage of information such as computer-readable instructions, data structures, program models, or other data. Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other storage technology, CDROM, digital laser video disk (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices or any other medium that can be used to store the required information and can be accessed by a computer. Further, those of skill are familiar with the fact that communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media.

Claims

1. A method for adjusting the dynamic range of an audio signal, the method comprising: receiving a bitstream comprising an encoded audio signal and encoder-generated dynamic range control (DRC) metadata, wherein the encoder-generated DRC metadata comprises a plurality of DRC gain sets, the plurality of DRC gain sets comprising a first DRC gain set representing a first portion of a total DRC gain to be applied to the audio signal to adjust a dynamic range of the audio signal, and a second DRC gain set representing a second portion of the total DRC gain to be applied to the audio signal to adjust the dynamic range of the audio signal; decoding the encoded audio signal to obtain an audio signal; as well as The dynamic range of the audio signal is adjusted by applying a portion of the first set of DRC gains and the second set of DRC gains to the audio signal to apply a portion of the total DRC gain to be applied to the audio signal, wherein the portion of the total DRC gain to be applied to the audio signal is represented by a target DRC level f.

2. An audio processing device adapted to perform the method according to claim 1.

3. A non-transitory computer-readable storage medium storing computer code instructions, which, when executed by one or more processors, cause the one or more processors to perform the method according to claim 1.

4. A device for adjusting the dynamic range of an audio signal, comprising: one or more processors; A non-transitory computer readable storage medium storing computer code instructions, which, when executed by the one or more processors, cause the device to perform the method according to claim 1.

5. An apparatus for adjusting the dynamic range of an audio signal, comprising means for performing the method according to claim 1.

6. A computer program product comprising instructions which, when executed by a computer, cause the computer to perform the method according to claim 1.

7. A coding system configured to encode an n-channel audio signal divided into time blocks into a bit stream, the coding system comprising: a parameter analysis stage for receiving an n-channel signal and outputting an m-channel core signal and multi-channel coding parameters based on the n-channel signal and in a parameter coding mode of the coding system, wherein 1≤m<n, wherein n=6 and m=2; a core signal encoder, configured to receive the core signal and output an encoded core signal based on the core signal; wherein the parameter analysis stage is further configured to perform adaptive dynamic range limiting on a time period basis and output pre-processed dynamic range control (DRC) parameters quantifying the applied dynamic range limiting; and The system further comprises a parameter mode multiplexer operable to form a bitstream to be output from the system in a parametric encoding mode of the system, the bitstream comprising at least the encoded core signal, the multi-channel encoding parameters and the pre-processing DRC parameters.

8. A method for encoding an n-channel audio signal divided into time blocks, the method comprising: Generate m-channel core signals and multi-channel encoding parameters, where 1≤m<n; wherein said generating comprises performing dynamic range limiting on a time period basis and generating pre-processing dynamic range control (DRC) parameters quantifying the applied dynamic range limiting; and The method further comprises sending the pre-processing DRC parameters together with a core signal and multi-channel encoding parameters.

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