Display apparatus and control method thereof

By introducing light receiving elements and sensing circuits into the display device, switching of three operating modes is achieved, and the problem of low charging efficiency in the prior art is solved, and the effect of efficiently charging using external light is achieved.

CN119516938APending Publication Date: 2025-02-25SAMSUNG DISPLAY CO LTD
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Patent Information

Application Number
CN202411023321.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-08-22
Filing Date
2024-07-29
Publication Date
2025-02-25

AI Technical Summary

Technical Problem

Existing display devices are inefficient in charging mode and are difficult to effectively use external light for charging.

Method used

By introducing a light receiving element and sensing circuit into the display device, and switching using three modes (display image mode, fingerprint sensing mode and charging mode) to achieve full utilization of external light by the photoelectric sensor in the charging mode.

Benefits of technology

The efficiency of the display device in the charging mode is improved, and the charging can be effectively utilized with external light, extending the use time of the device.

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Abstract

The invention provides a display apparatus and a control method thereof. The display apparatus includes: a substrate; a pixel disposed in the display area of the substrate and including a light emitting diode configured to emit light in a first mode; and a photosensor disposed in the display area of the substrate and configured to receive light reflected from an external object in a second mode and receive external light in a third mode. The first mode is triggered by a signal for displaying an image, the second mode is triggered by a reflection from an external object, and the third mode is triggered by the absence of a signal for displaying an image and the absence of a reflection from an external object.
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Description

[0001] This application is based on and claims the benefit of priority from Korean Patent Application No. 10-2023-0110129 filed on August 22, 2023 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference. Technical Field

[0002] One or more embodiments relate to a display apparatus and a control method thereof. Background Art

[0003] The display device includes pixels, and each pixel may include a light emitting diode and a transistor driving the light emitting diode. In addition, the display device includes a photo sensor, and each photo sensor may include a light receiving element and a transistor driving the light receiving element. Summary of the invention

[0004] One or more embodiments include a method of charging a display device by using a light receiving element.

[0005] The effects of the embodiments are not limited to the foregoing description, and those skilled in the art may clearly understand other effects through the embodiments described hereinafter.

[0006] Additional aspects will be set forth in part in the description which follows and will be apparent from the description, or may be learned by practice of the disclosed presented embodiments.

[0007] According to one or more embodiments, a display device includes: a substrate; a pixel arranged in a display area of ​​the substrate and including a light emitting diode configured to emit light in a first mode; and a photoelectric sensor arranged in the display area of ​​the substrate and including a light receiving element configured to receive light reflected from an external object in a second mode and receive external light in a third mode. The first mode is triggered by a signal for displaying an image, the second mode is triggered by reflection from an external object, and the third mode is triggered by the absence of a signal for displaying an image and the absence of reflection from an external object.

[0008] The display device may further include a readout circuit disposed in a peripheral region of the substrate and configured to process an electric signal corresponding to an amount of light received by the light receiving element in the second mode.

[0009] The display device may further include: a charge controller arranged in a peripheral area of ​​the substrate and configured to store and control an electrical signal corresponding to an amount of external light received by the light receiving element in the third mode; and a battery configured to store an output voltage of the charge controller.

[0010] The light reflected from the external object may include light emitted from the light emitting diode in the second mode and then reflected from the external object, wherein the light emitted from the light emitting diode may include green light.

[0011] The photosensor may include a sensing circuit connected to a light receiving element, the light receiving element may include a first electrode, a second electrode and an intermediate layer between the first electrode and the second electrode, and the sensing circuit may include: a first transistor, including a gate electrode connected to the first electrode of the light receiving element; a second transistor, connected between the first transistor and a readout line connected to a readout circuit; a reset transistor, connected between a reset voltage line and the first electrode of the light receiving element; and a third transistor, connected between the first electrode of the light receiving element and the readout line.

[0012] In the second mode, the reset transistor can be turned on in response to the first reset signal, the second transistor can be turned on in response to the first control signal, and the photocurrent output from the first transistor can be transmitted to the readout line. In the third mode, the third transistor can be turned on in response to the second reset signal, and the photocurrent corresponding to the voltage between the first electrode and the second electrode of the light receiving element can be transmitted to the readout line.

[0013] When the light emitting diode included in the pixel does not emit light and the photo sensor does not receive light reflected from an external object, the photo sensor may operate in a third mode.

[0014] The light receiving element may include an organic photodiode (OPD).

[0015] According to one or more embodiments, a display device includes: a display panel including a plurality of pixels and a plurality of photosensors; a driving circuit configured to drive the plurality of pixels and the plurality of photosensors; a controller configured to control the display panel to display an image according to light emission from the plurality of pixels in a first mode, configured to control the plurality of photosensors to sense light reflected from a fingerprint in a second mode, and configured to control external light sensed by the plurality of photosensors to charge a battery in a third mode; a readout circuit configured to receive a plurality of light sensing signals of the plurality of photosensors in the second mode and perform signal processing to obtain fingerprint information; and a battery configured to store a voltage corresponding to the plurality of light sensing signals of the plurality of photosensors in a third mode.

[0016] The display device may further include a charge controller configured to control voltages corresponding to the plurality of light sensing signals of the plurality of photosensors in the third mode.

[0017] The controller may be configured to control the display device to operate in the third mode in the absence of a signal for operating in the first mode or the second mode.

[0018] The plurality of photosensors and the charging controller may be connected via a switching transistor that is turned on in response to a control signal from the controller.

[0019] According to one or more embodiments, there is provided a method for controlling the operation of a display device including a plurality of pixels and a plurality of photosensors, the method comprising the following steps: in a first mode, controlling the display device to display an image according to light emission from a plurality of pixels; in a second mode, controlling the display device to sense light reflected from an external object by using a plurality of photosensors, and processing an electrical signal corresponding to the amount of light; and in a third mode, controlling the display device to sense external light by using a plurality of photosensors and charging a voltage corresponding to the amount of external light to charge a battery.

[0020] The controlling step in the third mode may include controlling the display device to operate in the third mode in the absence of a signal to operate in the first mode or the second mode.

[0021] In the second mode, light emitted from a plurality of first pixels among a plurality of pixels, which are arranged adjacent to the external object and emit light of a specific color, may be reflected from an external object, and the light emitted from the plurality of first pixels may include green light.

[0022] Each of the multiple photosensors may include a light receiving element and a sensing circuit connected to the light receiving element, the light receiving element may include a first electrode, a second electrode and an intermediate layer between the first electrode and the second electrode, and the sensing circuit may include: a first transistor including a gate electrode connected to the first electrode of the light receiving element; a second transistor connected between the first transistor and a readout line connected to the readout circuit; a reset transistor connected between a reset voltage line and the first electrode of the light receiving element; and a third transistor connected between the first electrode of the light receiving element and the readout line.

[0023] In the second mode, the reset transistor may be turned on in response to the first reset signal, the second transistor may be turned on in response to the first control signal, and the photocurrent output by the first transistor may be transferred to the readout line.

[0024] In the third mode, the third transistor may be turned on in response to the second reset signal, and a photocurrent corresponding to a voltage between the first electrode and the second electrode of the light receiving element may be transmitted to the readout line.

[0025] The light receiving element may include an OPD.

[0026] In addition, a computer program stored on a computer-readable recording medium can also be provided to achieve the disclosure.

[0027] Furthermore, a computer-readable recording medium recording a computer program for executing a computer program for realizing the disclosed method can also be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The above and other aspects, features and advantages of certain disclosed embodiments will become more apparent through the following description in conjunction with the accompanying drawings, in which:

[0029] Figure 1 Schematically shows a display device according to an embodiment;

[0030] Figure 2 schematically illustrates components of a display device according to an embodiment;

[0031] Figure 3 is a detailed circuit diagram of a pixel and a photosensor according to an embodiment;

[0032] Figure 4 shows signals in the first to third modes according to an embodiment;

[0033] Figure 5 is a schematic cross-sectional view illustrating a principle of detecting a fingerprint when the display device operates in the second mode according to an embodiment;

[0034] Figure 6 schematically illustrates components of a display device according to an embodiment;

[0035] Figure 7 is a flowchart of operations in the first mode to the third mode according to an embodiment;

[0036] Figure 8 is a diagram showing an arrangement structure of pixels and photosensors according to an embodiment;

[0037] Fig. 9 is a schematic cross-sectional view of a portion of a display device according to an embodiment; and

[0038] FIG. 10A to FIG. 10C is a diagram for explaining that a photosensor according to an embodiment functions as a battery even when no voltage is applied. DETAILED DESCRIPTION

[0039] Now will be referred to in detail embodiment, the example of embodiment is shown in the accompanying drawings, and the same reference numerals in the accompanying drawings always represent the same element. In this regard, the present embodiment can have different forms, and should not be construed as being limited to the description set forth herein. Therefore, the embodiment is described below only by reference to the accompanying drawings to explain the aspects of this specification. As used herein, the term "and / or" includes any combination and all combinations of one or more related listed items. Throughout the disclosure, the statement of "at least one (kind / person) of a, b and c" indicates only a, only b, only c, both a and b, both a and c, both b and c, all of a, b and c or its variant.

[0040] Since the disclosure allows for various changes and numerous embodiments, specific embodiments will be shown in the drawings and described in detail in the written description. Reference is made to the drawings used to illustrate the embodiments in order to fully understand the disclosure, its advantages, and the objectives achieved by implementing the disclosure. However, the disclosure can be implemented in many different forms and should not be construed as limited to the embodiments set forth herein.

[0041] Throughout the specification, the same reference numerals represent the same elements. All components that do not include the embodiment are disclosed, and the description of the general content in the disclosed field or the repeated description in the embodiment are omitted. The terms "unit", "module", "component" and "block" used herein can be implemented as software or hardware, and according to the embodiment, multiple "units", "modules", "components" and "blocks" can be implemented as a component, or a "unit", "module", "component" and "block" include various components.

[0042] Throughout the specification, when a part is "connected to" another part, the connection includes a direct connection and an indirect connection, and the indirect connection includes a connection through a wireless communication network.

[0043] It will also be understood that the terms “comprises” and / or “comprising” used herein specify the presence of stated features or components, but do not preclude the presence or addition of one or more other features or components.

[0044] It will be understood that the terms "first", "second", etc. may be used herein to distinguish one component from another component, but these components should not be limited by these terms. These terms are only used to distinguish one component from another component.

[0045] As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0046] In each operation, reference numerals are used for convenience of explanation and do not describe the order of the operations, and unless specifically stated otherwise, the operations may be performed in an order different from the described order.

[0047] Hereinafter, one or more embodiments disclosed will be described in detail with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent the same elements, and their repeated descriptions are omitted.

[0048] Figure 1 A display device 1 according to an embodiment is schematically shown.

[0049] Reference Figure 1 , the display device 1 may include a display area DA displaying an image and a peripheral area PA outside the display area DA. The display area DA may be entirely surrounded by the peripheral area PA. The display device 1 may include a display panel, and various components forming the display panel may be disposed over a substrate 100. In the substrate 100, a display area DA and a peripheral area PA surrounding the display area DA may be defined.

[0050] A plurality of pixels PX may be arranged in the display area DA of the substrate 100. In the display area DA, a plurality of gate lines GL, a plurality of data lines DL, and pixels PX connected thereto may be arranged. Figure 1 An example is shown in which the pixel PX is connected to one gate line GL, but one or more embodiments are not limited thereto. The pixel PX may be connected to one or more gate lines GL.

[0051] A plurality of photosensors PS may be further arranged in the display area DA of the substrate 100. The arrangement and structure of the photosensors PS are described in detail below.

[0052] The pixel circuit driving the pixel PX and the sensing circuit driving the photo sensor PS may be electrically connected to external circuits arranged in the peripheral area PA, respectively. For example, in the peripheral area PA, a first gate driving circuit GDRV1, a second gate driving circuit GDRV2, a pad (or referred to as a pad) portion PAD, a driving voltage supply line 11, a common voltage supply line 13, etc. may be arranged.

[0053] In an embodiment, the peripheral area PA may be a non-display area where no pixel PX is arranged. In another embodiment, the pixel PX may overlap an external circuit at at least one corner of the peripheral area PA. Therefore, the ineffective space may be reduced and the display area DA may be expanded.

[0054] The first gate drive circuit GDRV1 may be connected to a plurality of gate lines GL, and gate signals may be applied to pixel circuits driving the pixels PX respectively through the gate lines GL. The second gate drive circuit GDRV2 may be opposite to the first gate drive circuit GDRV1 relative to the display area DA, and may be substantially parallel to the first gate drive circuit GDRV1. In an embodiment, the pixel circuits of the pixels PX in the display area DA may be electrically connected to the first gate drive circuit GDRV1 and the second gate drive circuit GDRV2. In another embodiment, some of the pixel circuits of the pixels PX in the display area DA may be electrically connected to the first gate drive circuit GDRV1, and other pixel circuits may be electrically connected to the second gate drive circuit GDRV2. The second gate drive circuit GDRV2 may be omitted.

[0055] The pad portion PAD may be disposed over one side of the substrate 100. The pad portion PAD may be exposed without being covered by the insulating layer, and thus connected to the display circuit board 30. The display driver 32 may be disposed in the display circuit board 30.

[0056] The display driver 32 may include a data driving circuit, and the data driving circuit may be connected to the data line DL and configured to generate a data signal, and the generated data signal may be transmitted to the pixel circuit of the pixel PX through the fan-out line FW and the data line DL connected to the fan-out line FW.

[0057] The display driver 32 may include a power supply circuit, and the power supply circuit may supply a driving voltage to the driving voltage supply line 11 and a common voltage to the common voltage supply line 13. The driving voltage may be applied to the pixel circuit of the pixel PX through the first driving voltage line VDDL connected to the driving voltage supply line 11, and the common voltage may be applied to the counter electrode of the display element through the common voltage supply line 13.

[0058] The display driver 32 may include a controller, and the controller may generate control signals transmitted to the first gate driving circuit GDRV1 , the second gate driving circuit GDRV2 , the data driving circuit, and the power supply circuit.

[0059] In the display circuit board 30 , a readout circuit electrically connected to the photosensor PS, a charge controller, and the like may be further arranged.

[0060] The driving voltage supply line 11 may be connected to the pad portion PAD and may extend at the lower side of the display area DA in the x direction. The common voltage supply line 13 may be connected to the pad portion PAD and have a ring shape having one open side so that the common voltage supply line 13 may partially surround the display area DA.

[0061] In the process of forming the pixel circuit in the display area DA of the substrate 100, part or all of the first gate driving circuit GDRV1 and the second gate driving circuit GDRV2 may be directly formed in the peripheral area PA of the substrate 100. The display driver 32 may be formed as an integrated circuit chip or in the form of an integrated circuit chip, and arranged on a display circuit board 30 electrically connected to a pad portion PAD, which is arranged on one side of the substrate 100. The display circuit board 30 may be a printed circuit board (PCB) and / or a flexible printed circuit board (FPCB). In another embodiment, the display driver 32 may be directly disposed on the substrate 100 in a chip on glass (COG) manner or a chip on plastic (COP) manner.

[0062] In an embodiment, a plurality of transistors included in the pixel circuit in the display area DA and a plurality of transistors included in the external circuit in the peripheral area PA (for example, a plurality of transistors included in the first gate drive circuit GDRV1 and the second gate drive circuit GDRV2) may all be N-type oxide thin film transistors. The transistors included in the external circuit in the peripheral area PA may be formed simultaneously with the transistors included in the pixel circuit in the display area DA by the same process. In another embodiment, the transistors included in the pixel circuit in the display area DA may all be N-type oxide thin film transistors, and the transistors included in the external circuit in the peripheral area PA may all be P-type silicon thin film transistors.

[0063] The semiconductor layer of the oxide thin film transistor may include an oxide. The oxide semiconductor may include a Zn oxide-based material, and includes Zn oxide, In-Zn oxide, Ga-In-Zn oxide, and the like. In some embodiments, the oxide semiconductor may be an In-Ga-Zn-O (IGZO) semiconductor including metals such as In and Ga in ZnO. In an embodiment, the oxide thin film transistor may be a low temperature polycrystalline oxide (LTPO) thin film transistor. The silicon thin film transistor may be a low temperature polycrystalline silicon (LTPS) thin film transistor in which the semiconductor layer includes amorphous silicon or polycrystalline silicon, and the like.

[0064] Figure 2 Components of a display device 1 according to an embodiment are schematically shown.

[0065] Reference Figure 2 The display device 1 may include a plurality of pixels PX and a plurality of photosensors PS arranged in a display area DA, and a plurality of pixels PX and a plurality of photosensors PS arranged in a peripheral area ( Figure 1The gate driving circuit GDRV, the data driving circuit DDRV, the readout circuit ROC, the charge controller CC, the controller CTR and the battery BT in the PA of the display device. Those skilled in the art will understand how to implement the charge controller, the controller and the battery as commonly used elements in the field of display devices.

[0066] In the display area DA, pixels PX and signal lines configured to apply electrical signals to the pixels PX may be arranged. In addition, in the display area DA, photosensors PS and signal lines configured to apply electrical signals to the photosensors PS may be arranged. The display area DA may be a display area that displays an image and detects a fingerprint.

[0067] The pixels PX and the photosensors PS may be repeatedly arranged in the x direction (row direction) and the y direction (column direction). The pixels PX and the photosensors PS may be arranged in various patterns (such as stripes, Mosaic and diamond) are arranged to generate images. Figure 8 Arrangement of the pixels PX and the photosensors PS according to the embodiment is described.

[0068] Each pixel PX may be connected to a data line DL and a gate line GL, and each photo sensor PS may be connected to a readout line RL and a control line CL. In an embodiment, the control line CL may be the gate line GL.

[0069] For convenience, Figure 2 It is shown that one gate line GL is connected to the pixel PX and one control line CL is connected to the photosensor PS, but each pixel PX can be connected to multiple gate lines and each photosensor PS can be connected to multiple control lines CL depending on the number of transistors constituting the pixel circuit and the sensing circuit.

[0070] The gate driving circuit GDRV may be connected to the gate line GL and may be configured to generate a gate signal GS in response to a gate control signal GCS transmitted from the controller CTR and sequentially provide the gate signal GS to the gate line GL. The gate driving circuit GDRV may be connected to the control line CL and may be configured to generate a control signal CS in response to a gate control signal GCS transmitted from the controller CTR and provide the control signal CS to the control line CL.

[0071] The data driving circuit DDRV may be connected to the data line DL and configured to provide a data signal DS to the data line DL in response to a data control signal DCS transmitted from the controller CTR. The data driving circuit DDRV may receive image data DAT2 and a gamma voltage GV corresponding to a corresponding gray level from the controller CTR and generate a data signal DS corresponding to the gray level.

[0072] The readout circuit ROC may be connected to a plurality of readout lines RL arranged in the display area DA, process light sensing signals received from the photosensors PS in response to readout control signals RCS, and provide the processed signals ROS to the controller CTR.

[0073] The charge controller CC may be connected to the readout line RL disposed in the display area DA, and receive the photocurrent Ip flowing through the readout line RL in the third mode (charging mode) of the display device 1 to supply a voltage to the battery BT.

[0074] The controller CTR may convert input image data DAT1 input from the outside (e.g., a graphics processing unit) to generate image data DAT2. For example, the controller CTR may convert the input image data DAT1 in RGB format into image data DAT2 in a format matching the arrangement of the pixels PX in the display area DA. The controller CTR may include a storage medium in which a gamma voltage corresponding to a grayscale and correction data are recorded.

[0075] The controller CTR may generate biometric information through a signal output from the readout circuit ROC, and may output a signal for operation of the display device 1 , the signal corresponding to the biometric information.

[0076] According to an embodiment, when it is determined that the display device 1 does not operate in the first mode (a mode in which an image is displayed) because the input image data DAT1 is not input from the outside, and when it is determined that the display device 1 does not operate in the second mode (a mode in which a fingerprint is detected) because a touch signal from an external object (e.g., a finger) is not sensed, the controller CTR may control the operation of the photosensor PS by default to make the display device 1 operate in the third mode (charging mode). The determination of not operating in the first mode and the determination of not operating in the second mode may be performed sequentially or simultaneously. Therefore, the photosensor PS may transmit the photocurrent Ip to the charging controller CC through the readout line RL, and the charging controller CC may control the photocurrent Ip and thus supply voltage to the battery BT.

[0077] The controller CTR may generate a gate control signal GCS, a data control signal DCS, and a readout control signal RCS based on a signal input from the outside. The controller CTR may supply the gate control signal GCS to the gate drive circuit GDRV, the data control signal DCS to the data drive circuit DDRV, and the readout control signal RCS to the readout circuit ROC.

[0078] Figure 2The data driving circuit DDRV, the readout circuit ROC, and the controller CTR are shown as being independent of each other, but one or more embodiments are not limited thereto. For example, the data driving circuit DDRV, the readout circuit ROC, and the controller CTR may be implemented as one IC (eg, a driver integrated circuit).

[0079] The display device 1 may be a display device such as an organic light emitting display device, an inorganic light emitting display device (or an inorganic EL display device), or a quantum dot light emitting display device.

[0080] The display device 1 can be used as a display screen for various products, for example, portable electronic devices such as mobile phones, smart phones, tablet personal computers (PCs), mobile communication terminals, personal digital assistants, e-book terminals, portable multimedia players (PMPs), navigation devices or ultra-mobile PCs (UMPCs), televisions (TVs), laptop computers, monitors, billboards, and Internet of Things (IoT) devices. In addition, in an embodiment, the display device 1 can be used in a wearable device such as a smart watch, a watch phone, a glasses display, or a head-mounted display (HMD). In addition, in an embodiment, the display device 1 can be used as a display in an instrument cluster of a vehicle, a center information display (CID) mounted on a center dashboard or dashboard of a vehicle, an interior mirror display replacing a side mirror of a vehicle, or a car headrest monitor provided for rear seat entertainment.

[0081] Figure 3 is a detailed circuit diagram of a pixel PX and a photosensor PS according to an embodiment.

[0082] The pixel PX may include a pixel circuit and a light emitting diode ED as a display element connected to the pixel circuit. The pixel circuit may include a plurality of transistors and at least one capacitor. The pixel circuit may be connected to a first gate line GL1 to which a first gate signal is applied, a second gate line GL2 to which a second gate signal is applied, a third gate line GL3 to which a third gate signal is applied, a fourth gate line GL4 to which a fourth gate signal is applied, a fifth gate line GL5 to which a fifth gate signal is applied, and a data line DL.

[0083] In addition, each pixel PX may be connected to a first driving voltage line VDDL applied with a first driving voltage, a second driving voltage line VSSL applied with a second driving voltage, a first initialization voltage line applied with a first initialization voltage Vint1, and a second initialization voltage line applied with a second initialization voltage Vint2.

[0084] Since emission of the pixel PX is controlled based on the fifth gate signal, the fifth gate signal may be referred to as an emission control signal, and the fifth gate line GL5 may be referred to as an emission control line.

[0085] The photosensor PS may include a sensing circuit and a photodiode (or light receiving element) PD as a light sensing element connected to the sensing circuit. The sensing circuit may include a plurality of transistors. The sensing circuit may be connected to a readout line RL and a plurality of control lines ( Figure 2 The control line CL may be connected to the first gate line GL1, the reset line RSTL, and the sixth gate line BCL. In addition, the sensing circuit may be connected to a second driving voltage line VSSL to which a second driving voltage is applied, a reset voltage line to which a reset voltage VRST is applied, and a second initialization voltage line to which a second initialization voltage Vint2 is applied.

[0086] Each pixel PX may include a transistor, a light emitting diode ED, and at least one capacitor CST. The transistor may include first to seventh transistors T1 to T7. The first transistor T1 may be a driving transistor, and the second to seventh transistors T2 to T7 may each be a switching transistor used as a switching element that is turned on or off according to a gate signal applied to a gate electrode.

[0087] The first transistor T1 may include a gate electrode, a first electrode, and a second electrode. The first transistor T1 may control a source-drain current Isd (hereinafter, referred to as a “driving current”) according to a switching operation of the second transistor T2.

[0088] The gate electrode of the first transistor T1 can be connected to the gate electrode of the second transistor T2, the first electrode of the third transistor T3 and the electrode of the capacitor CST, the first electrode can be connected to the second electrode of the second transistor T2 and the second electrode of the fifth transistor T5, and the second electrode can be connected to the second electrode of the third transistor T3 and the first electrode of the sixth transistor T6.

[0089] The second transistor T2 may be turned on according to the first gate signal of the first gate line GL1 and connect the first electrode of the first transistor T1 to the data line DL. The gate electrode of the second transistor T2 may be connected to the first gate line GL1, the first electrode may be connected to the data line DL, and the second electrode may be connected to the first electrode of the first transistor T1.

[0090] The third transistor T3 may be turned on according to the fourth gate signal of the fourth gate line GL4 and connect the gate electrode of the first transistor T1 to the second electrode of the first transistor T1. That is, when the third transistor T3 is turned on, because the gate electrode of the first transistor T1 is connected to the second electrode of the first transistor T1, the first transistor T1 is driven as a diode, so the threshold voltage of the first transistor T1 may be compensated. The gate electrode of the third transistor T3 may be connected to the fourth gate line GL4, the second electrode may be connected to the second electrode of the first transistor T1, and the first electrode may be connected to the gate electrode of the first transistor T1.

[0091] The fourth transistor T4 may be turned on according to the third gate signal of the third gate line GL3 and connect the gate electrode of the first transistor T1 to the second initialization voltage line. In this case, the gate electrode of the first transistor T1 may be initialized to the second initialization voltage Vint2 of the second initialization voltage line. The gate electrode of the fourth transistor T4 may be connected to the third gate line GL3, the first electrode may be connected to the second initialization voltage line, and the second electrode may be connected to the gate electrode of the first transistor T1.

[0092] The fifth transistor T5 can be turned on according to the emission signal of the fifth gate line GL5 and connect the first electrode of the first transistor T1 to the first driving voltage line VDDL. The gate electrode of the fifth transistor T5 can be connected to the fifth gate line GL5, the first electrode can be connected to the first driving voltage line VDDL, and the second electrode can be connected to the first electrode of the first transistor T1.

[0093] The sixth transistor T6 can be turned on according to the emission signal of the fifth gate line GL5 and connect the second electrode of the first transistor T1 to the anode of the light emitting diode ED. The gate electrode of the sixth transistor T6 can be connected to the fifth gate line GL5, the first electrode can be connected to the second electrode of the first transistor T1, and the second electrode can be connected to the anode of the light emitting diode ED.

[0094] When the fifth transistor T5 and the sixth transistor T6 are both turned on, a driving current may be supplied to the light emitting diode ED.

[0095] The seventh transistor T7 may be turned on according to the second gate signal of the second gate line GL2 and connect the first initialization voltage line to the anode of the light emitting diode ED. In this case, the anode of the light emitting diode ED may be discharged (initialized) to the first initialization voltage Vint1. The gate electrode of the seventh transistor T7 may be connected to the second gate line GL2, the first electrode may be connected to the first initialization voltage line, and the second electrode may be connected to the anode of the light emitting diode ED. In an embodiment, the second gate line GL2 may be the first gate line GL1 in the previous row, and the second gate signal may be the first gate signal provided to the previous row.

[0096] The capacitor CST may be formed between the gate electrode of the first transistor T1 and the first driving voltage line VDDL. An electrode of the capacitor CST may be connected to the gate electrode of the first transistor T1, and another electrode of the capacitor CST may be connected to the first driving voltage line VDDL. Therefore, the capacitor CST may maintain a potential difference between the gate electrode of the first transistor T1 and the first driving voltage line VDDL.

[0097] The light emitting diode ED emits light according to the driving current. The amount of light emitted from the light emitting diode ED may be proportional to the driving current.

[0098] The light emitting diode ED may be an organic light emitting diode including an anode, a cathode, and an organic light emitting layer arranged between the anode and the cathode. Alternatively, the light emitting diode ED may be an inorganic light emitting diode including an anode, a cathode, and an inorganic light emitting layer arranged between the anode and the cathode, or a quantum dot organic light emitting diode including a quantum dot emission layer arranged between the anode and the cathode. In addition, the light emitting diode ED may be a micro light emitting diode.

[0099] An anode of the light emitting diode ED may be connected to the second electrode of the sixth transistor T6 and the second electrode of the seventh transistor T7 , and a cathode of the light emitting diode ED may be connected to the second driving voltage line VSSL.

[0100] Each photoelectric sensor PS may include a plurality of sensing transistors and a photodiode PD. The sensing transistors may include a first sensing transistor T8, a second sensing transistor T10, and a third sensing transistor T9. Hereinafter, a node connected to the first sensing transistor T8, the third sensing transistor T9, and the photodiode PD is referred to as a first node N1, and a node connected to the second driving voltage line VSSL and the photodiode PD is referred to as a second node N2. The first sensing transistor T8 may be a driving transistor, and the second sensing transistor T10 and the third sensing transistor T9 may each be a switching transistor used as a switching element that is turned on or off according to a signal applied to a gate electrode.

[0101] When the light emitting diode ED and the photodiode PD are disposed on one substrate, a voltage line or a signal line for the operation of the light emitting diode ED and the photodiode PD can be shared. That is, by reducing the additional arrangement of the voltage line or the signal line for the operation of the photodiode PD on the display panel, the resolution of the display panel can be ensured and the frame area can be reduced.

[0102] For example, a signal line connected to the gate electrode of the second transistor T2 of the pixel PX may be shared with a signal line connected to the gate electrode of the second sensing transistor T10 of the photosensor PS. That is, the gate electrode of the second transistor T2 and the gate electrode of the second sensing transistor T10 may be connected to the first gate line GL1.

[0103] In some embodiments, the second driving voltage line VSSL may be a common voltage line connected to a cathode of the light emitting diode ED and a cathode of the photodiode PD.

[0104] In some embodiments, the second initialization voltage line through which the second initialization voltage Vint2 is applied may be a common voltage line connected to the first electrode of the first sensing transistor T8 and the first electrode of the fourth transistor T4 of the photosensor PS.

[0105] An anode of the photodiode PD may be connected to the first node N1 , and a cathode thereof may be connected to the second node N2 .

[0106] When the photodiode PD is exposed to light, photocharges may be generated, and the generated photocharges may be accumulated in the photodiode PD. In this case, the voltage of the first node N1 electrically connected to the anode may increase. Depending on whether the first sensing transistor T8 and the second sensing transistor T10 are turned on, a photocurrent may flow through the readout line RL in proportion to the voltage of the first node N1 in which the photocharges are accumulated.

[0107] The gate electrode of the first sensing transistor T8 may be connected to the first node N1, the first electrode may be connected to the second initialization voltage line, and the second electrode may be connected to the first electrode of the second sensing transistor T10. The first sensing transistor T8 may be a source follower amplifier for generating a source-drain current proportional to the amount of charge input to the gate electrode in the first node N1. The first sensing transistor T8 may generate a photocurrent flowing from the second initialization voltage line to the readout line RL via the second sensing transistor T10 according to the voltage of the first node N1 determined based on the photocharge accumulated in the photodiode PD. Figure 3 It is shown that the first electrode of the first sensing transistor T8 is connected to the second initialization voltage line, but in another embodiment, the first electrode of the first sensing transistor T8 may be connected to the first driving voltage line VDDL or the first initialization voltage line.

[0108] The second sensing transistor T10 may be turned on according to the first gate signal of the first gate line GL1 and connect the second electrode of the first sensing transistor T8 to the readout line RL. The gate electrode of the second sensing transistor T10 may be connected to the first gate line GL1, the first electrode may be connected to the second electrode of the first sensing transistor T8, and the second electrode may be connected to the readout line RL.

[0109] The third sensing transistor T9 may be turned on according to a reset signal from the reset line RSTL to reset the first node N1 to a reset voltage VRST. The gate electrode of the third sensing transistor T9 may be connected to the reset line RSTL, the first electrode may be connected to the reset voltage line, and the second electrode may be connected to the first node N1. The reset voltage VRST may be a voltage that allows a dark current to flow through the photodiode PD. The fingerprint sensing signal may be detected by the ratio of the photocurrent to the dark current.

[0110] The fourth sensing transistor T11 can be connected to the sixth gate signal (or second reset signal) G6 (see Figure 4 ) is turned on and connects the anode of the photodiode PD to the readout line RL. A photocurrent generated based on the intensity of external light incident on the photodiode PD may be input to the charge controller CC through the readout line RL, and the charge controller CC may control the received current to be delivered to the battery BT, and a voltage may be stored in the battery BT.

[0111] When the first electrode of each of the first to seventh transistors T1 to T7 and the first to fourth sensing transistors T8 to T11 is a source electrode, the second electrode thereof may be a drain electrode. Alternatively, when the first electrode of each of the first to seventh transistors T1 to T7 and the first to fourth sensing transistors T8 to T11 is a drain electrode, the second electrode thereof may be a source electrode.

[0112] An active layer of each of the first to seventh transistors T1 to T7 and the first to fourth sensing transistors T8 to T11 may include any one of polycrystalline silicon, amorphous silicon, and an oxide semiconductor.

[0113] For example, the first transistor T1, the second transistor T2, the fifth transistor T5 to the seventh transistor T7, and the first sensing transistor T8 to the third sensing transistor T9 may all be P-type transistors. In this case, the active layer of each of the first transistor T1, the second transistor T2, the fifth transistor T5 to the seventh transistor T7, and the first sensing transistor T8 to the third sensing transistor T9 may include polysilicon. In addition, each of the third transistor T3, the fourth transistor T4, and the fourth sensing transistor T11 may be an N-type transistor including an active layer containing an oxide semiconductor.

[0114] However, one or more embodiments are not limited thereto, and each of the first to seventh transistors T1 to T7 and the first to fourth sensing transistors T8 to T11 may be a P-type transistor. In some embodiments, the first to fourth sensing transistors T8 to T11 may be N-type transistors. In this case, it is necessary to modify the transistors based on the characteristics of each transistor. Figure 3 The circuit diagram and Figure 4 waveform.

[0115] Figure 4 Signals in the first to third modes according to an embodiment are shown.

[0116] The display device 1 can operate in a first mode as a display mode, a second mode in which a fingerprint is sensed, and a third mode as a charging mode in which received light is stored. In the first mode, the display device 1 can display an image by using light emitted from the pixel PX. In the second mode, when a finger contacts or approaches the display device 1, the display device 1 can use the photoelectric sensor PS to sense light emitted from some of the pixels PX and then reflected from the finger. In the third mode, the display device 1 can store electric energy corresponding to the amount of external light received by the photoelectric sensor PS in the battery BT.

[0117] First, the first gate signal G1 is a signal applied to the first gate line GL1 and a signal for controlling the conduction and cutoff of the second transistor T2 of the pixel PX and the second sensing transistor T10 of the photosensor PS. The frame frequency refers to the frequency at which the data signal is written to the driving transistor (e.g., the first transistor T1) of the pixel PX, and may indicate the number of frames played per second. In each frame, when the first gate signal G1 is provided to the first gate line GL1, the pixel PX may receive the data signal. The frame duration may be the playback time of one frame.

[0118] The pixels PX and the photosensors PS may operate at a first frame frequency in a first mode and at a second frame frequency in a second mode. The first frame frequency may be higher than the second frame frequency. The first frame duration FOM1 in the first mode may be less than the second frame duration FOM2 in the second mode.

[0119] The reset signal (or first reset signal) RST of the photosensor PS is applied to the reset line RSTL and is a signal for controlling the on and off of the third sensing transistor T9. The reset signal RST may be a gate signal GS (see Figure 2 ) different signals. In other words, by separating the reset signal RST of the photosensor PS from the gate signal GS of the pixel PX instead of sharing the reset signal RST, the reset timing of the photosensor PS and the number of times the photosensor PS is reset can be independently adjusted. For example, the reset signal RST can be output when the user's touch is generated, and the photosensor PS can enter the reset period RSP.

[0120] When a user's touch is performed, the photosensor PS can start a reset period RSP in which the anode of the photodiode PD is reset to a reset voltage VRST and an exposure period EP1 in which the photodiode PD is exposed to light in the first mode, generate photo charges according to the intensity of the external light, and thus, the voltage of the anode of the photodiode PD and the voltage of the first node N1 increase, and can start a fingerprint reading period ROP in which the second sensing transistor T10 is turned on during the second frame duration FOM2 in the second mode, and read the fingerprint according to the intensity of the current flowing through the readout line RL.

[0121] The reset signal RST may have a gate-on voltage Von during the reset period RSP and a gate-off voltage Voff during other periods. The gate-on voltage Von of the reset signal RST may be a gate low voltage and the gate-off voltage Voff thereof may be a gate high voltage.

[0122] When the user's touch is generated while the display device 1 is operating in the first mode and displaying an image, a reset period RSP may be initiated. During the reset period RSP, a reset signal RST having a gate-on voltage Von is provided to the reset line RSTL. Therefore, the third sensing transistor T9 is turned on, and the first node N1 and the anode of the photodiode PD may be reset to the reset voltage VRST. Since a second driving voltage higher than the reset voltage VRST is applied to the cathode of the photodiode PD and the second node N2, the photodiode PD may be maintained in a reverse biased state. For example, the voltage of the first node N1 may be approximately -6.5V, and the voltage of the second node N2 may be approximately -2.5V.

[0123] Then, during the exposure period EP1, the photodiode PD may be exposed to the light emitted from the light emitting diode ED. When the user's touch is generated, the photodiode PD may generate a photocharge corresponding to the light reflected from the ridges or valleys between the ridges of the fingerprint, and may generate a reverse current proportional to the amount of the generated photocharge. That is, a current flowing from the second node N2 to the first node N1 may be generated. Therefore, the voltage of the first node N1 may increase. The voltage of the first node N1 may increase until the potential difference between the first electrode and the gate electrode of the first sensing transistor T8 reaches the absolute value of the threshold voltage. When the voltage of the first node N1 reaches the threshold voltage of the first sensing transistor T8, the first sensing transistor T8 may be turned on. The exposure period EP1 may correspond to a period in which the first frame duration FOM1 is performed 12 times.

[0124] Then, during the fingerprint reading period ROP, a first gate signal G1 having a gate-on voltage Von may be provided to the first gate line GL1. To this end, the second sensing transistor T10 may be turned on, and a fingerprint sensing signal corresponding to the current flowing through the first sensing transistor T8 may be output to the readout line RL. The current flowing through the first sensing transistor T8 may be a source-drain current generated in proportion to the amount of charge of the first node N1 input to the gate electrode of the first sensing transistor T8. Therefore, the ridge or valley of the fingerprint may be determined by sensing the voltage change in the first node N1, and the fingerprint may be detected.

[0125] Hereinafter, operations of the pixel PX and the photosensor PS according to first to third modes are described. Figure 4 The first gate signal G1 , the reset signal RST, and the sixth gate signal G6 supplied to the pixel PX and the photosensor PS are illustrated, and other signals are omitted.

[0126] The frame frequency refers to the frequency at which the data signal is substantially input to the driving transistor (e.g., the first transistor T1) of the pixel PX, and may indicate the number of frames played per second. In each frame, when the first gate signal G1 is provided to the first gate line GL1, the pixel PX may receive the data signal. The frame duration may be the playback time of one frame. The first frame duration FOM1 in the first mode may be less than the second frame duration FOM2 in the second mode.

[0127] The pixels PX and the photosensors PS may operate at a first frame frequency in the first mode and at a second frame frequency in the second mode. The first frame frequency may be higher than the second frame frequency.

[0128] When the user's touch is sensed in the first mode, the display device may operate in the second mode. In the second mode, the photosensor PS may operate at a first frame frequency during a period corresponding to a preset reset period RSP and an exposure period EP1, and synchronized with a time point when the fingerprint reading period ROP is started, the photosensor PS may operate at a second frame frequency. For example, the preset exposure period EP1 may be approximately 100 ms and correspond to approximately 12 first frame durations FOM1, but one or more embodiments are not limited thereto. When the second mode ends, the pixel PX and the photosensor PS may switch back to the first mode and operate at the first frame frequency. After the first mode and the second mode end, the pixel PX and the photosensor PS may switch to a third mode, and the charging mode may be started.

[0129] In the first mode, the pixel PX may receive a vertical synchronization signal Vsync and a horizontal synchronization signal Hsync both having a first frame frequency. The pixel PX and the photosensor PS may repeat a first frame duration FOM1 and operate according to the vertical synchronization signal Vsync and the horizontal synchronization signal Hsync having the first frame frequency.

[0130] In the first mode, the display device 1 may display an image at a first frame frequency. Because the reset signal RST is not output in the first mode, the fingerprint sensing signal may not be accurately sensed even if the first gate signal G1 is applied to the photosensor PS. For example, because no reset voltage is applied to the first node N1, a reverse bias of the photodiode PD may not be generated, and a photocurrent may not be generated even though the photodiode PD is exposed to external light. In some embodiments, the readout circuit ROC may not use the signal generated during the first frame duration FOM1 as valid fingerprint sensing data even when the reset signal RST is output.

[0131] In the second mode, the display device 1 may display an image at a first frame frequency during a reset period RSP and an exposure period EP1, and display an image at a second frame frequency during a fingerprint reading period ROP. In addition, the display device 1 may sense a fingerprint according to a touch of a user. In the second mode in which a fingerprint is sensed, the photosensor PS may receive a vertical synchronization signal Vsync and a horizontal synchronization signal Hsync both having a second frame frequency. During a second frame duration FOM2, the photosensor PS may operate a vertical synchronization signal Vsync and a horizontal synchronization signal Hsync having a second frame frequency.

[0132] In the third mode, the pixel PX may not be driven, and the first gate signal G1 for driving the pixel PX may not be input. In the third mode, since the reset signal RST and the first gate signal G1 are not applied, an image may not be displayed, and an external object (fingerprint) may not be sensed. Therefore, the vertical synchronization signal Vsync and the horizontal synchronization signal Hsync may not be applied.

[0133] In the third mode, since the sixth gate signal G6 is applied, Figure 4 Light received by the photodiode PD during the period BCP shown in FIG. 1 (ie, light received during the period EP2 ) may be input to the charge controller CC along the readout line RL in the form of a photocurrent.

[0134] Reference Figure 4, when neither the image signal nor the fingerprint sensing signal is detected, the display device 1 may start operation in the third mode, and the sixth gate signal G6 may have a gate-on voltage. If the display device 1 operates in at least one of the first mode and the second mode, the third mode is terminated, and the sixth gate signal G6 may have a gate-off voltage. Figure 4 As shown in, for example, if the controller CTR receives image data while the display device 1 operates in the third mode, the display device 1 can terminate the third mode and operate in the first mode to display the image. Similarly, if a touch input is sensed, the display device 1 can operate in the second mode as the reset period RSP and the exposure period EP1 can proceed.

[0135] Figure 5 is a schematic cross-sectional view illustrating a principle of detecting a fingerprint when the display device 1 operates in the second mode according to the embodiment.

[0136] Reference Figure 5 , the display device 1 according to the embodiment may include a substrate 100 and a light emitting diode ED and a photodiode PD disposed above the substrate 100. The light emitting diode ED may include a first light emitting diode ED1, a second light emitting diode ED2, and a third light emitting diode ED3. The first light emitting diode ED1, the second light emitting diode ED2, and the third light emitting diode ED3 may emit different lights. For example, the first light emitting diode ED1 may emit green light, the second light emitting diode ED2 may emit red light, and the third light emitting diode ED3 may emit blue light.

[0137] like Figure 5 As shown in , the display device 1 may have a function of sensing a target (external object) (e.g., a fingerprint of a finger F) in contact with the cover window CW. Light originating from at least one of the first light emitting diode ED1, the second light emitting diode ED2, and the third light emitting diode ED3 may be reflected from the finger F toward the substrate 100, and the reflected light may be incident on the photodiode PD. The photodiode PD may detect the reflected light. For example, when green light emitted from the first light emitting diode ED1 is reflected from an object contacting the cover window CW and is incident on the photodiode PD, the photodiode PD may detect the green light.

[0138] According to an embodiment, the second mode may be used to perform Figure 5 The photoelectric sensor PS of the display device 1 detects the operation of the fingerprint.

[0139] Figure 6 Components of a display device 1 according to an embodiment are schematically shown.

[0140] Reference Figure 6, the display device 1 may include a fingerprint sensing part FSP and a battery charging part BTCP. The fingerprint sensing part FSP may include a photoelectric sensor PS and a readout circuit ROC. In an embodiment, the fingerprint sensing part FSP may also include a first switch SW1 and a second switch SW2. The first switch SW1 may be connected to the photoelectric sensor PS and the charging controller CC. The second switch SW2 may be connected to the photoelectric sensor PS and the readout circuit ROC.

[0141] In addition, when the display device 1 operates in the third mode, the photosensor PS may be connected to the battery BT. In detail, the photosensor PS may be connected to the charge controller CC through the first switch SW1. The photosensor PS may be connected to the battery BT through the charge controller CC. However, one or more embodiments are not limited thereto, and the photosensor PS may be directly connected to the charge controller CC without the first switch SW1.

[0142] The photosensor PS may be connected to the readout circuit ROC via a second switch SW2 .

[0143] The battery charging part BTCP can be arranged on the display circuit board ( Figure 1 30) above. The battery charging part BTCP may include a charging controller CC and a battery BT, and the battery BT may be connected to the charging controller CC.

[0144] The readout circuit ROC can be arranged in the peripheral area ( Figure 1 PA) and connected to the display area ( Figure 1 The photosensor PS may be connected to the charge controller CC via at least one readout line RL.

[0145] The charge controller CC may include a capacitive element (capacitor). The current flowing through the readout line RL may be converted into a voltage in the charge controller CC and stored in the capacitive element.

[0146] The readout circuit ROC may be connected to the controller CTR, and the controller CTR may be connected to the input sensing layer ISP. The controller CTR may control the switching operation of the first switch SW1 and the second switch SW2. For example, the controller CTR may turn on or off the first switch SW1 and the second switch SW2.

[0147] For example, the first switch SW1 and the second switch SW2 may both be transistors. In this case, the controller CTR may provide control signals to the gates of the first switch SW1 and the second switch SW2.

[0148] The readout circuit ROC may receive the optical signal sensed by the photosensor PS as fingerprint information. The readout circuit ROC may process the optical signal sensed by the photosensor PS into fingerprint information and provide the processed information to the controller CTR.

[0149] When the display device 1 operates in the second mode, and when a touch from an external object is detected in the input sensing layer ISP, the controller CTR may control the operation of the second switch SW2 so that the second switch SW2 may be turned on. When the second switch SW2 is turned on, the photosensor PS may sense light reflected from a fingerprint of an external object (finger), a photocurrent may be transmitted to the readout circuit ROC through the readout line RL, and the readout circuit ROC may process a light sensing signal received from the photosensor PS according to a readout control signal RCS from the controller CTR, and provide the processed signal ROS to the controller CTR.

[0150] When the display device 1 operates in the third mode, there may be no image signal or fingerprint sensing signal. In the absence of the image signal and the fingerprint sensing signal, the first switch SW1 may be turned on by default according to the control signal transmitted from the controller CTR, and the photosensor PS and the charging controller CC are connected to each other; therefore, the photocurrent flowing through the readout line RL in the display area DA may be transmitted to the charging controller CC. The transmitted photocurrent may be controlled in the charging controller CC and transmitted to the battery BT, and when the voltage is stored in the battery BT, the display device 1 may perform a charging function.

[0151] Figure 7 is a flowchart of operations in the first mode, the second mode, and the third mode according to the embodiment.

[0152] Regarding the operation in the first mode, when the controller CTR receives the first mode control signal in operation S711, the display panel may display an image in the first mode in operation S712.

[0153] Regarding the operation in the second mode, when the controller CTR receives the second mode control signal in operation S721, the display panel may display an image in the second mode in operation S712. The readout circuit ROC may accurately detect a fingerprint based on the readout control signal RCS from the controller CTR in operation S722.

[0154] Regarding the operation in the third mode, when the controller CTR receives the third mode control signal in operation S731, the voltage can be stored in the battery BT in the third mode, and the display device 1 can perform a charging function in operation S732. That is, when the display device 1 is not operating in the first mode and the second mode, the photocurrent flowing between the anode and the cathode of the photodiode PD can be transmitted to the charging controller CC by applying the sixth gate signal G6 to the fourth sensing transistor T11. The current can be converted into a voltage in the charging controller CC, and the converted voltage can be applied to the battery BT. During this process, the voltage can be increased and stored in the battery BT, and the photosensor PS is used as a battery. The photosensor PS charging process occurs in the third mode. At a given time, only one of the first mode, the second mode, and the third mode can be activated.

[0155] Figure 8 is a diagram showing an arrangement structure of pixels PX and photosensors PS according to an embodiment.

[0156] Figure 8 Each of the first pixel PX1, the second pixel PX2, and the third pixel PX3 including a pixel electrode PE and an emission region and a photo sensor PS including a photodiode PD is shown. The emission region is a region where an emission layer of a light emitting diode is arranged. Each pixel electrode PE may include a first region PEA1 corresponding to the emission region and a second region PEA2 surrounding the first region PEA1.

[0157] like Figure 8 As shown in , the emission areas are arranged in the alternating first column M1 and the second column M2 and the alternating first sub-row SN1 and the second sub-row SN2. In the first column M1, the first emission area EA1 of the first pixel PX1 and the third emission area EA3 of the third pixel PX3 can be arranged alternately in the y direction. Pixels PX1 and PX3 are arranged in the first sub-row SN1. The photodiode PD of the photosensor PS between the first pixel PX1 and the third pixel PX3 is arranged in the first column M1 of the second sub-row SN2. In the second column M2, the second emission area EA2 of the second pixel PX2 can be repeatedly arranged in the y direction. Among the first column M1, the arrangement of the first emission area EA1 of the first pixel PX1 of the adjacent first column M1 and the third emission area EA3 of the third pixel PX3 can be opposite. Therefore, looking only at the first column M1, the first pixel PX1 and the third pixel PX3 are alternated in the first sub-row SN1.

[0158] In the first sub-row SN1 of each row N, the first emission area EA1 of the first pixel PX1 and the third emission area EA3 of the third pixel PX3 may be alternately arranged in the x direction, and in the second sub-row SN2, the second emission area EA2 of the second pixel PX2 and the area of ​​the photodiode PD of the photosensor PS arranged in the first column M1 between the second pixels PX2 may be alternately arranged in the x direction. That is, in each row N, the first emission area EA1 of the first pixel PX1, the second emission area EA2 of the second pixel PX2, the third emission area EA3 of the third pixel PX3, and the photodiode PD of the photosensor PS may be arranged in a diamond shape and repeated in a zigzag form.

[0159] The first emission area EA1 of the first pixel PX1, the second emission area EA2 of the second pixel PX2, and the third emission area EA3 of the third pixel PX3 may have different sizes. In an embodiment, the third emission area EA3 of the third pixel PX3 may have an area larger than the first emission area EA1 of the first pixel PX1. In addition, the third emission area EA3 of the third pixel PX3 may have an area larger than the second emission area EA2 of the second pixel PX2. The first emission area EA1 of the first pixel PX1 may have an area larger than the second emission area EA2 of the second pixel PX2. In some embodiments, the third emission area EA3 of the third pixel PX3 may have the same area as the first emission area EA1 of the first pixel PX1. However, one or more embodiments are not limited thereto. Various modifications may be made. For example, the first emission area EA1 of the first pixel PX1 may have an area larger than the second emission area EA2 of the second pixel PX2 and the third emission area EA3 of the third pixel PX3.

[0160] The first emission area EA1, the second emission area EA2, and the third emission area EA3 may each have a polygonal shape such as a rectangle or an octagon, or a circle or an ellipse. The polygonal shape may be a polygon with rounded (rounded) corners (edges).

[0161] In an embodiment, the first pixel PX1 may be a red pixel R emitting red light, the second pixel PX2 may be a green pixel G emitting green light, and the third pixel PX3 may be a blue pixel B emitting blue light.

[0162] Refer to the following Fig. 9 Describes where the x, y and x directions are intercepted Figure 8 9 is a structure of a pixel PX and a photosensor PS.

[0163] Fig. 9 is a schematic cross-sectional view of a portion of the display device 1 according to the embodiment. Fig. 9 It can be shown Figure 1 FIG. 1 is a cross-sectional view of a portion of a display area DA of a display device 1 .

[0164] Reference Fig. 9 The display device 1 may include a substrate 100 and pixels PX disposed above the substrate 100 (see Figure 3 ) and photoelectric sensor PS (see Figure 3 ). The pixel PX may include a pixel circuit PC and a light emitting diode ED connected to the pixel circuit PC. The photosensor PS may include a sensing circuit SC and a photodiode PD connected to the sensing circuit SC. The pixel circuit PC and the sensing circuit SC may each include a plurality of thin film transistors TFT.

[0165] The display device 1 may further include an auxiliary layer 224 , an encapsulation layer 300 , an input sensing layer 400 , an anti-reflection layer 500 , and a cover window CW disposed over the pixels PX and the photosensors PS.

[0166] The substrate 100 may include glass or a polymer resin. For example, when the substrate 100 includes a polymer resin, the substrate 100 may include any one of polyimide, polyethylene naphthalate, polyethylene terephthalate, polyarylate, polycarbonate, polyetherimide, and polyethersulfone.

[0167] The buffer layer 201 may be disposed over the substrate 100. The buffer layer 201 may reduce or prevent foreign matter, moisture, or external air from penetrating from the bottom of the substrate 100. The buffer layer 201 may include an inorganic material such as silicon oxide, silicon oxynitride, or silicon nitride, and may be one or more layers including the above materials.

[0168] The thin film transistor TFT may be disposed over the buffer layer 201. The thin film transistor TFT may include a semiconductor layer Act, a gate electrode GE, a source electrode SE, and a drain electrode DE. Fig. 9 A top-gate thin film transistor TFT is shown in which the gate electrode GE is disposed above the semiconductor layer Act and the gate insulating layer 203 is between the gate electrode GE and the semiconductor layer Act, but one or more embodiments are not limited thereto. For example, the thin film transistor TFT may be a bottom-gate thin film transistor.

[0169] The semiconductor layer Act may be disposed above the buffer layer 201. The semiconductor layer Act may include a channel region and a source region and a drain region arranged on both sides of the channel region and doped with impurities. In this case, the impurities may include N-type impurities or P-type impurities. The semiconductor layer Act may include amorphous silicon or polycrystalline silicon. In an embodiment, the semiconductor layer Act may include an oxide of at least one material selected from the group consisting of indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), aluminum (Al), cesium (Cs), cerium (Ce) and zinc (Zn). The semiconductor layer Act may include a Zn oxide-based material, and includes Zn oxide, In-Zn oxide, Ga-In-Zn oxide, and the like. In addition, the semiconductor layer Act may be an In-Ga-Zn-O (IGZO) semiconductor, an In-Sn-Zn-O (ITZO) semiconductor, or an In-Ga-Sn-Zn-O (IGTZO) semiconductor in which a metal such as In, Ga, and / or Sn is included in ZnO.

[0170] The gate electrode GE may be disposed above the semiconductor layer Act to at least partially overlap with the semiconductor layer Act. In detail, the gate electrode GE may overlap with the channel region of the semiconductor layer Act. Such a gate electrode GE may include various conductive materials (including Mo, Al, Cu, and Ti) and have various layer structures. For example, the gate electrode GE may include a Mo layer and an Al layer, or have a multilayer structure including a Mo layer / Al layer / Mo layer. In addition, the gate electrode GE may have a multilayer structure including an ITO layer covering a metal material.

[0171] The gate insulating layer 203 disposed between the semiconductor layer Act and the gate electrode GE may include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, or hafnium oxide. The gate insulating layer 203 may be one or more layers including the above materials.

[0172] The source electrode SE and the drain electrode DE may contact the source region and the drain region of the semiconductor layer Act through the contact hole. The source electrode SE and the drain electrode DE may each include various conductive materials including Mo, Al, Cu and Ti, and have various layer structures. For example, the source electrode SE and the drain electrode DE may include a Ti layer and an Al layer, or have a multilayer structure including a Ti layer / Al layer / Ti layer. In addition, the source electrode SE and the drain electrode DE may have a multilayer structure including an ITO layer covering a metal material.

[0173] The interlayer insulating layer 205 may include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, or hafnium oxide. The interlayer insulating layer 205 may be one or more layers including the above materials.

[0174] The gate insulating layer 203 and the interlayer insulating layer 205 including an inorganic material may be formed by chemical vapor deposition (CVD) or atomic layer deposition (ALD), but one or more embodiments are not limited thereto.

[0175] The thin film transistor TFT may be covered by an organic insulating layer 207. For example, the organic insulating layer 207 may cover the source electrode SE and the drain electrode DE. The organic insulating layer 207 may be a planarized insulating layer and have a substantially flat upper surface. Such an organic insulating layer 207 may include an organic insulating material such as a general polymer (such as polymethyl methacrylate (PMMA) or polystyrene (PS)), a polymer derivative having a phenolic group, an acryl polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluorine polymer, a paraxylene polymer, a vinyl alcohol polymer, and any blend thereof. In an embodiment, the organic insulating layer 207 may include polyimide.

[0176] The pixel electrode 221a, the sensing electrode 221b, and the bank layer 209 may be disposed over the organic insulating layer 207. The bank layer 209 may cover edges of the pixel electrode 221a and the sensing electrode 221b, and be disposed over the organic insulating layer 207.

[0177] A first bank opening 209OP1 exposing at least a central portion of the pixel electrode 221a and a second bank opening 209OP2 exposing at least a central portion of the sensing electrode 221b may be arranged in the bank 209. Thus, the first bank opening 209OP1 may define an emission area EA, and the second bank opening 209OP2 may define a sensing area SA.

[0178] The bank layer 209 prevents arcing etc. from being generated at the edge of the pixel electrode 221a by increasing the distance between the edge of the pixel electrode 221a and the edge of the counter electrode 223. In addition, the bank layer 209 prevents arcing etc. from being generated at the edge of the sensing electrode 221b by increasing the distance between the edge of the sensing electrode 221b and the edge of the counter electrode 223.

[0179] The bank layer 209 may include an organic insulating material such as polyimide, polyamide, acrylic resin, benzocyclobutene (BCB), hexamethyldisiloxane (HMDSO), or phenolic resin, and may be formed by spin coating or the like.

[0180] The emission layer 222b may be arranged in the first bank opening 209OP1 formed in the bank layer 209. The emission layer 222b may include an organic material including a fluorescent or phosphorescent material that emits red light, green light, blue light, or white light. The emission layer 222b may be an organic light-emitting layer including a low molecular weight organic material or a high molecular weight organic material. For example, the emission layer 222b may be an organic light-emitting layer and include copper phthalocyanine, tris-8-hydroxyquinoline aluminum, polyphenylene vinylene (PPV)-based materials, or polyfluorene-based materials.

[0181] In an embodiment, the emission layer 222b may include a host material and a dopant material. The dopant material may be a material that emits light of a specific color and includes an emission material. The emission material may include at least one of a phosphorescent dopant, a fluorescent dopant, and a quantum dot. The host material is the main component of the emission layer 222b and helps the dopant material emit light.

[0182] The active layer 222c may be disposed in the second bank opening 209OP2 formed in the bank 209. The active layer 222c may include a P-type organic semiconductor and an N-type organic semiconductor. In this case, the P-type organic semiconductor may serve as an electron donor and the N-type organic semiconductor may serve as an electron acceptor.

[0183] In an embodiment, the active layer 222c may include a mixed layer in which a P-type organic semiconductor is mixed with an N-type organic semiconductor. In this case, the active layer 222c may be formed by co-depositing a P-type organic semiconductor and an N-type organic semiconductor. When the active layer 222c is a mixed layer, excitons may be generated within a diffusion length from a donor-acceptor interface.

[0184] In an embodiment, the P-type organic semiconductor may be a compound used as an electron donor for supplying electrons. For example, the P-type organic semiconductor may include chloroboron subphthalocyanine (SubPc), copper II phthalocyanine (CuPc), tetraphenyl-dibenzocyclopentadiene (DBP), or any combination thereof, but one or more embodiments are not limited thereto.

[0185] In an embodiment, the N-type organic semiconductor may be a compound that functions as an electron acceptor for accepting electrons. For example, the N-type organic semiconductor may include C 60 Fullerene, C 70 Fullerenes or any combination thereof, but one or more embodiments are not limited thereto.

[0186] In an embodiment, the counter electrode 223 may be disposed above the emission layer 222b and the active layer 222c. The counter electrode 223 disposed above the emission layer 222b and the active layer 222c may be integrally formed as a single integral body. A portion of the counter electrode 223 disposed above the active layer 222c may be referred to as a sensing counter electrode. The counter electrode 223 may be a light-transmitting electrode or a reflective electrode. In some embodiments, the counter electrode 223 may be a transparent or translucent electrode, and may include a metal film having a low work function and including Li, Ca, LiF, Al, Ag, Mg and compounds thereof, and a material having a multilayer structure such as LiF / Ca or LiF / Al. In addition, in addition to the metal film, the counter electrode 223 may also include a material including ITO, IZO, ZnO or In 2 O 3 of a transparent conductive oxide (TCO) layer.

[0187] In an embodiment, the first common layer 222a may be disposed between the pixel electrode 221a and the emission layer 222b and between the sensing electrode 221b and the active layer 222c, and the second common layer 222d may be disposed between the emission layer 222b and the counter electrode 223 and between the active layer 222c and the counter electrode 223.

[0188] In an embodiment, a hole transport region may be defined between the pixel electrode 221a and the emission layer 222b and between the sensing electrode 221b and the active layer 222c, and an electron transport region may be defined between the emission layer 222b and the counter electrode 223 and between the active layer 222c and the counter electrode 223.

[0189] The hole transport region may have a single layer structure or a multilayer structure. For example, the first common layer 222a may be arranged in the hole transport region. In an embodiment, the first common layer 222a may include at least one of a hole injection layer (HIL), a hole transport layer (HTL), and an electron blocking layer (EBL).

[0190] For example, the first common layer 222a may have a single-layer structure or a multi-layer structure. When the first common layer 222a includes a multi-layer structure, the first common layer 222a may include a HIL and a HTL, a HIL and an EBL, a HTL and an EBL, or a HIL, a HTL and an EBL sequentially stacked from the pixel electrode 221a. However, one or more embodiments are not limited thereto.

[0191] The first common layer 222a may include at least one selected from m-MTDATA, TDATA, 2-TNATA, NPB (NPD), β-NPB, TPD, spiro-TPD, spiro-NPB, methylated-NPB, TAPC, HMTPD, TCTA (4,4',4"-tri(N-carbazolyl)triphenylamine), polyaniline / dodecylbenzenesulfonic acid (PANI / DBSA), polyaniline / camphorsulfonic acid (PANI / CSA), poly(3,4-ethylenedioxythiophene) / poly(4-styrenesulfonate) (PEDOT / PSS) and polyaniline / poly(4-styrenesulfonate) (PANI / PSS).

[0192] The electron transport region may have a single layer structure or a multilayer structure. For example, the second common layer 222d may be arranged in the electron transport region. In an embodiment, the second common layer 222d may include at least one of an electron injection layer (EIL), an electron transport layer (ETL), and a hole blocking layer (HBL).

[0193] For example, the second common layer 222d may have a single-layer structure or a multi-layer structure. When the second common layer 222d has a multi-layer structure, the second common layer 222d may include an ETL and an EIL, both an HBL and an EIL, both an HBL and an ETL, or an HBL, an ETL, and an EIL sequentially stacked from the emission layer 222b. However, one or more embodiments are not limited thereto.

[0194] The second common layer 222d may include a layer selected from 2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline (BCP), 4,7-diphenyl-1,10-phenanthroline (Bphen), Alq 3 At least one compound selected from the group consisting of 3-(biphenyl-4-yl)-5-(4-tert-butylphenyl)-4-phenyl-4H-1,2,4-triazole (TAZ) and NTAZ.

[0195] The light emitting diode ED may include a pixel electrode 221a, a first common layer 222a, an emission layer 222b, a second common layer 222d, and a counter electrode 223 that are sequentially stacked. The photodiode PD may include a sensing electrode 221b, a first common layer 222a, an active layer 222c, a second common layer 222d, and a counter electrode 223 (sensing counter electrode) that are sequentially stacked.

[0196] The thin film transistor TFT may be disposed between the substrate 100 and the light emitting diode ED. The thin film transistor TFT may be electrically connected to the light emitting diode ED and drive the light emitting diode ED. For example, one of the source electrode SE and the drain electrode DE of the thin film transistor TFT may be electrically connected to the pixel electrode 221a of the light emitting diode ED.

[0197] The thin film transistor TFT may be disposed between the substrate 100 and the photodiode PD. The thin film transistor TFT may be electrically connected to the photodiode PD and drive the photodiode PD. For example, one of the source electrode SE and the drain electrode DE of the thin film transistor TFT may be electrically connected to the sensing electrode 221b of the photodiode PD.

[0198] The photodiode PD may be a light receiving diode including an anode, a cathode, and a photoelectric conversion layer arranged between the anode and the cathode. The photodiode PD may convert external incident light into an electrical signal. The photodiode PD may be a light receiving diode or a phototransistor including a PN type or PIN type inorganic material. Alternatively, the photodiode PD may be an organic light receiving diode including an electron donor material for generating donor ions and an electron acceptor material for generating acceptor ions. In this case, the donor material and the acceptor material may be compounds described below.

[0199] Donor material: the compound represented by Formula 1.

[0200]

[0201] Ar 1 and Ar 2 : are independently substituted or unsubstituted C 6 To C 30 Aromatic groups, substituted or unsubstituted C 3 To C 30 A heteroaromatic hydrocarbon group or a condensed ring thereof.

[0202] X 1 : From -Se-, -Te-, -S(=O)-, -S(=O) 2 -、-NR a1 -、-BR a2 -、-SiR b R c -、-SiR bb R cc -、

[0203] -GeR d R e -、-GeR dd R ee -、-CR f R g -and-CR ff R gg -Select (where R a1 , R a2 , R b , R c , R d , Re , R f and R g are each independently hydrogen, deuterium, halogen, substituted or unsubstituted C 1 To C 20 Alkyl, substituted or unsubstituted C 1 To C 20 Alkoxy, substituted or unsubstituted C 6 To C 20 Aryl, or substituted or unsubstituted C 6 To C 20 Aryloxy, and R bb and R cc , R dd and R ee , and R ff and R gg At least one pair of them is connected together to form a ring structure).

[0204] X 2 : From -O-, -S-, -Se-, -Te-, -S(=O)-, -S(=O) 2 -、-NR a1 -、-BR a2 -、-SiR b R c -、

[0205] -SiR bb R cc -、-GeR d R e -、-GeR dd R ee -、-(CR f R g ) n1 -、-(CR ff R gg )-、-(C(R m )=C(R n ))-、-(C(R mm )=C(R nn ))- and -(C(R p )=N))-select (where R a1 , R a2 , R b , R c , R d , R e , R f , R g , R m , R n and R p are each independently hydrogen, deuterium, halogen, substituted or unsubstituted C 1To C 20 Alkyl, substituted or unsubstituted C 1 To C 20 Alkoxy, substituted or unsubstituted C 6 To C 20 Aryl, or substituted or unsubstituted C 6 To C 20 Aryloxy, and R bb and R cc , R dd and R ee , and R ff and R gg At least one pair of them is connected together to form a ring structure, and in -(CR f R g ) n1 -where n1 is 1 or 2).

[0206] L: from -O-, -S-, -Se-, -Te-, -NR a1 -、-BR a2 -、-SiR b R c -、-SiR bb R cc -、-GeR d R e -、-GeR dd R ee -、-(CR f R g ) n1 -、-(CR ff R gg )-、-(C(R m )=C(R n ))-、-(C(R mm )=C(R nn ))-、-(C(R p )=N))- and a single bond (where R a1 , R a2 , R b , R c , R d , R e , R f , R g , R m , R n and R p are each independently selected from hydrogen, deuterium, halogen, substituted or unsubstituted C 1 To C 20 Alkyl, substituted or unsubstituted C 1 To C 20 Alkoxy, substituted or unsubstituted C 6 To C20 Aryl and substituted or unsubstituted C 6 To C 20 Aryloxy, and R bb and R cc , R dd and R ee or R ff , and R gg or R mm and R nn At least one pair of them is connected together to form a ring structure, and in -(CR f R g ) n1 -where n1 is 1 or 2).

[0207] When L is -NR a1 -、-BR a2 -、-SiR b R c -、-GeR d R e -、-(CR f R g ) n1 -、-(C(R m )=C(R n ))-or-(C(R p )=N))-, L can be selectively connected to Ar 1 or Ar 2 to form a ring structure.

[0208] R 1 and R 2 each independently from hydrogen, deuterium, substituted or unsubstituted C 1 To C 30 Alkyl, substituted or unsubstituted C 1 To C 30 Alkoxy, substituted or unsubstituted C 6 To C 30 Aryl, substituted or unsubstituted C 3 To C 30 Heteroaryl, substituted or unsubstituted C 2 To C 30 Acyl, halogen, cyano (-CN), cyano-containing groups, nitro, pentafluorosulfanyl group (-SF 5 ), hydroxyl, amine, hydrazine, hydrazone, carboxyl or its salt, sulfonic acid or its salt, phosphoric acid or its salt, -SiR a R b R c (Among them, R a , R b and Rc each independently from hydrogen and substituted or unsubstituted C 1 To C 10 alkyl) and combinations thereof.

[0209] Ar 3 is a substituted or unsubstituted C having at least one functional group selected from C═O, C═S, C═Se and C═Te 6 To C 30 A hydrocarbon ring having a substituted or unsubstituted C=O, C=S, C=Se and C=Te functional group selected from 2 To C 30 A heterocyclic group or a condensed ring thereof.

[0210]

[0211] In formula 1, Ar 3 It may be a ring represented by any one of Formulae 2A to 2F.

[0212] In the above formula, Z 1 Select from O, S, Se and Te, and Z 2 From O, S, Se, Te and CR a R b Choose from among them, R a and R b are each independently hydrogen, substituted or unsubstituted C 1 To C 10 alkyl, cyano or cyano-containing group, and when Z 2 CR a R b When R a and R b At least one of them is a cyano group or a cyano group-containing group.

[0213] Z 3 Selected from N and CR c (Among them, R c is selected from hydrogen, deuterium and substituted or unsubstituted C 1 To C 10 alkyl).

[0214] R 11 , R 12 , R 13 , R 14 and R 15 are the same or different and are each independently selected from hydrogen, deuterium, substituted or unsubstituted C 1 To C 30 Alkyl, substituted or unsubstituted C 6 To C 30Aryl, substituted or unsubstituted C 4 To C 30 Heteroaryl, halogen, cyano (-CN), cyano-containing groups and combinations thereof, or R 12 and R 13 and R 14 and R 15 may exist independently or may be linked together to form a fused aromatic ring, wherein n is 0 or 1, and * indicates a bond position. In an embodiment, in the above formula, CR 11 , CR 12 , CR 13 , CR 14 and CR 15 At least one of may be substituted with nitrogen (N). That is, the substituted or unsubstituted benzene ring portion may contain a heteroatom (N).

[0215] G 1 , G 2 and G 3 From O, S, Se, Te, SiR x R y and GeR z R w Choose from among them, R x , R y , R z and R w the same or different and each independently selected from hydrogen, deuterium, halogen, substituted or unsubstituted C 1 To C 20 Alkyl and substituted or unsubstituted C 6 To C 20 Choose from aromatic groups.

[0216] Acceptor material: Compounds represented by Formula 4 and Formula 5.

[0217]

[0218] In the above formula 4, X 1 and X 2 Each independently is O or NR a , R 1 To R 4 and R a are each independently hydrogen, substituted or unsubstituted C 1 To C 30 Alkyl, substituted or unsubstituted C 6 To C 30 Aryl, substituted or unsubstituted C 3 To C 30 heterocyclic group, halogen, cyano group or a combination thereof.

[0219] Formula 4 may be represented by Formula 5A or Formula 5B.

[0220] In Formula 5A and Formula 5B, R 1 To R 4 , R a1 and R a2 are each independently hydrogen, substituted or unsubstituted C 1 To C 30 Alkyl, substituted or unsubstituted C 6 To C 30 Aryl, substituted or unsubstituted C 3 To C 30 heterocyclic group, halogen, cyano group or a combination thereof.

[0221] R a1 and R a2 At least one of may include an electron withdrawing group.

[0222] R a1 and R a2 At least one of the following materials may include: halogen; cyano; halogen-substituted C 1 To C 30 Alkyl; Halogen substituted C 6 To C 30 Aryl; Halogen-substituted C 3 To C 30 Heterocyclic group; C substituted with cyano 1 To C 30 Alkyl; C substituted with cyano 6 To C 30 Aryl; C substituted with cyano 3 To C 30 heterocyclic group; substituted or unsubstituted pyridyl; substituted or unsubstituted pyrimidinyl; substituted or unsubstituted quinolyl; substituted or unsubstituted isoquinolyl; substituted or unsubstituted quinazolinyl; C substituted with substituted or unsubstituted pyridyl 1 To C 30 Alkyl; C substituted by substituted or unsubstituted pyridyl 6 To C 30 Aryl; C substituted by substituted or unsubstituted pyrimidinyl 1 To C 30 Alkyl; C substituted by substituted or unsubstituted pyrimidinyl 6 To C 30 Aryl; C substituted by substituted or unsubstituted triazine 1 To C 30 Alkyl; C substituted by substituted or unsubstituted triazine 6 To C 30 Aryl; C substituted by substituted or unsubstituted pyrazinyl 1 To C 30Alkyl; C substituted by substituted or unsubstituted pyrazinyl 6 To C 30 Aryl; C substituted by substituted or unsubstituted quinolyl 1 To C 30 Alkyl; C substituted by substituted or unsubstituted quinolyl 6 To C 30 Aryl; C substituted by substituted or unsubstituted isoquinolyl 1 To C 30 Alkyl; C substituted by substituted or unsubstituted isoquinolyl 6 To C 30 Aryl; C substituted by substituted or unsubstituted quinazolinyl 1 To C 30 Alkyl; C substituted by substituted or unsubstituted quinazoline 6 To C 30 aryl; or a combination thereof.

[0223] The active layer 222c can generate excitons by receiving external light, and separate the generated excitons into holes and electrons. When a positive potential is applied to the sensing electrode 221b and a negative potential is applied to the counter electrode 223, the holes separated in the active layer 222c can move toward the counter electrode 223, and the electrons separated in the active layer 222c can move toward the sensing electrode 221b. Therefore, a photocurrent can be formed in the direction from the sensing electrode 221b to the counter electrode 223.

[0224] When a bias voltage (eg, Figure 3 When the reset voltage VRST is set to 1, dark current may flow through the photodiode PD. In addition, when light is incident on the photodiode PD, photocurrent may flow through the photodiode PD. In an embodiment, the amount of light may be detected according to the ratio of the photocurrent and the dark current.

[0225] The auxiliary layer 224 may be disposed above the light emitting diode ED and the photodiode PD. For example, the auxiliary layer 224 may be disposed above the counter electrode 223. The auxiliary layer 224 may reduce the energy barrier of the hole transport layer and the holes moving in the anode direction and promote the movement of the holes. The auxiliary layer 224 may include, for example, fluorene compounds, carbazole compounds, diarylamine compounds, triarylamine compounds, dibenzofuran compounds, dibenzothiophene compounds, dibenzothiophene compounds, or any combination thereof.

[0226] The encapsulation layer 300 may be disposed above the light emitting diode ED and the photodiode PD. For example, the encapsulation layer 300 may be disposed above the auxiliary layer 224. The encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer, and in an embodiment, Fig. 9It is shown that the encapsulation layer 300 includes a first inorganic encapsulation layer 310 , an organic encapsulation layer 320 , and a second inorganic encapsulation layer 330 , which are sequentially stacked.

[0227] The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may each include one or more inorganic materials selected from aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride. The organic encapsulation layer 320 may include a polymer material. The polymer material may include acrylic resin, epoxy resin, polyimide, polyethylene, etc. In an embodiment, the organic encapsulation layer 320 may include acrylate. The organic encapsulation layer 320 may be formed by curing a monomer or applying a polymer. The organic encapsulation layer 320 may be transparent.

[0228] The input sensing layer 400 may be disposed above the encapsulation layer 300. The input sensing layer 400 may obtain coordinate information according to an external input (eg, a touch event). The input sensing layer 400 may include a plurality of touch electrodes and a touch insulating layer.

[0229] The anti-reflection layer 500 may be disposed over the input sensing layer 400. The anti-reflection layer 500 may include a light shielding layer BM, a first color filter CF1, and a second color filter CF2.

[0230] The light shielding layer BM may be arranged above the input sensing layer 400. The light shielding layer BM may at least partially absorb external light or internal reflected light. The light shielding layer BM may include a black pigment. The light shielding layer BM may be a black matrix. The light shielding layer BM may include a first light shielding layer opening BOP1 disposed above the light emitting diode ED and a second light shielding layer opening BOP2 disposed above the photodiode PD. That is, the first light shielding layer opening BOP1 may overlap with the emission area EA, and the second light shielding layer opening BOP2 may overlap with the sensing area SA. The area of ​​the first light shielding layer opening BOP1 may be greater than or equal to the area of ​​the first bank layer opening 209OP1 disposed in the bank layer 209. In addition, the area of ​​the second light shielding layer opening BOP2 may be greater than or equal to the area of ​​the second bank layer opening 209OP2 disposed in the bank layer 209.

[0231] FIG. 10A to FIG. 10C is a diagram for explaining that the photosensor PS according to the embodiment functions as a battery even when no voltage is applied.

[0232] Fig. 10A and Fig. 10B are graphs showing the relationship between the current density J and the bias voltage V when the illumination is 0 lux (lus) (dark), 2lus, 10lus, 100lus, and 200lus, respectively. Fig. 10A and Fig. 10BIn the graph of , the x-axis may indicate the applied bias voltage V, and the y-axis may indicate the linear scale ( Fig. 10A ) and logarithmic (log) scales ( Fig. 10B ) in the current density J.

[0233] Reference Fig. 10A and Fig. 10B As a result of measuring the current when the bias voltage is applied to each illumination, it is found that when there is a reverse bias voltage of about -4V to about 2V, the photosensor PS can be used as a fingerprint detection sensor in the second mode ( Fig. 10A 1011 and Fig. 10B 1021), and even when no bias voltage (0 V) is applied, the current density ( Fig. 10A 1012 and Fig. 10B 1022). The third mode can still operate even in a state where the photocurrent is maintained when there is no bias voltage, no image data is received, and no user's touch is generated, that is, in a state where the first mode and the second mode are not functional. When the display device 1 operates in the third mode, the fourth sensing transistor T11 is driven according to the sixth gate signal G6, and the photodiode PD generates carriers including free electrons and holes based on the intensity of light incident on the light receiving layer, which results in the generation of photocurrent according to the movement of the carriers. The generated photocurrent can be input to the charge controller CC along the readout line RL, and the charge controller CC can control the received photocurrent, convert the photocurrent into a voltage, and deliver the voltage to the battery BT, and the battery BT can store the voltage.

[0234] Reference Fig. 10C , when the bias voltage is -3 V (which may indicate operation in the second mode), a photocurrent may exist for each illumination, and even when the bias voltage is 0 V (which may indicate that the photosensor PS operates as a battery in the third mode), the photocurrent for each illumination is not equal to 0 mA / cm 2 , and the current density can be 1.0E-05mA / cm at 2lux 2 , at 10lux it can be 4.0E-05mA / cm 2 , at 100 lux it can be 4.0E-04mA / cm 2 , at 200 lux it can be 7.0E-04mA / cm 2 , at 1000 lux it can be 4.0E-03mA / cm 2 , and can be 4.0E-02mA / cm at 10000lux 2, therefore, the photosensor PS can be used as a (solar) cell (1031). Graph 1032 shows the current density for each illumination when the bias voltage is -3V and 0V, respectively.

[0235] The process of the method or algorithm described in one or more embodiments of the disclosure may be directly implemented in hardware, a software module executed by hardware, or a combination thereof. The software module may be stored in a random access memory (RAM), a read-only memory (ROM), an erasable programmable ROM (EPROM), a flash memory, a hard disk, a removable disk, a CD-ROM, or other forms of computer-readable recording media known in the art to which the disclosure belongs.

[0236] According to one or more embodiments, a method of charging a display device by using a light receiving element may be provided.

[0237] According to one or more embodiments, according to a method of charging a display device by using a light receiving element, when a fingerprint is not detected, the display device can be used as a battery.

[0238] The disclosed effects are not limited to the above-mentioned effects, and other effects that are not mentioned can be clearly understood by a person of ordinary skill in the art through the description.

[0239] It should be understood that the embodiments described herein should be considered in a descriptive sense only and not for purposes of limitation. The description of features or aspects within each embodiment should generally be considered applicable to other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, it will be understood by those of ordinary skill in the art that various changes in form and detail may be made therein without departing from the spirit and scope defined by the appended claims.

Claims

1. A display device, comprising: substrate; a pixel arranged in a display area of ​​the substrate and comprising a light emitting diode configured to emit light in a first mode; as well as a photosensor disposed in the display area of ​​the substrate and including a light receiving element configured to receive light reflected from an external object in a second mode and to receive external light in a third mode, The first mode is triggered by a signal for displaying an image, the second mode is triggered by a reflection from the external object, and the third mode is triggered by the absence of the signal for displaying an image and the absence of a reflection from the external object.

2. The display device according to claim 1, further comprising a readout circuit arranged in a peripheral area of ​​the substrate and configured to process an electrical signal corresponding to the amount of the light received by the light receiving element in the second mode.

3. The display device according to claim 2, further comprising: a charge controller disposed in the peripheral region of the substrate and configured to store and control an electrical signal corresponding to an amount of the external light received by the light receiving element in the third mode; as well as A battery is configured to store the output voltage of the charge controller.

4. The display device according to claim 1, wherein: the light reflected from the external object includes light emitted from the light emitting diode in the second mode and then reflected from the external object, Wherein, the light emitted from the light emitting diode includes green light.

5. The display device according to claim 2, wherein: The photoelectric sensor includes a sensing circuit connected to the light receiving element, The light receiving element includes a first electrode, a second electrode, and an intermediate layer between the first electrode and the second electrode, and The sensing circuit includes: a first transistor, including a gate electrode connected to the first electrode of the light receiving element; a second transistor, connected between the first transistor and a readout line connected to the readout circuit; a reset transistor, connected between a reset voltage line and the first electrode of the light receiving element; and a third transistor, connected between the first electrode of the light receiving element and the readout line.

6. The display device according to claim 5, wherein: In the second mode, the reset transistor is turned on in response to a first reset signal, the second transistor is turned on in response to a first control signal, and the photocurrent output from the first transistor is transferred to the readout line.

7. The display device according to claim 6, wherein: In the third mode, the third transistor is turned on in response to a second reset signal, and a photocurrent corresponding to a voltage between the first electrode and the second electrode of the light receiving element is transmitted to the readout line.

8. The display device according to claim 7, wherein: The photosensor operates in the third mode when the light emitting diode included in the pixel does not emit light and the photosensor does not receive the light reflected from the external object.

9. The display device according to claim 1, wherein: The light receiving element includes an organic photodiode.

10. A display device, comprising: A display panel including a plurality of pixels and a plurality of photosensors; a driving circuit configured to drive the plurality of pixels and the plurality of photosensors; a controller configured to control the display panel to display an image according to light emission from the plurality of pixels in a first mode, configured to control the plurality of photosensors to sense light reflected from a fingerprint in a second mode, and configured to control external light sensed by the plurality of photosensors to charge a battery in a third mode; a readout circuit configured to receive a plurality of light sensing signals of the plurality of photosensors in the second mode and perform signal processing to obtain fingerprint information; as well as The battery is configured to store a voltage corresponding to the plurality of light sensing signals of the plurality of photosensors in the third mode. 11 . The display device according to claim 10 , further comprising a charge controller configured to control the voltage corresponding to the plurality of light sensing signals of the plurality of photosensors in the third mode.

12. The display device according to claim 11, wherein: The controller is configured to control the display device to operate in the third mode in the absence of a signal for operating in the first mode or the second mode.

13. The display device according to claim 12, wherein: The plurality of photosensors and the charging controller are connected via a switching transistor, and the switching transistor is turned on in response to a control signal from the controller.

14. A method of controlling the operation of a display device including a plurality of pixels and a plurality of photosensors, the method comprising the steps of: in a first mode, controlling the display device to display an image based on light emissions from the plurality of pixels; in a second mode, controlling the display device to sense light reflected from an external object by using the plurality of photosensors and processing an electrical signal corresponding to an amount of the light; as well as In a third mode, the display device is controlled to sense external light by using the plurality of photosensors and to charge a voltage corresponding to an amount of the external light to charge a battery.

15. The method according to claim 14, wherein: The controlling step in the third mode includes controlling the display device to operate in the third mode in the absence of a signal to operate in the first mode or the second mode.

16. The method according to claim 14, wherein: In the second mode, light emitted from a plurality of first pixels among the plurality of pixels is reflected from the external object, wherein the plurality of first pixels are arranged adjacent to the external object and emit light of a specific color, and The light emitted from the plurality of first pixels includes green light.

17. The method according to claim 14, wherein: Each of the plurality of photosensors includes a light receiving element and a sensing circuit connected to the light receiving element, The light receiving element includes a first electrode, a second electrode, and an intermediate layer between the first electrode and the second electrode, and The sensing circuit includes: a first transistor, including a gate electrode connected to the first electrode of the light receiving element; a second transistor, connected between the first transistor and a readout line connected to a readout circuit; a reset transistor, connected between a reset voltage line and the first electrode of the light receiving element; and a third transistor, connected between the first electrode of the light receiving element and the readout line.

18. The method according to claim 17, further comprising: In the second mode, the reset transistor is turned on in response to a first reset signal, the second transistor is turned on in response to a first control signal, and the photocurrent output by the first transistor is transferred to the readout line.

19. The method according to claim 18, further comprising: In the third mode, the third transistor is turned on in response to a second reset signal, and a photocurrent corresponding to a voltage between the first electrode and the second electrode of the light receiving element is transmitted to the readout line.

20. The method according to claim 17, wherein: The light receiving element includes an organic photodiode.

Citation Information

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