A Si-based solar cell structure with GaAs nanorods grown on a Si substrate as an i-type layer and a method for preparing the same

Abstract

The present invention belongs to the technical field of solar cells, and discloses a Si-based solar cell structure with GaAs nanocolumns grown on a Si substrate as an i-type layer and a preparation method thereof. The solar cell structure includes a back electrode, a Si substrate, an i-type layer GaAs nanocolumns, a hole transport layer, and a front electrode from bottom to top; the i-type layer GaAs nanocolumns are prepared by the following method: 1) the Si substrate is subjected to high-temperature annealing, the Ga source and the As source are heated separately, the As source is evaporated first, and then cracked; 2) a layer of Ga is deposited on the Si substrate, the GaAs nanocolumns are grown at high temperature, and the growth continues at low temperature, and the i-type layer GaAs nanocolumns are obtained on the Si substrate. The present invention also discloses a preparation method for the solar cell structure. The present invention uses Ga as a self-catalyst, and other impurities will not be introduced. At the same time, the i-type layer GaAs nanocolumns can enhance the absorption of sunlight by Si-based solar cells and improve the photoelectric conversion efficiency.

Description

Technical Field

[0001] The invention belongs to the field of Si-based GaAs solar cells, and in particular relates to a Si-based solar cell structure with GaAs nanocolumns grown on a Si substrate as an i-type layer and a preparation method thereof. Background Art

[0002] In recent years, with the development of nanotechnology, low-dimensional nanomaterials have received more and more attention. The movement of carriers in one-dimensional nanostructures is localized in a specific direction, while in the other two directions it is restricted by potential barriers. This gives one-dimensional nanomaterials many properties that three-dimensional materials do not have. Group III-V semiconductor nanowires have important research significance and development prospects in optoelectronics, electrochemistry, sensors, quantum computing and other fields. Among them, gallium arsenide (GaAs) has the characteristics of direct band gap, high absorption coefficient, high carrier mobility, and high temperature resistance. It has been widely studied in solar cells, detectors, thermoelectric devices, etc., and has become a hot spot in the research field of next-generation high-performance microelectronic optoelectronic devices.

[0003] In order to prepare and apply GaAs low-dimensional nanomaterials, in the traditional preparation method, the morphology and density of GaAs nanomaterials prepared by using gold (Au) nanoparticles as catalysts are well controlled, but Au atoms will diffuse into the nanocolumns during the growth process, introducing deep impurity energy levels, thereby enhancing non-radiative recombination, seriously affecting the electrical properties of GaAs nanodevices, and the GaAs nanocolumns obtained by the selective growth method of silicon dioxide templates have many defects and complex processes. Therefore, it is of great advantage to use metal Ga as a self-catalyst to grow GaAs nanomaterials. However, in the field of solar cells, the growth of nanocolumns with uniform diameter and good crystal quality is still a difficulty faced in current research. In the field of solar cell applications, GaAs is basically used as a P-type or N-type light-absorbing layer, and there is no relevant report on using it as an i-type layer structure of the battery. Summary of the invention

[0004] In order to overcome the problems of GaAs nanocolumn growth and application in the prior art, the present invention provides a Si-based solar cell structure with GaAs nanocolumns grown on a Si substrate as an i-type layer and a preparation method thereof. The present invention divides the As source area into an evaporation area and a cracking area, and allows the As source to be cracked into smaller As2 molecules in the cracking area to promote the growth of GaAs nanocolumns. The i-layer structure of the Si-based solar cell is prepared by a two-step growth method using a high temperature at the beginning of the growth and a low temperature at the end, and a hole transport layer is prepared thereon to obtain a Si-based solar cell.

[0005] In order to solve the above technical problems, the technical solution of the present invention is as follows:

[0006] A Si-based solar cell structure with GaAs nanocolumns grown on a Si substrate as an i-type layer comprises, from bottom to top, a back electrode, a Si substrate, a GaAs nanocolumn, a hole transport layer, and a front electrode; the GaAs nanocolumn is an i-type layer.

[0007] The i-type layer GaAs nanocolumns are prepared by the following method:

[0008] S1) annealing the Si substrate at high temperature; heating the Ga source and the As source respectively, when the As source is heated, the As source region is divided into an evaporation region and a cracking region in sequence, the As source evaporates in the evaporation region, and then is transported to the cracking region for cracking;

[0009] S2) The heated Ga source first deposits a layer of Ga on the surface of the Si substrate, and then the As source and Ga source cracked in the cracking zone grow GaAs nanocolumns at high temperature on the surface of the Si substrate with the Ga layer deposited, and then continue to grow at low temperature to obtain i-type layer GaAs nanocolumns on the Si substrate;

[0010] The temperature for high-temperature growth is 500~600℃, and the temperature for low-temperature continued growth is 400~500℃.

[0011] The high temperature annealing temperature is 780-820°C, and the annealing time is 10-20 minutes.

[0012] The crystal plane of the Si substrate is (100), (110) or (111), and the doping type is n-type doping.

[0013] The high temperature growth time is 0.5~2h.

[0014] The time for continued growth at low temperature is 10~30min.

[0015] The temperature of Ga source heating is 850~920℃, the temperature of As source evaporation is 250~350℃, and the temperature of cracking is 900~1000℃.

[0016] The front electrodes are arranged at two ends of the hole transport layer.

[0017] The back electrode is an Au electrode, and the front electrode is an Ag electrode.

[0018] The method for preparing a Si-based solar cell structure in which GaAs nanorods are grown on a Si substrate as an i-type layer comprises the following steps:

[0019] 1) The Si substrate is annealed at high temperature, and the Ga source and As source are heated separately at the same time. The As source is first evaporated in the evaporation zone and then cracked in the cracking zone;

[0020] 2) Open the substrate baffle and the Ga source baffle to pre-deposit a layer of Ga as a self-catalyst for gas-liquid-solid growth, and close the substrate baffle; open the As source valve opening and the substrate baffle, grow GaAs nanocolumns at high temperature, and continue the growth of GaAs nanocolumns at low temperature to obtain i-type layer GaAs nanocolumns on the Si substrate;

[0021] 3) Evaporating a layer of electrode on the back of the Si substrate and annealing to form an ohmic contact, and then preparing a hole transport layer on the i-type layer GaAs nanorods of the Si substrate;

[0022] 4) A front electrode is evaporated on the hole transport layer to obtain a Si-based solar cell structure with GaAs nanorods grown on a Si substrate as an i-type layer.

[0023] In step 1), the crystal plane of the Si substrate is (100), (110) or (111), the doping type is n-type doping, the resistivity is 0.001-0.005, and the thickness of the Si substrate is 250-500 μm.

[0024] Steps 1) and 2) are performed in MBE.

[0025] The temperature of the high temperature annealing in step 1) is 780~820℃, the time of the high temperature annealing is 10~20min, the temperature of the Ga source after heating is 850~920℃, the As source evaporates first and then reaches the cracking zone to be cracked into As2 to participate in the growth of the subsequent nanocolumns; the temperature of the As source evaporation is 250~350℃, and the temperature of the cracking is 900~1000℃.

[0026] The pre-deposition time in step 2) is 1-5 minutes, the As source valve opening is 10-80%, the high temperature growth temperature is 500-600°C, the low temperature continued growth temperature is 400-500°C, the diameter of the i-type layer GaAs nanocolumn is 20-100nm, and the height is 100-250nm.

[0027] The growth of nanocolumns requires a specific growth temperature. Nanocolumns cannot be grown at low temperatures at the beginning. The purpose of low-temperature growth later is to prevent the nanocolumns from collapsing due to rapid growth after they grow to a certain length.

[0028] The high temperature growth time is 0.5 to 2 hours; the low temperature continued growth time is 10 to 30 minutes.

[0029] The material of the hole transport layer is a conductive and light-transmitting material, specifically including one or more of graphene, Mxene, carbon nanotubes, TMDs (transition metal disulfides), and PEDOT:PSS.

[0030] In step 3), the back electrode is Au, the thickness is 100-120 nm, and the annealing temperature is 300-330° C.;

[0031] The hole transport layer is prepared by a suction filtration film-making method, a spin coating method, a magnetron sputtering method, an evaporation method or a CVD (chemical vapor deposition) method.

[0032] The front electrode in step 4) is Ag, and its thickness is 100~120nm.

[0033] The present invention uses Ga as a self-catalyst, has a better catalytic growth effect, does not introduce other impurities, and adopts a high-temperature and low-temperature two-step technology. The low-temperature growth in the later stage can prevent the collapse and damage of the GaAs nanocolumns. The temperature of the cracking zone of the As source is raised to above 900°C (such as 950°C) through equipment (such as MBE), so that the As source is cracked into smaller As2 molecules to promote the growth of GaAs nanocolumns. And the GaAs nanocolumns are used as the i-type layer structure of Si-based solar cells. As the i-layer of Si-based solar cells, the GaAs nanocolumns themselves have excellent light absorption characteristics, and the sunlight can be reflected multiple times in the GaAs nanocolumn layer, thereby enhancing the absorption of sunlight and improving the photoelectric conversion efficiency.

[0034] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0035] The present invention uses Ga as a self-catalyst, does not introduce other impurities, and simultaneously cracks the As source into smaller As2 molecules to promote the growth of GaAs nanocolumns, and prepares the i-layer structure of Si-based solar cells by using a two-step growth method of high temperature at the beginning of growth and low temperature at the end. Using GaAs nanocolumns as the i-layer structure of Si-based solar cells can enhance the absorption of sunlight and improve the photoelectric conversion efficiency. GaAs nanocolumns have great development potential as the i-layer of Si-based solar cells. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 This is a cross-sectional SEM image of the GaAs nanorod obtained in Example 1;

[0037] Figure 2 Schematic diagram of the structure of a Si-based solar cell with GaAs nanorods as i-type layers in Example 1; 1-back electrode, 2-Si substrate, 3-GaAs nanorods, 4-hole transport layer, 5-front electrode;

[0038] Figure 3 1 is an IV curve diagram of the Si-based solar cell of Example 1 and Comparative Example 1. DETAILED DESCRIPTION

[0039] The present invention is further described below in conjunction with the accompanying drawings and specific examples, but the examples do not limit the present invention in any form. Unless otherwise specified, the reagents, methods and equipment used in the present invention are conventional reagents, methods and equipment in the art. Unless otherwise specified, the reagents and materials used in the following examples are commercially available.

[0040] The schematic diagram of the structure of the Si-based solar cell with GaAs nanorods as i-type layers of the present invention is shown in FIG. Figure 2 As shown, from bottom to top, it includes a back electrode, a Si substrate, a GaAs nanocolumn, a hole transport layer, and a front electrode; the GaAs nanocolumn is an i-type layer.

[0041] Figure 1 This is the SEM image of the cross section of the GaAs nanocolumn obtained in Example 1.

[0042] Figure 3 1 is an IV curve diagram of the Si-based solar cell of Example 1 and Comparative Example 1.

[0043] Example 1

[0044] A method for preparing a Si-based solar cell by growing GaAs nanorods as an i-type layer on a Si substrate comprises the following steps:

[0045] 1) Select the parameters of the Si substrate: the thickness of the Si substrate is 400 μm, the crystal plane is (111), the doping type is n-type doping, and the resistivity is 0.001~0.005;

[0046] 2) Place the selected Si substrate in MBE for high-temperature annealing at 800°C for 20 minutes; heat the Ga source and As source separately, the Ga source temperature is 860°C, the As evaporation source temperature is 270°C, and the cracking source temperature is 950°C (the As source has two temperature zones, the front end is the evaporation zone, and the rear end is the cracking zone. The As4 vapor evaporated from the evaporation zone needs to pass through the cracking zone to further crack into As2);

[0047] 3) Open the substrate baffle and Ga source baffle to pre-deposit a layer of Ga as a self-catalyst for VLS growth. The pre-deposition time of Ga source is 1 min. Close the substrate baffle. When the substrate growth temperature is reached, open the As source valve opening and substrate baffle. The As source valve opening is 70%. After high-temperature growth at 580°C for 1h, adjust the temperature to 480°C for the later growth of GaAs nanocolumns (the later growth time is 20min).

[0048] 4) On the GaAs nanorods grown in step 3), a layer of Au electrode is first deposited on the back of the substrate and annealed to form an ohmic contact, the thickness of Au is 120 nm, and the annealing temperature is 330° C. A PES (polyethersulfone) filter membrane and a carbon nanotube dispersion liquid concentration of 0.005 mg / ml are used to filter and prepare a carbon nanotube film, which is then transferred to the GaAs nanorods to prepare a hole transport layer;

[0049] 5) A layer of Ag electrode is evaporated on the hole transport layer in step 4), and the thickness of the Ag electrode is 100 nm to obtain a solar cell with GaAs nanocolumns grown on a Si substrate.

[0050] Example 2

[0051] A method for preparing a Si-based solar cell by growing GaAs nanorods as an i-type layer on a Si substrate comprises the following steps:

[0052] 1) Select the parameters of the Si substrate: the thickness of the Si substrate is 400 μm, the crystal plane is (111), the doping type is n-type doping, and the resistivity is 0.001~0.005;

[0053] 2) Place the selected Si substrate in MBE for high temperature annealing at 780°C, annealing time of 10 min, Ga source temperature of 890°C, As evaporation source temperature of 300°C, and cracking source temperature of 950°C;

[0054] 3) Open the substrate baffle and Ga source baffle to pre-deposit a layer of Ga as a self-catalyst for VLS growth. The pre-deposition time of Ga source is 2 minutes, and the substrate baffle is closed; open the As source valve opening and substrate baffle, the As source valve opening is 50%, and the growth temperature is 550°C for GaAs nanocolumns to grow for 1 hour, and then the temperature is adjusted to 450°C for the later growth of GaAs nanocolumns;

[0055] 4) On the GaAs nanorods grown in step 3), a layer of Au electrode is first deposited on the back of the substrate and annealed to form an ohmic contact, the thickness of Au is 120 nm, and the annealing temperature is 330° C. A PES (polyethersulfone) filter membrane and a carbon nanotube dispersion liquid concentration of 0.005 mg / ml are used to filter and prepare a carbon nanotube film, which is then transferred to the GaAs nanorods to prepare a hole transport layer;

[0056] 5) A layer of Ag electrode is evaporated on the hole transport layer in step 4), and the thickness of the Ag electrode is 100 nm to obtain a Si-based solar cell with GaAs nanorods grown on a Si substrate as the i-layer.

[0057] Comparative Example 1

[0058] Different from Examples 1 and 2, instead of growing GaAs nanorods, a hole transport layer is transferred onto the Si substrate to prepare a Si-based solar cell.

[0059] The device parameter comparison of the solar cell prepared in Example 1 and the solar cell prepared in Comparative Example 1 is shown in Table 1. The IV curves of the solar cells of Example 1 and Comparative Example 1 are shown in Figure 3 shown.

[0060] Table 1 Performance parameters of solar cells prepared in Example 1 and Comparative Example 1

[0061]

[0062] The present invention is not limited to the above-mentioned embodiments. On the basis of the technical solution disclosed in the present invention, technicians in this field can make some substitutions and deformations to some technical features therein according to the disclosed technical content without creative labor, and these substitutions and deformations are all within the protection scope of the present invention.

Claims

1. A Si-based solar cell structure with GaAs nanorods grown on a Si substrate as an i-type layer, characterized in that: From bottom to top, it includes back electrode, Si substrate, GaAs nanorod, hole transport layer, and front electrode; The GaAs nanocolumns are i-type layer GaAs nanocolumns; The i-type layer GaAs nanocolumns are prepared by the following method: S1) annealing the Si substrate at high temperature; heating the Ga source and the As source respectively, when the As source is heated, the As source region is divided into an evaporation region and a cracking region in sequence, the As source evaporates in the evaporation region, and then is transported to the cracking region for cracking; The temperature of the Ga source after heating is 850-920°C; the temperature of the As source evaporation is 250-350°C, and the temperature of the cracking is 900-1000°C; the temperature of the high temperature annealing is 780-820°C, and the time of the high temperature annealing is 10-20 minutes; S2) The heated Ga source first deposits a layer of Ga on the surface of the Si substrate, and then the cracked As source and Ga source grow GaAs nanocolumns at high temperature on the surface of the Si substrate with the Ga layer deposited thereon, and then continue to grow at low temperature, and obtain i-type layer GaAs nanocolumns on the Si substrate; The temperature for high-temperature growth is 500~600℃, and the temperature for low-temperature continued growth is 400~500℃; The high temperature growth time is 0.5 to 2 hours; the low temperature continued growth time is 10 to 30 minutes; The crystal plane of the Si substrate is (100), (110) or (111), and the doping type is n-type doping.

2. The Si-based solar cell structure having GaAs nanorods grown on a Si substrate as an i-type layer according to claim 1, characterized in that: The front electrodes are arranged at two ends of the hole transport layer.

3. The method for preparing a Si-based solar cell structure with GaAs nanorods as i-type layers grown on a Si substrate according to any one of claims 1 to 2, characterized in that: The following steps are involved: 1) The Si substrate is annealed at high temperature, and the Ga source and As source are heated separately at the same time. The As source is first evaporated in the evaporation zone and then cracked in the cracking zone; 2) Open the substrate baffle and the Ga source baffle to pre-deposit a layer of Ga on the Si substrate as a self-catalyst for gas-liquid-solid growth, and close the substrate baffle; open the As source valve opening and the substrate baffle, grow GaAs nanocolumns at high temperature, and continue to grow at low temperature to obtain i-type layer GaAs nanocolumns on the Si substrate; 3) Evaporating a layer of electrode on the back of the Si substrate and annealing to form an ohmic contact, and then preparing a hole transport layer on the i-type layer GaAs nanorods of the Si substrate; 4) A front electrode is evaporated on the hole transport layer to obtain a Si-based solar cell with GaAs nanorods grown on a Si substrate as an i-type layer.

4. The method for preparing a Si-based solar cell structure by growing GaAs nanorods as i-type layers on a Si substrate according to claim 3, characterized in that: The pre-deposition time in step 2) is 1-5 minutes, the As source valve opening is 10-80%, the high temperature growth temperature is 500-600°C, the low temperature continued growth temperature is 400-500°C, the diameter of the i-type layer GaAs nanocolumn is 20-100nm, and the height is 100-250nm.

5. The method for preparing a Si-based solar cell structure by growing GaAs nanorods as i-type layers on a Si substrate according to claim 3, characterized in that: In step 1), the crystal plane of the Si substrate is (100), (110) or (111), and the doping type is n-type doping.

6. The method for preparing a Si-based solar cell structure with GaAs nanorods grown on a Si substrate as an i-type layer according to claim 3, characterized in that: The material of the hole transport layer is a conductive and light-transmitting material, specifically including one or more of graphene, Mxene, carbon nanotubes, TMDs, and PEDOT:PSS.

7. The method for preparing a Si-based solar cell structure with GaAs nanorods grown on a Si substrate as an i-type layer according to claim 3, characterized in that: In step 3), the electrode evaporated on the back side is Au, with a thickness of 100-120 nm and an annealing temperature of 300-330°C; The hole transport layer is prepared by a vacuum filtration film-making method, a spin coating method, a magnetron sputtering method, an evaporation method or a CVD method; The front electrode in step 4) is Ag, and its thickness is 100~120nm.

8. The method for preparing a Si-based solar cell structure with GaAs nanorods grown on a Si substrate as an i-type layer according to claim 3, characterized in that: The thickness of the Si substrate is 250-500 μm; Steps 1) and 2) are performed in MBE.

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