Document processing methods, devices, systems and related equipment

By acquiring and filtering the identifiers of operators required by the processor to execute computing tasks, lightweight files are generated, solving the problem of excessive storage resource consumption in heterogeneous computing and achieving more efficient execution of computing tasks and a wider range of application scenarios.

CN119536834BActive Publication Date: 2025-11-14HUAWEI TECH CO LTD
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Patent Information

Application Number
CN202311110182.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-08-30
Publication Date
2025-11-14
Estimated Expiration
2043-08-30

AI Technical Summary

Technical Problem

In heterogeneous computing, the large amount of executable code data of full operators leads to excessive consumption of storage resources, limiting their application scenarios in edge environments with limited storage space.

Method used

By obtaining the identifiers of the operators required by the processor to perform computational tasks, filtering and packaging the corresponding executable code, lightweight files are generated, saving only the code required by the processor, thus reducing the amount of data stored and loaded.

Benefits of technology

It effectively reduces the consumption of storage resources, enriches the application scenarios of heterogeneous computing, and improves the execution efficiency of computing tasks.

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Abstract

This application provides a file processing method, apparatus, system, and related equipment. A file set is acquired, including executable code for multiple first operators and executable code for multiple second operators. A first identifier for the first operators required by a first processor and a second identifier for the second operators required by a second processor (heterogeneous to the first processor) are obtained. The executable code of the multiple first operators is filtered according to the first identifier to obtain a first file. The executable code of the multiple second operators is then filtered according to the second identifier to obtain a second file. A computational task is then executed using the first and second processors based on the first and second files. This effectively reduces the amount of executable code data that needs to be stored and loaded during the execution of the computational task, thus effectively reducing the storage space occupied during the execution of the computational task, i.e., reducing the consumption of storage resources.
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Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a document processing method, apparatus, system and related equipment. Background Technology

[0002] Heterogeneous computing refers to computing devices utilizing different types of processors to collaborate on computational tasks, thereby improving the device's processing efficiency. For example, a computing device may include a central processing unit (CPU) and a graphics processing unit (GPU). During computation, the CPU can handle preprocessing tasks such as data cleaning and deduplication, while the GPU performs vector calculations on the preprocessed data (GPUs are more efficient at vector calculations). Finally, the CPU performs calculations on the vector calculation results, such as converting the results to scalars. In this way, the computing device can leverage the GPU to accelerate the computational task and improve processing efficiency.

[0003] The operations performed by a computing device can be called operators. Different processors within the computing device can execute different parts of the executable code of these operators to perform the corresponding data processing operations. This executable code can be, for example, binary code.

[0004] In practical applications, heterogeneous processors on computing devices can be divided into host-side processors and device-side processors. Manufacturers typically integrate all operators that the host-side processor and the device-side processor can execute, and centrally distribute the executable code for all operators. Correspondingly, the computing device can store the executable code for all operators locally. In this way, the host-side processor and the device-side processor can perform corresponding data processing operations based on the locally stored executable code to complete the computational tasks generated by the applications on the computing device.

[0005] However, the large size of the executable code for full operators means that the host and device processors need to consume significant storage resources when performing computational tasks based on this executable code, thus limiting the application scenarios suitable for heterogeneous computing. For example, for computing devices in edge environments, which have limited storage space, excessive storage resource consumption can affect the deployment of heterogeneous computing on these devices. Summary of the Invention

[0006] In view of this, embodiments of this application provide a file processing method to reduce the storage resources required by the host-side processor and the device-side processor in a computing device when performing computing tasks, thereby enriching the application scenarios applicable to heterogeneous computing. This application also provides corresponding apparatus, systems, computing devices, computer-readable storage media, and computer program products.

[0007] In a first aspect, embodiments of this application provide a file processing method applied to a computing device, which includes a first processor and a second processor. The first and second processors are heterogeneous; for example, the first processor may be a CPU, and the second processor may be a GPU or DPU. During file processing, a file set is first acquired. This file set includes executable code for multiple first operators and executable code for multiple second operators. Typically, the first processor can execute the first operators, while the second processor can execute the second operators. Furthermore, the first and second processors can collaboratively execute the same operator, or the first processor can execute a single operator independently. The first processor executes a first operator, and the second processor executes a second operator. Then, the first identifier of the first operator to be executed when the first processor executes the computation task, and the second identifier of the second operator to be executed when the second processor executes the computation task, are obtained. The executable code of multiple first operators in the file set is filtered according to the first identifier to obtain a first file, which includes the executable code of the first operator indicated by the first identifier. The executable code of multiple second operators in the file set is then filtered according to the second identifier to obtain a second file, which includes the executable code of the second operator indicated by the second identifier. Finally, the computation task is executed using the first processor and the second processor, based on the filtered first file and second file.

[0008] Thus, before executing a computational task, the executable code, which includes multiple operators, is filtered based on the identifiers of the operators to be executed by each processor. This effectively reduces the amount of executable code data that needs to be stored and loaded during the computational task. Specifically, the executable code for operators that do not need to be executed by each processor does not need to be stored locally on the computing device. This effectively reduces the storage space occupied during the computational task, thus reducing storage resource consumption and lowering the storage resource requirements of heterogeneous computing on the computing device, thereby enriching the application scenarios applicable to heterogeneous computing. Furthermore, when the first processor needs to execute multiple first operators, or the second processor needs to execute multiple second operators, the executable code of these multiple first or second operators is packaged into a single file. This reduces file loading latency when the first processor loads the packaged file (i.e., the first file or the second file) into memory, thereby improving the execution efficiency of the computational task.

[0009] In one possible implementation, in the process of filtering the executable code of multiple first operators according to the first identifier to obtain the first file, specifically, the process may first filter according to the executable code of multiple first operators corresponding to the first identifier to obtain the executable code of the first operator indicated by the first identifier, and then package the executable code of the first operator indicated by the first identifier to obtain the first file. Thus, the packaged first file may include the executable code of one or more first operators indicated by the first identifier, thereby reducing file loading latency when the first processor loads the packaged first file into memory, thereby improving the execution efficiency of the computing task.

[0010] Similarly, in the process of generating the second file, the executable code of multiple second operators corresponding to the second identifier can be filtered first to obtain the executable code of the second operator indicated by the second identifier. Then, the executable code of the second operator indicated by the second identifier is packaged to obtain the second file.

[0011] In one possible implementation, when performing computational tasks based on the first and second files, the first file may be parsed first to obtain at least one first executable file, each containing executable code for a first operator. The second file may also be parsed to obtain at least one second executable file, each containing executable code for a second operator. The first processor executes the at least one first executable file, and the second processor executes the at least one second executable file sequentially according to the execution order of the first executable files. Thus, the first and second processors can collaboratively execute computational tasks based on the executable code included in their respective files. Furthermore, since the first and second files are packaged together, file loading latency is reduced when loaded into memory, thereby improving the efficiency of the computational task.

[0012] In one possible implementation, the first and second files are in binary file format, such as ".bin".

[0013] In one possible implementation, the first executable file is a dynamic link library file, and each dynamic link library file records the binary code of a first operator, while the second executable file is an object file, and each object file records the binary code of a second operator.

[0014] In one possible implementation, during file processing, the lightweight first and second files can be stored in the file system of the computing device, such as a file system built using the device's memory. In this way, the computing device can store only the lightweight first and second files, eliminating the need for a large collection of files, thereby reducing the storage resources required to perform computational tasks.

[0015] In one possible implementation, during file processing, a third file and a fourth file can be obtained from the file system. These third and fourth files can be obtained, for example, by filtering a file set according to the process described above. The third file includes executable files of multiple third operators required by the first processor when executing the target model, and the fourth file includes executable files of at least one fourth operator required by the second processor when executing the target model. This at least one fourth operator is a subset of the multiple third operators, meaning the fourth operator is an operator executed collaboratively by the second and first processors. Then, the third file is parsed to obtain multiple third executable files, each of which records the executable code (e.g., binary code) of a third operator. The fourth file is also parsed to obtain multiple fourth executable files, each of which records the executable code of a fourth operator. Finally, the executable code from the multiple third executable files and the executable code from at least one fourth executable file are added to the target model file to obtain an offline model file, which is then output. Thus, after deploying the offline model file to a computing device with multiple heterogeneous processors, the executable code of multiple operators integrated in the offline model file allows the computing device to execute multiple operators in the target model without needing to obtain the file set containing all the executable code of the full set of operators released by the manufacturer. Instead, it can execute the executable code integrated in the offline model file based on multiple heterogeneous processors, thereby running the target model on the computing device and reducing the storage resource requirements of the computing device.

[0016] In one possible implementation, when obtaining the identifier of the first operator to be executed by the first processor and the second identifier of the second operator to be executed by the second processor, specifically, historical execution data may be obtained first. This historical execution data includes data generated by the first and second processors when executing the computational task based on the file set. The first and second identifiers are then determined based on this historical execution data. In this way, the first processor and the operator to be executed by the processor are automatically detected based on the data records of the computational tasks executed by the first and second processors in the past.

[0017] In one possible implementation, the identifiers of a plurality of second operators are matched with the identifiers of a subset of the plurality of first operators. The operators whose identifiers match are those executed collaboratively by the first and second processors.

[0018] Secondly, this application provides a document processing apparatus, which includes modules for performing the document processing method in the first aspect or any possible implementation of the first aspect.

[0019] Thirdly, this application provides a file processing system, which includes a first processor, at least one second processor, a memory, and a file processing device. The first processor and at least one second processor are heterogeneous, such as the first processor being a CPU and the file system including multiple processors heterogeneous to the first processor, such as a GPU and a DPU. The file processing device is used to execute the method described in the first aspect or any implementation thereof. The functions of the first processor, at least one second processor, and memory can be found in the relevant descriptions in the first aspect.

[0020] Fourthly, this application provides a computing device including a processor and a memory. The memory stores program instructions, and the processor executes the program instructions to perform the file processing method described in the first aspect or any possible implementation thereof. It should be noted that the memory may be integrated into the processor or may be independent of the processor. The computing device may also include a bus. The processor is connected to the memory via the bus. The memory may include readable storage memory and random access memory.

[0021] Fifthly, this application provides a computer-readable storage medium storing instructions that, when executed on at least one computing device, cause the at least one computing device to perform the method described in the first aspect or any implementation thereof.

[0022] In a sixth aspect, this application provides a computer program product containing instructions that, when run on at least one computing device, cause the at least one computing device to perform the method described in the first aspect or any implementation thereof.

[0023] Based on the implementation methods provided in the above aspects, this application can be further combined to provide more implementation methods. Attached Figure Description

[0024] Figure 1 A schematic diagram of the structure of an exemplary computing device provided in an embodiment of this application;

[0025] Figure 2This is a schematic diagram of an operator package;

[0026] Figure 3 A flowchart illustrating a document processing method provided in an embodiment of this application;

[0027] Figure 4 This is a schematic diagram illustrating the execution of a computational task based on the first and second documents.

[0028] Figure 5 A flowchart illustrating another document processing method provided in this application embodiment;

[0029] Figure 6 This is a schematic diagram of the structure of a document processing device provided in an embodiment of this application;

[0030] Figure 7 This is a schematic diagram of the structure of a computing device provided in an embodiment of this application. Detailed Implementation

[0031] The solutions in the embodiments provided in this application will now be described with reference to the accompanying drawings.

[0032] See Figure 1 The diagram shows a schematic representation of the structure of a computing device. Figure 1 As shown, the computing device 10 includes multiple processors, which are located on the host side and the device side respectively. For ease of understanding and explanation, Figure 1 The example described uses a host-side processor 101 and a device-side processor 102 as examples. In actual applications, the number of processors included on the host side and the device side can be one or more. Processor 101 and processor 102 can be connected via a bus, such as a Compute Express Link (CXL) bus. Furthermore, the computing device 10 also includes a memory 103 and a file processing device 104, such as... Figure 1 As shown. Alternatively, the computing device 10 may also include other components.

[0033] The host-side processor 101 is used to execute a single operator, specifically the executable code (such as binary code) corresponding to that operator, or to execute the same operator in conjunction with the device-side processor 102. For example, the processor 101 can be a general-purpose processor, such as a central processing unit (CPU).

[0034] The device-side processor 102 is used to collaboratively execute the same operator with the host-side processor 101. Specifically, processor 101 may execute part of the executable code of the operator, while processor 102 may execute another part of the executable code of the operator. For example, processor 102 may be any type of processor, such as a data processing unit (DPU), graphics processing unit (GPU), neural network processing unit (NPU), or tensor processing unit (TPU), or other types of processors; there is no limitation on this. Furthermore, processor 102 and processor 101 are heterogeneous processors. For example, when processor 101 is a CPU, processor 102 may be a DPU or GPU, and can collaboratively execute the same operator with processor 101 to accelerate computational tasks.

[0035] The memory 103 is used to store the executable code executed by the processor 101 and processor 102, such as recording the executable code in the form of a file. In practical applications, a file system can be built on the memory 103 in the computing device 10, which can manage the executable files in the memory 103 accordingly. For example, the memory 103 can be a solid-state drive (SSD), a disk, etc.

[0036] The file processing device 104 is used to process the executable code of the operators executed by the processor 101 and the processor 102, so as to reduce the occupation of the storage resources of the computing device 10 during the execution of computing tasks.

[0037] Specifically, because manufacturers typically produce products to adapt to task execution processes in various application scenarios, such as... Figure 2The operator package shown includes executable code for all operators that can be executed by both the host-side and device-side processors. This executable code can be, for example, binary code. The binary code for all operators that can be executed by the host-side processor 101 is placed in a single, large executable file, while the binary code for all operators that can be executed by the device-side processor 102 is distributed across multiple smaller executable files (e.g., hundreds of small files). Because the operator package is large, it requires significant storage space not only for the memory 103 but also for the processor 101 to load it into memory. Furthermore, since the operator package includes multiple small files (executable code for all operators that can be executed by the processor 102), loading these small files into memory is time-consuming, thus impacting the overall execution efficiency of the computational task.

[0038] Based on this, in the computing device 10 provided in this embodiment, the file processing device 104 first obtains a file set (such as the operator package mentioned above) including all operators released by the manufacturer, and obtains the first identifier of the first operator to be executed when the processor 101 executes the computing task, and the second identifier of the second operator to be executed when the processor 102 executes the computing task. Then, the file processing device 104 filters the executable code of multiple first operators in the file set according to the first identifier to obtain file 1, which includes the executable code of the first operator indicated by the first identifier (that is, the executable code obtained by filtering according to the first identifier), and filters the executable code of multiple second operators in the file set according to the second identifier to obtain file 2, which includes the executable code of the second operator indicated by the second identifier (that is, the executable code obtained by filtering according to the second identifier). In this way, the file processing device 104 can use the processor 101 and the processor 102 to execute the computing task according to the filtered file 1 and file 2.

[0039] Thus, before executing a computing task, the file processing device 104 filters the executable code in the file set according to the identifiers of the operators that each processor needs to execute. This can effectively reduce the amount of executable code data that needs to be stored and loaded during the execution of the computing task. That is, the executable code of operators that do not need to be executed by each processor does not need to be stored locally on the computing device, thereby effectively reducing the storage space occupied during the execution of the computing task, that is, reducing the consumption of storage resources, reducing the storage resource requirements of heterogeneous computing on the computing device, and thus enriching the application scenarios applicable to heterogeneous computing.

[0040] Furthermore, when the number of first operators to be executed by processor 101 is multiple, or the number of second operators to be executed by processor 102 is multiple, the executable code of the multiple first operators or the multiple second operators can be packaged into a single file. This allows processor 101 to reduce file loading latency when loading the packaged file (i.e., file 1 or file 2) into the host-side memory, thereby improving the execution efficiency of the computing task.

[0041] For example, the above Figure 1 The document processing device 104 shown can be implemented in software or in hardware.

[0042] In one example, when implemented in software, the file processing device 104 may be code running on a computing device 10 including processor 101 (and processor 102), such as a computing engine, plugins, etc. on the computing device 10.

[0043] In another example, when implemented in hardware, the file processing device 104 can be hardware with data processing capabilities. Exemplarily, this data processing hardware can be a CPU, and any one or any combination of application-specific integrated circuits (ASICs), programmable logic devices (PLDs), complex programmable logical devices (CPLDs), field-programmable gate arrays (FPGAs), generic array logic (GALs), systems-on-chips (SoCs), software-defined infrastructure (SDI) chips, artificial intelligence (AI) chips, and data processing units (DPUs). Furthermore, the number of data processing hardware components included in the file processing device 104 can be one or more, and the types of hardware can be one or more. The specific number and types of hardware can be set according to the actual application's business requirements; this embodiment does not limit this.

[0044] It is worth noting that the above Figure 1The computing device 10 shown is merely an example. In other possible implementations, the computing device 10 may include more types of elements to support more functions; or, the computing device 10 may include more processors, etc. The specific structure of the computing device 10 is not limited in this application.

[0045] Next, various non-limiting specific implementation methods in the document processing process will be described in detail.

[0046] See Figure 3 This is a flowchart illustrating a file processing method according to an embodiment of this application. This method can be applied to the above-mentioned... Figure 1 The computing device 10 shown may also be used in other possible computing devices. For ease of understanding, the following description refers to a device applied to... Figure 1 The following explanation will be based on the computing device 10 shown. Figure 3 The file processing methods shown may specifically include:

[0047] S301: The file processing device 104 acquires a file set, which includes executable code of a plurality of first operators and executable code of a plurality of second operators.

[0048] Here, the first operator is the operator executed by the host-side processor 101. Typically, processor 101 can execute a single first operator. Alternatively, processor 101 and processor 102 can jointly execute the same operator; this operator is the first operator for processor 101 and, for processor 102, is hereinafter referred to as the second operator. Typically, processor 102 does not execute an operator alone; correspondingly, the identifier of the second operator that processor 102 can execute matches the identifiers of some of the multiple first operators that processor 101 can execute. The operators with matching identifiers are the operators jointly executed by processor 101 and processor 102.

[0049] For example, when processor 101 and processor 102 cooperate to execute the same operator, processor 101 can typically first execute the first calculation stage of the operator, and then control processor 102 to execute the second calculation stage of the operator. Finally, processor 101 can continue to execute the third calculation stage based on the result generated by processor 102 executing the second calculation stage, thereby completing the execution process of the operator. Each processor executes the corresponding calculation stage based on different parts of the executable code of the operator.

[0050] In this embodiment, the file processing device 104 can first obtain the executable code of multiple operators that the processor 101 and processor 102 may execute. The executable code of the operators can be, for example, binary code, assembly language code, or other types of executable code.

[0051] In the first implementation example, the file processing device 104 can first obtain a set of files published by the manufacturer, such as... Figure 2 The operator package shown includes a dynamic link library file and multiple object files.

[0052] The dynamic link library (DLL) file contains the binary code of multiple first operators (such as all possible first operators that can be executed by the processor 101) that can be executed by the processor 101. For example, in a Linux system, the DLL file can be a file in ".so" format. An ".so" file is a shared object file, a compiled binary file containing code and data that can be dynamically loaded by a program. In a Windows system, the DLL file can be a file in ".dll" format. A ".dll" file is a tightly integrated, independent file that can be called by other programs; this file can include functions, data, and resources.

[0053] Each object file can be used to record the binary code of one or more second operators that can be executed by processor 102. For example, an object file can be a file in ".obj" format.

[0054] In the second implementation example, the file collection obtained by the file processing device 104 from the manufacturer's published files may include multiple dynamic link library files and multiple object files.

[0055] Each dynamic link library records the binary code of a first operator. The dynamic link library file can be a file in the ".so" format or a file in the ".dll" format. Each object file records the binary code of a second operator. The object file can be a file in the ".obj" format.

[0056] In the third implementation example, the file collection released by the manufacturer acquired by the file processing device 104 may include file 1 and file 2. File 1 records binary code of multiple first operators that can be executed by the processor 101; for example, file 1 may be obtained by packaging the binary code of multiple first operators. File 2 records binary code of one or more second operators that can be executed by the processor 102; for example, file 2 may be obtained by packaging the binary code of multiple second operators.

[0057] S302: The file processing device 104 obtains the first identifier of the first operator to be executed when the processor 101 performs the computing task, and the second identifier of the second operator to be executed when the processor 102 performs the computing task.

[0058] It is understood that the file set acquired by the file processing device 104 includes not only the binary code of the operators to be executed by the processors 101 and 102, but also the binary code of operators that the two processors do not need to execute. For example, the file set includes the binary code of 100 first operators and the binary code of 50 second operators, while the processor 101 may only need to execute 5 first operators and the processor 102 may only need to execute 3 second operators.

[0059] Therefore, the file processing device 104 can first determine the operators that the two processors need to execute when performing computational tasks, so as to subsequently filter out the executable code of operators that the processors do not need to execute. The computational tasks to be executed can be tasks that the computing device 10 executes periodically, such as model training tasks; of course, the computational tasks can also be other types of non-periodic tasks, and there is no limitation on this.

[0060] In one possible implementation, processors 101 and 102 can collaboratively execute computational tasks based on a file set within a historical time period (e.g., the past 24 hours). During this process, processors 101 and 102 complete the computational task by executing the executable code of the first operator and the executable code of the second operator included in the file set, respectively, and generate corresponding historical execution data. The file processing device 104 can then acquire this historical execution data and, based on it, determine which operators processors 101 and 102 execute, i.e., determine the first identifier of the first operator to be executed by processor 101 and the second identifier of the second operator to be executed by processor 102. Thus, the file processing device 104 automatically detects the operators to be executed by processors 101 and 102 based on the data records of past computational tasks performed by processors 101 and 102.

[0061] In another possible implementation, the file processing device 104 can use appropriate tools to analyze the computational task and determine the identifiers of the operators that processors 101 and 102 need to execute when performing the computational task. For example, assuming the computational task is a model training task, the file processing device 104 can compile and analyze the program file corresponding to the computational task using a compiler to extract attribute information such as the names of the operators included in the program file. In this way, the file processing device 104 can determine the name of the first operator (i.e., the first identifier) ​​that processor 101 needs to execute and the name of the second operator (i.e., the second identifier) ​​that processor 102 needs to execute based on the names of each operator (and other attribute information).

[0062] The number of first identifiers determined can be one or more; the number of second identifiers determined can be one or more.

[0063] S303: The file processing device 104 filters the executable code of a plurality of first operators according to the first identifier to obtain a first file, the first file including the executable code of the first operator indicated by the first identifier.

[0064] S304: The file processing device 104 filters the executable code of a plurality of second operators according to the second identifier to obtain a second file, the second file including the executable code of the second operator indicated by the second identifier.

[0065] In this embodiment, for operators that processors 101 and 102 do not need to execute when performing computational tasks, the file processing device 104 does not need to save the executable code corresponding to the operator, thereby filtering the executable code in the file set according to the identifier of the operator to be executed by each processor.

[0066] As a first implementation example, the file set may include a dynamic link library file and multiple object files. In this case, the file processing device 104 can disassemble the dynamic link library file to obtain multiple executable files corresponding to first operators, which may be, for example, binary files. Each executable file for a first operator records the executable code of that first operator. Further, disassembling the dynamic link library file can also yield a metadata file 1, which records metadata describing the attribute information of each executable file for a first operator, such as the name and size of the executable file. Similarly, the file processing device 104 can disassemble the object files to obtain a metadata file 2 and multiple executable files corresponding to second operators. The metadata file 2 records the attribute information of each executable file for a second operator, and each executable file for a second operator records the executable code of that second operator.

[0067] Then, the file processing device 104 can use the determined first identifier to filter the executable files corresponding to the multiple first operators obtained from the decomposition. For example, the first identifier can specifically be the name of the first operator, so the file processing device 104 can filter out executable files that do not match the name from the multiple executable files. In this way, the filtered executable file is the executable file of the first operator indicated by the first identifier.

[0068] Furthermore, for the one or more executable files obtained from the filtering, the file processing device 104 can package them into a first file. For example, it can use a corresponding tool to compress the one or more executable files and obtain a compressed file, or it can use a tool to copy all the binary code in the one or more executable files into a file (i.e., the first file).

[0069] Similarly, the file processing device 104 can use the determined second identifier to filter multiple object files, and package the object files of one or more second operators indicated by the filtered second identifier to obtain a second file.

[0070] As a second implementation example, the file set may include multiple dynamic link library files and multiple object files. In this case, the file processing device 104 can use the determined first identifier to filter the multiple dynamic link library files in the file set, and package the filtered object files containing one or more first operators indicated by the first identifier to obtain a first file. Furthermore, the file processing device 104 can use the determined second identifier to filter the multiple object files, and package the filtered object files containing one or more second operators indicated by the second identifier to obtain a second file.

[0071] As a third implementation example, the file set may include file 1 and file 2. In this case, file processing device 104 can disassemble file 1 to obtain multiple dynamic link library files corresponding to the first operators, each dynamic link library file recording the executable code of one first operator. Further, disassembling the dynamic link library files can also yield metadata file 1, which records metadata describing the attribute information of each first operator's dynamic link library file. Similarly, file processing device 104 can disassemble file 2 to obtain multiple object files and metadata file 2. Each object file records the executable code of a second operator, and metadata file 2 records the attribute information of each object file.

[0072] Then, the file processing device 104 can use the determined first identifier to filter the multiple dynamic link library files obtained from the disassembly, and package one or more of the filtered link library files into a first file. Also, the file processing device 104 can use the determined second identifier to filter multiple object files, and package one or more of the filtered object files of the second operator to obtain a second file.

[0073] For example, the first file and the second file generated by the file processing device 104 can both be in binary file format, such as the first file and the second file can both be files with the extension ".bin".

[0074] In practical applications, after generating the first file and the second file, the file processing device 104 can save them. For example, the file processing device 104 can save the first file and the second file in the memory 103. In this way, the memory 103 can save lightweight operator files without consuming large storage resources to save a set of files. Thus, each time the processors 101 and 102 execute a computation task, they can perform the computation task based on the lightweight operator file, which can effectively reduce the consumption of storage resources during each computation task execution.

[0075] Furthermore, a file system can be built in the computing device 10 based on the memory 103, so that the file processing device 104 can save the first file and the second file in the file system for management and querying.

[0076] S305: The file processing device 104 uses processors 101 and 102 to perform calculation tasks based on the first file and the second file.

[0077] In a specific implementation, the file processing device 104 can instruct the processors 101 and 102 to begin executing computational tasks. For example... Figure 4 As shown, the host-side processor 101 can load the first file and the second file into the host-side memory, for example, it can read the first file and the second file from the file system into memory. Then, the processor 101 can parse the first file in memory to obtain at least one first executable file. Each first executable file records the executable code of a first operator required by the processor 101 to execute the computation task. The first executable file can be, for example, a dynamic link library file, such as a file in ".so" format. Furthermore, the processor 101 can also parse the second file in memory to obtain at least one second executable file. Each second executable file records the executable code of a second operator required by the processor 101 to execute the computation task. The second executable file can be, for example, an object file, such as a file in ".obj" format.

[0078] Then, since the contents recorded in the first executable file are executable code, the processor 101 can deserialize the executable code in each of the first executable files in memory to generate temporary operator objects, such as... Figure 4 As shown, each operator object corresponds to a first operator. For example, the processor 101 can use the dlopen function to open each first executable file and generate a temporary operator object based on the information recorded in the first executable file. This operator object has attribute information such as object name, object address, object type, and object size.

[0079] Next, processor 101 can match each operator object with the second executable file to determine the first executable file (executed by processor 101) and the second executable file (executed by processor 102) for the same operator. For example, the name of the operator object (i.e., the object name) can be the name of the operator. In this case, processor 101 can match the name of the operator object with the name of the second operator corresponding to the second executable file, and determine the successfully matched second executable file as the second executable file corresponding to the operator object. In this way, the first executable file and the second executable file corresponding to the same operator object (i.e., the same operator) can be obtained.

[0080] Finally, processor 101 can execute the first executable files of each first operator according to the execution logic defined in the computing task, and control processor 102 to execute the second executable files sequentially according to the execution order of the first executable files of each first operator. Specifically, this can be done by serializing the executable code in the second executable file into the memory of processor 102. During the sequential execution of multiple first operators, processor 101 can determine whether a first operator is executed solely by processor 101 based on a temporary operator object, such as determining whether a corresponding second executable file exists. If so, processor 101 can directly execute the first executable file of that first operator. If not, indicating that the first operator is executed collaboratively by processors 101 and 102, processor 101 can start the executable code in the corresponding second executable file of the first operator into the memory of processor 102 based on the operator object. In this way, processors 101 and 102 can collaboratively execute the same operator by executing the executable files in their respective memories.

[0081] Thus, the file processing device 104 filters the executable code in the file set according to the identifiers of the operators to be executed by each processor. This effectively reduces the amount of executable code data that needs to be stored and loaded during the execution of computing tasks, thereby effectively reducing the storage space occupied during the execution of computing tasks, i.e., reducing the consumption of storage resources, lowering the storage resource requirements of heterogeneous computing on computing devices, and thus enriching the application scenarios applicable to heterogeneous computing. In practical applications, the computing tasks to be executed collaboratively by processors 101 and 102 can be determined by the applications deployed on computing device 10. Therefore, different computing tasks can be generated for applications deployed on different computing devices, so that the file processing device on each computing device can locally save the corresponding lightweight operator files for the computing tasks generated by the application, so that each computing device can execute the corresponding computing tasks based on the lightweight operator files, reducing the consumption of storage resources.

[0082] It is worth noting that the above Figure 3 The file processing method illustrated is merely an example and is not intended to be limiting. In other embodiments, the above... Figure 3The method steps shown can be replaced accordingly. For example, after obtaining the file set, the file processing device 104 can directly instruct the processors 101 and 102 to perform computational tasks based on the file set. This allows it to determine the identifiers of the operators required for the processors 101 and 102 to collaboratively execute the computational task, and filter the executable code of multiple operators in the file set based on these identifiers to obtain lightweight files. Thus, when the processors 101 and 102 need to execute the computational task again, they can directly execute the task based on the lightweight files, thereby reducing the storage resources consumed by re-executing the computational task and improving the efficiency of the computational task.

[0083] Furthermore, the above Figure 3 The file processing method shown is applied to Figure 1 The illustrated computing device 10 is used as an example for illustrative purposes. In other possible embodiments, the file processing method can also be applied to a file processing system. This file processing system includes a first processor on the host side and multiple (or one) second processors on the device side. That is, the first processor can call multiple (or one) second processors on the device side to collaboratively execute corresponding operators to perform a computing task. Furthermore, the file processing system also includes a file processing device and a memory. The file processing device is used to filter from a file set to obtain the executable code of the first operator to be executed by the first processor and the executable code of the second operator to be executed by multiple (or one) second processors, and package them separately to obtain a lightweight file 1 (including the executable code of the first operator to be executed by the first processor) required by the first processor when performing the computing task, and a lightweight file 2 (including the executable code of the second operator to be executed by each processor participating in the computing task) required by multiple (or one) second processors when performing the computing task. Thus, the first processor and multiple (or one) second processors respectively execute computing tasks based on the lightweight file 1 and file 2. The memory in the file processing system is used to store the lightweight file 1 and file 2.

[0084] The above Figure 3 The illustrated embodiment uses processors 101 and 102 performing computational tasks as an example for illustrative purposes. In other possible embodiments, processors 101 and 102 can also generate offline model files based on lightweight files (including executable files containing multiple operators). Here, offline model files refer to model files stored locally (the model has not yet been run online).

[0085] Below, in conjunction with Figure 5 This embodiment will now introduce another file processing method. See [link to relevant documentation]. Figure 5The diagram illustrates another file processing method for generating offline model files, where some operators can be executed collaboratively by both the host-side processor and the device-side processor. Specifically, Figure 5 The methods shown may include:

[0086] S501: The file processing device 104 obtains a third file and a fourth file from the file system, wherein the third file includes an executable file of a plurality of third operators required to be executed when the processor 101 executes the target model, and the fourth file includes an executable file of at least one fourth operator required to be executed when the processor 102 executes the target model, wherein the at least one fourth operator is a subset of the plurality of third operators.

[0087] The target model, such as a deep neural network (DNN) model or a convolutional neural network (CNN), includes multiple operators. These operators can specifically be multiple neurons (or nodes) within the network layers of the target model. In practical applications, some operators included in the target model can be executed independently by the host-side processor 101, while other operators can be executed collaboratively by the processor 101 and the device-side processor 102, so as to leverage the processor 102 to accelerate the execution efficiency of the other set of operators.

[0088] For example, processors 101 and 102 can pre-execute the target model based on a file set, which may be, for example, an operator package released by a manufacturer that includes executable code containing all operators. In this way, the file processing device 104 can learn the identifiers of the operators to be executed by processors 101 and 102 during the execution of the target model, that is, determine the identifiers of the plurality of third operators (executed by processor 101) and the identifier of at least one fourth operator (executed by processor 102) in step S501.

[0089] Thus, the file processing device 104 can filter the executable code of the multiple operators included in the file set according to the identifiers of the multiple third operators and the identifier of at least one fourth operator, to obtain executable files of the multiple third operators (hereinafter referred to as third executable files) and executable files of at least one fourth operator (hereinafter referred to as fourth executable files). Further, the file processing device 104 can package the third executable files of the multiple third operators into a third file, and package the fourth executable files of at least one fourth operator into a fourth file, and save the third file and the fourth file to the file system constructed based on the memory 103. The specific implementation of filtering the file set to generate the third and fourth files can be found in the relevant descriptions of the foregoing embodiments, and will not be repeated here.

[0090] For example, both the third and fourth files can be in binary file format, such as files with the extension "bin".

[0091] S502: The file processing device 104 parses the third file to obtain multiple third executable files, each of which is used to record the executable code of a third operator.

[0092] S503: The file processing device 104 parses the fourth file to obtain at least one fourth executable file, each fourth executable file being used to record the executable code of a fourth operator.

[0093] It is understood that, since the third file includes executable code for at least one operator, the file processing device 104 can instruct the processor 101 to parse and obtain executable code for multiple third operators from the third file. Each third operator's executable file is stored in a third executable file, which may be, for example, a dynamic link library file, such as a file in ".so" format. Similarly, the file processing device 104 can instruct the processor 102 to parse and obtain executable code for at least one fourth operator from the fourth file. Each fourth operator's executable file is stored in a fourth executable file, which may be, for example, an object file, such as a file in ".obj" format.

[0094] S504: The file processing device 104 adds the executable code from multiple third executable files and the executable code from at least one fourth executable file to the target model file to obtain an offline model file.

[0095] Since the two heterogeneous processors need to execute multiple operators in the target model based on the executable code in the multiple third executable files and at least one fourth executable file during the execution of the target model, the file processing device 104 can add the executable code from the executable files required by the two heterogeneous processors to the target model file. Specifically, this can be done by serializing the executable code from each executable file into the target model file. In this way, the target model file can integrate the executable code corresponding to multiple operators.

[0096] S505: The file processing device 104 outputs offline model files.

[0097] Thus, after deploying the offline model file to a computing device with multiple heterogeneous processors, the executable code of multiple operators integrated in the offline model file allows the computing device to execute multiple operators in the target model without needing to obtain the file set containing all the executable code of the full set of operators released by the manufacturer. Instead, it can execute the executable code integrated in the offline model file based on multiple heterogeneous processors, thereby running the target model on the computing device and reducing the storage resource requirements of the computing device.

[0098] The above combination Figures 1 to 5 The document processing method provided in the embodiments of this application will be introduced. Next, the functions of the document processing device provided in the embodiments of this application and the computing device that implements the document processing device will be introduced with reference to the accompanying drawings.

[0099] See Figure 6 A schematic diagram of a document processing device is shown. Figure 6 The document processing device 600 shown can be applied to computing devices, such as those described above. Figure 1 The computing device 10 shown includes a first processor and a second processor, which are heterogeneous. Figure 6 As shown, the document processing apparatus 600 includes:

[0100] The acquisition module 601 is used to acquire a file set, which includes executable code of multiple first operators and executable code of multiple second operators; and to acquire the first identifier of the first operator to be executed when the first processor executes the computing task and the second identifier of the second operator to be executed when the second processor executes the computing task.

[0101] The filtering module 602 is used to filter the executable code of a plurality of first operators according to a first identifier to obtain a first file, the first file including the executable code of the first operator indicated by the first identifier; and to filter the executable code of a plurality of second operators according to a second identifier to obtain a second file, the second file including the executable code of the second operator indicated by the second identifier;

[0102] The execution module 603 is used to perform computational tasks using the first processor and the second processor, based on the first file and the second file.

[0103] In one possible implementation, the filtering module 602 is specifically used for:

[0104] The executable code of multiple first operators is filtered according to the first identifier to obtain the executable code of the first operator indicated by the first identifier;

[0105] The executable code of the first operator indicated by the first identifier is packaged to obtain the first file.

[0106] In one possible implementation, execution module 603 is specifically used for:

[0107] The first file is parsed to obtain at least one first executable file, and each first executable file is used to record the executable code of a first operator;

[0108] The second file is parsed to obtain at least one second executable file, and each second executable file is used to record the executable code of a second operator;

[0109] The first processor executes at least one first executable file, and according to the execution order of the at least one first executable file, the second processor is controlled to execute at least one second executable file in sequence.

[0110] In one possible implementation, the first file and the second file are in binary file format.

[0111] In one possible implementation, the first executable file is a dynamic link library file, and each dynamic link library file records the binary code of a first operator;

[0112] The second executable file is an object file, and each object file records the binary code of a second operator.

[0113] In one possible implementation, the document processing apparatus 600 further includes:

[0114] The storage module 604 is used to store the first file and the second file in the file system of the computing device.

[0115] In one possible implementation, the acquisition module 601 is further configured to acquire a third file and a fourth file from the file system. The third file includes an executable file of a plurality of third operators required to be executed when the first processor executes the target model, and the fourth file includes an executable file of at least one fourth operator required to be executed when the second processor executes the target model. The at least one fourth operator is a subset of the plurality of third operators.

[0116] Then, the document processing device 600 may further include:

[0117] The parsing module 605 is used to parse the third file to obtain multiple third executable files, each of which records the executable code of a third operator; and to parse the fourth file to obtain at least one fourth executable file, each of which records the executable code of a fourth operator.

[0118] Add module 606 to add executable code from multiple third executable files and at least one fourth executable file to the target model file to obtain an offline model file;

[0119] Output module 607 is used to output offline model files.

[0120] In one possible implementation, the acquisition module 601 is specifically used for:

[0121] Acquire historical execution data, which includes data generated by the first processor and the second processor when executing computational tasks based on the file set;

[0122] Based on historical operational data, the first identifier and the second identifier are determined.

[0123] In one possible implementation, the identifiers of the plurality of second operators are matched with the identifiers of a subset of the plurality of first operators.

[0124] because Figure 6 The document processing device 600 shown corresponds to Figure 3 as well as Figure 5 The document processing device 104 in the method embodiment shown, therefore Figure 6 The specific implementation of the document processing device 600 and its technical effects can be found in the relevant descriptions in the foregoing embodiments, and will not be repeated here.

[0125] Figure 7A schematic diagram of a computing device is shown. The aforementioned file processing device 104 can be deployed on this computing device. This computing device can be a standalone device or any computing device in a cluster of computing devices, and can be used to implement the above-mentioned... Figure 3 as well as Figure 5 The document processing device 104 in the illustrated embodiment has the following functions.

[0126] like Figure 7 As shown, the computing device 700 includes a processor 710, a memory 720, a communication interface 730, and a bus 740. The processor 710, memory 720, and communication interface 730 communicate via the bus 740. The bus 740 can be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus, etc. The bus can be divided into address bus, data bus, control bus, etc. For ease of illustration, Figure 7 The symbol is represented by a single thick line, but this does not indicate that there is only one bus or one type of bus. The communication interface 730 is used for external communication, such as acquiring file sets or outputting offline model files.

[0127] The processor 710 can be a central processing unit (CPU), an application-specific integrated circuit (ASIC), a graphics processing unit (GPU), or one or more integrated circuits. The processor 710 can also be an integrated circuit chip with signal processing capabilities. In implementation, the functions of the server 200 can be completed through the integrated logic circuits in the hardware of the processor 710 or through software instructions. The processor 710 can also be a general-purpose processor, a digital signal processor (DSP), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components, capable of implementing or executing the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor or any conventional processor, etc. The methods disclosed in the embodiments of this application can be directly embodied as execution by a hardware decoding processor, or as execution by a combination of hardware and software modules in the decoding processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. The storage medium is located in the memory 720. The processor 710 reads the information in the memory 720 and, in conjunction with its hardware, completes some or all of the functions in the server 200.

[0128] The memory 720 may include volatile memory, such as random access memory (RAM). The memory 720 may also include non-volatile memory, such as read-only memory (ROM), flash memory, HDD, or SSD.

[0129] The memory 720 stores executable code, and the processor 710 executes the executable code to perform the method executed by the aforementioned file processing device 104.

[0130] Specifically, in achieving Figure 3 as well as Figure 5 In the case of the illustrated embodiment, and Figure 3 as well as Figure 5 In the illustrated embodiment, the file processing device 104, when implemented in software, executes... Figure 3 as well as Figure 5 The software or program code required for the function of the file processing device 104 is stored in the memory 720. The file processing device 104 interacts with other devices through the communication interface 730. The processor is used to execute the instructions in the memory 720 to implement the methods executed by the file processing device 104.

[0131] Furthermore, this application also provides a computer-readable storage medium storing instructions that, when executed on one or more computing devices, cause the one or more computing devices to perform the method executed by the file processing apparatus 104 of the above embodiments.

[0132] Furthermore, this application also provides a computer program product, which, when executed by one or more computing devices, allows the computing devices to perform any of the aforementioned file processing methods. The computer program product can be a software installation package; when any of the aforementioned file processing methods is required, the computer program product can be downloaded and executed on a computer.

[0133] It should also be noted that the embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. In addition, in the accompanying drawings of the embodiments provided in this application, the connection relationship between modules indicates that they have a communication connection, which can be implemented as one or more communication buses or signal lines.

[0134] The terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such terms can be used interchangeably where appropriate; this is merely a way of distinguishing objects with the same attributes in the embodiments of this application.

[0135] Through the above description of the embodiments, those skilled in the art can clearly understand that this application can be implemented by means of software plus necessary general-purpose hardware, or it can be implemented by special-purpose hardware including application-specific integrated circuits, special-purpose CPUs, special-purpose memory, special-purpose components, etc. Generally, any function performed by a computer program can be easily implemented by corresponding hardware, and the specific hardware structure used to implement the same function can also be diverse, such as analog circuits, digital circuits, or special-purpose circuits. However, for this application, software program implementation is more often the preferred implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a readable storage medium, such as a computer floppy disk, USB flash drive, mobile hard disk, ROM, RAM, magnetic disk, or optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, training equipment, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0136] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product.

[0137] The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions may be transmitted from one website, computer, training device, or data center to another website, computer, training device, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium may be any available medium that a computer can store or a data storage device such as a training device or data center that integrates one or more available media. The available media may be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media (e.g., solid-state drives (SSDs)).

Claims

1. A file processing method, characterized in that, The method is applied to a computing device, the computing device including a first processor and a second processor, the first processor and the second processor being heterogeneous, the method comprising: Obtain a set of files, the set of files including executable code of multiple first operators and executable code of multiple second operators; Obtain the first identifier of the first operator to be executed when the first processor executes the computing task, and the second identifier of the second operator to be executed when the second processor executes the computing task; The executable code of the plurality of first operators is filtered according to the first identifier to obtain a first file, wherein the first file includes the executable code of the first operator indicated by the first identifier; The executable code of the plurality of second operators is filtered according to the second identifier to obtain a second file, the second file including the executable code of the second operator indicated by the second identifier; The computational task is executed using the first processor and the second processor, based on the first file and the second file.

2. The method according to claim 1, characterized in that, The step of filtering the executable code of the plurality of first operators according to the first identifier to obtain the first file includes: The executable code of the plurality of first operators is filtered according to the first identifier to obtain the executable code of the first operator indicated by the first identifier; The executable code of the first operator indicated by the first identifier is packaged to obtain the first file.

3. The method according to claim 1, characterized in that, The step of using the first processor and the second processor to perform computational tasks based on the first file and the second file includes: The first file is parsed to obtain at least one first executable file, and each first executable file is used to record the executable code of a first operator; The second file is parsed to obtain at least one second executable file, each of which records the executable code of a second operator; The first processor executes the at least one first executable file, and the second processor executes the at least one second executable file sequentially according to the execution order of the at least one first executable file.

4. The method according to claim 3, characterized in that, The first file and the second file are in binary file format.

5. The method according to claim 4, characterized in that, The first executable file is a dynamic link library file, and each dynamic link library file records the binary code of a first operator; The second executable file is an object file, and each object file records the binary code of a second operator.

6. The method according to claim 1, characterized in that, The method further includes: The first file and the second file are saved in the file system of the computing device.

7. The method according to claim 1, characterized in that, The method further includes: Obtain a third file and a fourth file from the file system. The third file includes executable files of multiple third operators required to be executed when the first processor executes the target model. The fourth file includes executable files of at least one fourth operator required to be executed when the second processor executes the target model. The at least one fourth operator is a subset of the multiple third operators. The third file is parsed to obtain multiple third executable files, each of which records the executable code of a third operator. The fourth file is parsed to obtain at least one fourth executable file, and each of the at least one fourth executable files is used to record the executable code of a fourth operator; The executable code from the plurality of third executable files and the executable code from at least one fourth executable file are added to the target model file to obtain an offline model file; Output the offline model file.

8. The method according to claim 1, characterized in that, The step of obtaining the first identifier of the first operator to be executed by the first processor and the second identifier of the second operator to be executed by the second processor includes: Acquire historical execution data, which includes data generated by the first processor and the second processor when executing the computing task based on the file set; Based on the historical operation data, the first identifier and the second identifier are determined.

9. The method according to any one of claims 1 to 8, characterized in that, The identifiers of the plurality of second operators are matched with the identifiers of a portion of the plurality of first operators.

10. A document processing device, characterized in that, The file processing device is applied to a computing device, the computing device including a first processor and a second processor, the first processor and the second processor being heterogeneous, and the file processing device comprising: The acquisition module is used to acquire a file set, the file set including executable code of multiple first operators and executable code of multiple second operators; and to acquire a first identifier of the first operator to be executed when the first processor executes the computing task and a second identifier of the second operator to be executed when the second processor executes the computing task. A filtering module is configured to filter the executable code of the plurality of first operators according to the first identifier to obtain a first file, the first file including the executable code of the first operator indicated by the first identifier; and to filter the executable code of the plurality of second operators according to the second identifier to obtain a second file, the second file including the executable code of the second operator indicated by the second identifier; An execution module is configured to utilize the first processor and the second processor to execute the computational task based on the first file and the second file.

11. The apparatus according to claim 10, characterized in that, The filtering module is used for: The executable code of the plurality of first operators is filtered according to the first identifier to obtain the executable code of the first operator indicated by the first identifier; The executable code of the first operator indicated by the first identifier is packaged to obtain the first file.

12. The apparatus according to claim 10, characterized in that, The execution module is used for: The first file is parsed to obtain at least one first executable file, and each first executable file is used to record the executable code of a first operator; The second file is parsed to obtain at least one second executable file, each of which records the executable code of a second operator; The first processor executes the at least one first executable file, and the second processor executes the at least one second executable file sequentially according to the execution order of the at least one first executable file.

13. The apparatus according to claim 12, characterized in that, The first file and the second file are in binary file format.

14. The apparatus according to claim 13, characterized in that, The first executable file is a dynamic link library file, and each dynamic link library file records the binary code of a first operator; The second executable file is an object file, and each object file records the binary code of a second operator.

15. The apparatus according to claim 10, characterized in that, The document processing device further includes: A storage module is used to store the first file and the second file in the file system of the computing device.

16. The apparatus according to claim 10, characterized in that, The acquisition module is further configured to acquire a third file and a fourth file from the file system. The third file includes an executable file of multiple third operators required to be executed when the first processor executes the target model. The fourth file includes an executable file of at least one fourth operator required to be executed when the second processor executes the target model. The at least one fourth operator is a subset of the multiple third operators. The document processing device further includes: The parsing module is used to parse the third file to obtain multiple third executable files, each of which records the executable code of a third operator; and to parse the fourth file to obtain at least one fourth executable file, each of which records the executable code of a fourth operator. An add module is used to add the executable code from the plurality of third executable files and the executable code from at least one fourth executable file to the file of the target model to obtain an offline model file; The output module is used to output the offline model file.

17. The apparatus according to claim 10, characterized in that, The acquisition module is used for: Acquire historical execution data, which includes data generated by the first processor and the second processor when executing the computing task based on the file set; Based on the historical operation data, the first identifier and the second identifier are determined.

18. The apparatus according to any one of claims 10 to 17, characterized in that, The identifiers of the plurality of second operators are matched with the identifiers of a portion of the plurality of first operators.

19. A document processing system, characterized in that, The file processing system includes a first processor, at least one second processor, a memory, and a file processing device, wherein the first processor and the at least one second processor are heterogeneous. The document processing apparatus is used to perform the method according to any one of claims 1 to 9.

20. A computing device, characterized in that, The computing device includes a processor and a memory, the memory storing program instructions, and the processor executing the program instructions to perform the method according to any one of claims 1 to 9.

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