A field emission device and a method of manufacturing the same

Abstract

The application discloses a field emission device and a preparation method thereof, and belongs to the field of vacuum micro-nano electronic devices. The field emission device prepared by the application comprises a gate-anode integrated structure and a cathode structure. The gate-anode integrated structure comprises a metal electrode located on the back of a high-conductivity anode, an anode-gate insulating layer located on the front of the high-conductivity anode, a patterned gate layer located on the anode-gate insulating layer, a gate-cathode insulating layer located on the gate layer, and a gate metal lead electrode located on the gate-cathode insulating layer. The gate metal lead electrode is adjacent to a gate working area and connected to the gate layer. The cathode structure comprises a substrate, a cathode located on the front of the substrate, and a metal electrode located on the back of the cathode. The cathode of the cathode structure is fixed on the gate-cathode insulating layer of the gate working area of the gate-anode integrated structure. The application can enhance the performance optimization and regulation and control capability of the device, and reduce the preparation cost and difficulty.

Description

TECHNICAL FIELD

[0001] The present application belongs to the field of vacuum micro-nano electronic devices, and particularly relates to a field emission device and a preparation method thereof. BACKGROUND

[0002] Field electron emission (FE) relies on the ballistic electron transport in vacuum, which can achieve the characteristics of high operating speed, low energy loss, high temperature and radiation resistance, high reliability and long life. Field emission devices are suitable for various applications from sensors and displays to high-performance integrated circuits (ICs), and have better noise resistance than solid-state devices, so they can work at lower current, suitable for high-speed and high-power applications and harsh environments such as high temperature and radiation.

[0003] The existing field emission device construction methods are divided into two categories: one is a cathode or (gate-cathode) integrated structure, and the anode is assembled to form a field emission device; the second is a monolithic integrated device. Both of them use microfabrication technology to build cathode, insulating layer and gate on the same substrate in sequence. The latter continues to manufacture insulating layer and anode, while the former assembles the anode by alignment bonding. The former process is relatively simple, and the anode is easy to achieve a large gap, which plays the high-voltage and high-power characteristics of field emission devices. However, the installation of a high-conductivity anode plate during operation is not conducive to the miniaturization and integration of field emission devices, and reduces the reliability of the device, especially in high temperature or harsh environments. The introduction of an external anode may increase the parasitic capacitance, affecting the high-frequency response and performance stability of the device. The latter realizes a compact three-terminal field emission device, which is conducive to the integration and miniaturization of the device, avoids the alignment error and thermal expansion mismatch problems that may occur during the bonding process, and improves the performance stability of the device. However, the key component of the field emission device is the cathode emitter, and the conventional materials are silicon and molybdenum needle tips. In order to further improve its emission performance, a lower work function and a larger aspect ratio field enhancement structure are required, so new materials and structures such as diamond, carbon nanotubes, silicon carbide, zinc oxide, etc. Thin films and nanowires are introduced. However, when the existing two field emission device construction methods use this kind of new cathode emitter, not only the process complexity is greatly increased, but also it is difficult to realize the large aspect ratio nanowire structure, and the structure has poor flexibility and controllability, and the device performance is difficult to optimize, and the future application prospect is limited. SUMMARY

[0004] The purpose of the present application is to provide a field emission device and a preparation method thereof, which enhances the performance optimization and control ability of the device, and reduces the preparation cost and difficulty.

[0005] The technical scheme adopted by the present application to achieve the above-mentioned purpose is as follows:

[0006] A field emission device, comprising a gate-anode integrated structure and a cathode structure.

[0007] The gate-anode integrated structure comprises a metal electrode on the back of the high-conductivity anode, an anode-gate insulating layer on the front of the high-conductivity anode, a patterned gate layer on the anode-gate insulating layer, a gate-cathode insulating layer on the gate layer, and a gate metal lead electrode on the gate-cathode insulating layer; wherein the gate metal lead electrode is adjacent to the gate working area and connected to the gate layer.

[0008] The cathode structure comprises a substrate, a cathode on the front of the substrate, and a metal electrode on the back of the cathode.

[0009] The cathode of the cathode structure is fixed on the gate-cathode insulating layer of the gate working area of the gate-anode integrated structure.

[0010] Further, the gate layer is patterned, which can be patterned into any open shape, such as square, comb-shaped, and any period.

[0011] Further, the anode-gate insulating layer and the gate-cathode insulating layer are patterned, which can be patterned into any open shape, such as square, comb-shaped, and any period.

[0012] Further, the cathode is a thin film structure or a tip array structure.

[0013] Further, the metal electrode on the cathode structure is on the side of the substrate away from the cathode, or between the cathode and the substrate.

[0014] Further, the high-conductivity anode adopts one of heavily doped silicon, tungsten, and nickel.

[0015] Further, the metal electrodes of the gate-anode integrated structure and the cathode structure adopt one of gold, aluminum, and platinum.

[0016] Further, the anode-gate insulating layer and the gate-cathode insulating layer adopt one of silicon dioxide and silicon nitride.

[0017] Further, the gate layer adopts one of chromium, molybdenum, and polycrystalline silicon.

[0018] Further, the gate metal lead electrode adopts one of aluminum, gold, and copper.

[0019] Further, the substrate adopts one or more of heavily doped silicon, indium tin oxide, and copper.

[0020] Further, the cathode adopts one of silicon, molybdenum, diamond, carbon nanotube, silicon carbide, and zinc oxide.

[0021] A method for manufacturing a field emission device, comprising the following steps:

[0022] Depositing a metal electrode on the back of the high-conductivity anode;

[0023] Depositing anode-grid insulation layer, grid layer and grid-cathode insulation layer on the front of high-conductivity anode in turn;

[0024] Patternizing grid layer before or after deposition;

[0025] Patternizing the grid-cathode insulation layer at the position near the grid working area to expose the grid layer, and then depositing grid metal lead electrode to obtain grid-anode integrated structure;

[0026] Depositing cathode on the substrate;

[0027] Depositing metal electrode on the side of the substrate away from the cathode or between the substrate and the cathode to obtain cathode structure;

[0028] Assembling and fixing the cathode of the cathode structure to the grid-cathode insulation layer of the grid working area of the grid-anode integrated structure to obtain field emission device.

[0029] Further, chemical vapor deposition, sputtering or electron beam evaporation method is used to deposit metal electrode, anode-grid insulation layer, grid layer and grid-cathode insulation layer of the grid-anode integrated structure, and to deposit metal electrode of the cathode structure.

[0030] Further, the patternizing method of the grid layer includes: patternizing by photolithography, wet etching or dry etching method after deposition of the grid layer, or patternizing by photolithography followed by deposition of metal stripping, or patternizing the grid layer together with the anode-grid insulation layer and the grid-cathode insulation layer above and below it.

[0031] Further, the step of patternizing the grid layer together with the anode-grid insulation layer and the grid-cathode insulation layer above and below it includes: using photolithography, nano-imprint or electron beam lithography patterning technology and laser etching, ion etching, reactive ion etching or wet etching method to etch the grid-cathode insulation layer, the grid layer and the anode-grid insulation layer in turn.

[0032] Further, photolithography etching is performed on the grid-cathode insulation layer at the position near the grid working area using photolithography, nano-imprint or electron beam lithography patterning technology and stripping, wet etching, sputtering method to expose the grid layer, and then sputtering or electron beam evaporation method is used to deposit grid metal lead electrode.

[0033] Further, the cathode is in a thin film structure or a tip array structure; if in a thin film structure, the thin film is grown by physical vapor deposition or chemical vapor deposition; if in a tip array structure, a nanoscale tip array structure is formed on a substrate by using reactive ion etching, focused ion beam milling or self-assembly mask technology, and then an emitter material is grown on the tip array structure by chemical vapor deposition, or the cathode material is directly formed into a nanoscale tip array structure by reactive ion etching, wet etching or electrochemical etching process.

[0034] Further, the cathode surface is treated by surface doping, coating of low work function material or plasma treatment.

[0035] Further, the cathode structure is aligned with the gate-cathode insulating layer of the gate working area of the gate-anode integrated structure by using micro-nano alignment technology, and then assembled and fixed by using bonding, welding or bonding technology.

[0036] Technical effects achieved by the present application:

[0037] The field emission device proposed by the present application separately prepares the cathode part and assembles it with the gate-anode integrated structure, thereby optimizing the device structure and improving the performance. This separate preparation strategy allows the design and manufacture of the cathode emitter to be free from the limitations of traditional silicon and molybdenum materials, so that various complex cathode tip array structures can be freely selected and optimized, and special processing techniques can be applied to ensure the high field emission performance, reliability and consistency of the cathode. At the same time, the independence of the gate-anode integrated structure eliminates the dependence on special requirements of the cathode, facilitating batch production by using micro-processing technology. In addition, this structure also facilitates the preparation of fine patterned gates and the regulation of gate spacing and anode spacing, thereby enhancing the performance optimization and regulation ability of the device. The present application can significantly expand the practicality and application range of field emission devices, providing more possibilities for applications in different fields. At the same time, due to the simplification and optimization of the preparation process, the overall process difficulty is reduced, the yield is improved, the cost is reduced, and the economic benefits are improved. BRIEF DESCRIPTION OF DRAWINGS

[0038] Figures 1A-1B are schematic diagrams of two field emission devices.

[0039] Figures 2A-2E are schematic diagrams of the preparation process of two field emission devices. DETAILED DESCRIPTION

[0040] In order to make the technical features and advantages or technical effects in the above technical solutions of the present application more obvious and easy to understand, the following detailed description is made with reference to the drawings.

[0041] The embodiment of the present application specifically proposes a field emission device, the structure of which can have two forms, as shown in Figures 1A-1B The field emission device specifically includes the following two structures:

[0042] 1. Gate-anode integrated structure: the high-conductivity anode (specifically a plate type) contains a metal electrode on the back surface, and the high-conductivity anode has, in sequence, an anode-gate insulating layer, a patterned gate layer, and a gate-cathode insulating layer on the front surface, and contains a gate metal lead electrode on the gate-cathode insulating layer near the working area. Among them, the gate layer and the upper and lower two insulating layers are patterned (see Figures 1A-1B ).

[0043] 2. Cathode structure: the cathode contains a cathode on the substrate, in order to enhance field emission, the cathode is surface-treated to reduce the work function (see Figure 1A ), or is processed into an array structure with a sharp tip (see Figure 1B ); the electrode can be between the substrate and the cathode, or on the back surface of the cathode.

[0044] Through micro-nano alignment technology and bonding, bonding and other technologies, the independently prepared cathode structure is fixed on the working area of the gate-anode integrated structure.

[0045] The embodiment of the present application also specifically proposes a preparation method of a field emission device, and the technical idea is: separately preparing a cathode structure and a gate-anode integrated structure, and finally assembling the cathode structure and the gate-anode integrated structure together to obtain the field emission device. Specifically, on the high-conductivity anode, the electrode metal on the back surface, the anode-gate insulating layer, the gate layer and the gate-cathode insulating layer on the front surface are sequentially deposited, the two insulating layers and the gate layer are patterned, and the gate metal lead electrode is made on the gate-cathode insulating layer near the working area to obtain the gate-anode integrated structure. The cathode structure of special material and structure is independently prepared, and the metal electrode is deposited on the back surface of the substrate. Finally, through the alignment assembly technology, the cathode is fixed on the gate working area of the gate-anode integrated structure to obtain the field emission device. The flow of the preparation method of the field emission device is shown in Figures 2A-2E , and specifically includes the following steps:

[0046] 1. Gate-anode integrated structure preparation

[0047] (1) Prepare a metal electrode, see Figure 2A . The high-conductivity anode can be made of heavily doped silicon, tungsten, nickel and other materials. The metal electrode can be made of gold, aluminum, platinum and other materials.

[0048] (2) Prepare an anode-gate insulating layer, see Figure 2AOn the high-conductivity anode, the anode-gate insulating layer can be deposited by chemical vapor deposition, sputtering, electron beam evaporation, etc. and can be made of silicon oxide, silicon nitride, etc.

[0049] (3) Preparation of the gate layer, see Figure 2A . Chromium, molybdenum, polysilicon, etc. can be used; sputtering, evaporation, chemical vapor deposition, etc. can be used for deposition.

[0050] (4) Patterning of the gate layer, see Figure 2B . Patterning can be performed during preparation, i.e. after deposition of the gate layer, followed by photolithography, wet etching or dry etching, etc. or after photolithography, followed by deposition of a metal to form a pattern.

[0051] (5) Preparation of the gate-cathode insulating layer, see Figure 2A or 2B. On the gate layer film, the gate-cathode insulating layer can be deposited by chemical vapor deposition, sputtering, electron beam evaporation, etc. and can be made of silicon oxide, silicon nitride, etc.

[0052] (6) Preparation of the gate metal lead electrode, see Figure 2C . The gate-cathode insulating layer is patterned by photolithography, wet etching or dry etching, etc. to expose the underlying gate layer. Then, the lead metal is deposited by sputtering, electron beam evaporation, etc. and can be aluminum, gold, copper, etc. to obtain the gate metal lead electrode.

[0053] 2. Preparation of the cathode structure

[0054] (1) The substrate of the cathode structure can be heavily doped silicon, indium tin oxide, copper, etc.

[0055] (2) The cathode can be made of silicon, molybdenum, diamond, carbon nanotube, silicon carbide, zinc oxide, etc. The cathode can be a thin film (see (a) in Figure 2D ) or a tip array (see (b) in Figure 2D ). For a thin film cathode, the thin film can be grown by physical vapor deposition, chemical vapor deposition, etc. For a tip array cathode, one method is to form sharp nanostructures on the substrate by reactive ion etching, focused ion beam milling, etc. and then grow the emitter material on the structures by chemical vapor deposition, etc. Another method is to directly form a nano-tip array of the cathode material by reactive ion etching, wet etching, electrochemical etching, etc.

[0056] (3) Surface treatment of the cathode. Surface treatment can be performed by surface doping, coating of low work function materials, plasma treatment, etc. to enhance the field emission performance.

[0057] (4) Preparation of metal electrode. The metal electrode can be prepared by chemical vapor deposition, sputtering, electron beam evaporation, etc. The metal electrode can be made of gold, aluminum, platinum, etc.

[0058] 3. Assembling to form a field emission device

[0059] See Figure 2E The cathode structure is accurately aligned with the gate working area of the gate-anode integrated structure by using micro-nano alignment technology, and is fixed by using adhesive bonding, welding, bonding, etc.

[0060] Although the present application has been disclosed with the above-mentioned embodiments, it is not intended to limit the present application, and any modification or equivalent replacement of the technical solutions of the present application made by those skilled in the art shall be covered by the protection scope of the present application, which is defined by the claims.

Claims

1. A field emission device, characterized in that: It includes a grid-anode integrated structure and a cathode structure; The gate-anode integrated structure includes a metal electrode located on the back side of the highly conductive anode, an anode-gate insulating layer located on the front side of the highly conductive anode, a patterned gate layer located on the anode-gate insulating layer, a gate-cathode insulating layer located on the gate layer, and a gate metal lead electrode located on the gate-cathode insulating layer; The gate metal lead electrode is adjacent to the gate working area and is connected to the gate layer; The cathode structure includes a substrate, a cathode located on the front side of the substrate, and a metal electrode located on the back side of the cathode; The cathode side of the cathode structure is fixed on the gate-cathode insulating layer of the gate working area of ​​the gate-anode integrated structure.

2. The field emission device according to claim 1, wherein The gate layer, the anode-gate insulating layer and the gate-cathode insulating layer are patterned to expose the anode, and the patterning is performed into an arbitrary opening shape.

3. The field emission device according to claim 1, wherein The cathode is a thin film structure or a tip array structure; the metal electrode on the cathode structure is located on the side of the substrate facing away from the cathode, or is located between the cathode and the substrate.

4. The field emission device according to claim 1, wherein The highly conductive anode is made of one material selected from heavily doped silicon, tungsten, and nickel; the metal electrodes of the gate-anode integrated structure and the cathode structure are made of one material selected from gold, aluminum, and platinum; the anode-gate insulating layer and the gate-cathode insulating layer are made of one material selected from silicon dioxide and silicon nitride; the gate layer is made of one material selected from chromium, molybdenum, and polysilicon; the gate metal lead electrode is made of one material selected from aluminum, gold, and copper; the substrate is made of one or more materials selected from heavily doped silicon, indium tin oxide, and copper; and the cathode is made of one material selected from silicon, molybdenum, diamond, carbon nanotubes, silicon carbide, and zinc oxide.

5. A method for preparing a field emission device according to any one of claims 1 to 4, characterized in that: The following steps are involved: Depositing a metal electrode on the back side of the highly conductive anode; Depositing an anode-gate insulating layer, a gate layer, and a gate-cathode insulating layer in sequence on the front surface of the highly conductive anode; patterning the gate layer before or after deposition; Patterning is performed on the gate-cathode insulating layer adjacent to the gate working area to expose the gate layer, and then a gate metal lead electrode is deposited to obtain a gate-anode integrated structure; depositing a cathode on a substrate; Depositing a metal electrode on a side of the substrate facing away from the cathode or between the substrate and the cathode to obtain a cathode structure; The cathode of the cathode structure is aligned with the gate-cathode insulating layer of the gate working area of ​​the gate-anode integrated structure, and assembled and fixed to obtain a field emission device.

6. The preparation method according to claim 5, wherein Chemical vapor deposition, sputtering or electron beam evaporation methods are used to deposit metal electrodes of a gate-anode integrated structure, an anode-gate insulating layer, a gate layer and a gate-cathode insulating layer, as well as a metal electrode of a cathode structure.

7. The preparation method according to claim 5, wherein Methods for patterning the gate layer include: patterning the gate layer by photolithography, wet etching or dry etching after deposition, or patterning by photolithography followed by metal stripping, or patterning the gate layer together with the anode-gate insulating layer and the gate-cathode insulating layer above and below it; the steps for patterning the gate layer together with the anode-gate insulating layer and the gate-cathode insulating layer above and below it include: etching the gate-cathode insulating layer, the gate layer and the anode-gate insulating layer in sequence by using patterning technology such as photolithography, nanoimprinting or electron beam lithography and laser etching, ion etching, reactive ion etching or wet etching.

8. The preparation method according to claim 5, wherein The gate-cathode insulating layer near the gate working area is photoetched using patterning technology such as photolithography, nanoimprinting or electron beam lithography, and stripping, wet etching and sputtering methods to expose the gate layer, and then the gate metal lead electrode is deposited by sputtering or electron beam evaporation.

9. The preparation method according to claim 5, wherein The cathode is a thin film structure or a tip array structure; If it is a thin film structure, the thin film is grown by physical vapor deposition or chemical vapor deposition; if it is a tip array structure, a nanoscale tip array structure is formed on the substrate by reactive ion etching, focused ion beam milling or self-assembly mask technology, and then the emitter material is grown on the tip array structure by chemical vapor deposition, or the cathode material is directly formed into a nanoscale tip array structure by reactive ion etching, wet etching or electrochemical etching process.

10. The preparation method according to claim 5, characterized in that The cathode surface is treated by surface doping, coating with low work function materials or plasma treatment; the cathode of the cathode structure is aligned with the gate-cathode insulating layer of the gate working area of ​​the gate-anode integrated structure using micro-nano alignment technology, and then assembled and fixed using bonding, welding or bonding technology.

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