Electrical performance testing method and system

Abstract

The present application provides an electrical performance detection method and system, which collects the working condition records of the target circuit board measurement node; extracts the DC component during DC excitation from the working condition records, and determines the load loss of the measurement node under the DC state based on the DC component and the resistive load; determines the load over-limit characteristics of the target circuit board, and determines multiple hidden fault points based on the load loss and load over-limit characteristics; extracts the AC component during AC excitation from the working condition records of the hidden fault point, and determines the power feature sequence of the hidden fault point under the AC state based on the AC component and the base frequency signal during performance detection; obtains the power base value of the target circuit board, determines the fault discrimination amount of the hidden fault point based on the power feature sequence combined with the power base value, and extracts multiple explicit fault points based on the fault discrimination amount corresponding to the hidden fault point. The scheme of the present application can accurately locate the fault point under abnormal power state, thereby improving the accuracy of circuit board performance detection.

Description

Technical Field

[0001] The present application relates to the technical field of electrical performance testing, and more specifically, to an electrical performance testing method and system. Background Art

[0002] Electrical performance testing is an indispensable part of the research and development, production and application of electronic components and electrical equipment. Its purpose is to evaluate whether the performance indicators of the equipment meet the design requirements and ensure its stability and reliability in a specific environment. Electrical performance testing mainly involves the measurement and analysis of parameters such as voltage, current, impedance, power consumption, frequency response, etc., covering a wide range from DC characteristics to RF behavior, and combining advanced software algorithms to achieve automated measurement and data processing. At the same time, modern electrical performance testing emphasizes high efficiency and versatility, shortens the R&D cycle and improves production efficiency through integrated testing solutions, laying an important foundation for promoting the innovation of a new generation of electronic technology.

[0003] The realization of electrical performance testing relies on the combination of high-precision hardware and intelligent software, covering multiple links such as measurement, analysis and diagnosis. In terms of hardware, commonly used equipment includes digital multimeters, oscilloscopes, power supply test systems, etc. In terms of software, the test automation system realizes equipment control, data acquisition and processing through programming languages ​​or dedicated test platforms. In fault detection, electrical performance testing locates abnormalities in components or circuits through monitoring and analysis of key parameters. Combined with intelligent algorithms, the test system can perform pattern analysis on historical data and predict potential fault risks, thereby improving the reliability and maintainability of equipment and promoting the transformation of testing from passive verification to active diagnosis. However, when detecting fault points on circuit boards, as the power density of circuit boards increases, high-power components are prone to performance degradation caused by abnormal power consumption during work, and existing technical means often find it difficult to accurately locate these fault points. Therefore, how to accurately locate fault points under abnormal power conditions and improve the accuracy of circuit board performance detection has become a difficult problem faced by the industry. Summary of the invention

[0004] The present application provides an electrical performance detection method and system, which can accurately locate the fault point under abnormal power state, thereby improving the accuracy of circuit board performance detection.

[0005] In a first aspect, the present application provides an electrical performance testing method, comprising the following steps:

[0006] Collect the working condition records at each measurement node of the target circuit board;

[0007] A measurement node is selected as a selected measurement node, a DC component is extracted from the operating record of the selected measurement node each time a DC excitation is performed on the selected measurement node, a load loss of the selected measurement node in a DC state is determined based on all DC components and a resistive load of the selected measurement node, and the load loss of the remaining measurement nodes in a DC state is continued to be determined;

[0008] Determine a load over-limit feature of a target circuit board, and determine a plurality of hidden fault points of the target circuit board based on the load loss of each measurement node and the load over-limit feature;

[0009] For each hidden fault point, extract the AC component when the hidden fault point is AC-excited each time from the working condition record of each hidden fault point, and determine the power characteristic sequence of each hidden fault point in the AC state based on all the AC components and the baseband signal when the target circuit board is subjected to performance detection;

[0010] The power base value of the target circuit board is obtained, the fault discrimination value of each hidden fault point is determined based on the power feature sequence combined with the power base value, and multiple explicit fault points are extracted from all the hidden fault points according to the fault discrimination value corresponding to each hidden fault point.

[0011] In some embodiments, extracting the DC component each time the DC excitation is performed on the selected measurement node from the operating condition record of the selected measurement node specifically includes:

[0012] Get multiple DC excitation timestamps when DC excitation is applied to the selected measurement node;

[0013] Determine multiple DC excitation intervals based on all DC excitation timestamps and the operating condition records of the selected measurement nodes, wherein the DC excitation intervals represent a time range for a DC excitation source to perform DC excitation, and each DC excitation interval corresponds to one DC excitation;

[0014] Selecting a DC excitation interval as a selected DC excitation interval, and determining a DC voltage characteristic and a DC current characteristic within the selected DC excitation interval;

[0015] combining the DC voltage characteristic and the DC current characteristic into a DC component of a selected DC excitation interval;

[0016] Continue to determine the DC components of the remaining DC excitation intervals, and then obtain the DC components under each DC excitation.

[0017] In some embodiments, determining the load loss of the selected measurement node in the DC state based on all DC components and the resistive load of the selected measurement node specifically includes:

[0018] For each DC component, determining the actual energy loss of the selected measurement node under the DC excitation corresponding to the DC component;

[0019] Extracting a DC current characteristic from the DC component, determining an ideal loss of the selected measurement node under a DC excitation corresponding to the DC component based on the DC current characteristic and a resistive load of the selected measurement node, and then obtaining an actual energy loss and an ideal loss of the selected measurement node under the DC excitation corresponding to each DC component;

[0020] Obtain the DC excitation interval corresponding to each DC component;

[0021] The load loss of the selected measurement node in the DC state is determined based on all DC excitation intervals, all actual energy losses, and all ideal losses.

[0022] In some embodiments, determining the load loss of the selected measurement node in the DC state based on all DC excitation intervals, all actual energy losses, and all ideal losses specifically includes:

[0023] For each DC excitation interval, extract the actual energy loss and the ideal loss corresponding to the DC excitation interval from all actual energy losses and all ideal losses;

[0024] Determine the energy loss corresponding to the DC excitation interval based on the actual energy loss and the ideal loss, and then obtain the energy loss corresponding to each DC excitation interval;

[0025] Obtain the interval length of each DC excitation interval;

[0026] The load loss of the selected measurement node in the DC state is determined based on all interval lengths and all energy losses.

[0027] In some embodiments, determining the load over-limit feature of the target circuit board specifically includes:

[0028] Get all load losses;

[0029] The average of all load losses is taken as the load-exceeding characteristic of the target board.

[0030] In some embodiments, determining the fault determination amount of each hidden fault point based on the power feature sequence in combination with the power base value specifically includes:

[0031] Determine the power deviation of each power feature based on each power feature in the power feature sequence and the power base value;

[0032] A fault determination amount of the hidden fault point corresponding to the power feature sequence is determined based on all power deviations and a preset deviation threshold.

[0033] In some embodiments, a voltage probe and a current probe are used to collect operating records of the measurement node.

[0034] In a second aspect, the present application provides an electrical performance detection system, comprising:

[0035] An acquisition module is used to collect the working condition records at each measurement node of the target circuit board;

[0036] A processing module is used to select a measurement node as a selected measurement node, extract a DC component each time a DC excitation is performed on the selected measurement node from a working condition record of the selected measurement node, determine a load loss of the selected measurement node in a DC state based on all DC components and a resistive load of the selected measurement node, and continue to determine the load loss of the remaining measurement nodes in a DC state;

[0037] The processing module is further used to determine a load over-limit feature of the target circuit board, and determine a plurality of hidden fault points of the target circuit board based on the load loss of each measurement node and the load over-limit feature;

[0038] The processing module is further used to extract, for each hidden fault point, from the working condition record of each hidden fault point, the AC component when the hidden fault point is AC-excited each time, and determine the power characteristic sequence of each hidden fault point in the AC state based on all the AC components and the baseband signal when the target circuit board is subjected to performance detection;

[0039] The execution module is used to obtain the power base value of the target circuit board, determine the fault judgment value of each hidden fault point based on the power feature sequence combined with the power base value, and extract multiple explicit fault points from all the hidden fault points according to the fault judgment value corresponding to each hidden fault point.

[0040] In a third aspect, the present application provides a computer device, comprising a memory and a processor, wherein the memory stores codes, and the processor is configured to obtain the codes and execute the above-mentioned electrical performance detection method.

[0041] In a fourth aspect, the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the above-mentioned electrical performance detection method is implemented.

[0042] The technical solution provided by the embodiments disclosed in this application has the following beneficial effects:

[0043] In the electrical performance detection method and system provided by the present application, first, the operating condition records at each measurement node of the target circuit board are collected; secondly, a measurement node is selected as the selected measurement node, and the DC component when the selected measurement node is DC-excited each time is extracted from the operating condition record of the selected measurement node, and the load loss of the selected measurement node in the DC state is determined based on all DC components and the resistive load of the selected measurement node, and the load loss of the remaining measurement nodes in the DC state is continued to be determined; further, the load over-limit feature of the target circuit board is determined, and multiple hidden fault points of the target circuit board are determined based on the load loss of each measurement node and the load over-limit feature; then, for each hidden fault point, the AC component when the hidden fault point is AC-excited each time is extracted from the operating condition record of each hidden fault point, and the power feature sequence of each hidden fault point in the AC state is determined based on all AC components and the base frequency signal when the target circuit board is subjected to performance detection; finally, the power base value of the target circuit board is obtained, and the fault discrimination amount of each hidden fault point is determined based on the power feature sequence combined with the power base value, and multiple explicit fault points are extracted from all the hidden fault points according to the fault discrimination amount corresponding to each hidden fault point.

[0044] It can be seen that the present application can accurately locate the fault point under abnormal power state, thereby improving the accuracy of circuit board performance detection; first, the DC component under each DC excitation is extracted from the working condition record of the measurement node to reflect the static characteristics of the target circuit board, thereby providing data support for subsequent fault diagnosis; secondly, the load loss of the measurement node under the DC state is determined to better identify the non-ideal power consumption caused by non-ideal factors, thereby providing stronger support for fault detection; further, the load over-limit characteristics of the target circuit board are determined to effectively discover abnormal power consumption states, thereby increasing the reliability of identifying potential fault risks; then, the target circuit board is determined based on the load loss and load over-limit characteristics of the measurement node. The hidden fault points of the circuit board can be effectively identified to effectively identify the areas that will affect the normal operation of the circuit in the future, so as to take corresponding measures in time to avoid larger fault problems; in addition, the power characteristic sequence of the hidden fault point under the AC state is determined based on the AC component and the baseband signal to reflect the working state of the measurement node of the target circuit board under AC excitation, thereby improving the reliability of fault detection; finally, the power characteristic sequence is subjected to timing analysis, and multiple explicit fault points are extracted based on the results of the timing analysis to quickly locate the fault point, thereby assisting maintenance personnel in performing related maintenance; in summary, the technical solution provided by the present application can accurately locate the fault point under abnormal power state, thereby improving the accuracy of circuit board performance detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1is an exemplary flow chart of an electrical performance detection method according to some embodiments of the present application;

[0046] Figure 2 is a schematic diagram of the structure of a high-impedance passive probe according to some embodiments of the present application;

[0047] Figure 3 is an exemplary flow chart of determining the load loss of a selected measurement node in a DC state according to some embodiments of the present application;

[0048] Figure 4 is a structural schematic diagram of an electrical performance detection system according to some embodiments of the present application;

[0049] Figure 5 It is a structural schematic diagram of a computer device for implementing an electrical performance detection method according to some embodiments of the present application. DETAILED DESCRIPTION

[0050] In order to better understand the technical solution of the present application, the technical solution of the present application will be described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0051] refer to Figure 1 , which is an exemplary flow chart of an electrical performance testing method according to some embodiments of the present application. The electrical performance testing method 100 mainly includes the following steps:

[0052] In step 101, the operating condition records at each measurement node of the target circuit board are collected.

[0053] In specific implementation, the operating condition records at each measurement node of the target circuit board are collected, that is: for each measurement node of the target circuit board, a voltage probe is connected to both ends of each measurement node to collect a voltage signal, and a current probe is clamped on the input wire of each measurement node to collect a current signal, and the voltage signal collected by the voltage probe and the current signal collected by the current probe are used as the operating condition records of the measurement node, and then the operating condition records at each measurement node of the target circuit board are collected. In addition, in other embodiments, other methods can be used to collect the operating condition records at each measurement node of the target circuit board, which are not limited here.

[0054] It should be noted that the measurement node in the present application represents the location where the electrical parameter changes of the target circuit board are detected. In addition, the operating condition record in the present application represents various operating condition parameters of the measurement node during operation, and the operating condition record includes the voltage signal and current signal of the measurement node under DC excitation and AC excitation states. In addition, in other embodiments, the operating condition record may also include other relevant working parameters, which are not limited here.

[0055] It should also be noted that the voltage probe in this embodiment is a high-impedance passive probe, which includes a signal terminal, a ground terminal, a probe front end, a lossy transmission line and a compensator. Figure 2 As shown, this figure is a schematic diagram of the structure of a high-impedance passive probe according to some embodiments of the present application.

[0056] In step 102, a measurement node is selected as a selected measurement node, a DC component is extracted from the operating record of the selected measurement node each time a DC excitation is performed on the selected measurement node, the load loss of the selected measurement node in a DC state is determined based on all DC components and the resistive load of the selected measurement node, and the load loss of the remaining measurement nodes in a DC state is continued to be determined.

[0057] In some embodiments, the DC component of each DC excitation performed on the selected measurement node may be extracted from the operating record of the selected measurement node in the following manner, namely:

[0058] Get multiple DC excitation timestamps when DC excitation is applied to the selected measurement node;

[0059] Determine multiple DC excitation intervals based on all DC excitation timestamps and the operating condition records of the selected measurement nodes, wherein the DC excitation intervals represent a time range for a DC excitation source to perform DC excitation, and each DC excitation interval corresponds to one DC excitation;

[0060] Selecting a DC excitation interval as a selected DC excitation interval, and determining a DC voltage characteristic and a DC current characteristic within the selected DC excitation interval;

[0061] combining the DC voltage characteristic and the DC current characteristic into a DC component of a selected DC excitation interval;

[0062] Continue to determine the DC components of the remaining DC excitation intervals, and then obtain the DC components under each DC excitation.

[0063] In a specific implementation, multiple DC excitation timestamps when DC excitation is performed on the selected measurement node are obtained, that is, multiple DC excitation timestamps when DC excitation is performed on the selected measurement node can be obtained by checking the operation record of the excitation source. In addition, in other embodiments, other methods can be used to obtain the DC excitation timestamp, for example, event logs, etc., which are not limited here.

[0064] It should be noted that the DC excitation timestamp in this embodiment represents the time point of DC excitation. Specifically, the DC excitation timestamp in this embodiment is the time point when the DC excitation source is turned on and the time point when the DC excitation source is turned off.

[0065] In the specific implementation, multiple DC excitation intervals are determined based on all DC excitation timestamps and the operating condition records of the selected measurement nodes, that is: the operating condition records of the selected measurement nodes are marked according to each DC excitation timestamp, and the opening time points and closing time points of multiple DC excitation sources are obtained, and the time interval between adjacent opening time points and closing time points is used as the DC excitation interval, thereby obtaining multiple DC excitation intervals.

[0066] In the specific implementation, the DC voltage characteristics and DC current characteristics within the selected DC excitation interval are determined, that is: the voltage signal and current signal within the selected DC excitation interval are respectively obtained from the operating condition records corresponding to the selected measurement nodes, and the voltage amplitude mode of the voltage signal is used as the DC voltage characteristic within the selected DC excitation interval, and the current amplitude mode of the current signal is used as the DC current characteristic within the selected DC excitation interval.

[0067] It should be noted that the DC component in the present application represents the working parameters of the measurement node under DC excitation, and the DC component includes DC voltage characteristics and DC current characteristics. Each DC excitation corresponds to a DC component. In addition, in other embodiments, the DC component may also include other DC working parameters, which are not limited here. By determining the DC component, the static characteristics of the target circuit board are reflected, thereby providing data support for subsequent fault diagnosis.

[0068] In some embodiments, reference Figure 3 As shown in FIG. 1 , this figure is an exemplary flow chart of determining the load loss of a selected measurement node in a DC state according to some embodiments of the present application. In this embodiment, determining the load loss of a selected measurement node in a DC state based on all DC components and the resistive load of the selected measurement node can be implemented by the following steps:

[0069] First, in step 1021, for each DC component, the actual energy loss of the selected measurement node under the DC excitation corresponding to the DC component is determined;

[0070] Then, in step 1022, a DC current feature is extracted from the DC component, and an ideal loss of the selected measurement node under a DC excitation corresponding to the DC component is determined based on the DC current feature and a resistive load of the selected measurement node, thereby obtaining an actual energy loss and an ideal loss of the selected measurement node under the DC excitation corresponding to each DC component;

[0071] Then, in step 1023, a DC excitation interval corresponding to each DC component is obtained;

[0072] Finally, in step 1024, the load loss of the selected measurement node in the DC state is determined based on all DC excitation intervals, all actual energy losses, and all ideal losses.

[0073] In specific implementation, the actual energy loss of the selected measurement node under the DC excitation corresponding to the DC component is determined, that is, the DC voltage characteristic and the DC current characteristic in the DC component are extracted, and the product of the DC voltage characteristic and the DC current characteristic is used as the actual energy loss of the selected measurement node under the DC excitation corresponding to the DC component.

[0074] It should be noted that, in this embodiment, the actual energy loss refers to the actual power loss of the measurement node, and the actual power loss is obtained through measurement during the operation of the measurement node.

[0075] In a specific implementation, the ideal loss of the selected measurement node under the DC excitation corresponding to the DC component is determined based on the DC current characteristic and the resistive load of the selected measurement node, that is, the product of the square value of the DC current characteristic and the resistive load is used as the ideal loss of the selected measurement node under the DC excitation corresponding to the DC component.

[0076] It should be noted that, in this embodiment, the ideal loss refers to the power loss of the measurement node under ideal conditions.

[0077] In some embodiments, the load loss of the selected measurement node in the DC state can be determined based on all DC excitation intervals, all actual energy losses, and all ideal losses in the following manner, namely:

[0078] For each DC excitation interval, extract the actual energy loss and the ideal loss corresponding to the DC excitation interval from all actual energy losses and all ideal losses;

[0079] Determine the energy loss corresponding to the DC excitation interval based on the actual energy loss and the ideal loss, and then obtain the energy loss corresponding to each DC excitation interval;

[0080] Obtain the interval length of each DC excitation interval;

[0081] The load loss of the selected measurement node in the DC state is determined based on all interval lengths and all energy losses.

[0082] In specific implementation, the energy loss corresponding to the DC excitation interval is determined based on the actual energy loss and the ideal loss, that is, the difference between the actual energy loss and the ideal loss is used as the energy loss corresponding to the DC excitation interval. In addition, in other embodiments, other methods can also be used to calculate the energy loss, which are not limited here.

[0083] It should be noted that the energy consumption loss in this embodiment represents the difference between the actual energy consumption and the ideal energy consumption. Determining the energy consumption loss can help reflect the performance status of the measurement node, thereby increasing the accuracy of fault detection.

[0084] In the specific implementation, the load loss of the selected measurement node in the DC state is determined based on all interval lengths and all energy losses, that is: all energy losses are weightedly summed, and the weighted sum result is used as the load loss of the selected measurement node in the DC state, and the weight of each energy loss is the interval length of the corresponding DC excitation interval.

[0085] It should be noted that, in this embodiment, the interval length represents the time span of the DC excitation corresponding to the DC excitation interval.

[0086] It should also be noted that the load loss in this application represents the energy attenuation of the measuring node during the operation of the target circuit board. The greater the load loss, the greater the energy attenuation of the measuring node during the operation of the target circuit board, and the smaller the load loss, the smaller the energy attenuation of the measuring node during the operation of the target circuit board. By determining the load loss, resource waste can be better identified, thereby providing stronger support for fault detection.

[0087] In addition, it should be noted that the implementation step of "determining the load loss of the selected measurement node in the DC state based on all DC components and the resistive load of the selected measurement node" continues to determine the load loss of the remaining measurement nodes in the DC state, which will not be repeated here.

[0088] In step 103, a load over-limit feature of the target circuit board is determined, and a plurality of hidden fault points of the target circuit board are determined based on the load loss of each measurement node and the load over-limit feature.

[0089] It should be noted that the load over-limit feature in the present application represents the power consumption limit of the safe state. Specifically, the load over-limit feature in the present application represents that the load loss exceeds the power consumption limit of the safe state. By determining the load over-limit feature, the abnormal power consumption state can be effectively discovered, thereby increasing the reliability of identifying potential fault risks. As a preferred embodiment, the load over-limit feature of the target circuit board can be determined in the following manner, namely:

[0090] Get all load losses;

[0091] The average of all load losses is taken as the load-exceeding characteristic of the target board.

[0092] In specific implementation, multiple hidden fault points of the target circuit board are determined based on the load loss of each measurement node and the load over-limit feature, that is, the load loss of each measurement node is compared with the load over-limit feature, and the measurement nodes with load losses greater than the load over-limit feature are extracted, and the extracted measurement nodes are used as hidden fault points, thereby obtaining multiple hidden fault points of the target circuit board.

[0093] It should be noted that the hidden fault point in the present application represents a potential problem area, which is not obviously manifested in the target circuit board, but will affect the long-term reliability of the target circuit board. By determining the hidden fault point, the area that will affect the normal operation of the circuit in the future can be effectively identified, so that corresponding measures can be taken in time to avoid larger fault problems.

[0094] In step 104, for each hidden fault point, the AC component each time the hidden fault point is AC-excited is extracted from the operating condition record of each hidden fault point, and the power characteristic sequence of each hidden fault point in the AC state is determined based on all the AC components and the baseband signal when the target circuit board is subjected to performance testing.

[0095] In some embodiments, the AC component of each AC excitation performed on the hidden fault point may be extracted from the working condition record of each hidden fault point in the following manner, namely:

[0096] Acquire multiple AC excitation timestamps when AC excitation is performed on each hidden fault point;

[0097] Determine multiple AC excitation intervals of each hidden fault point based on all AC excitation timestamps and the operating condition records of each hidden fault point, wherein the AC excitation interval represents a time range for the AC excitation source to perform AC excitation, and each AC excitation interval corresponds to one AC excitation;

[0098] Selecting an AC excitation interval as a selected AC excitation interval, and determining an AC voltage sequence and an AC current sequence within the selected AC excitation interval;

[0099] combining the AC voltage sequence and the AC current sequence into an AC component of a selected AC excitation interval;

[0100] Continue to determine the AC components of the remaining AC excitation intervals.

[0101] In specific implementation, multiple AC excitation timestamps when AC excitation is performed on each hidden fault point are obtained, that is, multiple AC excitation timestamps when AC excitation is performed on each hidden fault point can be obtained by checking the operation record of the excitation source. It should be noted that the AC excitation timestamp in this embodiment represents the time point of AC excitation. Specifically, the AC excitation timestamp in this embodiment represents the time point when the AC excitation source is turned on and the time point when the AC excitation source is turned off.

[0102] In a specific implementation, multiple AC excitation intervals of each hidden fault point are determined based on all AC excitation timestamps and the operating condition records of each hidden fault point, that is: the operating condition records of each hidden fault point are marked according to each AC excitation timestamp, and the start time points and the close time points of the multiple AC excitation sources of each hidden fault point are obtained, and the time interval between adjacent start time points and close time points is used as the multiple AC excitation intervals of each hidden fault point.

[0103] In some embodiments, the AC voltage sequence and the AC current sequence within the selected AC excitation interval may be determined in the following manner, namely:

[0104] In the selected AC excitation interval, a voltage signal and a current signal in the operating condition record corresponding to each hidden fault point are respectively obtained as a selected voltage signal segment and a selected current signal segment;

[0105] Determine the equivalent DC component within the selected AC excitation interval;

[0106] An AC voltage sequence and an AC current sequence within a selected AC excitation interval are determined based on the equivalent DC component, the selected voltage signal segment, and the selected current signal segment.

[0107] In a specific implementation, the equivalent DC component within the selected AC excitation interval is determined, that is, a selected voltage signal segment and a selected current signal segment are obtained, the voltage amplitude mode of the selected voltage signal segment is used as the equivalent DC voltage characteristic within the selected AC excitation interval, the current amplitude mode of the selected current signal segment is used as the equivalent DC current characteristic within the selected AC excitation interval, and the equivalent DC voltage characteristic and the equivalent DC current characteristic are combined into an equivalent DC component within the selected AC excitation interval.

[0108] It should be noted that in this embodiment, the equivalent DC component represents a quantized value reflecting the DC characteristics of the AC excitation signal, wherein the equivalent DC voltage characteristic represents the equivalent DC voltage component under AC excitation, and the equivalent DC current characteristic represents the equivalent DC current component under AC excitation.

[0109] In some embodiments, the AC voltage sequence and the AC current sequence in the selected AC excitation interval are determined based on the equivalent DC component, the selected voltage signal segment, and the selected current signal segment in the following manner, namely:

[0110] Sampling the selected voltage signal segment to obtain a plurality of voltage sampling values;

[0111] Determine an AC voltage value corresponding to each voltage sampling value based on each voltage sampling value and the equivalent DC component, and combine all AC voltage values ​​into an AC voltage sequence;

[0112] Sampling the selected current signal segment to obtain a plurality of current sampling values;

[0113] An alternating current value corresponding to each current sampling value is determined based on each current sampling value and the equivalent direct current component, and all the alternating current values ​​are combined into an alternating current sequence.

[0114] It should be noted that in this embodiment, sampling is performed at a sampling frequency of once per second. In addition, in other embodiments, other sampling frequencies may be used for sampling according to actual application requirements, which is not limited here.

[0115] In a specific implementation, the AC voltage value corresponding to each voltage sampling value is determined based on each voltage sampling value and the equivalent DC component, that is, the equivalent DC voltage feature is extracted from the equivalent DC component, and the difference between each voltage sampling value and the equivalent DC voltage feature is used as the AC voltage value corresponding to each voltage sampling value. In addition, in other embodiments, other methods can also be used to calculate the AC voltage value, which is not limited here.

[0116] In a specific implementation, the AC current value corresponding to each current sampling value is determined based on each current sampling value and the equivalent DC component, that is, the equivalent DC current characteristic is extracted from the equivalent DC component, and the difference between each current sampling value and the equivalent DC current characteristic is used as the AC current value corresponding to each current sampling value. In addition, in other embodiments, other methods can also be used to calculate the AC current value, which is not limited here.

[0117] It should be noted that when all AC voltage values ​​are combined into an AC voltage sequence and all AC current values ​​are combined into an AC current sequence, all AC current values ​​and all AC voltage values ​​are combined in the order of AC excitation time and sampling time.

[0118] It should also be noted that the AC component in this application represents the working parameters of the hidden fault point under AC excitation. The AC component includes an AC voltage sequence and an AC current sequence. Each AC excitation corresponds to an AC component. By determining the AC component, the dynamic characteristics of the target circuit board are reflected, thereby providing data support for subsequent fault diagnosis.

[0119] In some embodiments, the power characteristic sequence of each hidden fault point in the AC state can be determined based on all AC components and the baseband signal of the target circuit board when the performance is detected in the following manner, namely:

[0120] Acquire the baseband signal of the target circuit board when performing performance testing;

[0121] Extracting an AC voltage sequence and an AC current sequence of each AC component;

[0122] Determine the voltage phase of the AC excitation corresponding to each AC component based on the AC voltage sequence combined with the baseband signal;

[0123] Determine the current phase of the AC excitation corresponding to each AC component based on the AC current sequence combined with the baseband signal;

[0124] Determining a power characteristic corresponding to each AC component according to the voltage phase and the current phase;

[0125] All power characteristics are combined into a power characteristic sequence of the hidden fault point in the AC state.

[0126] In specific implementation, the baseband signal of the target circuit board during performance testing can be obtained through Python's numpy tool. In addition, in other embodiments, other methods can be used to obtain the baseband signal, which is not limited here. The baseband signal represents the frequency of the lowest frequency harmonic component in the periodic signal. For a periodic AC excitation signal, the baseband signal is the inverse of the period of the AC excitation signal.

[0127] In a specific implementation, the voltage phase of the AC excitation corresponding to each AC component is determined based on the AC voltage sequence in combination with the baseband signal, that is: based on the baseband signal, the AC voltage sequence is transformed by discrete Fourier transform to obtain the sinusoidal voltage component and cosine voltage component of the AC voltage sequence, and the sinusoidal voltage component and the cosine voltage component are substituted into an inverse tangent function to obtain the voltage phase of the AC excitation corresponding to each AC component.

[0128] In a specific implementation, the current phase of the AC excitation corresponding to each AC component is determined based on the AC current sequence in combination with the baseband signal, that is: based on the baseband signal, the AC current sequence is transformed by discrete Fourier transform to obtain the sinusoidal current component and the cosine current component of the AC current sequence, and the sinusoidal current component and the cosine current component are substituted into the inverse tangent function to obtain the current phase of the AC excitation corresponding to each AC component.

[0129] In a specific implementation, the power characteristic corresponding to each AC component is determined based on the voltage phase and the current phase, that is, the difference between the voltage phase and the current phase is used as the excitation phase difference, and the cosine value of the excitation phase difference is used as the power characteristic corresponding to each AC component.

[0130] It should be noted that in this embodiment, the power characteristic represents a dimensionless value of the power utilization efficiency in the AC circuit. By determining the power characteristic, the working state of the measurement node of the target circuit board under AC excitation can be reflected, which is conducive to identifying abnormal working states and further improving the reliability of fault detection.

[0131] It should also be noted that when all power features are combined into a power feature sequence of a hidden fault point in an AC state, all power features are arranged in the order of AC excitation time, and each power feature sequence corresponds to a hidden fault point.

[0132] In step 105, the power base value of the target circuit board is obtained, the fault judgment value of each hidden fault point is determined based on the power feature sequence combined with the power base value, and multiple explicit fault points are extracted from all the hidden fault points according to the fault judgment value corresponding to each hidden fault point.

[0133] In the specific implementation, the power base value of the target circuit board is obtained, that is, in the initial stage of normal operation of the target circuit board, the power base value of the target circuit board is acquired by collecting with a power analyzer. In addition, in other embodiments, other methods can be used to obtain the power base value, which is not limited here. The power base value represents the normal power factor base value under the circuit operation state.

[0134] In some embodiments, the fault discrimination value of each hidden fault point is determined based on the power feature sequence in combination with the power base value in the following manner, namely:

[0135] Determine the power deviation of each power feature based on each power feature in the power feature sequence and the power base value;

[0136] A fault determination amount of the hidden fault point corresponding to the power feature sequence is determined based on all power deviations and a preset deviation threshold.

[0137] In specific implementation, the power deviation of each power feature in the power feature sequence is determined based on each power feature and the power base value, that is, the difference between each power feature in the power feature sequence and the power base value is calculated, and the quotient of the absolute value of each difference and the power base value is taken as the power deviation of each power feature. In addition, in other embodiments, other methods can also be used to determine the power deviation, which is not limited here.

[0138] It should be noted that, in this embodiment, the power deviation degree indicates the degree to which the power characteristic deviates from the normal power factor base value.

[0139] In specific implementation, the fault judgment value of the hidden fault point corresponding to the power characteristic sequence is determined based on all power deviations and a preset deviation threshold, that is: a deviation threshold is set, and each power deviation is compared with the deviation threshold respectively. When the power deviation is continuously greater than the deviation threshold, the maximum number of times the deviation threshold is continuously exceeded is recorded, and the maximum number is used as the fault judgment value of the hidden fault point corresponding to the power characteristic sequence.

[0140] It should be noted that the fault discrimination amount in this embodiment represents a quantitative indicator for measuring the possibility of fault. Specifically, the fault discrimination amount in this embodiment represents a quantitative indicator for measuring the possibility of fault occurring in the measurement node of the target circuit board. By determining the fault discrimination amount, reliable data support can be provided for fault detection, thereby improving the accuracy of fault detection.

[0141] In specific implementation, multiple explicit fault points are extracted from all implicit fault points according to the fault judgment amount corresponding to each implicit fault point, that is, a fault judgment threshold is set, the fault judgment amount corresponding to each implicit fault point is compared with the fault judgment threshold, and the implicit fault points whose fault judgment amount is greater than the fault judgment threshold are extracted, and the extracted implicit fault points are used as explicit fault points, thereby obtaining multiple explicit fault points.

[0142] It should be noted that the explicit fault point in the present application refers to a fault point with significant abnormal characteristics. Specifically, the explicit fault point in the present application refers to a fault point with significant abnormal characteristics in the target circuit board. The explicit fault point is clearly identified through fault discrimination analysis. Unlike the implicit fault point, the explicit fault point is a location with strong fault characteristics that can more directly reflect the potential risks of system performance. Identifying the explicit fault point is helpful for quickly locating the fault point, thereby assisting maintenance personnel in performing related maintenance.

[0143] In addition, in another aspect of the present application, in some embodiments, the present application provides an electrical performance detection system, referring to Figure 4 , which is a schematic diagram of the structure of an electrical performance detection system according to some embodiments of the present application, the electrical performance detection system 200 includes: an acquisition module 201, a processing module 202 and an execution module 203, which are described as follows:

[0144] The acquisition module 201 in this application is mainly used to collect the working condition records at each measurement node of the target circuit board;

[0145] Processing module 202, in the present application, the processing module 202 is mainly used to select a measurement node as a selected measurement node, extract the DC component when the selected measurement node is DC-excited each time from the operating condition record of the selected measurement node, determine the load loss of the selected measurement node in the DC state based on all DC components and the resistive load of the selected measurement node, and continue to determine the load loss of the remaining measurement nodes in the DC state;

[0146] The processing module 202 is further used to determine a load over-limit feature of the target circuit board, and determine multiple hidden fault points of the target circuit board based on the load loss of each measurement node and the load over-limit feature;

[0147] In addition, the processing module 202 is further used to extract, for each hidden fault point, from the working condition record of each hidden fault point, the AC component when the hidden fault point is AC-excited each time, and determine the power characteristic sequence of each hidden fault point in the AC state based on all the AC components and the baseband signal when the target circuit board is subjected to performance detection;

[0148] Execution module 203, in the present application, execution module 203 is mainly used to obtain the power base value of the target circuit board, determine the fault judgment value of each hidden fault point based on the power feature sequence combined with the power base value, and extract multiple explicit fault points from all the hidden fault points according to the fault judgment value corresponding to each hidden fault point.

[0149] In addition, the present application also provides a computer device, which includes a memory and a processor, wherein the memory stores codes, and the processor is configured to obtain the codes and execute the above-mentioned electrical performance detection method.

[0150] In some embodiments, reference Figure 5 , which is a schematic diagram of the structure of a computer device for implementing an electrical performance detection method according to some embodiments of the present application. The electrical performance detection method in the above embodiment can be Figure 5 The computer device 300 shown in the figure is implemented, and the computer device 300 includes at least one processor 301, a communication bus 302, a memory 303 and at least one communication interface 304.

[0151] The processor 301 may be a general-purpose central processing unit (CPU), or an application-specific integrated circuit (ASIC) or one or more processors for controlling the execution of the electrical performance detection method in the present application.

[0152] The communication bus 302 may be used to transmit information between the above-mentioned components.

[0153] The memory 303 may be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM) or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, an optical disc storage (including a compressed optical disc, a laser disc, an optical disc, a digital versatile disc, a Blu-ray disc, etc.), a magnetic disk or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of an instruction or data structure and can be accessed by a computer, but is not limited thereto. The memory 303 may exist independently and be connected to the processor 301 via the communication bus 302. The memory 303 may also be integrated with the processor 301.

[0154] The memory 303 is used to store the program code for executing the solution of the present application, and the execution is controlled by the processor 301. The processor 301 is used to execute the program code stored in the memory 303. The program code may include one or more software modules. The determination of the electrical performance detection method in the above embodiment can be implemented by the processor 301 and one or more software modules in the program code in the memory 303.

[0155] The communication interface 304 uses any transceiver or other device for communicating with other devices or communication networks, such as Ethernet, radio access network (RAN), wireless local area networks (WLAN), etc.

[0156] In a specific implementation, as an embodiment, a computer device may include multiple processors, each of which may be a single-CPU processor or a multi-CPU processor. The processor here may refer to one or more devices, circuits, and / or processing cores for processing data (e.g., computer program instructions).

[0157] The above-mentioned computer device may be a general-purpose computer device or a special-purpose computer device. In a specific implementation, the computer device may be a desktop computer, a portable computer, a network server, a personal digital assistant (PDA), a mobile phone, a tablet computer, a wireless terminal device, a communication device or an embedded device. The embodiment of the present application does not limit the type of computer device.

[0158] In addition, the present application also provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the above-mentioned electrical performance detection method is implemented.

[0159] Although the preferred embodiments of the present application have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0160] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. An electrical performance testing method, characterized in that: The steps include: Collect the working condition records at each measurement node of the target circuit board; A measurement node is selected as a selected measurement node, a DC component is extracted from the operating record of the selected measurement node each time a DC excitation is performed on the selected measurement node, a load loss of the selected measurement node in a DC state is determined based on all DC components and a resistive load of the selected measurement node, and the load loss of the remaining measurement nodes in a DC state is continued to be determined; Determine a load over-limit feature of a target circuit board, and determine a plurality of hidden fault points of the target circuit board based on the load loss of each measurement node and the load over-limit feature; For each hidden fault point, extract the AC component when the hidden fault point is AC-excited each time from the working condition record of each hidden fault point, and determine the power characteristic sequence of each hidden fault point in the AC state based on all the AC components and the baseband signal when the target circuit board is subjected to performance detection; Obtaining a power base value of a target circuit board, determining a fault discrimination value of each hidden fault point based on the power feature sequence in combination with the power base value, and extracting a plurality of explicit fault points from all hidden fault points according to the fault discrimination value corresponding to each hidden fault point; Wherein, determining the fault discrimination value of each hidden fault point based on the power feature sequence in combination with the power base value specifically includes: Determine the power deviation of each power feature based on each power feature in the power feature sequence and the power base value; A fault determination amount of the hidden fault point corresponding to the power feature sequence is determined based on all power deviations and a preset deviation threshold.

2. The method according to claim 1, characterized in that Extracting the DC component each time the DC excitation is performed on the selected measurement node from the operating record of the selected measurement node specifically includes: Get multiple DC excitation timestamps when DC excitation is applied to the selected measurement node; Determine multiple DC excitation intervals based on all DC excitation timestamps and the operating condition records of the selected measurement nodes, wherein the DC excitation intervals represent a time range for a DC excitation source to perform DC excitation, and each DC excitation interval corresponds to one DC excitation; Selecting a DC excitation interval as a selected DC excitation interval, and determining a DC voltage characteristic and a DC current characteristic within the selected DC excitation interval; combining the DC voltage characteristic and the DC current characteristic into a DC component of a selected DC excitation interval; Continue to determine the DC components of the remaining DC excitation intervals, and then obtain the DC components under each DC excitation.

3. The method according to claim 1, characterized in that Determining the load loss of the selected measurement node in the DC state based on all DC components and the resistive load of the selected measurement node specifically includes: For each DC component, determining the actual energy loss of the selected measurement node under the DC excitation corresponding to the DC component; Extracting a DC current characteristic from the DC component, determining an ideal loss of the selected measurement node under a DC excitation corresponding to the DC component based on the DC current characteristic and a resistive load of the selected measurement node, and then obtaining an actual energy loss and an ideal loss of the selected measurement node under the DC excitation corresponding to each DC component; Obtain the DC excitation interval corresponding to each DC component; The load loss of the selected measurement node in the DC state is determined based on all DC excitation intervals, all actual energy losses, and all ideal losses.

4. The method according to claim 3, characterized in that Determining the load loss of the selected measurement node in the DC state based on all DC excitation intervals, all actual energy losses and all ideal losses specifically includes: For each DC excitation interval, extract the actual energy loss and the ideal loss corresponding to the DC excitation interval from all actual energy losses and all ideal losses; Determine the energy loss corresponding to the DC excitation interval based on the actual energy loss and the ideal loss, and then obtain the energy loss corresponding to each DC excitation interval; Obtain the interval length of each DC excitation interval; The load loss of the selected measurement node in the DC state is determined based on all interval lengths and all energy losses.

5. The method according to claim 1, characterized in that Determining the load over-limit characteristics of the target circuit board specifically includes: Get all load losses; The average of all load losses is taken as the load-exceeding characteristic of the target board.

6. The method according to claim 1, characterized in that Use voltage and current probes to collect records of the operating conditions at the measurement nodes.

7. An electrical performance testing system, which uses the method according to any one of claims 1 to 6 to perform electrical performance testing, characterized in that: The electrical performance testing system includes: An acquisition module is used to collect the working condition records at each measurement node of the target circuit board; A processing module is used to select a measurement node as a selected measurement node, extract a DC component each time a DC excitation is performed on the selected measurement node from a working condition record of the selected measurement node, determine a load loss of the selected measurement node in a DC state based on all DC components and a resistive load of the selected measurement node, and continue to determine the load loss of the remaining measurement nodes in a DC state; The processing module is further used to determine a load over-limit feature of the target circuit board, and determine a plurality of hidden fault points of the target circuit board based on the load loss of each measurement node and the load over-limit feature; The processing module is further used to extract, for each hidden fault point, from the working condition record of each hidden fault point, the AC component when the hidden fault point is AC-excited each time, and determine the power characteristic sequence of each hidden fault point in the AC state based on all the AC components and the baseband signal when the target circuit board is subjected to performance detection; The execution module is used to obtain the power base value of the target circuit board, determine the fault judgment value of each hidden fault point based on the power feature sequence combined with the power base value, and extract multiple explicit fault points from all the hidden fault points according to the fault judgment value corresponding to each hidden fault point.

8. A computer device, characterized in that: The computer device comprises a memory and a processor, the memory stores codes, and the processor is configured to obtain the codes and execute the electrical performance detection method according to any one of claims 1 to 6.

9. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the electrical performance detection method according to any one of claims 1 to 6 is implemented.

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