Image sensor based on semi-insulating gallium arsenide substrate and manufacturing method thereof

Abstract

This application belongs to the field of semiconductor manufacturing process technology and discloses an image sensor based on a semi-insulating gallium arsenide substrate and its manufacturing method. The image sensor comprises a sequentially stacked semi-insulating gallium arsenide substrate, a germanium electrode layer, a germanium absorption layer, a p-type charge layer, a gallium arsenide avalanche layer, a gallium arsenide electrode layer, and a passivation layer. The gallium arsenide avalanche layer employs a superlattice structure or a quantum well structure. A plurality of rectangular grooves of the same shape and arranged at predetermined intervals sequentially penetrate the gallium arsenide electrode layer, the gallium arsenide avalanche layer, and the germanium absorption layer. The p-type charge layer is located between two adjacent rectangular grooves, embedded in the germanium absorption layer, and has a length less than the predetermined interval. The passivation layer uniformly covers the gallium arsenide electrode layer and the inner walls of each rectangular groove. This application can reduce dark current and excess noise, thereby improving the sensor's signal-to-noise ratio, sensitivity, and photon detection efficiency.

Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing process technology, and in particular to an image sensor based on a semi-insulating gallium arsenide substrate and a manufacturing method thereof. Background Art

[0002] Single-photon avalanche photodetectors (SPADs) are renowned for their high sensitivity, enabling precise detection of the energy of individual photons. In traditional silicon-germanium SPAD image sensors, significant lattice and thermal mismatches between silicon and germanium can severely impact performance, including dark current, dark count rate, noise, accuracy, and energy consumption. To address this, current image sensors utilize semi-insulating gallium arsenide (GaAs) as the substrate and germanium as the epitaxial layer. This high lattice constant (5.65754 Å) and thermal expansion coefficient (6.0x10^-6 / K) match between GaAs and germanium ensure excellent heterojunction quality while also reducing dark current and dark count rate.

[0003] However, existing photodetectors based on semi-insulating GaAs substrates directly use GaAs as the avalanche layer. Due to the random collision ionization process of carriers under strong electric fields, the GaAs avalanche layer will generate large noise during the avalanche multiplication process, thereby limiting the signal-to-noise ratio and detection sensitivity of the device. Secondly, the absorption layer of existing photodetectors based on semi-insulating GaAs substrates is located above the avalanche layer, which reduces the absorption layer's detection efficiency for photons. Summary of the Invention

[0004] The present application provides an image sensor based on a semi-insulating gallium arsenide substrate and a manufacturing method thereof, which can reduce dark current and excess noise, and improve the signal-to-noise ratio, sensitivity and photon detection efficiency of the sensor.

[0005] In a first aspect, the present application provides an image sensor based on a semi-insulating gallium arsenide substrate, comprising:

[0006] N-type electrode, P-type electrode and readout circuit, and sequentially stacked semi-insulating gallium arsenide substrate, germanium electrode layer, germanium absorption layer, P-type charge layer, gallium arsenide avalanche layer, gallium arsenide electrode layer and passivation layer;

[0007] The GaAs avalanche layer adopts a superlattice structure or a quantum well structure;

[0008] Multiple rectangular grooves of the same shape and distributed at preset intervals sequentially penetrate the gallium arsenide electrode layer, the gallium arsenide avalanche layer, and the germanium absorption layer; the P-type charge layer is located between two adjacent rectangular grooves, embedded in the germanium absorption layer, and has a length less than the preset interval; the passivation layer uniformly covers the gallium arsenide electrode layer and the inner walls of each rectangular groove;

[0009] The P-type electrode is arranged in the rectangular groove and passes through the passivation layer to connect to the germanium electrode layer; the N-type electrode passes through the passivation layer to connect to the gallium arsenide electrode layer; the readout circuit is respectively connected to the N-type electrode and the P-type electrode.

[0010] Furthermore, the germanium electrode layer is a P-type germanium electrode layer with a thickness ranging from 100 nanometers to 500 nanometers.

[0011] Furthermore, the germanium absorption layer is a quantum well structure with a thickness ranging from 500 nanometers to 3000 nanometers.

[0012] Furthermore, the thickness of the GaAs avalanche layer ranges from 0.1 micrometers to 3 micrometers.

[0013] Furthermore, when the GaAs avalanche layer adopts a superlattice structure, the number of periods is between 60 and 400, the thickness of a single period ranges from 8 nanometers to 40 nanometers, the barrier layer thickness ranges from 3 nanometers to 10 nanometers, and the well layer thickness ranges from 5 nanometers to 30 nanometers.

[0014] Furthermore, when the GaAs avalanche layer adopts a quantum well structure, the number of periods is between 10 and 300, the thickness of a single period is greater than or equal to 15 nanometers, the thickness of the barrier layer is greater than or equal to 10 nanometers, and the thickness of the well layer ranges from 5 nanometers to 30 nanometers.

[0015] Furthermore, the gallium arsenide electrode layer is an N-type gallium arsenide electrode layer, and has a thickness ranging from 100 nanometers to 500 nanometers.

[0016] Furthermore, the germanium absorption layer is a germanium-silicon quantum well absorption layer, a germanium-tin quantum well absorption layer or a silicon-germanium-tin quantum well absorption layer.

[0017] Furthermore, the P-type charge layer is a P-type germanium charge layer or a P-type germanium silicon charge layer, and has a thickness of 100 nanometers.

[0018] In a second aspect, the present application provides a method for manufacturing an image sensor based on a semi-insulating gallium arsenide substrate, comprising:

[0019] Providing a semi-insulating gallium arsenide substrate, and sequentially forming a germanium electrode layer and a germanium absorption layer on the semi-insulating gallium arsenide substrate;

[0020] A plurality of P-type charge layers are formed on the germanium absorption layer by an ion implantation method; the length of the P-type charge layer is less than a preset interval, and the distance between two adjacent P-type charge layers is greater than a preset width;

[0021] A gallium arsenide avalanche layer and a gallium arsenide electrode layer are sequentially formed on the germanium absorption layer and each P-type charge layer to obtain a sensor wafer; the gallium arsenide avalanche layer adopts a superlattice structure or a quantum well structure;

[0022] A plurality of rectangular grooves of the same shape and distributed at preset intervals are provided on the sensor wafer; the length of the rectangular grooves is less than the preset width and passes through the gallium arsenide electrode layer, the gallium arsenide avalanche layer and the germanium absorption layer in sequence;

[0023] A passivation layer, an N-type electrode and a P-type electrode are provided, and the N-type electrode and the P-type electrode are connected to a readout circuit.

[0024] Furthermore, the germanium electrode layer is formed by molecular beam epitaxy or chemical vapor deposition.

[0025] Furthermore, the germanium absorption layer is formed by molecular beam epitaxy or chemical vapor deposition.

[0026] Furthermore, the gallium arsenide avalanche layer is formed by molecular beam epitaxy or chemical vapor deposition.

[0027] Furthermore, the gallium arsenide electrode layer is formed by molecular beam epitaxy or chemical vapor deposition.

[0028] Furthermore, the rectangular groove is formed by wet etching or dry etching.

[0029] In summary, compared with the prior art, the technical solutions provided by the embodiments of the present application have at least the following beneficial effects:

[0030] The embodiment of the present application provides an image sensor based on a semi-insulating gallium arsenide substrate. First, the gallium arsenide avalanche layer of the present application adopts a superlattice structure or quantum well structure. This structure can affect the electric field distribution by changing the barrier width and the potential well doping concentration, thereby optimizing the transport and multiplication of carriers, reducing the non-uniform distribution and random collision process of carriers in the electric field, thereby reducing dark current and excess noise, improving the signal-to-noise ratio of the sensor, significantly improving the avalanche gain of the image sensor, and enhancing its sensitivity in detecting weak light signals, making light signal detection more accurate and reliable. Secondly, the germanium absorption layer of the present application is arranged below the gallium arsenide avalanche layer, so that photons can be directly incident on the germanium absorption layer, greatly improving the detection efficiency of photons, thereby indirectly reducing the size of the image sensor and helping to improve the resolution of the image sensor. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 This is a structural diagram of an image sensor based on a semi-insulating gallium arsenide substrate provided in an embodiment of the present application.

[0032] Figure 2 A flow chart of a method for manufacturing an image sensor based on a semi-insulating gallium arsenide substrate provided in an embodiment of the present application.

[0033] Figure 3 A schematic diagram of the structure of the image sensor wafer provided in an embodiment of the present application.

[0034] Figure 4 This is a schematic diagram of a rectangular groove provided on a sensor wafer according to an embodiment of the present application.

[0035] Figure 5 This is a diagram of the sensor structure after forming electrodes and a passivation layer according to an embodiment of the present application.

[0036] Description of reference numerals:

[0037] 101. Semi-insulating gallium arsenide substrate; 102. Germanium electrode layer; 103. Germanium absorption layer; 104. P-type charge layer; 105. Gallium arsenide avalanche layer; 106. Gallium arsenide electrode layer; 107. Passivation layer; 201. P-type electrode; 202. N-type electrode; 203. Readout circuit. DETAILED DESCRIPTION

[0038] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments.

[0039] Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making any creative work shall fall within the scope of protection of this application.

[0040] See Figure 1 The embodiment of the present application provides an image sensor based on a semi-insulating gallium arsenide substrate 101, including: an N-type electrode 202, a P-type electrode 201 and a readout circuit 203, and sequentially stacked semi-insulating gallium arsenide substrate 101, a germanium electrode layer 102, a germanium absorption layer 103, a P-type charge layer 104, a gallium arsenide avalanche layer 105, a gallium arsenide electrode layer 106 and a passivation layer 107.

[0041] The semi-insulating gallium arsenide substrate 101 is a SI-GaAs substrate. By removing impurities, especially shallow-level impurities, from the GaAs crystal, this substrate achieves an extremely high resistivity (typically greater than 1e10^7Ω·cm). This effectively reduces the dark current and dark count rate of the image sensor and reduces parasitic effects. Furthermore, the band gap of SI-GaAs is approximately 1.42 eV, which gives it good transmittance in the infrared region, further improving the photon detection efficiency of the germanium absorption layer 103.

[0042] Furthermore, the germanium electrode layer 102 may be a P-type germanium electrode layer with a thickness ranging from 100 nanometers to 500 nanometers.

[0043] The GaAs electrode layer 106 may be an N-type GaAs electrode layer with a thickness ranging from 100 nm to 500 nm.

[0044] The GaAs avalanche layer 105 adopts a superlattice structure or a quantum well structure.

[0045] The thickness of the GaAs avalanche layer 105 ranges from 0.1 microns to 3 microns. Specifically, when the GaAs avalanche layer 105 employs a superlattice structure, the number of periods ranges from 60 to 400, the thickness of a single period ranges from 8 nanometers to 40 nanometers, the barrier layer thickness ranges from 3 nanometers to 10 nanometers, and the well layer thickness ranges from 5 nanometers to 30 nanometers. When the GaAs avalanche layer 105 employs a quantum well structure, the number of periods ranges from 10 to 300, the thickness of a single period is greater than or equal to 15 nanometers, the barrier layer thickness is greater than or equal to 10 nanometers, and the well layer thickness ranges from 5 nanometers to 30 nanometers.

[0046] Specifically, the quantum well structure or superlattice structure not only enhances the collision and ionization ability of electrons and holes in the avalanche layer, improves the avalanche gain and sensitivity, reduces the excess noise factor, and improves the signal-to-noise ratio, but the electron potential barrier therein also limits the movement of carriers, so that the avalanche multiplication effect can be achieved at a lower operating voltage, reducing the multiplication voltage while maintaining high sensitivity.

[0047] A plurality of rectangular grooves of the same shape and distributed at preset intervals sequentially penetrate the gallium arsenide electrode layer 106, the gallium arsenide avalanche layer 105 and the germanium absorption layer 103; the P-type charge layer 104 is located between two adjacent rectangular grooves, embedded in the germanium absorption layer 103 and has a length less than the preset interval; the passivation layer 107 uniformly covers the gallium arsenide electrode layer 106 and the inner walls of each rectangular groove.

[0048] The P-type charge layer 104 may be a P-type germanium charge layer or a P-type germanium silicon charge layer, and has a thickness of 100 nanometers.

[0049] Specifically, if Figure 1 As shown, the P-type charge layer 104 is embedded on the germanium absorption layer 103 and buried deep inside the material, effectively reducing electrical interference and surface leakage current between each mesa (ie, between adjacent pixels), and performs particularly well in high temperature environments.

[0050] The P-type electrode 201 is disposed in the rectangular groove and passes through the passivation layer 107 to connect to the germanium electrode layer 102 ; the N-type electrode 202 passes through the passivation layer 107 to connect to the gallium arsenide electrode layer 106 ; the readout circuit 203 is connected to the N-type electrode 202 and the P-type electrode 201 respectively.

[0051] The above embodiment provides an image sensor based on a semi-insulating gallium arsenide substrate. First, the gallium arsenide avalanche layer 105 of the present application adopts a superlattice structure or quantum well structure. This structure can affect the electric field distribution by changing the barrier width and the potential well doping concentration, thereby optimizing the transport and multiplication of carriers, reducing the non-uniform distribution and random collision process of carriers in the electric field, thereby reducing dark current and excess noise, improving the signal-to-noise ratio of the sensor, significantly improving the avalanche gain of the image sensor, and enhancing its sensitivity in detecting weak light signals, making light signal detection more accurate and reliable. Secondly, the germanium absorption layer 103 of the present application is arranged below the gallium arsenide avalanche layer 105, allowing photons to be directly incident on the germanium absorption layer 103, greatly improving the detection efficiency of photons, thereby indirectly reducing the size of the image sensor and helping to improve the resolution of the image sensor.

[0052] In some embodiments, the germanium absorption layer 103 is a quantum well structure with a thickness ranging from 500 nanometers to 3000 nanometers.

[0053] The germanium absorption layer 103 may be a germanium-silicon quantum well absorption layer, a germanium-tin quantum well absorption layer, or a silicon-germanium-tin quantum well absorption layer.

[0054] Specifically, the absorption layer of the quantum well structure can strongly confine carriers in an extremely small space. This confinement significantly reduces the mechanisms that cause dark current generation, such as non-radiative recombination and tunneling. At the same time, strong carrier confinement also increases the probability of interaction between carriers and incident photons, which not only helps to further reduce the dark count rate, but also significantly improves the single-photon detection efficiency. In addition, the electronic state and band structure in the quantum well structure are highly adjustable. By fine-tuning the well width and selecting appropriate material components, the energy of photons of different wavelengths can be matched, thereby improving the applicability and flexibility of the sensor.

[0055] See Figure 2 Another embodiment of the present application provides a method for manufacturing an image sensor based on a semi-insulating gallium arsenide substrate 101, which may specifically include the following steps:

[0056] Step S1: providing a semi-insulating gallium arsenide substrate 101, and sequentially forming a germanium electrode layer 102 and a germanium absorption layer 103 on the semi-insulating gallium arsenide substrate 101. The semi-insulating gallium arsenide substrate 101 is a SI-GaAs substrate.

[0057] Specifically, in addition to the lattice constant and thermal expansion coefficient that perfectly match those of germanium, the SI-GaAs substrate also has excellent thermal conductivity. It can efficiently dissipate heat during the operation of the image sensor, ensuring stable operation of the sensor even under high power and high temperature conditions, significantly improving the reliability and radiation resistance of the sensor.

[0058] The germanium electrode layer 102 may be a P-type germanium electrode layer with a thickness ranging from 100 nanometers to 500 nanometers.

[0059] The germanium absorption layer 103 is a quantum well structure, and has a thickness ranging from 500 nanometers to 3000 nanometers.

[0060] The germanium absorption layer 103 may be a germanium-silicon quantum well absorption layer, a germanium-tin quantum well absorption layer, or a silicon-germanium-tin quantum well absorption layer.

[0061] Specifically, the germanium electrode layer 102 is formed by molecular beam epitaxy or chemical vapor deposition. After the germanium electrode layer 102 is formed, the germanium absorption layer 103 is epitaxially grown on the germanium electrode layer 102 by molecular beam epitaxy or chemical vapor deposition.

[0062] In step S2 , a plurality of P-type charge layers 104 are formed on the germanium absorption layer 103 by ion implantation. The length of the P-type charge layer 104 is smaller than the preset interval, and the distance between two adjacent P-type charge layers 104 is larger than the preset width.

[0063] The P-type charge layer 104 may be a P-type germanium charge layer or a P-type germanium silicon charge layer, and has a thickness of 100 nanometers.

[0064] In step S3 , a gallium arsenide avalanche layer 105 and a gallium arsenide electrode layer 106 are sequentially formed on the germanium absorption layer 103 and each P-type charge layer 104 to obtain a sensor wafer; the gallium arsenide avalanche layer 105 adopts a superlattice structure or a quantum well structure.

[0065] See Figure 3 The GaAs electrode layer 106 may be an N-type GaAs electrode layer 106 with a thickness ranging from 100 nanometers to 500 nanometers. Specifically, both the GaAs avalanche layer 105 and the GaAs electrode layer 106 may be epitaxially formed on the lower layer region using molecular beam epitaxy (MBE) or chemical vapor deposition (CVD).

[0066] When the GaAs avalanche layer 105 employs a superlattice structure, the number of periods is between 60 and 400, the thickness of a single period ranges from 8 nanometers to 40 nanometers, the barrier layer thickness ranges from 3 nanometers to 10 nanometers, and the well layer thickness ranges from 5 nanometers to 30 nanometers. When the GaAs avalanche layer 105 employs a quantum well structure, the number of periods is between 10 and 300, the thickness of a single period is greater than or equal to 15 nanometers, the barrier layer thickness is greater than or equal to 10 nanometers, and the well layer thickness ranges from 5 nanometers to 30 nanometers.

[0067] The above parameter restrictions on the GaAs avalanche layer 105 of the superlattice structure and quantum well structure can optimize the band structure of the GaAs avalanche layer 105. In particular, the thickness restriction of the potential well layer can ensure that electrons and holes are confined in different potential wells, thereby minimizing the possibility of recombination, thereby reducing dark current and noise, and ensuring that the image sensor has an optimal signal-to-noise ratio.

[0068] In step S4, a plurality of rectangular grooves of the same shape and distributed at preset intervals are provided on the sensor wafer; the length of the rectangular grooves is smaller than the preset width, and the rectangular grooves sequentially penetrate the GaAs electrode layer 106, the GaAs avalanche layer 105 and the Ge absorption layer 103.

[0069] The rectangular groove can be formed by wet etching or dry etching. Figure 4 The rectangular groove penetrates the three semiconductor layers and reaches the germanium electrode layer 102 to ensure that the germanium electrode layer 102 is exposed. Only in this way can the subsequently set N-type electrode 202 pass through the passivation layer 107 and connect to the germanium electrode layer 102.

[0070] The rectangular groove is disposed between the two P-type charge layers 104 to ensure that the sidewalls of the rectangular groove do not expose the P-type charge layers 104 , so that the image sensor forms a planar structure and avoids leakage current.

[0071] Step S5: Provide a passivation layer 107, an N-type electrode 202, and a P-type electrode 201, and connect the N-type electrode 202 and the P-type electrode 201 to a readout circuit 203. Figure 5 The P-type electrode 201 is arranged in the rectangular groove and passes through the passivation layer 107 to connect to the germanium electrode layer 102; the N-type electrode 202 passes through the passivation layer 107 to connect to the gallium arsenide electrode layer 106; the readout circuit 203 is respectively connected to the N-type electrode 202 and the P-type electrode 201.

[0072] The passivation layer 107 may be formed of InGaP (Indium Gallium Phosphide) material or organic sulfur molecules.

[0073] The provision of the passivation layer 107 can reduce the surface leakage current of the device, reduce the impact of surface oxides and impurity defects on the material, and reduce the Fermi pinning phenomenon caused by high-concentration surface states in the band gap, thereby improving the sensitivity of the detector.

[0074] During the production process, flip-chip technology may be used to perform In bump bonding or Cu bump bonding on the readout circuit 203 and the SPAD focal plane array chip on the SI-GaAs sensor wafer.

[0075] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0076] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art could make various modifications and improvements without departing from the spirit of the present application, all of which fall within the scope of protection of the present application. Therefore, the scope of protection of the present patent application shall be determined by the appended claims.

Claims

1. An image sensor based on a semi-insulating gallium arsenide substrate, characterized in that: include: N-type electrode, P-type electrode and readout circuit, and sequentially stacked semi-insulating gallium arsenide substrate, germanium electrode layer, germanium absorption layer, P-type charge layer, gallium arsenide avalanche layer, gallium arsenide electrode layer and passivation layer; The gallium arsenide avalanche layer adopts a superlattice structure or a quantum well structure; A plurality of rectangular grooves of the same shape and distributed at preset intervals sequentially penetrate the gallium arsenide electrode layer, the gallium arsenide avalanche layer, and the germanium absorption layer; the P-type charge layer is located between two adjacent rectangular grooves, embedded in the germanium absorption layer, and has a length less than the preset interval; the passivation layer uniformly covers the gallium arsenide electrode layer and the inner walls of each rectangular groove; The P-type electrode is arranged in the rectangular groove and passes through the passivation layer to connect to the germanium electrode layer; the N-type electrode passes through the passivation layer to connect to the gallium arsenide electrode layer; the readout circuit is respectively connected to the N-type electrode and the P-type electrode.

2. The image sensor based on a semi-insulating gallium arsenide substrate according to claim 1, characterized in that: The germanium electrode layer is a P-type germanium electrode layer, and has a thickness ranging from 100 nanometers to 500 nanometers.

3. The image sensor based on a semi-insulating gallium arsenide substrate according to claim 1, characterized in that: The germanium absorption layer is a quantum well structure with a thickness ranging from 500 nanometers to 3000 nanometers.

4. The image sensor based on a semi-insulating gallium arsenide substrate according to claim 1, characterized in that: The thickness of the gallium arsenide avalanche layer ranges from 0.1 micrometers to 3 micrometers.

5. The image sensor based on a semi-insulating gallium arsenide substrate according to claim 4, characterized in that: When the GaAs avalanche layer adopts a superlattice structure, the number of periods is between 60 and 400, the thickness of a single period ranges from 8 nanometers to 40 nanometers, the barrier layer thickness ranges from 3 nanometers to 10 nanometers, and the well layer thickness ranges from 5 nanometers to 30 nanometers.

6. The image sensor based on a semi-insulating gallium arsenide substrate according to claim 4, characterized in that: When the GaAs avalanche layer adopts a quantum well structure, the number of periods is between 10 and 300, the thickness of a single period is greater than or equal to 15 nanometers, the barrier layer thickness is greater than or equal to 10 nanometers, and the potential well layer thickness ranges from 5 nanometers to 30 nanometers.

7. The image sensor based on a semi-insulating gallium arsenide substrate according to claim 1, characterized in that: The gallium arsenide electrode layer is an N-type gallium arsenide electrode layer, and has a thickness ranging from 100 nanometers to 500 nanometers.

8. The image sensor based on a semi-insulating gallium arsenide substrate according to claim 3, characterized in that: The germanium absorption layer is a germanium-silicon quantum well absorption layer, a germanium-tin quantum well absorption layer or a silicon-germanium-tin quantum well absorption layer.

9. The image sensor based on a semi-insulating gallium arsenide substrate according to claim 1, characterized in that: The P-type charge layer is a P-type germanium charge layer or a P-type germanium silicon charge layer, and has a thickness of 100 nanometers.

10. A method for manufacturing an image sensor based on a semi-insulating gallium arsenide substrate, characterized in that: include: Providing a semi-insulating gallium arsenide substrate, and sequentially forming a germanium electrode layer and a germanium absorption layer on the semi-insulating gallium arsenide substrate; forming a plurality of P-type charge layers on the germanium absorption layer by an ion implantation method; wherein the length of the P-type charge layers is less than a preset interval, and the distance between two adjacent P-type charge layers is greater than a preset width; forming a gallium arsenide avalanche layer and a gallium arsenide electrode layer in sequence on the germanium absorption layer and each of the P-type charge layers to obtain a sensor wafer; the gallium arsenide avalanche layer adopts a superlattice structure or a quantum well structure; A plurality of rectangular grooves of the same shape and distributed at the preset intervals are provided on the sensor wafer; the length of the rectangular grooves is less than the preset width and sequentially passes through the gallium arsenide electrode layer, the gallium arsenide avalanche layer and the germanium absorption layer; A passivation layer, an N-type electrode and a P-type electrode are provided, and the N-type electrode and the P-type electrode are connected to a readout circuit.

11. The method for manufacturing an image sensor based on a semi-insulating gallium arsenide substrate according to claim 10, characterized in that: The germanium electrode layer is formed by molecular beam epitaxy or chemical vapor deposition.

12. The method for manufacturing an image sensor based on a semi-insulating gallium arsenide substrate according to claim 10, characterized in that: The germanium absorption layer is formed by molecular beam epitaxy or chemical vapor deposition.

13. The method for manufacturing an image sensor based on a semi-insulating gallium arsenide substrate according to claim 10, characterized in that: The gallium arsenide avalanche layer is formed by molecular beam epitaxy or chemical vapor deposition.

14. The method for manufacturing an image sensor based on a semi-insulating gallium arsenide substrate according to claim 10, characterized in that: The gallium arsenide electrode layer is formed by molecular beam epitaxy or chemical vapor deposition.

15. The method for manufacturing an image sensor based on a semi-insulating gallium arsenide substrate according to claim 10, wherein: The rectangular groove is formed by wet etching or dry etching.

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