Real-time error comparison method and system

Abstract

The present invention discloses a real-time bit error comparison method and system. The method includes the following steps: dividing a random sequence into data blocks of a first specified size, sequentially sending the source data of each data block to the communication transmission channel under test; sequentially receiving the target data of each data block from the communication transmission channel under test; each time the target data is received, the target data and the corresponding source data are evenly distributed to each core according to the number of cores; each core performs a bit error comparison on the corresponding source data and target data, and maps the bit error comparison results into a two-dimensional matrix; and all elements of the two-dimensional matrix are accumulated to obtain a total bit error comparison result. The present invention upgrades offline comparison to real-time comparison, thereby eliminating dependence on disks and improving the efficiency of bit error comparison testing.

Description

Technical Field

[0001] The present invention relates to the field of communications, and in particular to a real-time bit error comparison method and system. Background Art

[0002] Satellite communications, wireless base station communications, and wired, routed, and switched optical / electrical communications provide high-bandwidth data transmission and reception. Bit error rate (BER) is a crucial indicator of link and device reliability and availability. For example, despite the high signal transmission speed, large bandwidth, and strong interference resistance of optical communications, bit errors can still occur due to adverse factors such as noise interference during transmission. Excessively high BERs can lead to transmission failure. BER evaluation and testing is essential for equipment, devices, links, and systems before they leave the factory.

[0003] like Figure 1 As shown in the figure, bit error rate detection technology is a commonly used bit error rate detection scheme in practical applications. By sending known data, the data is compared with the original text after passing through the transmission equipment, devices, links, and systems. The ratio of the number of erroneous bits to the actual number of bits transmitted is the bit error rate.

[0004] like Figure 2 As shown, the test software stores the sent source data in a source file. After passing through transmission equipment, links, and systems, the source data is received by the test software and stored as a target file. Bit error rate metrics are typically evaluated by offline comparison of the source and target files for consistency, typically based on a specific test duration or file size.

[0005] like Figure 3 As shown, the bit-by-bit comparison method of the existing technical solution is to XOR two 8-bit unsigned bytes and accumulate the number of bits to 1. Faced with the communication field, especially satellite communication and optical switching communication fields, with a transmission rate of at least 6GB / S per second, the existing technical solution cannot realize real-time calculation and evaluation of the bit error rate. It is necessary to store the data into files and perform subsequent file comparison to calculate the bit error rate. The existing solution has low testing efficiency. Regardless of whether the bit error rate meets the standard, it needs to be fully tested and the real-time indicator is known by the bit error. When the bit error rate fails to meet the standard, it also needs to be tested before a conclusion can be drawn, resulting in low test evaluation efficiency. In addition, the test requires a large-capacity disk with high-speed reading and writing to support it, otherwise it is impossible to store massive test data.

[0006] In summary, due to the large consumption of computing resources by real-time bit error comparison, existing technical solutions cannot achieve real-time bit error comparison. Summary of the Invention

[0007] The technical problem to be solved by the present invention is as follows: In view of the above-mentioned problems in the prior art, a real-time bit error comparison method and system are provided to upgrade offline comparison to real-time comparison, thereby eliminating dependence on disks and improving the efficiency of bit error comparison testing.

[0008] In order to solve the above technical problems, the technical solution adopted by the present invention is:

[0009] A real-time bit error comparison method, applied to a multi-core computer, comprises the following steps:

[0010] Dividing the random sequence into data blocks of a first specified size, and sending source data of each data block to the communication transmission channel under test in sequence;

[0011] Receive the target data of each data block from the communication transmission channel under test in sequence. Once the target data is received, the target data and the corresponding source data are evenly distributed to each core according to the number of cores. Each core performs bit error comparison on the corresponding source data and target data, and maps the bit error comparison results into a two-dimensional matrix.

[0012] All elements of the two-dimensional matrix are accumulated to obtain the total bit error comparison result.

[0013] Furthermore, each core performs error comparison on the corresponding source data and target data, and maps the error comparison results into a two-dimensional matrix, specifically including:

[0014] Each core splits the corresponding source data and target data into sub-data of the second specified size, and then performs error comparison on each sub-data of the source data and the corresponding sub-data of the target data in turn, and saves the error comparison results in the corresponding elements of the two-dimensional matrix.

[0015] Furthermore, when performing error comparison on each sub-data of the source data and the corresponding sub-data of the target data in turn, specifically, each sub-data of the source data and the corresponding sub-data of the target data are XORed in turn and then the number of error bits is counted as the error comparison result of each sub-data of the source data and the corresponding sub-data of the target data.

[0016] Furthermore, when the error comparison results are stored in corresponding elements of a two-dimensional matrix, the steps include:

[0017] Convert the current sub-data value of the source data into the row value of the two-dimensional matrix, and convert the corresponding sub-data value of the target data into the column value of the two-dimensional matrix;

[0018] A target element in the two-dimensional matrix is ​​found according to the row value and the column value, and a bit error comparison result between the current sub-data of the source data and the corresponding sub-data of the target data is used as the value of the target element.

[0019] Furthermore, the two-dimensional matrix is ​​a two-dimensional matrix of M*M elements, M=2 N , N is the number of bits of the sub-data. When converting the value of the current sub-data of the source data into the row value of the two-dimensional matrix, and converting the value of the corresponding sub-data of the target data into the column value of the two-dimensional matrix, specifically, converting the binary sequence of the sub-data into a decimal value.

[0020] Furthermore, the bit number of the sub-data is at least twice as much as 8.

[0021] Furthermore, the random sequence is a random PN sequence loaded into a pre-opened memory.

[0022] Furthermore, the data type of the memory is character type char.

[0023] The present invention also provides a real-time bit error comparison system, comprising a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement any step of the real-time bit error comparison method.

[0024] The present invention also provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the computer program implements the steps of any one of the real-time error comparison methods.

[0025] The present invention also provides a computer program product, comprising a computer program, which implements the steps of any one of the real-time error comparison methods when executed by a processor.

[0026] Compared with the prior art, the advantages of the present invention are:

[0027] The present invention divides a random sequence into data blocks of a first specified size, and then sequentially passes each data block through a communication transmission channel under test to obtain corresponding target data. Then, according to the number of computer cores, the source data and target data of the data block are evenly distributed to each core for error comparison. By specifying the size of the data block, the dependence on storage space capacity is reduced, and computing resources are utilized for multi-core block processing, thereby improving real-time performance.

[0028] In this invention, when each core performs error comparison, it splits both the source and target data into sub-data of a second specified size. Error comparisons are then performed on each sub-data of the source data and the corresponding sub-data of the target data, with the error comparison results stored in corresponding elements of a two-dimensional matrix. This matrix mapping approach improves error comparison efficiency, enabling real-time error comparison on low-end computing resources. Compared to existing technologies, this reduces the number of error comparison cycles and improves error comparison efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 Schematic diagram of the bit error rate detection principle.

[0030] Figure 2 This is a schematic diagram of the principle of offline bit error comparison.

[0031] Figure 3 A schematic diagram of bit-by-bit comparison.

[0032] Figure 4 Flowchart of a method according to an embodiment of the present invention.

[0033] Figure 5 2 is a schematic diagram of the principle of real-time bit error comparison according to an embodiment of the present invention.

[0034] Figure 6 Schematic diagram of distributing the source and destination data of a data block evenly to each core.

[0035] Figure 7 This is a schematic diagram of the principle of bit error comparison for each core in an embodiment of the present invention.

[0036] Figure 8 This is a schematic diagram of the principle of matrix mapping the bit error comparison results by each core in an embodiment of the present invention. DETAILED DESCRIPTION

[0037] The present invention will be further described below in conjunction with the accompanying drawings and specific preferred embodiments, but the scope of protection of the present invention is not limited thereby.

[0038] Example 1

[0039] This embodiment proposes a real-time error comparison method, which is a software method that uses a multi-core computer to compare errors in real time. The purpose is to improve the efficiency of error comparison, upgrade offline comparison to real-time comparison, thereby eliminating dependence on disks and improving the efficiency of error comparison testing.

[0040] like Figure 4 As shown, the method of this embodiment includes the following steps:

[0041] S1) Open up memory space, generate a random sequence and load it into memory;

[0042] S2) dividing the random sequence into data blocks of a first specified size, and sending source data of each data block to the communication transmission channel under test in sequence;

[0043] S3) receiving target data of each data block from the communication transmission channel under test in sequence, and once receiving target data, evenly distributing the target data and the corresponding source data to each core according to the number of cores;

[0044] S4) Each core performs error comparison on the corresponding source data and target data, and maps the error comparison results into a two-dimensional matrix;

[0045] S5) All elements of the two-dimensional matrix are accumulated to obtain a total bit error comparison result.

[0046] The following takes a 16-core computer as an example to explain each step in detail.

[0047] In step S1 of this embodiment, the random sequence is a random PN sequence, and its size is 4 GB. Therefore, the memory space opened up is at least 4 GB, which can be flexibly adjusted according to computer resources.

[0048] In step S2 of this embodiment, the first specified size is 16MB. Figure 5 As shown, the memory data is passed through the communication transmission channel under test in 16MB size in sequence, the 16MB data sent by the communication transmission channel under test is received in sequence, and the received target 16MB data is compared with the source 16MB data.

[0049] Step S3 of this embodiment is to start the computer multi-core generation processing comparison thread, and subdivide the target data and the corresponding source data for processing, such as Figure 6 As shown, when the target data and the corresponding source data are evenly distributed to each core according to the number of cores, the target 16MB data and the source 16MB data are divided into 16 sub-portions, each sub-portion is 1MB, and each core starts a core thread to process the target 1MB data and the source 1MB data, and a total of 16 core threads are started for processing.

[0050] Step S4 of this embodiment aims to quickly compare the bit error locations through address space mapping, and its specific steps include:

[0051] Each core splits the corresponding source data and target data into sub-data of the second specified size, and then performs error comparison on each sub-data of the source data and the corresponding sub-data of the target data in turn, and saves the error comparison results in the corresponding elements of the two-dimensional matrix.

[0052] In this embodiment, the second specified size is 2 bytes (16 bits). Each time 2 bytes of data are compared, the number of error comparison cycles is reduced by at least 1 times. It should be noted that this solution needs to improve the efficiency of error comparison. Therefore, the second specified size can also be set to other integer multiples of 8 according to actual needs, so that the number of bits of the sub-data is at least twice that of 8.

[0053] In this embodiment, when performing error comparison on each sub-data of the source data and the corresponding sub-data of the target data in turn, specifically, each sub-data of the source data and the corresponding sub-data of the target data are XORed in turn and then the number of error bits is counted as the error comparison result of each sub-data of the source data and the corresponding sub-data of the target data.

[0054] like Figure 7 As shown, 1MB of source data and 1MB of target data are divided into 524,288 groups of 2 bytes and compared separately. 2 bytes are 16 binary bits, and the minimum value of a 16-bit unsigned integer is 0 and the maximum value is 2. 16 -1=65535, that is, the range of the source data and target data of a 2-byte is 0 to 65535, and the XOR result of the 2-byte source data and target data is also 2 bytes. The maximum number of error bits counted is 16, so the range of the error comparison result is 0 to 16 bits.

[0055] Correspondingly, in step S1 of this embodiment, when allocating memory, the data type of the memory uses character type char, which can store integers from 0 to 255, completely covering the range of the error bit comparison results, while also greatly reducing memory usage, improving cache efficiency, and avoiding unnecessary data type conversion.

[0056] In this embodiment, when the error comparison results are stored in corresponding elements of the two-dimensional matrix, the following steps are included:

[0057] Convert the current sub-data value of the source data into the row value of the two-dimensional matrix, and convert the corresponding sub-data value of the target data into the column value of the two-dimensional matrix;

[0058] A target element in the two-dimensional matrix is ​​found according to the row value and the column value, and a bit error comparison result between the current sub-data of the source data and the corresponding sub-data of the target data is used as the value of the target element.

[0059] In this solution, a two-dimensional matrix is ​​defined as a two-dimensional matrix AR of M*M elements, which is used to store the error comparison results, M=2 N , N is the number of bits of the sub-data. Therefore, in this embodiment, the two-dimensional matrix AR is a two-dimensional matrix of 65536*65536 elements. The AR[i][j] element stores the number of error bits of sub-data i of the source data and sub-data j of the target data, that is, the number of bits that are 1 after the exclusive OR operation of sub-data i and sub-data j. The element subscripts i and j satisfy (0≤i≤65535,0≤j≤65535). Therefore, when converting the value of the current sub-data of the source data into the row value of the two-dimensional matrix and converting the value of the corresponding sub-data of the target data into the column value of the two-dimensional matrix, the binary sequence of the sub-data is converted into a decimal value.

[0060] Step S5 of this embodiment is intended to obtain the total number of error bits. Since each core in step S4 has saved the error comparison results of each source data and target data into the corresponding elements of the two-dimensional matrix, the total number of error bits can be obtained by adding up all elements of the two-dimensional matrix.

[0061] like Figure 8 As shown, 1MB of data is divided into 524,288 cycles, each processing 2 bytes of source data and target data, where the source data src and the target data dest are substituted into the subscripts of the two-dimensional matrix AR (AR[src][dest]), and the accumulated AR[src][dest] is the number of error bits for the 1MB of data.

[0062] Example 2

[0063] This embodiment provides a real-time bit error comparison system, including a memory, a processor, and a computer program stored in the memory. The processor executes the computer program to implement the steps of the real-time bit error comparison method described in embodiment 1.

[0064] This embodiment further provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps of the real-time error comparison method described in the first embodiment are implemented.

[0065] This embodiment further provides a computer program product, including a computer program. When the computer program is executed by a processor, the steps of the real-time error comparison method described in the first embodiment are implemented.

[0066] The computer program code of this embodiment can be implemented using C language, JAVA, or C++, and has a good engineering foundation. The following is an example:

[0067]

[0068]

[0069]

[0070] In summary, the present invention proposes a real-time error comparison method and a system for executing the method, so that real-time error comparison can be realized at the software level of low-end computing resources. It utilizes multi-core block processing of computing resources and has high real-time performance. In the specific processing process, a two-dimensional matrix mapping method is adopted to improve the efficiency of error comparison, so that low-end computing resources can realize real-time error comparison.

[0071] The present invention uses char data elements to store the number of error bits, minimizing the need for memory size and requiring only 4GB of memory. Error comparison is performed by comparing two bytes of data at a time, reducing the number of error comparison cycles by at least a factor of two and improving error comparison efficiency.

[0072] The method of the present invention is simple to implement, has high transplantability, can be implemented using C language, JAVA, and C++, and has a good engineering foundation.

[0073] The present invention has a clear principle, small memory usage, and is portable to ordinary computers, servers, or embedded hardware systems. It enables real-time bit error comparison to be implemented on relatively low-end computing resources, improves the dependency of the bit error test link on the hardware platform, and improves the progress of project testing and delivery.

[0074] The above description is merely a preferred embodiment of the present invention. The scope of protection of the present invention is not limited to the above embodiment. All technical solutions based on the concept of the present invention are within the scope of protection of the present invention. It should be noted that for those skilled in the art, various improvements and modifications that do not depart from the principles of the present invention should also be considered within the scope of protection of the present invention.

Claims

1. A real-time error comparison method, applied to a multi-core computer, characterized in that: The following steps are involved: Dividing the random sequence into data blocks of a first specified size, and sending source data of each data block to the communication transmission channel under test in sequence; Receive the target data of each data block from the communication transmission channel under test in sequence. Once the target data is received, the target data and the corresponding source data are evenly distributed to each core according to the number of cores. Each core performs bit error comparison on the corresponding source data and target data, and maps the bit error comparison results into a two-dimensional matrix. All elements of the two-dimensional matrix are accumulated to obtain the total bit error comparison result.

2. The real-time error comparison method according to claim 1, wherein: Each core performs error comparison on the corresponding source data and target data and maps the error comparison results into a two-dimensional matrix, specifically including: Each core splits the corresponding source data and target data into sub-data of the second specified size, and then performs error comparison on each sub-data of the source data and the corresponding sub-data of the target data in turn, and saves the error comparison results in the corresponding elements of the two-dimensional matrix.

3. The real-time error comparison method according to claim 2, characterized in that: When performing error comparison on each sub-data of the source data and the corresponding sub-data of the target data in turn, specifically, each sub-data of the source data and the corresponding sub-data of the target data are XORed in turn and then the number of error bits is counted as the error comparison result of each sub-data of the source data and the corresponding sub-data of the target data.

4. The real-time error comparison method according to claim 2, wherein: When the error comparison results are stored in the corresponding elements of the two-dimensional matrix, it includes: Convert the current sub-data value of the source data into the row value of the two-dimensional matrix, and convert the corresponding sub-data value of the target data into the column value of the two-dimensional matrix; A target element in the two-dimensional matrix is ​​found according to the row value and the column value, and a bit error comparison result between the current sub-data of the source data and the corresponding sub-data of the target data is used as the value of the target element.

5. The real-time error comparison method according to claim 4, characterized in that: The two-dimensional matrix is ​​a two-dimensional matrix of a set of M*M elements, M=2 N , N is the number of bits of the sub-data. When converting the value of the current sub-data of the source data into the row value of the two-dimensional matrix, and converting the value of the corresponding sub-data of the target data into the column value of the two-dimensional matrix, specifically, converting the binary sequence of the sub-data into a decimal value.

6. The real-time error comparison method according to claim 1, wherein: The random sequence is a random PN sequence loaded into a pre-opened memory.

7. The real-time error comparison method according to claim 6, characterized in that: The data type of the memory is character type char.

8. A real-time bit error comparison system, comprising a memory, a processor, and a computer program stored in the memory, characterized in that: The processor executes the computer program to implement the steps of the real-time bit error comparison method according to any one of claims 1 to 7.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the real-time bit error comparison method according to any one of claims 1 to 7 are implemented.

10. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the real-time bit error comparison method according to any one of claims 1 to 7 are implemented.

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