Photoelectric sensor, forming method thereof and electronic equipment

Abstract

The invention discloses a photoelectric sensor, a forming method thereof and electronic equipment, and the photoelectric sensor comprises a substrate which is internally provided with at least two photodiodes; the isolation grooves are positioned on the interfaces between the adjacent photodiodes; the polycrystalline silicon material layer is positioned on the substrate; the back metal grid is positioned on the polycrystalline silicon material layer; and the polycrystalline silicon material layer is provided with a micro-ring filter structure corresponding to the back metal grid. The micro-ring filter structure located on the polycrystalline silicon material layer can reduce optical crosstalk and electrical crosstalk between adjacent photodiodes.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a photoelectric sensor and a forming method thereof, and an electronic device. Background Art

[0002] A photoelectric sensor is a device that converts light signals into electrical signals. Its working principle is based on the photoelectric effect, which refers to the phenomenon that when light shines on certain substances, the electrons of the substance absorb the energy of photons and produce corresponding electrical effects. Photoelectric sensors all have a certain area of ​​pixel area to receive optical signals. The higher the optical transmittance of the pixel area, the better the optical sensitivity performance of the device.

[0003] In the backside illumination (BSI) process, a deep trench (DTI) structure is usually used to achieve optical isolation and electrical isolation between adjacent photodiode devices. However, since the deep trenches of the grid topology formed by DTI etching are prone to shape distortion at the nodes, the actual graphic size is smaller than the layout design size. This causes the risk of the metal grid via (BV1) contacting silicon. In order to reduce the process risk, the prior art usually chooses to disconnect BV1 at the DTI grid node when drawing the layout to avoid the process unstable area. This results in the existence of potential optical pathways between adjacent devices in the dielectric layer below the backside metal grid (BMG) near the DTI grid node, which may cause optical crosstalk between adjacent devices. Summary of the invention

[0004] The technical problem solved by the present invention is to provide a photoelectric sensor and a method for forming the same, and an electronic device, which reduce optical crosstalk and electrical crosstalk between adjacent photodiode devices in the photoelectric sensor and improve the performance of the photoelectric sensor.

[0005] In order to solve the above technical problems, on the one hand, the present invention provides a photoelectric sensor, comprising:

[0006] A substrate having at least two photodiodes disposed therein;

[0007] An isolation trench located on the interface between adjacent photodiodes; the isolation trench is used to isolate adjacent photodiodes;

[0008] a polysilicon material layer located on the substrate;

[0009] a back metal grid located on the polysilicon material layer;

[0010] The polysilicon material layer has a micro-ring filter structure corresponding to the back metal grid.

[0011] Optionally, the micro-ring filter structure is located in a target area of ​​the polysilicon material layer; the target area corresponds to a spacing area between adjacent photodiodes in the substrate, and a projection of the target area on the substrate at least covers a portion of the isolation trench.

[0012] Optionally, the microring filter structure includes a straight waveguide structure and a ring waveguide structure, the target area includes a first area and a second area, the projection of the first area on the substrate covers part of the isolation groove, and the distance between the second area and the first area is within a preset distance range; the straight waveguide structure is etched in the first area, and the ring waveguide structure is etched in the second area.

[0013] Optionally, at least one of the micro-ring filter structures is etched in the target area, and the target area corresponds to a spacing area between four adjacent photodiodes in the substrate, and the four adjacent photodiodes are located in four different directions.

[0014] Optionally, four micro-ring filter structures are etched in the target area, and the straight waveguide structures corresponding to each of the four micro-ring filter structures form a cross-shaped structure. The cross-shaped structure forms four areas, and the annular waveguide structures corresponding to each of the four micro-ring filter structures are located in at least one of the four areas.

[0015] Optionally, the ring waveguide structures corresponding to the four micro-ring filter structures are respectively located in the four regions.

[0016] Optionally, the polysilicon material layer includes a plurality of the target regions, and the linear waveguide structures located in the same direction in any two adjacent target regions form a continuous straight line.

[0017] Optionally, the linear waveguide structures corresponding to each of the plurality of target areas form a linear structure, and a projection of the linear structure on the substrate covers the isolation groove.

[0018] Optionally, the width of the straight waveguide structure in the microring filter structure is 800-2000 nanometers, and the width of the annular waveguide structure in the microring filter structure is 800-2000 nanometers.

[0019] Optionally, the width of the straight waveguide structure is equal to the width of the ring waveguide structure.

[0020] Optionally, the distance between the straight waveguide structure and the annular waveguide structure is 200-2000 nanometers.

[0021] Optionally, the etching depth of the micro-ring filter structure is less than or equal to the thickness of the polysilicon material layer.

[0022] Optionally, an absolute value of a difference between a thickness of the polysilicon material layer and a width of the linear waveguide structure is within a preset value range.

[0023] Optionally, the polysilicon material is silicon nitride or a material doped with silicon nitride.

[0024] Optionally, the photoelectric sensor further includes:

[0025] A dielectric layer is located around the micro-ring filter structure in the polysilicon material layer, and the refractive index of the medium filled in the dielectric layer is smaller than the refractive index of the polysilicon material in the polysilicon material layer.

[0026] Optionally, the filling medium includes at least one of silicon oxide and silicon nitride.

[0027] Optionally, the photoelectric sensor further includes:

[0028] A metal grid through hole located in a non-grid node area in the isolation groove, wherein the grid node area is an area corresponding to an intersection in the grid structure formed by the isolation groove; the metal grid through hole is used to connect the back metal grid with the metal layer in the isolation groove.

[0029] In another aspect, the present invention further provides a method for forming a photoelectric sensor, the method comprising:

[0030] providing a substrate in which at least two photodiodes are formed;

[0031] An isolation groove is formed on the interface between adjacent photodiodes; the isolation groove is used to isolate adjacent photodiodes;

[0032] forming a polysilicon material layer on the substrate;

[0033] A back metal grid is formed on the polysilicon material layer; and a micro-ring filter structure corresponding to the back metal grid is provided on the polysilicon material layer.

[0034] Furthermore, the method further comprises:

[0035] The micro-ring filter structure is formed in a target area of ​​the polysilicon material layer; the target area corresponds to a spacing area between adjacent photodiodes in the substrate, and a projection of the target area on the substrate at least covers a portion of the isolation trench.

[0036] Further, the micro-ring filter structure includes a straight waveguide structure and a ring waveguide structure, the target area includes a first area and a second area, the projection of the first area on the substrate covers part of the isolation groove, and the distance between the second area and the first area is within a preset distance range; the micro-ring filter structure is formed in the target area of ​​the polysilicon material layer, comprising:

[0037] Etching the linear waveguide structure in the first region of the polysilicon material layer;

[0038] The ring waveguide structure is etched in the second region of the polysilicon material layer.

[0039] Further, the forming of a micro-ring filter structure in a target region of the polysilicon material layer comprises:

[0040] forming at least one of the microring filter structures in a target region of the polysilicon material layer;

[0041] The target region corresponds to a spacing region between four adjacent photodiodes in the substrate, and the four adjacent photodiodes are located in four different directions.

[0042] Further, the forming of a micro-ring filter structure in a target region of the polysilicon material layer comprises:

[0043] Etching four straight waveguide structures corresponding to the micro-ring filter structures in the target area of ​​the polysilicon material layer; the straight waveguide structures corresponding to the four micro-ring filter structures form a cross-shaped structure, and the cross-shaped structure forms four areas;

[0044] A ring waveguide structure corresponding to each of the four micro-ring filter structures is etched in at least one of the four regions.

[0045] Further, etching the ring waveguide structures corresponding to the four micro-ring filter structures in the regions among the four regions comprises:

[0046] A ring waveguide structure corresponding to the micro-ring filter structure is etched in each of the four regions to form ring waveguide structures corresponding to each of the four micro-ring filter structures.

[0047] Furthermore, before forming the micro-ring filter structure in the target area of ​​the polysilicon material layer, the method further comprises:

[0048] forming a plurality of the target regions on the polysilicon material layer;

[0049] The forming of a micro-ring filter structure in a target region of the polysilicon material layer comprises:

[0050] forming a patterned mask layer on the polysilicon material layer, wherein the size of the micro-ring filter structure is defined in the mask layer;

[0051] Using the patterned mask layer as a mask, each target area in the polysilicon material layer is etched to form the micro-ring filter structure; wherein the straight waveguide structures located in the same direction in any two adjacent target areas form a continuous straight line.

[0052] Furthermore, the linear waveguide structures corresponding to the plurality of target areas respectively form a linear structure, and a projection of the linear structure on the substrate covers the isolation groove.

[0053] Furthermore, the width of the straight waveguide structure in the microring filter structure is 800-2000 nanometers, and the width of the annular waveguide structure in the microring filter structure is 800-2000 nanometers.

[0054] Furthermore, the width of the straight waveguide structure is equal to the width of the ring waveguide structure.

[0055] Furthermore, the distance between the linear waveguide structure and the annular waveguide structure is 200-2000 nanometers.

[0056] Furthermore, the etching depth of the micro-ring filter structure is less than or equal to the thickness of the polysilicon material layer.

[0057] Furthermore, an absolute value of a difference between a thickness of the polysilicon material layer and a width of the linear waveguide structure is within a preset value range.

[0058] Furthermore, the polysilicon material is silicon nitride or a material doped with silicon nitride.

[0059] Further, after forming the micro-ring filter structure in the target area of ​​the polysilicon material layer, the method further comprises:

[0060] A dielectric layer is formed around the micro-ring filter structure in the polysilicon material layer, and the refractive index of the medium filled in the dielectric layer is smaller than the refractive index of the polysilicon material in the polysilicon material layer.

[0061] In another aspect, the present invention further provides an electronic device, comprising the photoelectric sensor as described above.

[0062] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0063] The photoelectric sensor of the present invention comprises: a substrate, in which at least two photodiodes are arranged; an isolation groove located on the interface between adjacent photodiodes; a polysilicon material layer located on the substrate; a back metal grid located on the polysilicon material layer; and a micro-ring filter structure corresponding to the back metal grid is provided on the polysilicon material layer. In the present invention, a polysilicon material layer is newly added to perform surface passivation protection on the photodiode device to prevent oxygen and water vapor in the air from degrading the device performance; the micro-ring filter structure on the polysilicon material layer can reduce the optical crosstalk and electrical crosstalk between adjacent photodiodes. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] In order to more clearly illustrate the technical solution of the present invention, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0065] Figures 1 to 7 is a schematic cross-sectional structural diagram of a formation process of a photoelectric sensor provided by an embodiment of the present invention;

[0066] Figure 8 is a schematic diagram of a micro-ring filter structure provided by an embodiment of the present invention;

[0067] Fig. 9 is a schematic structural diagram of an isolation groove in a photoelectric sensor provided by an embodiment of the present invention;

[0068] Fig.10 is a top view of a micro-ring filter structure in a photoelectric sensor provided by an embodiment of the present invention;

[0069] Fig.11 is a spectrum curve diagram of a photoelectric sensor provided by an embodiment of the present invention;

[0070] Among them, the reference numerals in the figure correspond to: 100-substrate, 101-photodiode, 102-isolation groove, 103-polysilicon material layer, 104-microring filter structure, 1041-straight waveguide structure, 1042-ring waveguide structure, 105-back metal grid, 106-dielectric layer, 107-grid node area, 108-metal grid through hole. DETAILED DESCRIPTION

[0071] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0072] The following disclosure provides many different embodiments or examples for implementing the different features of the provided subject matter. Specific examples of components and configurations are described below to simplify the present disclosure. Of course, these components and configurations are only examples and are not intended to be restrictive. For example, in the following description, the formation of a first feature above or on a second feature may include an embodiment in which the first and second features are directly contacted, and may also include an embodiment in which an additional feature may be formed between the first and second features so that the first and second features may not be directly contacted. In addition, the present disclosure may repeat reference numbers and / or letters in various examples. This repetition is for the purpose of simplicity and clarity, and does not itself indicate the relationship between the various embodiments and / or configurations discussed.

[0073] Additionally, spatially relative terms, such as "below," "beneath," "lower," "on," "upper," "front," "back," "above," and the like may be used herein for ease of description to describe the relationship of one element or feature to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may be similarly interpreted.

[0074] The environment in which the method described in the present embodiment is implemented may include multiple semiconductor processing tools, and wafer / die handling equipment. The multiple semiconductor processing tools may include deposition tools, exposure tools, developer tools, etching tools, planarization tools, implantation tools, and / or another type of semiconductor processing tools. The tools included in the example environment may include a semiconductor clean room, a semiconductor factory, a semiconductor processing facility and / or a manufacturing facility, and / or the like.

[0075] A deposition tool is a semiconductor processing tool that includes a semiconductor processing chamber and one or more devices capable of depositing various types of materials on a substrate. In some implementations, the deposition tool includes a spin coating tool that is capable of depositing a photoresist layer on a substrate, such as a wafer. In some implementations, the deposition tool can deposit a metallic material to form one or more conductors or conductive layers, can deposit an insulating material to form a dielectric or insulating layer, and in some implementations, the deposition tool includes a chemical vapor deposition (CVD) tool, such as a plasma-enhanced CVD (PECVD) tool, a high-density plasma CVD (HDP-CVD) tool, a sub-atmospheric CVD (SACVD) tool, a plasma-enhanced atomic layer deposition (PEALD) tool, or another type of CVD tool. In some implementations, the deposition tool includes a physical vapor deposition (PVD) tool, such as a sputtering tool or another type of PVD tool. In some implementations, the example environment includes multiple types of deposition tools.

[0076] An exposure tool is a semiconductor processing tool that is capable of exposing a photoresist layer to a radiation source, such as an ultraviolet light (UV) source (e.g., a deep UV light source, an extreme UV light source, and / or the like), an X-ray source, and / or the like. The exposure tool may expose the photoresist layer to the radiation source to transfer a pattern from a mask to the photoresist layer. The pattern may include one or more semiconductor device layer patterns for forming one or more semiconductor devices, may include patterns for forming one or more structures of a semiconductor device, may include patterns for etching various portions of a semiconductor device, and / or the like. In some implementations, the exposure tool includes a scanner, a stepper, or a similar type of exposure tool.

[0077] The developer tool is a semiconductor processing tool capable of developing a photoresist layer that has been exposed to a radiation source to develop a pattern transferred to the photoresist layer from an exposure tool. In some implementations, the developer tool develops the pattern by removing unexposed portions of the photoresist layer. In some implementations, the developer tool develops the pattern by removing exposed portions of the photoresist layer. In some implementations, the developer tool develops the pattern by dissolving exposed or unexposed portions of the photoresist layer using a chemical developer.

[0078] An etching tool is a semiconductor processing tool that is capable of etching various types of materials of a substrate, wafer, or semiconductor device. For example, an etching tool may include a wet etching tool, a dry etching tool, and / or the like. In some implementations, the etching tool includes a chamber filled with an etchant and a substrate is placed in the chamber for a specific period of time to remove a specific amount of one or more portions of the substrate. In some implementations, the etching tool may use plasma etching or plasma-assisted etching to etch one or more portions of the substrate, which operation may involve using an ionized gas to etch the one or more portions in the same area or directionally.

[0079] A planarization tool is a semiconductor processing tool that is capable of polishing or planarizing various layers of a wafer or semiconductor device. For example, a polishing device may include a chemical mechanical polishing (CMP) device and / or another type of polishing device. In some implementations, the polishing device may polish or planarize a deposited or plated material layer. The CMP process may include depositing a slurry or polishing compound on a polishing pad. The wafer may be mounted to a bracket that may rotate the wafer as the wafer is pressed against the polishing pad. The polishing slurry and the polishing pad act as an abrasive that polishes or planarizes one or more layers of the wafer as it rotates. The polishing pad may also be rotated to ensure that a continuous supply of the polishing slurry is applied to the polishing pad.

[0080] An implantation tool is a semiconductor processing tool used to implant ions into a substrate of a semiconductor wafer. In some implementations, the implantation tool generates ions from a source material such as a gas or solid in an arc chamber. The source material is provided to the arc chamber, and an arc voltage is discharged between a cathode and an electrode to generate a plasma containing ions of the source material. One or more extraction electrodes are used to extract ions from the plasma in the arc chamber and accelerate the ions to form an ion beam. In some implementations, the implantation tool can be used to form a photodiode in the present example in a substrate.

[0081] Wafer / die handling devices include mobile robots, robotic arms, trams or rail cars, and / or another type of device that handles wafers and / or dies and / or transports wafers and / or dies between semiconductor processing tools and / or to and from other locations such as wafer racks, storage chambers, and / or the like. In some implementations, the wafer / die handling devices may be programmed devices to follow a specific path and / or may operate quasi-autonomously or autonomously.

[0082] The number and configuration of each device in this embodiment can be one or more instances. In fact, there may be additional devices, fewer devices, different devices, or devices with different configurations than those described in this embodiment. In addition, two or more of the devices may be implemented in a single device, or a single device may be implemented as multiple distributed devices. Additionally or alternatively, a set of devices (e.g., one or more devices) of an environment may perform one or more functions described as being performed by another set of devices of the environment.

[0083] like Figure 1-7 As shown, Figures 1 to 7 : is a schematic cross-sectional structure diagram of a photoelectric sensor formation process provided by an embodiment of the present invention; an embodiment of the present invention provides a method for forming a photoelectric sensor, the method comprising:

[0084] like Figure 1 As shown, a substrate 100 is provided, in which at least two photodiodes 101 are formed; the substrate 100 may include a plurality of pixel regions, in each of which a photodiode 101 is provided; an isolation groove 102 is formed on the interface between adjacent photodiodes 101; the isolation groove 102 is used to isolate adjacent photodiodes 101;

[0085] In the embodiments of the present specification, a backside illumination (BSI) process may be used to form a photoelectric sensor. The photoelectric sensor may include, but is not limited to, a TOF (Time of Flight) sensor, a CCD (Charge Coupled Device) image sensor, and a CMOS image sensor. Specifically, a TOF (Time of Flight) sensor may include a DTOF (Direct Time of Flight) sensor and an iTOF (indirect Time of Flight) sensor, etc.

[0086] In the embodiments of the present specification, the substrate 100 may include a semiconductor die substrate, a semiconductor wafer, or another type of substrate formed by semiconductor pixels. In some implementations, the substrate 100 may be formed of the following materials: silicon, a material including silicon, a III-V compound semiconductor material such as gallium arsenide (GaAs), silicon on insulator (SOI), or another type of semiconductor material capable of generating charge from photons of incident light.

[0087] In the embodiment of this specification, the method for forming the substrate 100 includes:

[0088] Providing a first substrate, wherein the first substrate has a first surface and a second surface, wherein the first surface is a light-receiving surface, and the second surface is a backlight surface;

[0089] Forming the at least two photodiodes 101 on the first surface;

[0090] bonding a second substrate to the second surface of the first substrate,

[0091] Performing a thinning process on the first surface of the first base to form the substrate 100;

[0092] The step of forming a polysilicon material layer 103 on the substrate 100 includes:

[0093] The polysilicon material layer 103 is formed on the first surface.

[0094] In the embodiment of the present specification, the polysilicon material layer 103 can be arranged on the interface between each photodiode 101, and an isolation groove is arranged on the interface between each photodiode 101, and then the isolation groove is filled with oxide until it is flush with or higher than the photodiode, and then the polysilicon material layer 103 is formed on the filling layer. Bonding is to obtain a larger photosensitive area. The pixel area and the logic circuit are changed from the original plane arrangement to the upper and lower two-layer arrangement through the bonding process, which greatly increases the area ratio of the pixel area to the entire chip, thereby improving the photosensitivity of the chip in a weak light environment.

[0095] Exemplarily, the first substrate is a pixel wafer, and the second substrate is a logic wafer.

[0096] This embodiment realizes the bonding between the second surface of the first substrate and the second substrate; by setting the pixel area and the logic area on two wafers respectively, and bonding the pixel wafer and the logic wafer together, a larger pixel area can be obtained, and it is beneficial to shorten the path of light reaching the photoelectric element, reduce the scattering of light, and make the light more focused, thereby improving the photosensitivity of the photoelectric sensor in a weak light environment and reducing system noise and crosstalk.

[0097] In the embodiment of the present specification, the substrate 100 may include a plurality of pixel areas arranged in an array, and a photodiode 101 may be provided in each pixel area. The photodiode 101 is a PN junction diode operating under a reverse voltage bias. The photons irradiated in the light receiving area of ​​the photodiode 101 generate electron-hole pairs inside the junction area. These electron-hole pairs are swept to both ends of the junction under the action of the built-in electric field in the junction area, generating photocurrent, thereby realizing the detection of optical signals. After the incident light excites electron-hole pairs in the photodiode 101, not all photogenerated electrons and photogenerated holes are swept to both ends of the junction by the built-in electric field in the junction area to form photocurrent. A portion of the photogenerated electrons may undergo radiative recombination and generate new photons. Since silicon is an indirect bandgap semiconductor, the wavelength of the newly generated photons is generally greater than the wavelength of the photons in the incident light. The newly generated photons may enter the adjacent photodiodes 101 through the optical path and generate optical crosstalk signals in these photodiodes 101.

[0098] In the embodiment of the present specification, an isolation trench 102 is provided on the interface between adjacent photodiodes 101, and the isolation trench 102 may be a grid structure, and the grid structure may be composed of a plurality of cross-shaped structures. The isolation trench 102 may be a deep trench (Deep Trench Isolation, DTI).

[0099] Exemplarily, the isolation trench 102 may be filled with a light-isolating structure, which is beneficial for preventing optical crosstalk between adjacent photodiodes. The isolation trench 102 may include a filled oxide and a deposited layer formed by a metal material.

[0100] like Figure 2 As shown, a polysilicon material layer 103 is formed on the substrate 100;

[0101] like Figure 4 As shown, a back metal grid 105 is formed on the polysilicon material layer 103; and a micro-ring filter structure corresponding to the back metal grid is provided on the polysilicon material layer.

[0102] Exemplarily, the method further includes:

[0103] The micro-ring filter structure is formed in a target region of the polysilicon material layer; the target region corresponds to a spacing region between adjacent photodiodes in the substrate, and a projection of the target region on the substrate at least covers a portion of the isolation trench. Figure 3 As shown, the micro-ring filter structure 104 is located in the target area of ​​the polysilicon material layer 103; the target area corresponds to the spacing area between adjacent photodiodes 101 in the substrate 100, and the projection of the target area on the substrate 100 at least covers part of the isolation groove 102.

[0104] In the embodiment of this specification, before forming the back metal grid 105 on the polysilicon material layer 103, the method further includes:

[0105] like Fig. 9 As shown, metal grid through holes are etched in the non-grid node area 107 in the isolation groove 102, and the grid node area 107 is the area corresponding to the intersection in the grid structure formed by the isolation groove 102; the metal grid through holes are used to connect the back metal grid 105 with the metal layer in the isolation groove 102.

[0106] In the embodiment of the present specification, the non-grid node region in the isolation trench 102 is the region around the intersection in the grid structure formed by the isolation trench 102. The metal grid via 108 (backside metal grid via, BV1) in the non-grid node region in the isolation trench 102 is used to connect the back metal grid 105 with the metal layer in the isolation trench 102. The metal layer can be a tungsten metal layer. The metal grid via is provided in the non-grid node region in the isolation trench 102, and the metal grid via 108 is disconnected at the grid node of the isolation trench 102, so as to prevent shape distortion at the grid node, thereby avoiding the process unstable region.

[0107] Since the deep grooves of the grid topology formed by DTI etching are prone to shape distortion at the nodes, the actual graphic size is smaller than the layout design size, which causes the risk of BV1 through-holes contacting silicon. In order to reduce process risks, it is usually chosen to disconnect BV1 at the DTI grid node when drawing the layout to avoid process unstable areas. This results in potential optical pathways between adjacent devices in the dielectric layer 106 under the backside metal grid 105 (BMG) near the DTI grid node, which may cause optical crosstalk between adjacent devices.

[0108] In order to solve this technical problem, the photoelectric sensor of this embodiment includes a polysilicon material layer 103 on the substrate 100 and a micro-ring filter structure 104 located in a target area of ​​the polysilicon material layer 103 .

[0109] In the embodiment of this specification, the polysilicon material is silicon nitride or a material doped with silicon nitride. The newly added polysilicon material layer 103 can passivate the surface of the photodiode 101 device to prevent oxygen and water vapor in the air from degrading the device performance.

[0110] In the embodiment of the present specification, the etching depth of the micro-ring filter structure 104 is less than or equal to the thickness of the polysilicon material layer 103. The micro-ring filter structure 104 may penetrate or not penetrate the polysilicon material layer 103. When the micro-ring filter structure 104 penetrates the polysilicon material layer 103, the etching depth of the micro-ring filter structure 104 is equal to the thickness of the polysilicon material layer 103; when the micro-ring filter structure 104 does not penetrate the polysilicon material layer 103, the etching depth of the micro-ring filter structure 104 is less than the thickness of the polysilicon material layer 103. At this time, the polysilicon material layer 103 has a passivation protection effect on the device, preventing oxygen and water vapor in the air from degrading the performance of the photoelectric sensor.

[0111] In the embodiment of the present specification, the absolute value of the difference between the thickness of the polysilicon material layer 103 and the width of the linear waveguide structure 1041 is within a preset value range.

[0112] Specifically, the preset numerical range can be set according to actual conditions, for example, the preset numerical range can be 0-100; by setting the preset numerical range, the optical anti-crosstalk performance of the linear waveguide structure 1041 is improved.

[0113] In the embodiments of this specification, the micro-ring filter is a passive device based on the optical waveguide coupling effect. When a ring waveguide is close to a straight waveguide, the photons in the straight waveguide will be coupled into the ring waveguide. The light coupled into the ring waveguide will be confined in the ring waveguide and perform a ring oscillation in the ring waveguide. The coupling efficiency, that is, the ratio of photons in the straight waveguide coupled into the ring waveguide, and the wavelength range of photons in which coupling can occur, will be regulated by the distance between the straight waveguide and the ring waveguide, and the width of the ring waveguide and the straight waveguide. Therefore, in theory, a micro-ring filter structure 104 can be designed so that all the light within a certain wavelength range in the straight waveguide is coupled into the ring waveguide, and the photons coupled into the ring waveguide will be gradually compounded without leaking to the outside world.

[0114] In the embodiments of this specification, Figure 8 As shown, the micro-ring filter structure 104 includes a straight waveguide structure 1041 and a ring waveguide structure 1042. Figure 8 The middle arrow indicates the propagation direction of the photon in the two waveguide structures, the target area includes a first area and a second area, the projection of the first area on the substrate 100 covers part of the isolation groove 102, and the distance between the second area and the first area is within a preset distance range; the micro-ring filter structure 104 is formed in the target area of ​​the polysilicon material layer 103, including:

[0115] Etching the linear waveguide structure 1041 in the first region of the polysilicon material layer 103;

[0116] The ring waveguide structure 1042 is etched in the second region of the polysilicon material layer 103 .

[0117] In an embodiment of the present specification, the projection of the target area on the substrate can be an interval pixel area between adjacent photodiodes, and the target area includes a first area and a second area, the projection of the first area on the substrate 100 covers part of the isolation groove 102, and the distance between the second area and the first area is within a preset distance range; the first area can be used to etch a straight waveguide structure 1041, and the second area can be used to etch a ring waveguide structure 1042, and the distance range can be set according to actual conditions, and can be specifically determined according to the distance between the straight waveguide structure 1041 and the ring waveguide structure 1042.

[0118] In the embodiment of this specification, photons within a specific wavelength range are extracted on the light incident surface and stored in the micro-ring filter structure 104 and gradually recombined to prevent these photons from propagating in the dielectric layer 106, thereby reducing optical crosstalk between adjacent photodiode 101 devices.

[0119] In the embodiment of this specification, the forming of the micro-ring filter structure 104 in the target area of ​​the polysilicon material layer 103 includes:

[0120] forming at least one of the micro-ring filter structures 104 in a target region of the polysilicon material layer 103;

[0121] The target region corresponds to a spacing region between four adjacent photodiodes 101 in the substrate 100 , and the four adjacent photodiodes 101 are located in four different directions.

[0122] In the embodiments of the present specification, the projection of the target area on the substrate can be the interval area between adjacent extreme points in the four directions of up, down, left and right in the pixel area; and one or at least two of the micro-ring filter structures 104 can be formed in the target area. When at least two micro-ring filter structures 104 are formed in the target area, the size of the straight waveguide structure 1041 in each micro-ring filter structure 104 can be the same or different, the size of the annular waveguide structure 1042 in each micro-ring filter structure 104 can be the same or different, and the distance between the straight waveguide structure 1041 and the corresponding annular waveguide structure 1042 in each micro-ring filter structure 104 can be the same or different.

[0123] In the embodiments of the present specification, one or at least two micro-ring filter structures 104 can be formed in the target area according to actual needs, so as to flexibly set the number of micro-ring filter structures 104 so that the number of coupled photons in the micro-ring filter structure 104 reaches a preset number to meet different scene requirements.

[0124] In the embodiment of this specification, the forming of the micro-ring filter structure 104 in the target area of ​​the polysilicon material layer 103 includes:

[0125] Etching the linear waveguide structures 1041 corresponding to the four micro-ring filter structures 104 in the target area of ​​the polysilicon material layer 103; the linear waveguide structures 1041 corresponding to the four micro-ring filter structures 104 form a cross-shaped structure, and the cross-shaped structure forms four areas;

[0126] A ring waveguide structure 1042 corresponding to each of the four micro-ring filter structures 104 is etched in at least one of the four regions.

[0127] In the embodiments of the present specification, a linear waveguide structure 1041 corresponding to each of the four micro-ring filter structures 104 can be etched in the target area; the sizes of each linear waveguide structure 1041 can be the same or different; the linear waveguide structures 1041 corresponding to each of the four micro-ring filter structures 104 form a cross-shaped structure, and the cross-shaped structure forms four areas; then, an annular waveguide structure 1042 corresponding to each of the four micro-ring filter structures 104 is etched in at least one of the four areas; for example, four annular waveguide structures 1042 can be etched in one of the four areas, or two annular waveguide structures 1042 can be etched in two of the four areas, respectively.

[0128] In the embodiments of the present specification, one or more regions can be arbitrarily selected from the four regions corresponding to the cross-shaped structure formed by the straight waveguide structure 1041 to etch four annular waveguide structures 1042 corresponding to the four micro-ring filter structures 104, thereby improving the flexibility of the setting method of the annular waveguide structure 1042 and improving the optical anti-crosstalk performance of the micro-ring filter structure 104.

[0129] In the embodiment of this specification, the etching of the ring waveguide structure 1042 corresponding to each of the four micro-ring filter structures 104 in the four regions includes:

[0130] like Fig.10 As shown, a ring waveguide structure 1042 corresponding to the micro-ring filter structure 104 is etched in each of the four regions to form a ring waveguide structure 1042 corresponding to each of the four micro-ring filter structures 104 .

[0131] In the embodiment of the present specification, a ring waveguide structure 1042 may be etched in each of the four regions formed by the linear waveguide structure 1041 , and the sizes of the ring waveguide structures 1042 may be the same or different.

[0132] In the embodiment of this specification, a ring waveguide structure 1042 can be etched in each of the four regions formed by the linear waveguide structure 1041 to obtain a symmetrical micro-ring filter structure 104 , thereby improving the optical anti-crosstalk performance of the micro-ring filter structure 104 .

[0133] In the embodiment of this specification, before forming the micro-ring filter structure 104 in the target area of ​​the polysilicon material layer 103, the method further includes:

[0134] forming a plurality of target regions on the polysilicon material layer 103;

[0135] The forming of the micro-ring filter structure 104 in the target area of ​​the polysilicon material layer 103 comprises:

[0136] forming a patterned mask layer on the polysilicon material layer 103, wherein the size of the micro-ring filter structure 104 is defined in the mask layer;

[0137] Using the patterned mask layer as a mask, each target area in the polysilicon material layer 103 is etched to form the micro-ring filter structure 104; wherein the straight waveguide structures 1041 located in the same direction in any two adjacent target areas form a continuous straight line.

[0138] In the embodiments of the present specification, due to the large number of photodiodes, a target area can be formed between any adjacent photodiodes, and a micro-ring filter structure 104 can be etched in each target area; and the straight waveguide structures 1041 located in the same direction in any two adjacent target areas can form a continuous straight line.

[0139] In the embodiment of the present specification, a plurality of the target areas are formed on the polysilicon material layer 103, and a micro-ring filter structure 104 is etched in each target area; and the straight waveguide structures 1041 located in the same direction in any two adjacent target areas can form a continuous straight line, thereby increasing the number of composite photons coupled by the micro-ring filter structure 104 and improving the anti-optical crosstalk performance of the micro-ring filter structure 104.

[0140] In the embodiment of this specification, the linear waveguide structures 1041 corresponding to each of the plurality of target regions form a linear structure, and the projection of the linear structure on the substrate 100 covers the isolation trench 102 .

[0141] In the embodiments of the present specification, the width of the straight waveguide structure 1041 may be the same as or different from the width of the isolation groove 102, and the straight waveguide structures 1041 corresponding to the multiple target areas respectively form a linear structure, which may include multiple crosses, and the projection of the linear structure on the substrate 100 completely covers the isolation groove 102, so that photons within a specific wavelength range on the light incident surface can be extracted and stored in the micro-ring filter structure 104 and gradually recombined to prevent these photons from propagating in the dielectric layer, thereby reducing optical crosstalk between adjacent photodiode devices.

[0142] In the embodiment of the present specification, the width of the linear waveguide structure 1041 in the micro-ring filter structure 104 is 800-2000 nanometers, and the width of the annular waveguide structure 1042 in the micro-ring filter structure 104 is 800-2000 nanometers.

[0143] In the embodiment of this specification, the width of the linear waveguide structure 1041 and the width of the ring waveguide structure 1042 in the same micro-ring filter structure 104 may be the same or different.

[0144] In the embodiment of the present specification, the widths of the straight waveguide structure 1041 and the ring waveguide structure 1042 in the micro-ring filter structure 104 are both set to 800-2000 nanometers, thereby increasing the number of photons generated by the radiation recombination of composite carriers in the micro-ring filter structure 104, thereby preventing the photons generated by the radiation recombination of carriers in the photodiode from causing optical crosstalk to adjacent devices.

[0145] In the embodiments of this specification, the geometric dimensions of the microring filter (such as the width of the microring, the distance between the microring and the straight waveguide, the thickness of the polysilicon material layer 103, etc.) can be adjusted to adjust the action band of the optical coupling effect so as to flexibly adapt to different application scenarios and device types. For example, if the refractive index of the material of the microring filter is 3, the wavelength of the filter is 900nm, and the actual wavelength in the waveguide of the microring filter is 300nm, then the width of the straight waveguide structure and the annular waveguide structure of the same microring filter can be set to 300nm, and the distance between the straight waveguide structure and the annular waveguide structure of the same microring filter can be set to within 900nm.

[0146] In the embodiment of this specification, the width of the straight waveguide structure 1041 is equal to the width of the annular waveguide structure 1042 .

[0147] In the embodiment of the present specification, the width of the straight waveguide structure 1041 in the same micro-ring filter structure 104 is equal to the width of the ring waveguide structure 1042, which can increase the number of photons generated by the radiation recombination of composite carriers in the micro-ring filter structure 104, thereby preventing the photons generated by the radiation recombination of carriers in the photodiode from causing optical crosstalk to adjacent devices.

[0148] In some embodiments, the absolute value of the difference between the width of the straight waveguide structure 1041 and the width of the annular waveguide structure 1042 can be set within a preset numerical range, and the width of the straight waveguide structure 1041 and the width of the annular waveguide structure 1042 can be set according to actual needs.

[0149] In the embodiment of this specification, the distance between the linear waveguide structure 1041 and the annular waveguide structure 1042 is 200-2000 nanometers.

[0150] In the embodiments of the present specification, the distance between the straight waveguide structure 1041 and the ring waveguide structure 1042 in the same micro-ring filter structure 104 can be 200-2000 nanometers, which can increase the number of photons generated by the radiation recombination of composite carriers in the micro-ring filter structure 104, thereby preventing the photons generated by the radiation recombination of carriers in the photodiode from causing optical crosstalk to adjacent devices.

[0151] In the embodiment of this specification, after forming the micro-ring filter structure 104 in the target region of the polysilicon material layer 103, the method further includes:

[0152] like Figure 5-7 As shown, Figure 5 is a schematic diagram of the structure of the isolation trench, including the A-A1 section corresponding to the grid node area 107 and the B-B1 section corresponding to the metal grid through hole 108 in the non-grid node area; Figure 6 A cross-sectional view of etching a micro-ring filter structure at a position corresponding to a grid node region 107 (i.e., a non-metal grid through hole) in an isolation trench along a cross section A-A1; Figure 7 A cross-sectional view of a micro-ring filter structure along the B-B1 section is used to etch a position corresponding to the metal grid through hole 108 located in the non-grid node area of ​​the isolation trench. An oxide is filled in the isolation trench 102 to form an oxide layer, and then a back metal grid 105 is formed on the oxide layer. Figure 6-7 As shown, a dielectric layer 106 is formed around the micro-ring filter structure 104 in the polysilicon material layer 103 , and the refractive index of the medium filled in the dielectric layer 106 is smaller than the refractive index of the polysilicon material in the polysilicon material layer 103 .

[0153] In the embodiment of the present specification, a dielectric layer may be formed around the micro-ring filter structure 104 , and the dielectric layer may cover the surface of the substrate 100 and the back metal grid 105 .

[0154] In the embodiment of the present specification, a dielectric layer 106 can be formed around the micro-ring filter structure 104 in the polysilicon material layer 103. The refractive index of the medium filled in the dielectric layer 106 is smaller than the refractive index of the polysilicon material in the polysilicon material layer 103. The dielectric layer 106 can serve as a passivation layer to protect the photoelectric sensor.

[0155] In the embodiment of this specification, the filling medium includes at least one of silicon oxide and silicon nitride.

[0156] In the embodiments of this specification, any material with a refractive index lower than that of the polysilicon material in the polysilicon material layer 103 can be used as a filling medium. The filling medium can include at least one of silicon oxide and silicon nitride. The medium layer 106 can be used as a passivation layer to protect the photoelectric sensor.

[0157] In the embodiment of this specification, before forming the polysilicon material layer 103 on the substrate 100, the method further includes:

[0158] Oxide and tungsten metal are sequentially filled in the isolation trench 102 to form a stacked oxide layer and a tungsten metal layer; wherein the oxide may include silicon dioxide or a substance doped with silicon dioxide.

[0159] The tungsten metal layer is polished by a chemical mechanical polishing process to form a deposition layer.

[0160] In the embodiments of this specification, the chemical mechanical polishing (CMP) process is a technology that combines chemical and mechanical actions. Its process is quite complicated and has many influencing factors. First, the workpiece surface material reacts chemically with the oxidant, catalyst, etc. in the polishing liquid to form a relatively easy-to-remove soft layer. Then, the soft layer is removed under the mechanical action of the abrasive and polishing pad in the polishing liquid to expose the workpiece surface again. Then, a chemical reaction is carried out. In this way, the workpiece surface is polished in the alternating chemical and mechanical processes.

[0161] In the embodiment of this specification, the step of forming the polysilicon material layer 103 on the first surface includes:

[0162] The polysilicon material layer 103 is formed on the deposition layer.

[0163] In the embodiment of the present specification, the polysilicon material layer 103 may be formed on the deposition layer by chemical vapor deposition (CVD), and the polysilicon material layer 103 may be a silicon nitride layer.

[0164] In the embodiment of this specification, after forming the back metal grid 105 on the polysilicon material layer 103, the method further includes:

[0165] Etching the polysilicon material layer 103 in the isolation trench 102 to expose the tungsten metal layer;

[0166] Filling metal aluminum on the tungsten metal layer in the isolation trench 102 to form a metal aluminum layer;

[0167] Exposing and etching the metal aluminum layer to form an aluminum pad;

[0168] Forming a through silicon via on the first surface to expose the first metal layer;

[0169] The first metal layer is connected to the aluminum pad.

[0170] In the embodiment of this specification, the first metal layer may be metal copper on the first surface; through silicon via (TSV) is a key technology for realizing vertical interconnection of multi-dimensional packaging, and the first metal layer and the aluminum pad may be connected through the through silicon via. The polysilicon material layer 103 in the isolation trench 102 is etched and stopped at the tungsten metal layer, thereby exposing the tungsten metal layer; then, metal aluminum can be filled on the tungsten metal layer by physical vapor deposition to form a metal aluminum layer; then, the metal aluminum layer is exposed and etched to form an aluminum pad (Al PAD); the specific formation method of the aluminum pad includes: first forming an etching barrier layer and a passivation protection layer; etching the etching barrier layer and the passivation protection layer to form an aluminum pad opening; forming an aluminum barrier layer on the sidewall and bottom of the aluminum pad opening of the etching barrier layer and the passivation protection layer and on the etching barrier layer and the passivation protection layer; arranging an aluminum layer on the structure after the aluminum barrier layer formation step, wherein aluminum fills the aluminum pad opening of the etching barrier layer and the passivation protection layer; wherein, the aluminum metal layer is first deposited on the silicon wafer by physical vapor deposition, and the thickness of the deposited aluminum metal layer is 5000A-30000A. The aluminum layer on the aluminum barrier layer and part of the aluminum in the aluminum pad opening are removed; the aluminum layer is rearranged on the structure after the aluminum removal step, wherein the aluminum layer is used to refill the blank space of the aluminum pad opening of the etching barrier layer and the passivation protection layer; the aluminum re-deposition step uses a physical vapor deposition method to deposit an aluminum layer on the silicon wafer, and the thickness of the deposited aluminum layer is 3000A-25000A. After the aluminum re-deposition step, the aluminum pad layer is photolithographically formed into an aluminum pad.

[0171] like Fig.11 As shown, Fig.11 It is a spectrum curve diagram of a photoelectric sensor provided by an embodiment of the present invention; wherein, curve a is the spectrum curve of the light source, curve b is the carrier radiation recombination spectrum curve in the photodiode; area c indicates the wavelength range of the light coupled to the microring filter structure; it can be seen that most of the carrier radiation recombination photons in the photodiode have been coupled by the microring filter structure, thereby effectively reducing the optical crosstalk between adjacent photodiodes.

[0172] The photoelectric sensor of this embodiment includes: a substrate, in which at least two photodiodes are arranged; an isolation groove located on the interface between adjacent photodiodes; a polysilicon material layer located on the substrate; a micro-ring filter structure located in a target area of ​​the polysilicon material layer; the target area corresponds to the spacing area between adjacent photodiodes in the substrate, and the projection of the target area on the substrate at least covers part of the isolation groove; and a back metal grid located on the polysilicon material layer. In the present invention, a polysilicon material layer is newly added to perform surface passivation protection on the photodiode device to prevent oxygen and water vapor in the air from degrading the device performance; the micro-ring filter structure located on the polysilicon material layer can reduce the optical crosstalk and electrical crosstalk between adjacent photodiodes.

[0173] The embodiment of the present invention further provides a photoelectric sensor, Figure 1-7 As shown, including:

[0174] A substrate 100, wherein at least two photodiodes 101 are disposed on the substrate 100;

[0175] An isolation groove 102 located on the interface between adjacent photodiodes 101; the isolation groove 102 is used to isolate adjacent photodiodes 101;

[0176] A polysilicon material layer 103 located on the substrate 100;

[0177] A back metal grid 105 is located on the polysilicon material layer 103 ; and a micro-ring filter structure 104 corresponding to the back metal grid 105 is provided on the polysilicon material layer 103 .

[0178] In the embodiment of the present specification, the micro-ring filter structure 104 is located in the target area of ​​the polysilicon material layer 103; the target area corresponds to the spacing area between adjacent photodiodes 101 in the substrate 100, and the projection of the target area on the substrate 100 at least covers a portion of the isolation groove 102; wherein the micro-ring filter structure 104 can be used to reduce optical crosstalk and electrical crosstalk between adjacent photodiodes 101, thereby improving the photoelectric isolation effect between adjacent photodiodes 101.

[0179] In the embodiments of this specification, the photoelectric sensor may include but is not limited to a TOF (Time of Flight) sensor, a CCD (Charge Coupled Device) image sensor, and a CMOS image sensor. Specifically, the TOF (Time of Flight) sensor may include a DTOF (Direct Time of Flight) sensor and an iTOF (indirect Time of Flight) sensor.

[0180] In the embodiment of this specification, the material of the substrate 100 may be silicon, and the substrate 100 may include:

[0181] The first substrate has a first surface and a second surface, wherein the first surface is a light-receiving surface and the second surface is a backlight surface; at least two photodiodes 101 are arranged on the first surface; the at least two photodiodes 101 are arranged in an array;

[0182] The second substrate is bonded to the second surface of the first substrate.

[0183] In the embodiments of this specification, bonding is performed to obtain a larger photosensitive area. The pixel area and logic circuit are changed from the original in-plane arrangement to an upper and lower layer arrangement through the bonding process, which greatly increases the area ratio of the pixel area to the entire chip, thereby improving the chip's photosensitivity in low-light environments.

[0184] Exemplarily, the first substrate is a pixel wafer, and the second substrate is a logic wafer.

[0185] This embodiment realizes the bonding between the second surface of the first substrate and the second substrate; by setting the pixel area and the logic area on two wafers respectively, and bonding the pixel wafer and the logic wafer together, a larger pixel area can be obtained, and it is beneficial to shorten the path of light reaching the photoelectric element, reduce the scattering of light, and make the light more focused, thereby improving the photosensitivity of the photoelectric sensor in a weak light environment and reducing system noise and crosstalk.

[0186] In the embodiment of the present specification, the substrate 100 may include a plurality of pixel areas arranged in an array, and a photodiode 101 may be provided in each pixel area. The photodiode 101 is a PN junction diode operating under a reverse voltage bias. The photons irradiated in the light receiving area of ​​the photodiode 101 generate electron-hole pairs inside the junction area. These electron-hole pairs are swept to both ends of the junction under the action of the built-in electric field in the junction area, generating photocurrent, thereby realizing the detection of optical signals. After the incident light excites electron-hole pairs in the photodiode 101, not all photogenerated electrons and photogenerated holes are swept to both ends of the junction by the built-in electric field in the junction area to form photocurrent. A portion of the photogenerated electrons may undergo radiative recombination and generate new photons. Since silicon is an indirect bandgap semiconductor, the wavelength of the newly generated photons is generally greater than the wavelength of the photons in the incident light. The newly generated photons may enter the adjacent photodiodes 101 through the optical path and generate optical crosstalk signals in these photodiodes 101.

[0187] In the embodiment of the present specification, an isolation trench 102 is provided on the interface between adjacent photodiodes 101, and the isolation trench 102 may be a grid structure, and the grid structure may be composed of a plurality of cross-shaped structures. The isolation trench 102 may be a deep trench (Deep Trench Isolation, DTI).

[0188] Exemplarily, the isolation trench 102 may be filled with a light-isolating structure, which is beneficial for preventing optical crosstalk between adjacent photodiodes 101 . The isolation trench 102 may include a filled oxide and a deposited layer formed by a metal material.

[0189] In the embodiment of this specification, the photoelectric sensor further includes:

[0190] The metal grid through hole is located in the non-grid node area of ​​the isolation groove 102, and the grid node area 107 is the area corresponding to the intersection in the grid structure formed by the isolation groove 102; the metal grid through hole is used to connect the back metal grid 105 with the metal layer in the isolation groove 102.

[0191] In the embodiment of the present specification, the non-grid node region in the isolation trench 102 is the region around the intersection in the grid structure formed by the isolation trench 102. The metal grid via (backside metalgrid via, BV1) in the non-grid node region in the isolation trench 102 is used to connect the back metal grid 105 with the metal layer in the isolation trench 102. The metal layer may be a tungsten metal layer. The metal grid via is provided in the non-grid node region in the isolation trench 102, and the metal grid via is disconnected at the grid node of the isolation trench 102, so as to prevent shape distortion at the grid node, thereby avoiding the process unstable region.

[0192] Since the deep grooves of the grid topology formed by DTI etching are prone to shape distortion at the nodes, the actual graphic size is smaller than the layout design size, which causes the risk of BV1 through-holes contacting silicon. In order to reduce process risks, it is usually chosen to disconnect BV1 at the DTI grid node when drawing the layout to avoid process unstable areas. This results in potential optical pathways between adjacent devices in the dielectric layer 106 under the backside metal grid 105 (BMG) near the DTI grid node, which may cause optical crosstalk between adjacent devices.

[0193] In order to solve this technical problem, the photoelectric sensor of this embodiment includes a polysilicon material layer 103 on the substrate 100 and a micro-ring filter structure 104 located in a target area of ​​the polysilicon material layer 103 .

[0194] In the embodiment of this specification, the polysilicon material is silicon nitride or a material doped with silicon nitride. The newly added polysilicon material layer 103 can passivate the surface of the photodiode 101 device to prevent oxygen and water vapor in the air from degrading the device performance.

[0195] In the embodiment of the present specification, the etching depth of the micro-ring filter structure 104 is less than or equal to the thickness of the polysilicon material layer 103. The micro-ring filter structure 104 may penetrate or not penetrate the polysilicon material layer 103. When the micro-ring filter structure 104 penetrates the polysilicon material layer 103, the etching depth of the micro-ring filter structure 104 is equal to the thickness of the polysilicon material layer 103; when the micro-ring filter structure 104 does not penetrate the polysilicon material layer 103, the etching depth of the micro-ring filter structure 104 is less than the thickness of the polysilicon material layer 103. At this time, the polysilicon material layer 103 has a passivation protection effect on the device.

[0196] In the embodiment of this specification, the absolute value of the difference between the thickness of the polysilicon material layer 103 and the width of the linear waveguide structure 1041 is within a preset value range.

[0197] Exemplarily, the preset numerical range can be set according to actual conditions, for example, the preset numerical range can be 0-100; by setting the preset numerical range, the optical anti-crosstalk performance of the linear waveguide structure 1041 is improved.

[0198] Exemplarily, the micro-ring filter of this embodiment is a passive device based on the optical waveguide coupling effect. When a ring waveguide is close to a straight waveguide, the photons in the straight waveguide will be coupled into the ring waveguide. The light coupled into the ring waveguide will be confined in the ring waveguide and perform a ring oscillation in the ring waveguide. The coupling efficiency, that is, the ratio of photons in the straight waveguide coupled into the ring waveguide, and the wavelength range of photons in which coupling can occur, will be regulated by the distance between the straight waveguide and the ring waveguide, and the width of the ring waveguide and the straight waveguide. Therefore, in theory, a micro-ring filter structure 104 can be designed so that all the light within a certain wavelength range in the straight waveguide is coupled into the ring waveguide, and the photons coupled into the ring waveguide will be gradually recombined without leaking to the outside world.

[0199] The micro-ring filter structure 104 includes a straight waveguide structure 1041 and a ring waveguide structure 1042, the target area includes a first area and a second area, the projection of the first area on the substrate 100 covers part of the isolation groove 102, and the distance between the second area and the first area is within a preset distance range; the straight waveguide structure 1041 is etched in the first area, and the ring waveguide structure 1042 is etched in the second area.

[0200] In the embodiment of this specification, photons within a specific wavelength range are extracted on the light incident surface and stored in the micro-ring filter structure 104 and gradually recombined to prevent these photons from propagating in the dielectric layer 106, thereby reducing optical crosstalk between adjacent photodiode 101 devices.

[0201] In the embodiment of the present specification, at least one micro-ring filter structure 104 is etched in the target area, and the target area corresponds to the spacing area between four adjacent photodiodes 101 in the substrate 100, and the four adjacent photodiodes 101 are located in four different directions. The size of each micro-ring filter structure 104 is the same or different.

[0202] In the embodiment of the present specification, four micro-ring filter structures 104 are etched in the target area, and the straight waveguide structures 1041 corresponding to each of the four micro-ring filter structures 104 form a cross-shaped structure. The cross-shaped structure forms four areas, and the annular waveguide structures 1042 corresponding to each of the four micro-ring filter structures 104 are located in at least one of the four areas.

[0203] In the embodiment of this specification, the ring waveguide structures 1042 corresponding to each of the four micro-ring filter structures 104 are located in the four regions.

[0204] Exemplarily, the polysilicon material layer 103 includes a plurality of the target regions, and the straight waveguide structures 1041 located in the same direction in any two adjacent target regions form a continuous straight line.

[0205] In the embodiment of this specification, the linear waveguide structures 1041 corresponding to the plurality of target regions form a linear structure, and the projection of the linear structure on the substrate 100 covers the isolation trench 102 .

[0206] In the embodiment of the present specification, the width of the linear waveguide structure 1041 in the micro-ring filter structure 104 is 800-2000 nanometers, and the width of the annular waveguide structure 1042 in the micro-ring filter structure 104 is 800-2000 nanometers.

[0207] In the embodiment of this specification, the width of the straight waveguide structure 1041 is equal to the width of the annular waveguide structure 1042 .

[0208] In the embodiment of this specification, the distance between the linear waveguide structure 1041 and the annular waveguide structure 1042 is 200-2000 nanometers.

[0209] In the embodiment of this specification, the photoelectric sensor further includes:

[0210] The dielectric layer 106 is located around the micro-ring filter structure 104 in the polysilicon material layer 103 , and the refractive index of the medium filled in the dielectric layer 106 is smaller than the refractive index of the polysilicon material in the polysilicon material layer 103 .

[0211] In the embodiment of this specification, the filling medium includes at least one of silicon oxide and silicon nitride.

[0212] The photoelectric sensor of this embodiment includes: a substrate, in which at least two photodiodes are arranged; an isolation groove located on the interface between adjacent photodiodes; a polysilicon material layer located on the substrate; a back metal grid located on the polysilicon material layer; and a micro-ring filter structure corresponding to the back metal grid is provided on the polysilicon material layer. In the present invention, a polysilicon material layer is newly added to perform surface passivation protection on the photodiode device to prevent oxygen and water vapor in the air from degrading the device performance; the micro-ring filter structure on the polysilicon material layer can reduce the optical crosstalk and electrical crosstalk between adjacent photodiodes.

[0213] The present invention further provides an electronic device, wherein the device includes the photoelectric sensor provided by the embodiment of the present invention.

[0214] The electronic device of this embodiment can be any electronic product or device with photoelectric sensing function, such as a mobile phone, a tablet computer, a laptop computer, a navigator, a camera, a camcorder, a sweeping robot, a virtual reality device, an augmented reality device, etc., and can also be any intermediate product including the aforementioned photoelectric sensor.

[0215] The photoelectric sensor of the embodiment of the present specification includes: a substrate, in which at least two photodiodes are arranged; an isolation groove located on the interface between adjacent photodiodes; a polysilicon material layer located on the substrate; a back metal grid located on the polysilicon material layer; and a micro-ring filter structure corresponding to the back metal grid is provided on the polysilicon material layer. In the present invention, a polysilicon material layer is newly added to perform surface passivation protection on the photodiode device to prevent oxygen and water vapor in the air from degrading the device performance; the micro-ring filter structure on the polysilicon material layer can reduce the optical crosstalk and electrical crosstalk between adjacent photodiodes.

[0216] The above disclosures are only several preferred embodiments of the present invention, which certainly cannot be used to limit the scope of the present invention. Therefore, equivalent changes made according to the claims of the present invention are still within the scope of the present invention.

Claims

1. A photoelectric sensor, characterized in that: include: A substrate having at least two photodiodes disposed therein; An isolation trench located at an interface between adjacent photodiodes; The isolation trench is used to isolate adjacent photodiodes; a polysilicon material layer located on the substrate; a back metal grid located on the polysilicon material layer; The polysilicon material layer has a micro-ring filter structure corresponding to the back metal grid.

2. The photoelectric sensor according to claim 1, characterized in that: The micro-ring filter structure is located in a target area of ​​the polysilicon material layer; the target area corresponds to a spacing area between adjacent photodiodes in the substrate, and a projection of the target area on the substrate at least covers a portion of the isolation trench.

3. The photoelectric sensor according to claim 2, characterized in that: The micro-ring filter structure includes a straight waveguide structure and a ring waveguide structure, the target area includes a first area and a second area, the projection of the first area on the substrate covers part of the isolation groove, and the distance between the second area and the first area is within a preset distance range; the straight waveguide structure is etched in the first area, and the ring waveguide structure is etched in the second area.

4. The photoelectric sensor according to claim 3, characterized in that: At least one of the micro-ring filter structures is etched in the target region, and the target region corresponds to a spacing region between four adjacent photodiodes in the substrate, and the four adjacent photodiodes are located in four different directions.

5. The photoelectric sensor according to claim 4, characterized in that: Four micro-ring filter structures are etched in the target area, and the straight waveguide structures corresponding to each of the four micro-ring filter structures form a cross-shaped structure. The cross-shaped structure forms four areas, and the annular waveguide structures corresponding to each of the four micro-ring filter structures are located in at least one of the four areas.

6. The photoelectric sensor according to claim 5, characterized in that: The ring waveguide structures corresponding to the four micro-ring filter structures are respectively located in the four regions.

7. The photoelectric sensor according to claim 3, characterized in that: The polysilicon material layer includes a plurality of the target regions, and the linear waveguide structures in any two adjacent target regions that are located in the same direction form a continuous straight line.

8. The photoelectric sensor according to claim 7, characterized in that: The linear waveguide structures corresponding to the plurality of target areas respectively form a linear structure, and the projection of the linear structure on the substrate covers the isolation groove.

9. The photoelectric sensor according to claim 3, characterized in that: The width of the linear waveguide structure in the microring filter structure is 800-2000 nanometers, and the width of the annular waveguide structure in the microring filter structure is 800-2000 nanometers.

10. The photoelectric sensor according to claim 9, characterized in that: The width of the linear waveguide structure is equal to the width of the annular waveguide structure.

11. The photoelectric sensor according to claim 9 or 10, characterized in that: The distance between the straight waveguide structure and the annular waveguide structure is 200-2000 nanometers.

12. The photoelectric sensor according to claim 11, characterized in that: The etching depth of the micro-ring filter structure is less than or equal to the thickness of the polysilicon material layer.

13. The photoelectric sensor according to claim 12, characterized in that: An absolute value of a difference between a thickness of the polysilicon material layer and a width of the linear waveguide structure is within a preset value range.

14. The photoelectric sensor according to claim 12, characterized in that: The polysilicon material is silicon nitride or a material doped with silicon nitride.

15. The photoelectric sensor according to claim 1, characterized in that: The photoelectric sensor also includes: A dielectric layer is located around the micro-ring filter structure in the polysilicon material layer, and the refractive index of the medium filled in the dielectric layer is smaller than the refractive index of the polysilicon material in the polysilicon material layer.

16. The photoelectric sensor according to claim 15, characterized in that: The filling medium includes at least one of silicon oxide and silicon nitride.

17. The photoelectric sensor according to claim 1, characterized in that: The photoelectric sensor also includes: A metal grid through hole located in a non-grid node area in the isolation groove, wherein the grid node area is an area corresponding to an intersection in the grid structure formed by the isolation groove; the metal grid through hole is used to connect the back metal grid with the metal layer in the isolation groove.

18. A method for forming a photoelectric sensor, characterized in that: The method comprises: providing a substrate in which at least two photodiodes are formed; An isolation groove is formed on the interface between adjacent photodiodes; the isolation groove is used to isolate adjacent photodiodes; forming a polysilicon material layer on the substrate; A back metal grid is formed on the polysilicon material layer; and a micro-ring filter structure corresponding to the back metal grid is provided on the polysilicon material layer.

19. The method according to claim 18, characterized in that The method further comprises: The micro-ring filter structure is formed in a target area of ​​the polysilicon material layer; the target area corresponds to a spacing area between adjacent photodiodes in the substrate, and a projection of the target area on the substrate at least covers a portion of the isolation trench.

20. The method according to claim 19, characterized in that The micro-ring filter structure includes a straight waveguide structure and a ring waveguide structure, the target area includes a first area and a second area, the projection of the first area on the substrate covers part of the isolation groove, and the distance between the second area and the first area is within a preset distance range; The forming of a micro-ring filter structure in a target region of the polysilicon material layer comprises: Etching the linear waveguide structure in the first region of the polysilicon material layer; The ring waveguide structure is etched in the second region of the polysilicon material layer.

21. The method according to claim 20, characterized in that The forming of the micro-ring filter structure in the target region of the polysilicon material layer comprises: forming at least one of the microring filter structures in a target region of the polysilicon material layer; The target region corresponds to a spacing region between four adjacent photodiodes in the substrate, and the four adjacent photodiodes are located in four different directions.

22. The method according to claim 21, characterized in that The forming of the micro-ring filter structure in the target region of the polysilicon material layer comprises: Etching four straight waveguide structures corresponding to the micro-ring filter structures in the target area of ​​the polysilicon material layer; the straight waveguide structures corresponding to the four micro-ring filter structures form a cross-shaped structure, and the cross-shaped structure forms four areas; A ring waveguide structure corresponding to each of the four micro-ring filter structures is etched in at least one of the four regions.

23. The method according to claim 22, characterized in that The etching of the ring waveguide structures corresponding to the four micro-ring filter structures in the regions of the four regions comprises: A ring waveguide structure corresponding to the micro-ring filter structure is etched in each of the four regions to form ring waveguide structures corresponding to each of the four micro-ring filter structures.

24. The method according to claim 20, characterized in that Before forming the micro-ring filter structure in the target region of the polysilicon material layer, the method further comprises: forming a plurality of the target regions on the polysilicon material layer; The forming of a micro-ring filter structure in a target region of the polysilicon material layer comprises: forming a patterned mask layer on the polysilicon material layer, wherein the size of the micro-ring filter structure is defined in the mask layer; Using the patterned mask layer as a mask, each target area in the polysilicon material layer is etched to form the micro-ring filter structure; wherein the straight waveguide structures located in the same direction in any two adjacent target areas form a continuous straight line.

25. The method according to claim 24, characterized in that The linear waveguide structures corresponding to the plurality of target regions respectively form a linear structure, and a projection of the linear structure on the substrate covers the isolation groove.

26. The method according to claim 20, characterized in that The width of the linear waveguide structure in the microring filter structure is 800-2000 nanometers, and the width of the annular waveguide structure in the microring filter structure is 800-2000 nanometers.

27. The method according to claim 26, characterized in that The width of the linear waveguide structure is equal to the width of the annular waveguide structure.

28. The method according to claim 26 or 27, characterized in that The distance between the straight waveguide structure and the annular waveguide structure is 200-2000 nanometers.

29. The method according to claim 28, characterized in that The etching depth of the micro-ring filter structure is less than or equal to the thickness of the polysilicon material layer.

30. The method according to claim 29, characterized in that An absolute value of a difference between a thickness of the polysilicon material layer and a width of the linear waveguide structure is within a preset value range.

31. The method according to claim 29, characterized in that The polysilicon material is silicon nitride or a material doped with silicon nitride.

32. The method according to claim 19, characterized in that After forming the micro-ring filter structure in the target region of the polysilicon material layer, the method further comprises: A dielectric layer is formed around the micro-ring filter structure in the polysilicon material layer, and the refractive index of the medium filled in the dielectric layer is smaller than the refractive index of the polysilicon material in the polysilicon material layer.

33. The method according to claim 32, characterized in that The filling medium includes at least one of silicon oxide and silicon nitride.

34. The method according to claim 19, characterized in that Before forming a back metal grid on the polysilicon material layer, the method further comprises: A metal grid through hole is etched in a non-grid node area in the isolation groove, wherein the grid node area is an area corresponding to an intersection in a grid structure formed by the isolation groove; the metal grid through hole is used to connect the back metal grid with the metal layer in the isolation groove.

35. An electronic device, characterized in that: The device comprises a photoelectric sensor as described in any one of claims 1-17.

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