A chip, circuit board and mobile device

Abstract

This application provides a chip, circuit board, and mobile device, relating to the field of charging technology. It addresses the problems of poor integration, high cost, and low software development efficiency associated with current discrete solutions for mobile phone power transfer protocol chips and switching charging chips. The chip includes: a charging sub-chip and a communication sub-chip; a first communication pin and a second communication pin, electrically connected to the communication sub-chip for communication between the communication sub-chip and the charger; and a first power transfer interrupt pin, also electrically connected to the communication sub-chip, for reporting a first power transfer interrupt signal to the processor. This first power transfer interrupt signal is used to report the operating status of the communication sub-chip and changes in that status to the processor.

Description

Technical Field

[0001] The embodiments of this application relate to the field of charging technology, and in particular to a chip, circuit board and mobile device. Background Technology

[0002] With the rapid development of mobile communication technology and the rapid iteration of mobile phones, mobile phone manufacturers have increasingly higher requirements for the cost and integration of mobile phone chips. Battery management system chips, which face fierce competition among domestic manufacturers, are particularly sensitive to cost and integration. For example... Figure 1 As shown, the battery management system mainly includes a switching charging chip, a power delivery (PD) protocol chip, and a fuel gauge chip. The switching charging chip typically operates in a switching mode, within a wide input voltage range, and has USB (Universal Serial Bus) port type recognition capability. It supports power path management and supports four charging stages for the mobile phone battery: trickle charging, pre-charging, constant current, and constant voltage. USB-PD is a power supply standard based on USB Type-C. With the widespread adoption of USB Type-C, mainstream mobile phones need to support USB-PD fast charging solutions. The power delivery protocol chip refers to the physical layer chip that supports power delivery protocol communication. Both the switching charging chip and the PD protocol chip can communicate with the mobile phone processor via the Inter-Integrated Circuit (I2C) bus. For example, the PD protocol chip can communicate with the Type-C connector via CC1 and CC2.

[0003] Currently, the main solutions for switching charging chips and power transfer protocol chips on the mobile phone side are discrete solutions. Specifically, such as... Figure 1 As shown, the mobile phone processor can control the power transfer protocol chip to implement the power control protocol communication request to the charging head to adjust the charging voltage VBUS, and control the switching charging chip to charge the battery, such as... Figure 1 As shown in VBAT, the system can also be powered, such as... Figure 1 As shown in VSYS. The discrete approach will bring the following problems:

[0004] (1) The switching charging chip and the power transmission protocol chip need to be manufactured, packaged, and tested separately, resulting in higher wafer costs, packaging costs, and testing costs. Furthermore, both the switching charging chip and the power transmission protocol chip require external components, leading to a larger board area required for the discrete solution. Therefore, the chip manufacturing cost and board-level cost of the discrete solution are both higher.

[0005] (2) The power transmission protocol chip and the switching charging chip may be products from different suppliers or products from different foundries of the same supplier. This may cause the parameters of the two chips to deviate significantly due to the influence of temperature, process and other conditions, resulting in poor consistency. This will lead to insufficient reliability of the discrete solution.

[0006] (3) The function of the power transmission protocol chip, such as requesting the charging head to flexibly output charging power, usually has close software interaction logic with the switching charging chip. However, the discrete solution requires debugging the software drivers of the two chips separately, and then merging them for debugging after the separate debugging is completed. This will bring a large amount of software work, increase debugging time, reduce efficiency, and increase the investment of human resources. Summary of the Invention

[0007] This application provides a chip, circuit board, and mobile device that can solve the problems of poor integration, high cost, and low software development efficiency of current discrete solutions for mobile phone power transmission protocol chips and switching charging chips.

[0008] To achieve the above objectives, the embodiments of this application adopt the following technical solutions:

[0009] In a first aspect, a chip is provided, the chip comprising:

[0010] Charging sub-chip and communication sub-chip;

[0011] The first communication pin and the second communication pin are electrically connected to the communication sub-chip and are used for communication between the communication sub-chip and the charger.

[0012] The first power transmission interrupt pin is electrically connected to the communication sub-chip and is used by the communication sub-chip to report the first power transmission interrupt signal to the processor. The first power transmission interrupt signal is used to report the working status of the communication sub-chip and changes in the working status to the processor.

[0013] In one possible design, the chip may also include:

[0014] The bus is electrically connected to the charging sub-chip and the communication sub-chip, and is used for communication between the charging sub-chip and the communication sub-chip and the processor. The processor assigns different addresses to the charging sub-chip and the communication sub-chip respectively.

[0015] Optionally, the communication sub-chip does not support the function of powering cables with electronic tags (VCONN function).

[0016] Furthermore, the chip may also include:

[0017] The first power input pin is electrically connected to the charger and the charging sub-chip.

[0018] The first power output pin and the second power output pin are electrically connected to the charging sub-chip. The first power output pin is used for the charging sub-chip to supply power to the system, and the second power output pin is used for the charging sub-chip to charge the battery.

[0019] The first charging interrupt pin is electrically connected to the charging sub-chip and is used by the charging sub-chip to report a first charging interrupt signal to the processor. The first charging interrupt signal is used to report the working status of the charging sub-chip and changes in the working status to the processor.

[0020] In a second aspect, a circuit board is provided, the circuit board comprising: a processor, and a chip as described in any design of the first aspect, the processor being used to control the operation of the chip.

[0021] In one possible design, the circuit board has a first surface mount position and a second surface mount position;

[0022] The first patch position is left unused, while the second patch position is used to mount the chip of this application.

[0023] Optionally, the circuit board may also include:

[0024] The first 0-ohm resistor is used to electrically connect the first communication pin and the charger.

[0025] The second 0-ohm resistor is used to electrically connect the second communication pin and the charger.

[0026] The third 0-ohm resistor is used to electrically connect the first power transfer interrupt pin to the processor.

[0027] In another possible design, the circuit board has a first surface mount position and a second surface mount position;

[0028] The first patch position is used to set the communication chip, and the second patch position is used to set the charging chip. The charging chip and the charging sub-chip have the same function, and the communication chip and the communication sub-chip have the same function.

[0029] Optionally, the charging chip includes:

[0030] The second power input pin is electrically connected to the charger.

[0031] The third power output pin and the fourth power output pin are used for the charging chip to power the system and for the charging chip to charge the battery.

[0032] The second charging interrupt pin, electrically connected to the processor, is used by the charging chip to report a second charging interrupt signal to the processor. This second charging interrupt signal is used to report the operating status of the charging chip and changes in that status to the processor.

[0033] The communication chip includes:

[0034] The third and fourth communication pins are electrically connected to the charger.

[0035] The second power transfer interrupt pin is electrically connected to the processor and is used by the communication chip to report a second power transfer interrupt signal to the processor. This second power transfer interrupt signal is used to report the operating status of the communication chip and changes in that status to the processor.

[0036] The circuit board also includes:

[0037] The third surface mount position is used to set the first 0-ohm resistor, which is used to electrically connect the first communication pin and the charger.

[0038] The fourth surface mount position is used to set the second 0-ohm resistor, which is used to electrically connect the second communication pin and the charger.

[0039] The fifth surface mount position is used to set the third 0-ohm resistor, which is used to electrically connect the first power transfer interrupt pin to the processor.

[0040] The third, fourth, and fifth patch positions are unused.

[0041] Thirdly, a mobile device is provided, the mobile device including a circuit board as described in any design of the second aspect.

[0042] Based on the chip, circuit board, and mobile device provided in the embodiments of this application, the power transmission protocol chip and the switching charging chip can be integrated into the same chip and some pins can be reused, which can significantly reduce chip cost (15%) and packaging cost (30%), effectively save the mobile phone layout area and the number of peripheral devices, reduce the layout area by 15%, and significantly improve the software debugging efficiency of the switching charging chip and the power transmission protocol chip. Attached Figure Description

[0043] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. Some specific embodiments of this application will be described in detail below with reference to the accompanying drawings in an exemplary and non-limiting manner. The same reference numerals in the drawings designate the same or similar parts or components. Those skilled in the art should understand that these drawings are not necessarily drawn to scale. In the drawings:

[0044] Figure 1 This is a schematic diagram of the structure of a mobile phone battery management system;

[0045] Figure 2 A pin diagram of a chip provided for an embodiment of this application;

[0046] Figure 3 This is a pinout diagram of the mainstream 3A / 3.78A QFN-24 switching charging chip;

[0047] Figure 4 Application block diagram of the chip provided in the embodiments of this application;

[0048] Figure 5 This is a schematic diagram of a circuit board structure provided in an embodiment of this application. Detailed Implementation

[0049] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are merely some, not all, of the embodiments of the present application. All other embodiments obtained by those skilled in the art based on the embodiments of the present application without creative effort should fall within the scope of protection of the present application.

[0050] In this article, the term "and / or" is merely a description of the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can represent three situations: A exists alone, A and B exist simultaneously, and B exists alone.

[0051] The terms "first" and "second," etc., used in the specification and drawings of this application are used to distinguish different objects or to distinguish different treatments of the same object, rather than to describe a specific order of objects.

[0052] It should be noted that in the embodiments of this application, the words "exemplary" or "for example" are used to indicate examples, illustrations, or explanations. Any embodiment or design scheme described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design schemes. Specifically, the use of the words "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0053] Figure 2 This is a pin diagram of a chip provided in an embodiment of this application. Figure 2 As shown, the chip includes: a charging sub-chip and a communication sub-chip. Figure 2 (not shown in the middle).

[0054] First communication pin ( Figure 2 The middle pin is marked CC1, pin 8) and the second communication pin ( Figure 2 The first and second communication pins (marked CC2, pin 10) are electrically connected to the communication sub-chip and are used for communication between the communication sub-chip and the charger.

[0055] First power transfer interrupt pin ( Figure 2 The first power transfer interrupt pin (marked as nINT2 / STAT, pin 4) is electrically connected to the communication sub-chip and is used by the communication sub-chip to report the first power transfer interrupt signal to the processor. The first power transfer interrupt signal is used to report the working status of the communication sub-chip and changes in the working status to the processor. The processor can adjust the operation of the charger through the communication sub-chip according to the first power transfer interrupt signal, such as changing the output power of the charger to meet the charging / power supply requirements.

[0056] Among them, the charging sub-chip can be a chip (die) that supports switching charging function, such as a chip chip with the function of 3A / 3.78A QFN-24 switching charging chip, and the communication sub-chip can be a chip chip that communicates with the charging head through a power transmission protocol.

[0057] The following section uses the example of how to integrate the relevant functions of a communication chip into a switching charging chip to achieve the functions of the chip provided in the embodiments of this application, to explain in detail the chip provided in the embodiments of this application.

[0058] Figure 3 This is a pinout diagram of the mainstream 3A / 3.78A QFN-24 switching charger chip. Figure 3 As shown, pins 8 and 10 are non-connection (NC), meaning they are spare pins and not used. Therefore, combined with... Figure 2 Pins 8 and 10 can be reused to implement the first and second communication pins of the power transfer protocol. Figure 2 The pins are labeled CC1 and CC2, which are pins 8 and 10 respectively. In other words, this embodiment uses two NC pins to implement the functions of the first and second communication pins of the power transfer protocol chip. Since the two NC pins are not defined in mainstream solutions, implementing the CC function has no impact on other functions of the switching charging chip. Furthermore, the two NC pins are symmetrically positioned, making it easy to implement mobile phone hardware layout and compatible with existing switching charging solutions.

[0059] Furthermore, because the power transfer protocol-related functions require frequent operations from the phone's processor during high-power charging, in order to minimize the use of the phone's processor resources, these functions need to report to the phone's processor using an independent interrupt. Therefore, they cannot be synchronized with the interrupt pin of the switching charging chip (i.e., the charging interrupt pin). Figure 2 The middle is marked as nINT1, Figure 3 The pin 7 (marked as INT) is multiplexed to avoid mutual interference. In other words, the indicator light driver pin (…) can be used… Figure 2 The middle label is nINT2 / STAT. Figure 3 The pin 4, labeled STAT, functions as the first power transfer interrupt pin. Since the STAT pin in the pin definition of the mainstream 3A / 3.78A QFN-24 switching charging chip is an open-drain output used for indicator light driving, and mainstream mobile phones have eliminated indicator light designs, and the power transfer interrupt also requires an open-drain output, the STAT pin can be reused as the power transfer interrupt pin. The output port circuit does not need to be modified; only the internal logic circuit needs to be adjusted through factory programming. Furthermore, the separate setting of the power transfer interrupt pin and the charging interrupt pin allows the mobile phone processor to locate the event requiring processing with less resource consumption. Similar to the software implementation of discrete solutions, it simplifies software design, requires less modification, and is easier to debug, resulting in higher development efficiency and lower cost.

[0060] In one possible design, the chip may also include:

[0061] bus( Figure 2 The connection relationship is not shown in the text; please refer to the following text for details. Figure 5 Examples include the I2C bus, which is electrically connected to the charging and communication sub-chips and is used for communication between the charging and communication sub-chips and the processor. The processor assigns different addresses to the charging and communication sub-chips, such as I2C slave addresses.

[0062] Currently, mainstream mobile phones use a switching charging chip and a power transmission protocol chip, with both chips sharing the same I2C bus and having their own secondary I2C address. Considering software versatility, this application's embodiment assigns two secondary I2C addresses to both the charging sub-chip and the communication sub-chip.

[0063] Furthermore, the USB Type-C Port Controller (TCPC) protocol specifies the functions and addresses of registers 0-6F for USB port control and communication. In order to meet the requirements of the TCPC protocol and the universality of driver software, the embodiments of this application still implement the functions and definitions of these registers in accordance with the TCPC protocol.

[0064] Optionally, the communication sub-chip does not support the function of powering cables with electronic tags (VCONN function).

[0065] Current power transfer protocol chips typically integrate the VCONN function (a 5V 1A power supply for powering the E-MARK (electronic identification tag for USB Type-C cables)) and the VCONN pin to power the E-MARK chip in high-power charging cables (supporting currents above 3A) or to power docking stations. PD protocol chips have a wide range of applications, including mobile phones, chargers, laptops, and other charging devices supporting power transfer protocols. While VCONN is essential in applications like chargers and laptops, for specific applications like mobile phone charging, the E-MARK chip in high-power charging cables is usually powered by the VCONN in the charger, eliminating the need for a VCONN on the phone side. In mobile phone hardware design, the VCONN pin is typically left floating or grounded (idle). Furthermore, the VCONN function defined in the power transfer protocol is only for power supply; its functional definition is not coupled with other functions. Therefore, this application's embodiment can remove the VCONN function for mobile phone-side charging scenarios to achieve optimal cost and pin definition compatibility (the pin utilization of the QFN-24 package is already 100%).

[0066] Furthermore, Figure 4 This is an application block diagram of the chip provided in an embodiment of this application. This block diagram represents the application of the chip with a simplified power transfer protocol function, as provided in an embodiment of this application. Figure 4 As shown, the chip may also include:

[0067] First power input pin ( Figure 4 (marked as VBUS), the first power input pin is electrically connected to the charger and charging sub-chip;

[0068] First power output pin ( Figure 4The middle is marked as VSYS) and the second power output pin ( Figure 4 The first power output pin (marked as VBAT) and the second power output pin are electrically connected to the charging sub-chip. The first power output pin is used by the charging sub-chip to supply power to the system, and the second power output pin is used by the charging sub-chip to charge the battery.

[0069] First charging interrupt pin ( Figure 4 The first charging interrupt pin, marked nINT1, is electrically connected to the charging sub-chip and is used to charge the processor ( Figure 4 The first charging interrupt signal is reported by the host (e.g., the mobile phone processor). The first charging interrupt signal is used to report the working status and changes in the working status of the charging sub-chip to the processor. The processor can adjust the operation of the charger through the charging sub-chip according to the first charging interrupt signal, such as changing the output power of the charger to meet the charging / power supply requirements.

[0070] The VBUS pin is the power input pin (first power input pin) of the charging sub-chip, receiving output power from the Type-C connector through the Over Voltage Protection (OVP) module; the VSYS pin is the output pin for powering the system (first power output pin); the VBAT pin is the output pin for powering the battery (second power output pin); nINT1 is the interrupt pin for charging-related functions (first charging interrupt pin); nINT2 is the interrupt pin for power transfer-related functions (first power transfer interrupt pin); CC1 and CC2 are the communication pins between the mobile phone and the Type-C connector (first communication pin and second communication pin). This embodiment of the application implements power supply to the system and battery charging through the Type-C port via the power path from VBUS to VSYS and then to VBAT, and implements power transfer protocol communication through the CC1 and CC2 pins to request the charging head to adjust the VBUS output power.

[0071] This application provides a circuit board, which includes: a processor, and as shown in the following embodiments: Figure 2 or Figure 4 The chip shown is controlled by a processor, which controls the chip's operation, such as powering the system and / or charging the battery.

[0072] Figure 5 This is a schematic diagram of a circuit board structure provided in an embodiment of this application. The circuit board can be based on the chip integration scheme provided in this embodiment, or it can implement a discrete chip scheme (switching charging chip + power transmission protocol chip) to achieve hardware compatibility and ensure supply chain stability.

[0073] In one possible design scheme, such as Figure 5As shown, the circuit board has a first surface mount position and a second surface mount position;

[0074] The first surface mount position is left unused, while the second surface mount position is used to mount the chip of this application. The term "mount" can be understood as a fixed connection, such as soldering, or a variable connection, the purpose of which is to mount the chip of this application on the circuit board so that the chip of this application can establish an electrical connection with the processor and other necessary electronic components mounted on the circuit board.

[0075] Optionally, the circuit board may also include:

[0076] First 0 ohm resistor ( Figure 5 The first 0-ohm resistor (marked R1) is used to connect the first communication pin CC1 to the charger ( Figure 5 Electrical connection (marked as Type C connector);

[0077] Second 0-ohm resistor ( Figure 5 The second 0-ohm resistor (marked R2) is used to electrically connect the second communication pin CC2 to the charger.

[0078] Third 0-ohm resistor ( Figure 5 The third 0-ohm resistor, marked R3, is used to interrupt the first power transfer pin ( Figure 5 (marked as nINT2) and processor electrical connection ( Figure 5 (Marked as being related to the mobile phone processor).

[0079] In other words, if the chip provided in this application embodiment is used, the power transmission protocol chip does not need to be surface-mounted (i.e., the first surface-mount position is idle). At this time, the first power input pin of the chip in this application ( Figure 5 The pin marked VBUS at the second surface mount position is electrically connected to the Type-C connector to receive power. The CC1 and CC2 pins at the second surface mount position are connected to the CC1 and CC2 pins of the Type-C connector via two 0-ohm resistors R1 and R2. The nINT2 pin is connected to the INT_PD port of the mobile phone processor via a 0-ohm resistor R3. In other words, the chip provided in this embodiment can be used as the first supply material to achieve the functions of the switching charging chip and power transfer protocol chip in existing solutions, thereby improving integration, reducing costs, and increasing software development efficiency.

[0080] In another possible design, the circuit board has a first surface mount position and a second surface mount position;

[0081] The first patch position is used to set the communication chip, and the second patch position is used to set the charging chip. The charging chip and the charging sub-chip have the same function, and the communication chip and the communication sub-chip have the same function.

[0082] Optionally, the charging chip includes:

[0083] Second power input pin ( Figure 5 The second patch position is marked as the VBUS pin, and the second power input pin is connected to the charger ( Figure 5 Electrical connection (marked as Type C connector);

[0084] Third power output pin ( Figure 5 Not shown in the image, please refer to the following: Figure 1 VSYS) and the fourth power output pin ( Figure 5 Not shown in the image, please refer to the following: Figure 1 The third power output pin (VBAT) is used by the charging chip to power the system, and the fourth power output pin is used by the charging chip to charge the battery.

[0085] Second charging interrupt pin ( Figure 5 The second charging interrupt pin, marked as nINT1, is electrically connected to the processor. Figure 5 The charging chip (connected to the INT-CHG pin of the mobile phone processor) is used to report a second charging interrupt signal to the processor. This second charging interrupt signal reports the charging chip's operating status and changes in that status to the processor. The processor can adjust the charger's operation based on this second charging interrupt signal, such as changing the charger's output power to meet charging / power supply requirements.

[0086] The communication chip includes:

[0087] Third communication pin ( Figure 5 The first patch position is marked as pin CC1) and the fourth communication pin ( Figure 5 The first patch position is marked as pin CC2), the third communication pin and the fourth communication pin are electrically connected to the charger;

[0088] Second power transfer interrupt pin ( Figure 5 The second power transfer interrupt pin (marked as INT) is electrically connected to the processor (e.g., to the INT_PD pin of the mobile phone processor). It is used by the communication chip to report a second power transfer interrupt signal to the processor. This signal reports the operating status of the communication chip and changes in that status. The processor can then adjust the charger's operation based on the second power transfer interrupt signal, such as changing the charger's output power to meet charging / power supply requirements.

[0089] The circuit board also includes:

[0090] Third patch position ( Figure 5The third patch position (marked as R1) is used to set the first 0-ohm resistor, which is used to electrically connect the first communication pin and the charger.

[0091] Fourth patch position ( Figure 5 The fourth patch position (marked R2) is used to set the second 0-ohm resistor, which is used to electrically connect the second communication pin and the charger.

[0092] Fifth patch position ( Figure 5 The fifth patch position (marked as R3) is used to set the third 0-ohm resistor, which is used to electrically connect the first power transfer interrupt pin to the processor.

[0093] The third, fourth, and fifth patch positions are unused.

[0094] In other words, a discrete approach can also be used as the second supply material. A mainstream 3A / 3.78A QFN-24 switching charging chip is placed at the second surface mount position, and a PD protocol chip is placed at the first surface mount position. R1, R2, and R3 are not surface mountable. The CC1 and CC2 pins of the PD protocol chip are connected to the CC1 and CC2 pins of the Type-C connector, and the INT pin of the PD protocol chip is connected to the INT_PD port of the mobile phone processor. Furthermore, the PD protocol chip and the switching charging chip can also be connected via a bus (…). Figure 5 (The bus, marked as I2C, communicates with the processor.)

[0095] In summary, two sets of materials can be compatible on the same mobile phone hardware board using either of the above methods (integration or discrete). This can significantly reduce costs when using the integrated chip solution provided in this application, and can also be used as a discrete solution when the chip supply provided in this application is insufficient, thereby improving the security and reliability of the supply chain.

[0096] This application provides a mobile device, which includes, as described above... Figure 5 The circuit board shown is capable of achieving hardware compatibility.

[0097] Among them, mobile devices refer to electronic devices equipped with rechargeable batteries that support fast charging, such as mobile phones, tablets, etc., and can apply the technical solutions provided in the embodiments of this application to achieve fast charging.

[0098] Based on the chip, circuit board, and mobile device provided in this application, the power transmission protocol chip and the switching charging chip can be integrated into the same chip and some pins can be reused, which can significantly reduce chip cost (15%) and packaging cost (30%), effectively save the mobile phone layout area and the number of peripheral devices, reduce the layout area by 15%, and significantly improve the software debugging efficiency of the switching charging chip and the PD protocol chip.

[0099] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A chip, characterized in that, include: Charging sub-chip and communication sub-chip; A first communication pin and a second communication pin are electrically connected to the communication sub-chip for communication between the communication sub-chip and the charger. A first power transmission interrupt pin is electrically connected to the communication sub-chip and is used by the communication sub-chip to report a first power transmission interrupt signal to the processor. The first power transmission interrupt signal is used to report the working status of the communication sub-chip and changes in the working status to the processor. A bus, which is electrically connected to the charging sub-chip and the communication sub-chip, is used for the charging sub-chip and the communication sub-chip to communicate with the processor, wherein the processor assigns different addresses to the charging sub-chip and the communication sub-chip respectively; Also includes: A first power input pin is electrically connected to the charger and the charging sub-chip. A first power output pin and a second power output pin are electrically connected to the charging sub-chip. The first power output pin is used by the charging sub-chip to supply power to the system, and the second power output pin is used by the charging sub-chip to charge the battery. A first charging interrupt pin is electrically connected to the charging sub-chip and is used by the charging sub-chip to report a first charging interrupt signal to the processor. The first charging interrupt signal is used to report the working status and changes in the working status of the charging sub-chip to the processor.

2. The chip according to claim 1, characterized in that, The communication sub-chip does not support the function of powering cables with electronic tags.

3. A circuit board, characterized in that, include: A processor, and a chip as described in any one of claims 1-2, wherein the processor is used to control the operation of the chip.

4. The circuit board according to claim 3, characterized in that, The circuit board is provided with a first mounting position and a second mounting position; The first patch position is left unused, while the second patch position is used to mount the chip.

5. The circuit board according to claim 4, characterized in that, The circuit board also includes: The first 0-ohm resistor is used to electrically connect the first communication pin and the charger. The second 0-ohm resistor is used to electrically connect the second communication pin and the charger. A third 0-ohm resistor is used to electrically connect the first power transfer interrupt pin and the processor.

6. The circuit board according to claim 5, characterized in that, The circuit board is provided with a first mounting position and a second mounting position; The first patch position is used to house the communication chip, and the second patch position is used to house the charging chip. The charging chip has the same function as the charging sub-chip, and the communication chip has the same function as the communication sub-chip.

7. The circuit board according to claim 6, characterized in that, The charging chip includes: The second power input pin is electrically connected to the charger. The third power output pin and the fourth power output pin are used by the charging chip to supply power to the system and the fourth power output pin to charge the battery. A second charging interrupt pin, electrically connected to the processor, is used by the charging chip to report a second charging interrupt signal to the processor. This second charging interrupt signal reports the operating status of the charging chip and any changes in that status to the processor. The communication chip includes: The third communication pin and the fourth communication pin are electrically connected to the charger; A second power transmission interrupt pin, electrically connected to the processor, is used by the communication chip to report a second power transmission interrupt signal to the processor. This second power transmission interrupt signal is used to report the operating status of the communication chip and changes in that status to the processor. The circuit board also includes: The third patch position is used to set a first 0-ohm resistor, which is used to electrically connect the first communication pin and the charger. The fourth patch position is used to set a second 0-ohm resistor, which is used to electrically connect the second communication pin and the charger. The fifth surface mount position is used to set a third 0-ohm resistor, which is used to electrically connect the first power transfer interrupt pin and the processor. The third patch position, the fourth patch position, and the fifth patch position are unused.

8. A mobile device, characterized in that, Includes the circuit board as described in any one of claims 3-7.

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