Driving circuit repair device and display panel

Abstract

The present application belongs to the field of display drive technology, and specifically relates to a drive circuit repair device and a display panel, wherein the repair device includes a first repair line, which is arranged between the first gate drive circuit and the display area; a second repair line, which is arranged between the second gate drive circuit and the display area; and a third repair line, which is arranged between the first repair line and the display area; the signal repair circuit is used to repair the drive signal introduced on the first repair line when an abnormality occurs in the n-th level GOA unit of the second gate drive circuit, so that the repaired drive signal drives the n-th scan line on the second side of the display area through the second repair line, and at the same time drives the n-th scan line on the first side of the display area through the third repair line; the present application realizes the repair of the abnormal GOA unit while ensuring the consistency of the repair signal, thereby improving the repair accuracy.

Description

Technical Field

[0001] The present disclosure belongs to the field of display drive technology, and particularly relates to a drive circuit repair device and a display panel. Background Art

[0002] The gate drive circuit used in the display panel contains multiple cascaded GOA (Gate on Array) units. The output signal generated by each GOA unit not only provides the turn-on voltage for the pixel unit in the current row, but also serves as the pull-up and pull-down signals for the previous and next stage GOA units. Therefore, the abnormality of a single GOA unit not only affects the display output of the current stage, but also affects the output of the stage transmission signal, causing the output of the remaining GOA units to be abnormal, resulting in display abnormalities of the entire screen and affecting the production yield of the display panel.

[0003] It can be seen that how to repair the abnormal gate drive circuit is a problem that needs to be solved urgently. Summary of the Invention

[0004] The present application provides a driving circuit repair device and a display panel to solve the problem of repairing an abnormal gate driving circuit. The present application repairs the abnormal GOA unit while ensuring the consistency of the repair signal and improving the repair accuracy.

[0005] In a first aspect, the present application provides a driving circuit repair device, which is applied to a display panel, wherein the display panel includes a display area, a first gate driving circuit located on a first side of the display area, a second gate driving circuit located on a second side of the display area, and a plurality of scan lines; the repair device includes: a first repair line, which is arranged between the first gate driving circuit and the display area and is arranged to cross the plurality of scan lines at different layers; a second repair line, which is arranged between the second gate driving circuit and the display area and is arranged to cross the plurality of scan lines at different layers; a third repair line, which is arranged between the first repair line and the display area and is arranged to cross the plurality of scan lines at different layers Setting; a signal repair circuit, a first end of the signal repair circuit is electrically connected to the first repair line, and a second end of the signal repair circuit is electrically connected to the second repair line and the third repair line respectively, for repairing the driving signal introduced on the first repair line when an abnormality occurs in the n-th level GOA unit of the second gate drive circuit, so that the repaired driving signal drives the n-th scan line on the second side of the display area through the second repair line, and at the same time drives the n-th scan line on the first side of the display area through the third repair line; wherein, the driving signal introduced on the first repair line is the driving signal output by the n-th level GOA unit of the first gate drive circuit.

[0006] Optionally, the repair device also includes: a fourth repair line, which is arranged between the second repair line and the display area and is arranged in a different layer and cross-arranged with the multiple scan lines; the fourth repair line is also electrically connected to the first end of the signal repair circuit; the signal repair circuit is also used to repair the drive signal introduced on the second repair line when an abnormality occurs in the n-th level GOA unit of the first gate drive circuit, so that the repaired drive signal drives the n-th scan line on the first side of the display area through the first repair line, and at the same time drives the n-th scan line on the second side of the display area through the fourth repair line; wherein, the drive signal introduced on the second repair line is the drive signal output by the n-th level GOA unit of the second gate drive circuit.

[0007] Optionally, the signal repair circuit includes: a first repair unit, the input end of the first repair unit serves as the first end of the signal repair circuit, and the output end of the first repair unit serves as the second end of the signal repair circuit, and is used to repair the driving signal introduced on the repair line connected to the input end of the first repair unit; a second repair unit, the input end of the second repair unit serves as the second end of the signal repair circuit, and the output end of the second repair unit serves as the first end of the signal repair circuit, and is used to repair the driving signal introduced on the repair line connected to the input end of the second repair unit.

[0008] Optionally, the first repair unit and the second repair unit include: a comparison amplifier, a MOS tube, an isolation resistor and an adjustment resistor; the non-inverting input terminal of the comparison amplifier is electrically connected to the first repair line or the second repair line through the isolation resistor, and the inverting input terminal of the comparison amplifier is connected to the reference voltage input terminal; a MOS tube, the control terminal of the MOS tube is connected to the output terminal of the comparison amplifier, the first terminal of the MOS tube is connected to the clock signal output terminal, and the second terminal of the MOS tube is electrically connected to the third repair line or the fourth repair line through the adjustment resistor.

[0009] Optionally, the first repair unit and the second repair unit include: a chopping module, the first end of the chopping module serves as the input end of the repair unit, and the second end of the chopping module is connected to the clock signal output end, for chopping the input drive signal; a noise reduction module, the input end of the noise reduction module is connected to the third end of the chopping module, for reducing the noise of the signal output by the chopping module; an amplification module, the input end of the amplification module is connected to the output end of the noise reduction module, for amplifying the signal output by the noise reduction module; a voltage limiting module, the output end of the voltage limiting module is connected to the high level end of the amplification module, for controlling the high potential output by the amplification module; an adjustment module, the input end of the adjustment module is connected to the output end of the amplification module, the output end of the adjustment module serves as the output end of the repair unit, for adjusting the falling edge time of the output signal of the amplification module.

[0010] Optionally, the chopping module includes: a first switching tube, the control end of the first switching tube is the first end of the chopping module, the first end of the first switching tube is the second end of the chopping module, and the second end of the first switching tube is the third end of the chopping module.

[0011] Optionally, the noise reduction module includes: a second switch tube, wherein the control end of the second switch tube is connected to the first end of the chopping module, and the first end of the second switch tube is connected to the first power supply output end; a third switch tube, wherein the control end of the third switch tube is connected to the control end of the second switch tube, the first end of the third switch tube is connected to the second end of the second switch tube, and the second end of the third switch tube is connected to the second power supply output end; and a fourth switch tube, wherein the control end of the fourth switch tube is connected to the first end of the third switch tube, the first end of the fourth switch tube is connected to the output end of the chopping module, and the second end of the fourth switch tube is connected to the second power supply output end; wherein the first end of the fourth switch tube serves as the output end of the noise reduction module.

[0012] Optionally, the amplification module includes: a first amplifier, a first resistor and a second resistor; the non-phase input terminal of the first amplifier is connected to the output terminal of the noise reduction module, the inverting input terminal of the first amplifier is grounded through the first resistor, the inverting input terminal of the first amplifier is also connected to the output terminal of the first amplifier through the second resistor, the high level terminal of the first amplifier is connected to the output terminal of the voltage limiting module, the low level terminal of the first amplifier is connected to the second power supply output terminal, and the output terminal of the first amplifier serves as the output terminal of the amplification module.

[0013] Optionally, the voltage limiting module includes: a third resistor, a first end of the third resistor is connected to the first power supply output end, and a second end of the third resistor is connected to the high-level end of the amplification module; a fourth resistor, a first end of the fourth resistor is connected to the second end of the third resistor, and a second end of the fourth resistor is connected to the second power supply output end.

[0014] Optionally, the adjustment module includes: a fifth resistor, a first end of the fifth resistor is connected to the output end of the amplification module, and a second end of the fifth resistor serves as the output end of the adjustment module; and a capacitor, a first end of the capacitor is connected to the second end of the fifth resistor, and the second end of the capacitor is connected to the second power supply output end.

[0015] Optionally, the noise reduction module includes: a second amplifier, the inverting input terminal of the second amplifier is connected to the first terminal of the chopping module, the non-inverting input terminal of the second amplifier is connected to the reference voltage input terminal, the high level terminal of the second amplifier is connected to the first power supply output terminal, and the low level terminal of the second amplifier is connected to the second power supply terminal; a fifth switch tube, the control terminal of the fifth switch tube is connected to the output terminal of the second amplifier, the first end of the fifth switch tube is connected to the third end of the chopping module, the second end of the fifth switch tube is connected to the second power supply output terminal, and the first end of the fifth switch tube serves as the output end of the noise reduction module.

[0016] In a second aspect, the present application provides a display panel comprising a display area and a non-display area, wherein the display area comprises a plurality of scan lines; the non-display area comprises a first gate driving circuit located on a first side of the display area and a second gate driving circuit located on a second side of the display area, and the non-display area further comprises at least one set of driving circuit repair devices.

[0017] The technical solution provided by this application has at least the following beneficial effects:

[0018] The present application sets multiple repair lines on both sides of the display area. When there is an abnormality in the n-th level GOA unit of the second gate drive circuit, the driving signal output by the normal side GOA unit is introduced into the signal repair circuit through the repair line on the normal side for repair processing, so that the repaired driving signal drives the n-th scan line through the repair lines on both sides of the display area at the same time, so that the driving signals input to both ends of the n-th scan line are the same signal output from the signal repair circuit, thereby achieving repair of the abnormal GOA unit while ensuring the consistency of the repair signal and improving the repair accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The accompanying drawings are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification, are used to explain the principles of the present disclosure. Obviously, the drawings described below are only some embodiments of the present disclosure, and those skilled in the art can derive other drawings based on these drawings without inventive effort.

[0020] Figure 1 Shown is a structural schematic diagram of a drive circuit repair device provided in an embodiment of the present application.

[0021] Figure 2 Shown is a first repair schematic diagram provided in an embodiment of the present application.

[0022] Figure 3 Shown is a second repair schematic diagram provided in an embodiment of the present application.

[0023] Figure 4 Shown is a third repair schematic diagram provided in an embodiment of the present application.

[0024] Figure 5 Shown is a fourth repair schematic diagram provided in an embodiment of the present application.

[0025] Figure 6 Shown is a structural schematic diagram of another driving circuit repair device provided in an embodiment of the present application.

[0026] Figure 7 Shown is a circuit diagram of a GOA unit provided in an embodiment of the present application.

[0027] Figure 8 Shown is a structural schematic diagram of a signal repair circuit provided in an embodiment of the present application.

[0028] Figure 9 Shown is a circuit diagram of the first repair unit provided in an embodiment of the present application.

[0029] Figure 10 Shown is a circuit diagram of the second repair unit provided in an embodiment of the present application.

[0030] Figure 11 Shown is a schematic diagram of input and output waveforms of a chopping module provided in an embodiment of the present application.

[0031] Figure 12 Shown is a schematic diagram of input and output waveforms of a noise reduction module provided in an embodiment of the present application.

[0032] Figure 13 Shown is a schematic diagram of input and output waveforms of an amplification module provided in an embodiment of the present application.

[0033] Figure 14 Shown is a schematic diagram of input and output waveforms of a regulation module provided in an embodiment of the present application.

[0034] Figure 15 Shown is a circuit diagram of the third repair unit provided in an embodiment of the present application.

[0035] Description of reference numerals:

[0036] 10. Display panel; 100. Drive circuit repair device; 110. First repair line; 120. Second repair line; 130. Signal repair circuit; 131. First repair unit; 132. Second repair unit; 140. Third repair line; 150. Fourth repair line; 160. Stage transmission repair line; 170. Laser connection point; U0. Comparator amplifier; T0. MOS transistor; R0. Isolation resistor; VR. Adjustment resistor;

[0037] 1311, chopping module; 1312, noise reduction module; 1313, amplification module; 1314, voltage limiting module; 1315, regulation module; T1, first switching tube; T2, second switching tube; T3, third switching tube; T4, fourth switching tube; T5, fifth switching tube; R1, first resistor; R2, second resistor; R3, third resistor; R4, fourth resistor; R5, fifth resistor; C1, capacitor; OP1, first amplifier; OP2, second amplifier;

[0038] 200 , display area; 300 , first gate drive circuit; 400 , second gate drive circuit; 500 , scan line; 600 , PCB board. DETAILED DESCRIPTION

[0039] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this application will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art.

[0040] In addition, described feature, structure or characteristic can be combined in one or more embodiments in any suitable manner.In the following description, many specific details are provided so as to provide a full understanding of the embodiments of the present application. However, it will be appreciated by those skilled in the art that the technical scheme of the present application can be put into practice without one or more of the specific details, or other methods, components, devices, steps etc. can be adopted. In other cases, known methods, devices, implementations or operations are not shown or described in detail to avoid blurring the various aspects of the application.

[0041] The present application is further described below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the technical features involved in the various embodiments of the present application described below can be combined with each other as long as they do not conflict with each other. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be understood as limiting the present application.

[0042] In a first aspect, the present application provides a gate drive circuit, specifically including the following embodiments:

[0043] Figure 1 FIG. 1 is a schematic structural diagram of a drive circuit repair device provided in an embodiment of the present application; FIG. Figure 1 As shown, the driving circuit repair device 100 is applied to a display panel 10, which includes a display area 200 and a non-display area 200. The non-display area 200 includes a first gate driving circuit 300 located on a first side of the display area 200, a second gate driving circuit 400 located on a second side of the display area 200, and a PCB board 600 located below the display area 200. The display area 200 includes pixel circuits arranged in an array, and the pixel circuits are respectively connected to the first gate driving circuit 300 and the second gate driving circuit 400 on both sides through a plurality of scan lines 500. In addition, the first gate driving circuit 300 includes a plurality of cascaded GOA units, and the second gate driving circuit 400 includes a plurality of cascaded GOA units. The ends of the plurality of scan lines 500 are electrically connected to the plurality of cascaded GOA units in the first gate driving circuit 300 and the plurality of cascaded GOA units in the second gate driving circuit 400, respectively. The first side of the display area 200 can be the left side of the display area 200, and the second side of the display area 200 can be the right side of the display area 200.

[0044] like Figure 1 As shown, the driving circuit repair device 100 in this embodiment includes a first repair line 110, which is arranged between the first gate driving circuit 300 and the display area 200 and is arranged in a different layer and cross-arranged with multiple scanning lines 500; wherein, the different layer crossing arrangement means crossing but not connected, that is, the first repair line 110 and the scanning line 500 between the first gate driving circuit 300 and the display area 200 are arranged on different wiring layers, but there is an intersection in the orthographic projections on the wiring layer; in order to ensure the isolation of the first repair line 110 and the scanning line 500, an insulating layer is set between the two wiring layers for isolation, and the electrical connection between the first repair line 110 and the corresponding scanning line 500 can be achieved by welding the intersection.

[0045] The driving circuit repair device 100 in this embodiment further includes a second repair line 120, which is disposed between the second gate driving circuit 400 and the display area 200 and is intersected with the plurality of scanning lines 500 at different layers. The second repair line 120 and the first repair line 110 differ only in their locations and are disposed in the same manner, which will not be further described herein.

[0046] The driving device in this embodiment also includes a signal repair circuit 130 arranged on the PCB board 600. The first end of the signal repair circuit 130 is electrically connected to the first repair line 110, and the second end of the signal repair circuit 130 is electrically connected to the second repair line 120. The signal repair circuit 130 is used to amplify the driving signal introduced on the second repair line 120 and then repair the abnormal level in the first gate driving circuit 300 through the first repair line 110 when an abnormality occurs in the GOA unit of any level in the first gate driving circuit 300; and is also used to amplify the driving signal introduced on the first repair line 110 and then repair the abnormal level in the second gate driving circuit 400 through the second repair line 120 when an abnormality occurs in the GOA unit of any level in the second gate driving circuit 400.

[0047] In one embodiment, taking the case where the nth stage GOA unit in the second gate driving circuit 400 is abnormal as an example, the specific repairing example of the driving circuit repairing device 100 is as follows: Figure 2 As shown: first, the scan line 500 between the second repair line 120 and the second gate drive circuit 400 is cut by laser; secondly, the intersection of the first repair line 110 and the n-th scan line 500 is welded, and the intersection of the second repair line 120 and the n-th scan line 500 is welded, so that the drive signal output by the n-th level GOA unit in the first gate drive circuit 300 is introduced to the first repair line 110 to the signal repair circuit 130; then, due to the voltage drop between the first repair line 110 and the second repair line 120, the signal repair circuit 130 amplifies the drive signal on the first repair line 110 and then outputs it to the second repair line 120, so that the drive signal on the second repair line 120 drives the n-th scan line 500, thereby repairing the n-th level GOA unit in the second gate drive circuit 400.

[0048] Among them, the purpose of cutting off the connection between the first repair line 110 and the second gate drive circuit 400 is to prevent the abnormal signal output by the GOA unit from interfering with the first repair line 110. It can be cut off under the premise that there is no interference signal; in addition, there is no need to cut off the connection when repairing the stage transmission through the signal on the repair line. The cutting effect and method in the following embodiments are the same as here and will not be repeated later.

[0049] In another embodiment, taking the case where the nth stage GOA unit in the first gate driving circuit 300 is abnormal as an example, a specific repair example of the driving circuit repairing device 100 is as follows: Figure 3 As shown, first, the scan line 500 between the first repair line 110 and the first gate drive circuit 300 is cut by laser. Then, the intersection of the first repair line 110 and the n-th scan line 500 is welded, and the intersection of the second repair line 120 and the n-th scan line 500 is welded, so that the driving signal output by the n-th level GOA unit in the second gate drive circuit 400 is introduced to the second repair line 120 to the signal repair circuit 130. Then, due to the voltage drop between the first repair line 110 and the second repair line 120, the signal repair circuit 130 amplifies the driving signal on the second repair line 120 and then outputs it to the first repair line 110, so that the driving signal on the first repair line 110 drives the n-th scan line 500, thereby repairing the n-th level GOA unit in the first gate drive circuit 300 and reducing the difference in the driving signals on both sides of the n-th scan line 500, thereby meeting the image repair accuracy of the display panel 10.

[0050] It should also be noted that, after repairing the driving signal of the abnormal level GOA unit, the present application can repair the level transmission signal of the abnormal GOA unit through the driving signal. The specific repair method is explained in the following embodiments.

[0051] In the present application, a repair line is provided on each side of the display area 200. When an abnormality occurs in any level of GOA unit, the driving signal output by the normal side GOA unit is introduced into the signal repair circuit 130 through the repair line on the normal side. The signal repair circuit 130 amplifies the introduced driving signal and then drives the corresponding scan line 500 through the repair line on the abnormal side. This can repair the abnormal GOA unit while reducing the difference in the driving signals on both sides to meet the screen display effect.

[0052] In one embodiment of the present application, the repair device also includes a third repair line 140, which is arranged between the first repair line 110 and the display area 200 and cross-arranged with multiple scan lines 500 in different layers; the third repair line 140 is also electrically connected to the second end of the signal repair circuit 130.

[0053] It should be noted that in order to further maintain the synchronization of the driving signals on both sides, this embodiment uses the second repair line 120 to repair the abnormal level in the second gate driving circuit 400 using the driving signal output by the signal repair circuit 130, and also uses the third repair line 140 to simultaneously drive the scanning line 500 of the corresponding level in the first gate driving circuit 300 using the driving signal output by the signal repair circuit 130, so that the driving signals input to both ends of the nth scanning line 500 are the same signal output from the signal repair circuit 130, thereby ensuring the consistency of the repair signal and improving the repair accuracy.

[0054] For example, taking the nth stage GOA unit in the second gate driving circuit 400 as an example, the repair example is as follows: Figure 4 As shown, first, the scan line 500 between the second repair line 120 and the second gate driving circuit 400 is cut by laser, and the scan line 500 between the first repair line 110 and the third repair line 140 is cut. Then, the intersection of the first repair line 110 and the n-th scan line 500 is welded, the intersection of the second repair line 120 and the n-th scan line 500 is welded, and the intersection of the third repair line 140 and the n-th scan line 500 is welded. In this way, the drive signal output by the n-th stage GOA unit in the first gate driving circuit 300 is introduced to the first repair line 110 to the signal repair circuit 130. Then, the signal repair circuit 130 amplifies the drive signal on the first repair line 110 and outputs it to the second repair line 120 and the third repair line 140. This allows the drive signal on the second repair line 120 and the drive signal on the third repair line 140 to drive the n-th scan line 500 simultaneously, thereby maintaining the consistency of the repair signal.

[0055] In another embodiment of the present application, the repair device further includes: a fourth repair line 150, which is arranged between the second repair lines and the display area 200 and cross-arranged with multiple scan lines 500 in different layers; the fourth repair line 150 is also electrically connected to the first end of the signal repair circuit 130.

[0056] It should be noted that, taking the abnormality of the nth stage GOA unit in the first gate driving circuit 300 as an example, the repair example is as follows: Figure 5As shown, first, the scan line 500 between the first repair line 110 and the first gate driving circuit 300 is cut by laser, and the scan line 500 between the second repair line 120 and the fourth repair line 150 is cut. Secondly, the intersection of the first repair line 110 and the n-th scan line 500 is welded, the intersection of the second repair line 120 and the n-th scan line 500 is welded, and the intersection of the fourth repair line 150 and the n-th scan line 500 is welded. In this way, the drive signal output by the n-th stage GOA unit in the second gate driving circuit 400 is introduced to the second repair line 120 to the signal repair circuit 130. Then, the signal repair circuit 130 amplifies the drive signal on the second repair line 120 and outputs it to the first repair line 110 and the fourth repair line 150. This allows the drive signal on the first repair line 110 and the drive signal on the fourth repair line 150 to drive the n-th scan line 500 simultaneously, thereby maintaining the consistency of the repair signals.

[0057] In practical applications, the driving circuit repairing device 100 may include only the third repairing line 140 , or only the fourth repairing line 150 , or both the third repairing line 140 and the fourth repairing line 150 .

[0058] It should also be noted that Figure 4 and Figure 5 The normal side of the abnormal level of the GOA is connected to the repair line through a laser method, led out to the PCB board 600, and then reintroduced into the normal side and abnormal side of the abnormal level for driving after enhanced amplification by the signal repair circuit 130; the present application can also drive the normal side and abnormal side of the abnormal level through the adjacent output signals of the abnormal level. The wiring method of the repair line is the same, but the laser connection point 170 is different; therefore, based on the wiring structure of the driving circuit repair device 100 provided by the present application, by combining the laser connection point 170 in different ways, a variety of repair methods and application scenarios can be met.

[0059] In one embodiment of the present application, the first gate drive circuit 300 and the second gate drive circuit 400 include multiple GOA units, the GOA units include a level transmission output end and a driving output end, and the repair device also includes: at least one level transmission repair line 160, the first end of the level transmission repair line 160 is arranged at a different layer and crosses the level transmission output end, and the second end of the level transmission repair line 160 is arranged at a different layer and crosses the driving output end.

[0060] It should be noted that the GOA unit generally includes a driving output terminal for outputting a driving signal and a level transmission output terminal for outputting a level transmission signal. The driving signal and the level transmission signal have the same waveform and phase, but have different output ports and functions. Figure 6 and Figure 7As shown, when both the level transmission output and the driving output of the n-th level GOA unit are abnormal, that is, Figure 7 When both transistors T2 and T5 are abnormal, the n-th level GOA unit cannot normally output the driving signal and the level transmission signal, affecting the normal output of other level GOA units; here, this embodiment sets a level transmission repair line 160 in each GOA unit, so that one end of the level transmission repair line 160 is set to cross the level transmission output end in a different layer, and the other end is set to cross the driving output end in a different layer; when the two ends of the level transmission repair line are laser welded, the driving signal successfully repaired by the repair line can be repaired to the level transmission output end through the level transmission repair line 160.

[0061] like Figure 7 As shown, the transistors T1, T2 and T5 in the GOA unit are functional units. The level transfer signal FN generated by the transistor T5 is responsible for the level transfer relationship (precharge + pull-down) of the GOA unit. The driving signal GN generated by the transistor T2 is responsible for entering the display area 200 and driving the TFT in the pixel circuit to open or close. The Q point signal generated by the transistor T1 is the gate signal of the driving signal GN generated by the transistor T2. The function of the transistor T3 is to pull down the Q point, and the function of the transistor T4 is to pull down the driving signal G. N; assuming that transistor T5 on the left (left and right sides) experiences an abnormality and cannot generate the level transfer signal FN, the gates of transistors T1, T3, and T4 will also experience abnormalities, affecting the level transfer, and light and dark lines will appear in the display area 200. FN and GN are the same signal, the only difference being that FN does not enter the display area 200 and only serves as a level transfer function. The X in G(NX) / F(NX) indicates that the X stages preceding the GN stage are responsible for precharging the Q point, and the Y in F(N+Y) indicates that the Y stages following the GN stage are responsible for pulling down the Q point and the GN signal.

[0062] The repair method of this embodiment is to disconnect the three-pole signals (CK signal, QN signal, FN signal) of transistor T5, and by welding the two laser connection points 170 on the level transmission repair line 160, short-circuit the level transmission output end and the driver output end. This ensures that the repaired driving signal replaces the level transmission signal for level transmission, thereby achieving the effect of repairing the driving signal and the level transmission signal at the same time.

[0063] Therefore, the driving circuit repairing device 100 of the present application can not only repair the driving signal of the gate driving circuit through the repair line, but also repair the level transmission signal in the gate driving circuit through the level transmission repair line 160 .

[0064] In one embodiment of the present application, the repair device also includes a plurality of laser connection points 170, which are arranged at the intersections of the first repair line 110, the second repair line 120, the third repair line 140 and the fourth repair line 150 with the plurality of scan lines 500, the intersections of the level transmission repair line 160 and the level transmission output end, and the intersections of the level transmission repair line 160 and the drive output end; it should be noted that by welding the laser connection points 170, the short circuit between the repair line at the intersection and the scan line 500 or the output port can be achieved.

[0065] In one embodiment, if Figure 8 As shown, the signal repair circuit 130 includes: a first repair unit 131 and a second repair unit 132, the input end of the first repair unit 131 is electrically connected to the first repair line 110, and the output end of the first repair unit 131 is electrically connected to the second repair line 120, for amplifying the signal on the first repair line 110; the input end of the second repair unit 132 is electrically connected to the second repair line 120, and the output end of the second repair unit 132 is electrically connected to the first repair line 110, for amplifying the signal on the second repair line 120.

[0066] It should be noted that the input end of the first repair unit 131 and the output end of the second repair unit 132 can serve as the first end of the signal repair circuit 130, and the output end of the first repair unit 131 and the input end of the second repair unit 132 can serve as the second end of the signal repair circuit 130; this is equivalent to the first repair unit 131 amplifying the driving signal on the first repair line 110 and outputting it to the second repair line 120, and the second repair unit 132 amplifying the driving signal on the second repair line 120 and outputting it to the first repair line 110.

[0067] Figure 9 FIG. 1 is a circuit diagram of a first repair unit provided in an embodiment of the present application; FIG. Figure 9 As shown, the first repair unit 131 and / or the second repair unit 132 of this embodiment include: a comparison amplifier U0 and a MOS transistor T0, wherein the non-inverting input terminal of the comparison amplifier U0 is electrically connected to any repair line, and the inverting input terminal of the comparison amplifier U0 is connected to the reference voltage input terminal; the control terminal of the MOS transistor T0 is connected to the output terminal of the comparison amplifier U0, the first terminal of the MOS transistor T0 is connected to the clock signal output terminal, and the second terminal of the MOS transistor T0 is electrically connected to another repair line.

[0068] It should be noted that the comparison amplifier includes a non-inverting input terminal, an inverting input terminal, a high level terminal, a low level terminal and an output terminal. The non-inverting input terminal is connected to a repair line, the inverting input terminal is connected to the reference voltage input terminal, the high level terminal is connected to the high level output terminal, and the low level terminal is connected to the low level output terminal; wherein the high level is equal to the VGH in the driving signal output by the GOA unit, and the low level is equal to the VGL in the driving signal output by the GOA unit.

[0069] The comparator amplifier in this embodiment uses the rising edge of the drive signal GN as a trigger high level and the falling edge of the drive signal GN as a trigger low level. That is, when the input drive signal GN is greater than the reference voltage Vref, the comparator amplifier outputs a high level VGH, and when the input drive signal GN is less than the reference voltage Vref, the comparator amplifier outputs a low level VGL. In addition, the signal output by the comparator amplifier is chopped by the N-type MOS transistor T0, so that the falling edge of the signal output from the second terminal of the MOS transistor T0 is aligned with the falling edge of the abnormal level CK signal, avoiding the trailing phenomenon of the falling edge and preventing the unrepairable mischarging problem.

[0070] It should also be noted that the clock signal output terminal connected to the first terminal of the MOS transistor T0 is the timing signal corresponding to the abnormal-level GOA unit. It can be understood that a multiple-choice dial is connected to the first terminal of the MOS transistor T0, one terminal of the dial is connected to multiple timing signals, and the other terminal of the dial is connected to the first terminal of the MOS transistor, so that the dial output can be adjusted according to the timing signal corresponding to the abnormal level. The corresponding CK signal.

[0071] In one embodiment of the present application, the first repair unit 131 and / or the second repair unit 132 further include: an isolation resistor R0, a first end of the isolation resistor R0 is electrically connected to any one of the repair lines, and a second end of the isolation resistor R0 is connected to the non-inverting input end of the comparison amplifier U0.

[0072] It should be noted that the isolation resistor R0 in this embodiment has a signal isolation function to prevent the internal components of the comparator amplifier from pulling down the input signal.

[0073] In one embodiment of the present application, the first repair unit 131 and / or the second repair unit 132 further include: an adjusting resistor VR, the first end of the adjusting resistor VR is connected to the second end of the MOS tube T0, and the second end of the adjusting resistor VR is electrically connected to another repair line.

[0074] It should be noted that the regulating resistor VR in this embodiment is a sliding rheostat, which can adjust the falling edge time of the output signal to adjust the waveform to be close to the adjacent level, reduce the difference with the adjacent level, and improve the display effect of the panel.

[0075] In addition, this embodiment can also adjust the amplitude of the Gout signal output by the signal repair circuit by adjusting the high level voltage VGH, and adjust the width of the Gout signal output by the signal repair circuit by adjusting the reference voltage Vref.

[0076] Therefore, the signal repair circuit provided in this embodiment can adjust parameters in real time according to different application scenarios, thereby being compatible with various repair requirements.

[0077] Figure 10 FIG. 1 is a circuit diagram of a second repair unit provided in an embodiment of the present application; FIG. Figure 10 As shown, the first repair unit and the second repair unit include: a chopping module 1311, a noise reduction module 1312, an amplifying module 1313, a voltage limiting module 1314 and an adjusting module 1315; the first end of the chopping module 1311 serves as the input end of the repair unit, and the second end of the chopping module 1311 is connected to the clock signal output end, for chopping the input drive signal; the input end of the noise reduction module 1312 is connected to the third end of the chopping module 1311, for reducing the noise of the signal output by the chopping module 1311; the input end of the amplifying module 1313 is connected to the output end of the noise reduction module 1312, for amplifying the signal output by the noise reduction module 1312; the output end of the voltage limiting module is connected to the high level end of the amplifying module 1313, for controlling the high potential output by the amplifying module 1313; the input end of the adjusting module 1315 is connected to the output end of the amplifying module 1313, and the output end of the adjusting module 1315 serves as the output end of the repair unit, for adjusting the falling edge time of the signal output by the amplifying module 1313.

[0078] It should be noted that if Figure 10 As shown, the chopping module 1311 receives the driving signal Gn and the clock signal CK and outputs the g1 signal. The g1 signal is affected by the combined effect of Gn and CK, which limits the falling edge position and prevents the output waveform from causing repair level mischarging; the noise reduction module 1312 receives the Gn signal and outputs the p1 signal, performs noise reduction processing on the g1 signal to prevent the noise from being transmitted to the amplification module 1313 and thus generating severe noise; the amplification module 1313 receives and amplifies the g1 signal and outputs the g2 signal. The amplification factor can adjust the waveform to be closer to a square wave; the voltage limiting module 1314 outputs a voltage for adjusting the high-level voltage of g2; the adjustment module 1315 adds appropriate loading to the g2 signal to adjust the Gre signal to be closer to the normal signal.

[0079] In one embodiment, the chopping module 1311 includes: a first switch tube T1, the control end of the first switch tube T1 is the first end of the chopping module 1311, the first end of the first switch tube T1 is the second end of the chopping module 1311, and the second end of the first switch tube T1 is the third end of the chopping module 1311.

[0080] Specifically, the chopping module 1311 is mainly composed of a first switch tube T1 of an N-type MOS tube, whose gate is connected to Gn, that is, Gout on the normal side of the abnormal level, and the drain is connected to the CK signal. The CK needs to select the same CK signal used by the abnormal level, such as Figure 11 The waveforms of Gn, CK, and the output g1 signal are shown. The output g1 signal is essentially identical to Gn except for the falling edge. However, its falling edge is aligned with the falling edge of the CK signal, thus avoiding a phase shift in the output caused by the falling edge and preventing mischarging of the repair row.

[0081] In one embodiment, the noise reduction module 1312 includes: a second switch tube T2, a third switch tube T3 and a fourth switch tube T4, wherein the control end of the second switch tube T2 is connected to the first end of the chopping module 1311, and the first end of the second switch tube T2 is connected to the first power output end; the control end of the third switch tube T3 is connected to the control end of the second switch tube T2, the first end of the third switch tube T3 is connected to the second end of the second switch tube T2, and the second end of the third switch tube T3 is connected to the second power output end; the control end of the fourth switch tube T4 is connected to the first end of the third switch tube T3, the first end of the fourth switch tube T4 is connected to the output end of the chopping module 1311, and the second end of the fourth switch tube T4 is connected to the second power output end; wherein the first end of the fourth switch tube T4 serves as the output end of the noise reduction module 1312.

[0082] It should be noted that the second switch tube T2 in the noise reduction module 1312 is a P-type MOS tube, and the third switch tube T3 and the fourth switch tube T4 are N-type MOS tubes. The second switch tube T2 and the third switch tube T3 form an inverter, that is, a NOT gate circuit, wherein the high and low potentials of the inverter are the first power supply voltage Vgh and the second power supply voltage VSS, which can generate a p1 signal with a voltage opposite to Gn. With the p1 signal as the gate, the g1 signal is subjected to noise reduction processing via the fourth switch tube T4, and is pulled down to VSS during noise reduction, thereby preventing the Gn signal from being amplified and transmitted in the subsequent circuit during the extraction process and the noise at the first switch tube T1; wherein, the waveforms of the input Gn and the output p1 signal are as follows: Figure 12 shown.

[0083] In one embodiment, the amplification module 1313 includes: a first amplifier OP1, a first resistor R1, and a second resistor R2; the non-inverting input terminal of the first amplifier OP1 is connected to the output terminal of the noise reduction module 1312, the inverting input terminal of the first amplifier OP1 is grounded through the first resistor R1, and the inverting input terminal of the first amplifier OP1 is also connected to the output terminal of the first amplifier OP1 through the second resistor R2, the high level terminal of the first amplifier OP1 is connected to the output terminal of the voltage limiting module, the low level terminal of the first amplifier OP1 is connected to the second power supply output terminal, and the output terminal of the first amplifier OP1 serves as the output terminal of the amplification module 1313.

[0084] It should be noted that the non-inverting input terminal of the first amplifier OP1 in the amplification module 1313 is connected to the g1 signal, and the output terminal is the g2 signal. The g2 signal is connected in series to VSS through the first resistor R1 and the second resistor R2. The inverting input terminal is connected to the potential between the first resistor R1 and the second resistor R2. In this way, an OP amplifier is formed. Therefore, the amplifier amplifies the g1 signal by (R1+R2) / R1 times to obtain the g2 signal. The voltage limit of the OP device is Vlim and VSS respectively, so the high level of g2 will be limited to Vlim. Therefore, the higher the amplification factor, the closer the g2 waveform is to a square wave. The waveforms of the signals g1 and g2 before and after amplification are as follows: Figure 13 shown

[0085] In one embodiment, the voltage limiting module 1314 includes: a third resistor R3 and a fourth resistor R4; the first end of the third resistor R3 is connected to the first power supply output end, and the second end of the third resistor R3 is connected to the high level end of the amplification module 1313; the first end of the fourth resistor R4 is connected to the second end of the third resistor R3, and the second end of the fourth resistor R4 is connected to the second power supply output end.

[0086] It should be noted that the Vgh voltage outputs the Vlim signal through the third resistor R3, and Vlim is connected to VSS via the fourth resistor R4. Therefore, through the voltage division of the third resistor R3 and the fourth resistor R4, Vlim can be adjusted between VSS and Vgh to control the high potential of the OP output, thereby avoiding bright lines caused by excessively high high potential of the output waveform and weak lines caused by excessively low high potential.

[0087] In one embodiment, the adjustment module 1315 includes: a fifth resistor R5 and a capacitor C1, the first end of the fifth resistor R5 is connected to the output end of the amplification module 1313, and the second end of the fifth resistor R5 serves as the output end of the adjustment module 1315; the first end of the capacitor C1 is connected to the second end of the fifth resistor R5, and the second end of the capacitor C1 is connected to the second power supply output end.

[0088] It should be noted that the g2 signal is connected in series to the output terminal through the fifth resistor R5 to obtain the Gre signal, and Gre is connected to the capacitor C1 to VSS to form an RC delay for g2 to adjust the waveform to be close to the normal signal. Figure 14 The figure shows the g1 and Gre signal waveforms before and after RC loading. The added RC loading prevents display differences at the same normal level due to differences in falling time.

[0089] It can be seen that the settings of the first resistor R1 and the second resistor R2 in this embodiment can adjust the amplification factor, so that the output waveform is closer to a square wave and the high potential area is wider; the settings of the third resistor R3 and the fourth resistor R4 can adjust the high potential value of the output; the settings of the fifth resistor R5 and the capacitor C1 can adjust the output loading; therefore, the adjustment of these three dimensions makes the Gre waveform completely comparable to the waveform of the normal drive signal, so as to drive the abnormal level normally.

[0090] Figure 15 FIG. 1 is a circuit diagram of a third repair unit provided in an embodiment of the present application; FIG. Figure 15 As shown, the noise reduction module 1312 includes: a second amplifier OP2 and a fifth switch tube T5; the inverting input terminal of the second amplifier OP2 is connected to the first terminal of the chopping module 1311, the non-inverting input terminal of the second amplifier OP2 is connected to the reference voltage input terminal, the high level terminal of the second amplifier OP2 is connected to the first power supply output terminal, and the low level terminal of the second amplifier OP2 is connected to the second power supply terminal; the control terminal of the fifth switch tube T5 is connected to the output terminal of the second amplifier OP2, the first terminal of the fifth switch tube T5 is connected to the third terminal of the chopping module, the second terminal of the fifth switch tube T5 is connected to the second power supply output terminal, and the first terminal of the fifth switch tube T5 serves as the output terminal of the noise reduction module 1312.

[0091] Figure 15 Another embodiment of the present application is shown. Except for the noise reduction module 1312, the configuration of the remaining modules is the same as Figure 10 Similarly, the noise reduction module 1312 of this embodiment includes a second amplifier OP2 and an N-type MOS transistor fifth switch T5, wherein the inverting input terminal of the second amplifier OP2 is the Gn signal, and the non-inverting input terminal is the reference voltage Vref. The voltage limiters of the second amplifier OP2 are set to Vgh and VSS respectively, and the output terminal is the p1 signal. Therefore, this connection mode is an inverting amplifier, and the waveform output logic relationship is the same as Figure 12 The output waveform is similar to the above inverter, but it is a strictly square wave, which can also achieve the function of the inverter mentioned above. The Vref voltage should be as low as possible, so that the rising edge of the square wave is earlier and the falling edge is later. This prevents the rising and falling edges of the g1 signal from being clipped by the p1 signal, thereby affecting the g1 signal width and causing display defects. In addition, the Vref voltage is also between Vgh and VSS, so another voltage limiting module 1314 can be added here to provide it with a potential.

[0092] In the second aspect, the present application provides a display panel including a display area and a non-display area, the display area including multiple scanning lines; the non-display area including a first gate driving circuit located on the first side of the display area and a second gate driving circuit located on the second side of the display area, and the non-display area also includes at least one set of driving circuit repair devices of the above embodiments.

[0093] It should be noted that in the present application, if any one-level GOA unit in the display panel needs to be repaired, a set of driving circuit repair devices is required; if any two-level GOA units in the display panel need to be repaired, two sets of driving circuit repair devices are required, and so on. The corresponding number of driving circuit repair devices is set according to the size and yield of the display panel.

[0094] Furthermore, the terms "first," "second," "third," etc., are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Thus, a feature specified as "first," "second," or "third" may explicitly or implicitly include one or more of the features. In the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0095] In the description of this specification, the reference terms "some embodiments", "exemplarily", etc. mean that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification and features of different embodiments or examples without contradiction.

[0096] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application. Therefore, any changes or modifications made in accordance with the claims and description of the present application should fall within the scope of the patent application.

Claims

1. A driving circuit repair device, characterized in that: Applied to a display panel, the display panel includes a display area, a first gate driving circuit located on a first side of the display area, a second gate driving circuit located on a second side of the display area, and a plurality of scan lines; the driving circuit repair device includes: A first repair line is provided between the first gate driving circuit and the display area and is arranged to cross the plurality of scanning lines in a different layer; A second repair line is provided between the second gate driving circuit and the display area and is arranged to cross the plurality of scanning lines in a different layer; a third repairing line, arranged between the first repairing line and the display area, and arranged to cross the plurality of scanning lines in a different layer; A signal repair circuit, wherein a first end of the signal repair circuit is electrically connected to the first repair line, and a second end of the signal repair circuit is electrically connected to the second repair line and the third repair line, respectively, and is used to repair the drive signal introduced on the first repair line when an abnormality occurs in the n-th level GOA unit of the second gate drive circuit, so that the repaired drive signal drives the n-th scan line on the second side of the display area through the second repair line, and at the same time drives the n-th scan line on the first side of the display area through the third repair line; wherein the drive signal introduced on the first repair line is the drive signal output by the n-th level GOA unit of the first gate drive circuit.

2. The driving circuit repair device according to claim 1, characterized in that: The driving circuit repair device further includes: a fourth repair line, disposed between the second repair line and the display area, and intersecting the plurality of scan lines in a different layer; the fourth repair line is also electrically connected to the first end of the signal repair circuit; The signal repair circuit is also used to repair the driving signal introduced on the second repair line when an abnormality occurs in the n-th level GOA unit of the first gate driving circuit, so that the repaired driving signal drives the n-th scan line on the first side of the display area through the first repair line, and at the same time drives the n-th scan line on the second side of the display area through the fourth repair line; wherein, the driving signal introduced on the second repair line is the driving signal output by the n-th level GOA unit of the second gate driving circuit.

3. The driving circuit repair device according to claim 2, characterized in that: The signal repair circuit includes: a first repair unit, wherein an input end of the first repair unit serves as a first end of the signal repair circuit, and an output end of the first repair unit serves as a second end of the signal repair circuit, and is configured to perform repair processing on a drive signal introduced on a repair line connected to the input end of the first repair unit; A second repair unit, the input end of the second repair unit serves as the second end of the signal repair circuit, and the output end of the second repair unit serves as the first end of the signal repair circuit, and is used to repair the driving signal introduced on the repair line connected to the input end of the second repair unit.

4. The driving circuit repair device according to claim 3, characterized in that: The first repair unit and the second repair unit include: Comparator amplifier, MOS tube, isolation resistor and adjustment resistor; The non-inverting input terminal of the comparison amplifier is electrically connected to the first repair line or the second repair line through the isolation resistor, and the inverting input terminal of the comparison amplifier is connected to the reference voltage input terminal; A MOS transistor, wherein the control end of the MOS transistor is connected to the output end of the comparison amplifier, the first end of the MOS transistor is connected to the clock signal output end, and the second end of the MOS transistor is electrically connected to the third repair line or the fourth repair line through the adjustment resistor.

5. The driving circuit repair device according to claim 3, characterized in that: The first repair unit and the second repair unit include: a chopping module, wherein a first end of the chopping module serves as an input end of the repair unit, and a second end of the chopping module is connected to the clock signal output end, and is used to chop the input drive signal; a noise reduction module, wherein an input end of the noise reduction module is connected to the third end of the chopping module, and is used to reduce noise on a signal output by the chopping module; an amplifying module, wherein an input end of the amplifying module is connected to an output end of the noise reduction module, and is used to amplify a signal output by the noise reduction module; A voltage limiting module, wherein the output end of the voltage limiting module is connected to the high potential end of the amplifying module, and is used to control the high potential output by the amplifying module; An adjusting module, wherein the input end of the adjusting module is connected to the output end of the amplifying module, and the output end of the adjusting module serves as the output end of the repair unit and is used to adjust the falling edge time of the output signal of the amplifying module.

6. The driving circuit repair device according to claim 5, characterized in that: The chopping module includes: a first switch tube, wherein the control end of the first switch tube is the first end of the chopping module, the first end of the first switch tube is the second end of the chopping module, and the second end of the first switch tube is the third end of the chopping module; Or / and, the noise reduction module includes: a second switch tube, wherein the control end of the second switch tube is connected to the first end of the chopping module, and the first end of the second switch tube is connected to the first power supply output end; a third switching tube, wherein a control end of the third switching tube is connected to the control end of the second switching tube, a first end of the third switching tube is connected to the second end of the second switching tube, and a second end of the third switching tube is connected to the second power supply output end; a fourth switching tube, wherein the control end of the fourth switching tube is connected to the first end of the third switching tube, the first end of the fourth switching tube is connected to the output end of the chopping module, and the second end of the fourth switching tube is connected to the second power supply output end; wherein the first end of the fourth switching tube serves as the output end of the noise reduction module.

7. The driving circuit repairing device according to claim 5, characterized in that: The amplification module includes: a first amplifier, a first resistor, and a second resistor; The non-inverting input terminal of the first amplifier is connected to the output terminal of the noise reduction module, the inverting input terminal of the first amplifier is grounded through the first resistor, and the inverting input terminal of the first amplifier is also connected to the output terminal of the first amplifier through the second resistor. The high level terminal of the first amplifier is connected to the output terminal of the voltage limiting module, the low level terminal of the first amplifier is connected to the second power supply output terminal, and the output terminal of the first amplifier serves as the output terminal of the amplification module.

8. The driving circuit repairing device according to claim 5, wherein: The voltage limiting module includes: a third resistor, wherein a first end of the third resistor is connected to the first power supply output terminal, and a second end of the third resistor is connected to the high level terminal of the amplifying module; a fourth resistor, wherein a first end of the fourth resistor is connected to the second end of the third resistor, and a second end of the fourth resistor is connected to the second power supply output end; Or / and, the adjustment module includes: a fifth resistor, wherein a first end of the fifth resistor is connected to the output end of the amplifying module, and a second end of the fifth resistor serves as the output end of the regulating module; A capacitor, wherein a first end of the capacitor is connected to the second end of the fifth resistor, and a second end of the capacitor is connected to the second power supply output end.

9. The driving circuit repairing device according to claim 5, characterized in that: The noise reduction module includes: a second amplifier, wherein an inverting input terminal of the second amplifier is connected to the first terminal of the chopping module, a non-inverting input terminal of the second amplifier is connected to the reference voltage input terminal, a high level terminal of the second amplifier is connected to the first power supply output terminal, and a low level terminal of the second amplifier is connected to the second power supply terminal; a fifth switching tube, wherein the control end of the fifth switching tube is connected to the output end of the second amplifier, the first end of the fifth switching tube is connected to the third end of the chopping module, the second end of the fifth switching tube is connected to the second power supply output end, and the first end of the fifth switching tube serves as the output end of the noise reduction module.

10. A display panel comprising a display area and a non-display area, wherein the display area comprises a plurality of scan lines; the non-display area comprises a first gate driving circuit located on a first side of the display area and a second gate driving circuit located on a second side of the display area, wherein: The non-display area further includes at least one set of driving circuit repairing devices according to any one of claims 1 to 9.

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