Chip defect detection and optimization system based on knowledge graph reasoning

Abstract

The invention discloses a chip defect detection and optimization system based on knowledge graph reasoning. The system comprises a chip defect detection module, a data storage and knowledge graph construction module, a reasoning analysis module and a feedback optimization module, defect root cause analysis and production process optimization are performed based on a knowledge reasoning system, a feedback optimization module generates a process optimization suggestion based on a reasoning result, real-time optimization is performed on a production process through an automatic process adjustment system and a self-adaptive feedback controller, and it is ensured that optimization measures can effectively reduce the occurrence of defects. According to the system, by integrating defect detection, knowledge reasoning and process optimization closed loop, defect early warning, root cause analysis and automatic adjustment of process parameters can be realized, and the quality and efficiency of a chip production process are remarkably improved.

Description

Technical Field

[0001] The present invention belongs to the field of machine vision technology, and specifically relates to a chip defect detection and optimization system based on knowledge graph reasoning. Background Art

[0002] With the rapid development of the semiconductor industry, chip defect detection is a key link in ensuring product quality. Traditional defect detection methods rely on manual inspection and basic testing methods, which are not only inefficient, but also have a high risk of missed detection and false detection, and cannot meet the increasingly stringent requirements of high-performance integrated circuits. Some studies have applied deep learning technology to chip defect detection. These algorithms have significantly improved the accuracy and efficiency of detection through automatic feature extraction and complex image data processing. For example, researchers have applied advanced models such as the YOLO series and Faster R-CNN to develop a high-precision detection system that can process massive detection information in real time.

[0003] However, existing technologies are more focused on the detection and classification of chip defects, and can only solve problems such as chip defect detection accuracy and efficiency. How to reduce defects in products during processing, optimize process parameters and equipment materials in the chip manufacturing process, reduce chip defects during processing, and predict possible problems in the future are the technical issues that need to be solved. Summary of the invention

[0004] In order to address the deficiencies in the prior art, this application proposes a chip defect detection and optimization system based on knowledge graph reasoning. The chip defect detection module, data storage and knowledge graph construction module, reasoning analysis module and feedback optimization module can predict chip defects generated during the processing process and predict possible problems in the future, and optimize the process parameters and equipment material problems in the chip manufacturing process flow in a targeted manner, thereby reducing chip defects.

[0005] The technical solution adopted by the present invention is as follows:

[0006] A chip defect detection and optimization system based on knowledge graph reasoning, comprising: a chip defect detection module, a data storage and knowledge graph construction module, a reasoning analysis module, and a feedback optimization module;

[0007] The chip defect detection module includes a scanning probe microscope SPM, an image processing unit and a YOLOv8 target detection model, wherein the scanning probe microscope SPM scans the chip surface to obtain image data; the image processing unit extracts defect features from the image data; the YOLOv8 target detection model identifies the defect features and outputs defect data;

[0008] The data storage and knowledge graph construction module includes a data storage system, a data preprocessing and standardization unit, and a knowledge graph generation engine; the data storage system is used to store defect data output by the chip defect detection module and image data, process data, and historical defect records of the chip manufacturing process; the data preprocessing and standardization unit preprocesses the data in the data storage system; the knowledge graph generation engine constructs a knowledge graph of chip manufacturing based on the preprocessed data;

[0009] The reasoning analysis module includes a knowledge reasoning engine and a fault diagnosis model; the knowledge reasoning engine uses the Bayesian algorithm to calculate the probability value between two mutually related nodes in the knowledge graph; the fault diagnosis model uses a long short-term memory network LSTM, takes the knowledge graph probability data sequence obtained in the knowledge reasoning engine as the input of the LSTM network, and uses the LSTM network to predict the root cause of the defect or the prediction result of the equipment failure;

[0010] The feedback optimization module includes a process optimization suggestion generator and an automatic process adjustment system. The process optimization suggestion generator generates system optimization suggestions based on the root causes of defects predicted by the fault diagnosis model; the automatic process adjustment system receives the system optimization suggestions generated by the process optimization suggestion generator and automatically adjusts the process parameters of the production line.

[0011] Furthermore, the data storage and knowledge graph construction module is also provided with a knowledge update and management system to map newly detected defects or process improvements into the knowledge graph; as new data continuously enters, the knowledge graph is automatically updated.

[0012] Furthermore, the data storage and knowledge graph construction module also has a result visualization module.

[0013] Furthermore, the feedback optimization module is also provided with an adaptive feedback controller, which captures the process parameters in the production line in real time. When abnormal process parameters or potential quality problems are detected, the adaptive feedback controller immediately processes the feedback data and analyzes whether the process parameters need to be adjusted.

[0014] Furthermore, the feedback optimization module is also provided with a process optimization effect evaluator, which comprehensively evaluates the impact of optimization measures on the occurrence of defects in the production process by comparing new test data with historical data.

[0015] Furthermore, the image processing unit performs edge detection and morphological analysis on the image data to preliminarily screen potential defect areas in the chip image data.

[0016] Furthermore, the image processing unit performs Gaussian filtering and image enhancement processing on the image.

[0017] Furthermore, the defect data output by the YOLOv8 target detection model includes: defect category, confidence level, and defect location information on the chip.

[0018] Furthermore, in the data preprocessing and standardization unit, the data is cleaned, preprocessed, and standardized in sequence.

[0019] Furthermore, the Neo4j graph database management system is used to construct a knowledge graph of chip manufacturing.

[0020] Beneficial effects of the present invention:

[0021] (1) The chip defect detection module has the advantages of high precision, high efficiency and intelligence. The scanning probe microscope (SPM) can obtain chip surface morphology data with nanometer resolution to ensure the accurate capture of tiny defects; the image processing unit quickly extracts key defect features and significantly improves data processing efficiency; combined with the powerful real-time recognition capability of the YOLOv8 target detection model, it can quickly classify and locate various types of defects, realize the automation of the entire process from data acquisition to defect output, and greatly improve the quality control level and production efficiency in the chip manufacturing process.

[0022] (2) The data storage and knowledge graph construction module integrates comprehensive data storage, efficient data preprocessing and standardization capabilities, and can integrate detection defect data and historical records to ensure data consistency. Based on the knowledge graph generation engine and Neo4j graph database, it dynamically builds and updates the chip manufacturing knowledge graph in real time, intuitively displaying the relationship between defects and processes. At the same time, it makes complex relational data easy to understand, supports intelligent knowledge management and analysis, and helps chip manufacturing optimization and decision support.

[0023] (3) The reasoning analysis module combines the Bayesian algorithm and LSTM network, and has powerful causal reasoning and time series analysis capabilities. The knowledge reasoning engine accurately calculates the probability relationship between nodes in the knowledge graph and mines potential defect associations; the fault diagnosis model uses LSTM to perform deep learning on time series data, which can predict the root cause of defects or equipment failures and improve the accuracy and foresight of diagnosis. The overall module realizes intelligent analysis and prediction of complex manufacturing processes, helps to quickly locate the source of problems, and provides a scientific basis for process optimization and equipment maintenance.

[0024] (4) The feedback optimization module has real-time, adaptive and closed-loop optimization capabilities. Through the process optimization suggestion generator, the fault diagnosis results are converted into clear optimization suggestions to ensure the pertinence of the optimization measures; the automatic process adjustment system realizes the automatic adjustment of the production line process parameters to improve the response speed and efficiency; the adaptive feedback controller monitors the production line process parameters in real time, quickly identifies anomalies and dynamically adjusts them to enhance the stability and robustness of the system; the process optimization effect evaluator quantifies the actual effect of the optimization measures by comparing the detection data, providing a scientific basis for continuous improvement. The overall module forms an intelligent and dynamic closed-loop optimization process, which significantly reduces the defect rate and improves production efficiency.

[0025] The system has efficient and accurate defect identification capabilities, comprehensive data integration capabilities, intelligent causal reasoning and real-time optimization capabilities, which greatly reduces the cost of chip processing, improves the efficiency of problem diagnosis and the effect of process optimization. Through the synergy of various modules, it provides an efficient and intelligent solution to the problem of defects in the chip manufacturing process. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a flow chart of a chip defect detection and optimization system based on knowledge graph reasoning of the present invention;

[0027] Figure 2 It is the structural diagram of each module of the present invention;

[0028] Figure 3 This is the detection effect diagram of the YOLOv8 target detection model;

[0029] Figure 4 It is a visual diagram of the knowledge graph; DETAILED DESCRIPTION

[0030] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0031] like Figure 1 A chip defect detection and optimization system based on knowledge graph reasoning is shown. In the chip manufacturing process scenario, this system uses a chip defect detection module, a data storage and knowledge graph construction module, a reasoning analysis module, and a feedback optimization module to optimize the process parameters and equipment material problems in the chip manufacturing process flow, thereby reducing the chip defects generated during the processing and predicting possible problems in the future.

[0032] like Figure 2As shown in the figure, the chip defect detection module consists of a scanning probe microscope SPM, an image processing unit and a YOLOv8 target detection model. The scanning probe microscope SPM performs high-precision scanning on the chip surface to generate image data with nanometer resolution; the image processing unit performs image denoising, enhancement and defect feature extraction on the image data. The YOLOv8 target detection model identifies the defect features and outputs the location, type and confidence of the defect. The details are as follows:

[0033] (1) Scanning probe microscopy (SPM) uses a very small probe with a tip radius in the nanometer range to scan the sample surface. The interaction between the probe and the sample surface causes tiny displacements of the probe, which are precisely measured to generate a three-dimensional image of the surface topography. The probe moves row by row in a grid pattern along the sample surface. When the probe approaches a specific area of ​​the surface, the local surface characteristics (such as height or local charge distribution) cause a slight displacement or vibration of the probe position. This displacement can be controlled by a feedback system to maintain a relatively stable distance between the probe tip and the sample surface. SPM equipment uses a feedback control system (such as a piezoelectric device) to maintain a constant distance between the probe and the surface. When the probe's displacement sensor detects a small displacement change, the feedback system immediately adjusts the probe position to restore it to the preset distance. This feedback signal directly reflects the surface topography and other local physical characteristics. The probe displacement data is recorded in real time to generate a data set containing the height information of the probe at each point. The computer uses these data sets to form a three-dimensional image of the sample surface.

[0034] (2) Image processing unit This module is responsible for preprocessing and enhancing the high-resolution images obtained from the scanning probe microscope to improve the performance of the subsequent detection model. The module first performs Gaussian filtering on the image to reduce random noise while retaining the edge information of the image. Since the defect area may be subtle and low in contrast, the image processing unit will enhance the brightness and contrast of the image through contrast stretching, histogram equalization and other methods to make the potential defect area clearer. To distinguish defects from normal areas, the image processing unit uses the Canny edge detection algorithm to extract the edges of the chip surface structure. Edge detection highlights structural changes in the image and reveals possible defects such as cracks, depressions or protrusions on the surface. After the initial edge detection, some errors or incomplete edges may be obtained. Through morphological operations such as corrosion, dilation, opening and closing operations, the processing unit further refines the edge information and removes non-critical noise edges to retain clear and continuous defect contours. After the defect edge is extracted, morphological analysis is used to segment and mark the potential defect area in the image. Using methods such as dilation and closing operations, adjacent edge pixels are connected to connect isolated defect areas into complete area blocks for subsequent detection. The processing unit further screens by analyzing the morphological features of potential defect areas, such as shape, size, location, and contour. Areas of specific morphology, such as protruding sharp edges or abnormal geometric shapes, can indicate surface defects such as cracks, pores, impurities, etc. After edge detection and morphological analysis processing, the system automatically extracts regions of interest (ROIs) that may contain potential defect information. The system marks these ROIs so that subsequent more refined detection models can focus on these areas and avoid searching in the entire image. After marking the potential defect areas, the image processing unit can perform local contrast enhancement and detail optimization on these areas. Using image sharpening technology, the boundary details of the defect area are further highlighted, making it easier for subsequent models to detect potential defects.

[0035] (3) The YOLOv8 object detection model consists of a backbone network module, a feature fusion module, and a detection head module. The backbone network uses convolutional neural network layers to gradually extract low-level to high-level features from the input image. By convolving the image layer by layer, the backbone network effectively captures the edge, shape, and texture information of the defect area, enabling the model to identify tiny defect features. The low-level features in the backbone network are responsible for capturing finer edges and textures, while the high-level features capture more abstract patterns. By combining features from different layers, the model can obtain richer feature representations, enabling it to have better perception of the boundaries and structures of defects. In the feature fusion module, the FPN architecture is used to fuse features from different scales. The feature pyramid network in YOLOv8 is mainly used to integrate multi-scale features and enhance the multi-scale perception ability of the model in order to identify defects of different sizes. By upsampling and downsampling feature maps of different scales, the feature fusion module can identify larger and smaller defects. When identifying larger defects such as "DIE_BROKEN", the downsampled features help the model capture the overall shape, while for fine cracks such as "DIE_CRACK", the upsampled features provide fine contours. The detection head is responsible for classifying the category of each target area (such as "DIE_BROKEN", "DIE_CRACK", and "DIE_INK") and predicting the bounding box of each defect. Through bounding box regression, the detection head can output the precise defect location and provide the specific coordinates of the detection area. The detection head also assigns a confidence score to the detection result, indicating the model's trust in the detected defect. A training weight is set in the model, which is trained using 1,177 different defect data to identify defects in optoelectronic chips during processing and output their defect information. Figure 3 , which is the effect diagram of three chip defects detected by the detection model. The three chip defect types are "DIE_BROKEN", "DIE_CRACK" and "DIE_INK". The defect category and confidence level are marked on the effect diagram, and the rectangular box on the diagram indicates the location of the defect on the chip.

[0036] like Figure 2 As shown in the figure, the data storage and knowledge graph construction module is mainly composed of a data storage system, a data preprocessing and standardization unit, a knowledge graph generation engine, a knowledge update and management system, and a result visualization module.

[0037] (1) The data storage system uses an SQL database to store the defect data output by the chip defect detection module as well as image data, process data, and historical defect records of the chip manufacturing process.

[0038] (2) The data preprocessing and standardization unit cleans, preprocesses, and standardizes the data in the data storage system to ensure that data from different sources can be uniformly formatted and integrated;

[0039] (2.1) Data cleaning includes removing duplicate records, filling missing values, and unifying the format.

[0040] Since the same defect is detected repeatedly in the chip preparation process, in order to reduce the workload and avoid repeated analysis of the same defect, it is necessary to remove multiple duplicate records of the same defect detected; use the DISTINCT keyword in SQL to remove duplicate records.

[0041] Since data may be missing during data cleaning, the mean value needs to be used to fill in the missing data. For example, for the missing values ​​in field x, the mean filling formula is as follows:

[0042]

[0043] Among them, x i is the data to fill missing values, mean is the mean function, n is the number of records with non-missing values ​​in field x, and x j Represents the non-missing values ​​of field x.

[0044] Next, the outliers are identified through Z-score, and if they are outliers, they need to be standardized.

[0045] According to the following formula, outliers are identified. | z | >3, the value is considered to be an outlier.

[0046]

[0047] Among them, z represents the Z-score of the data; x represents a value in the data; u is the mean of field x; is the standard deviation of field x.

[0048] The outliers are standardized according to the following formula.

[0049]

[0050] Among them, x is the current outlier value, min(X) is the minimum value in the data, max(X) is the maximum value in the data, and x' is the result of standardization.

[0051] For the encoding of categorical variables, One-Hot Encoding is implemented by creating multiple binary features. For the values ​​"red", "green", and "blue" in the categorical variable "color", three new columns (such as is_red, is_green, and is_blue) can be generated. For the date format, it is unified into the YYYY-MM-DD format. At the same time, ensure that the numeric data type is consistent. In addition, the text field needs to remove extra spaces and unify the upper and lower case.

[0052] After the above data preprocessing and standardization, the SQL JOIN operation is used to merge the real-time collected data and historical data according to common key fields to ensure the consistency and integrity of the data, laying a solid foundation for subsequent analysis and modeling.

[0053] (3) Knowledge graph generation engine: Based on the data in the SQL database after data preprocessing and standardization, the Neo4j graph database management system is used to build a knowledge graph for chip manufacturing. The process flow, equipment parameters, historical defects and material properties are used as nodes, such as "etching", "equipment A", "silicon", "fracture", etc. The relationship between nodes is used as edges, such as "use", "lead to", etc. The data is structured into a triple form, expressed as "node 1, relationship, node 2", which is used to represent the relationship between process flow, equipment parameters, historical defects and material properties, such as "equipment A etching process", "etching process leads to fracture defects", etc. Based on the triple form of the data, nodes and relationships are created in Neo4j to build a knowledge graph for chip manufacturing, such as Figure 4 shown.

[0054] (4) Knowledge update and management system, maintaining the dynamic update capability of the knowledge graph, ensuring that newly detected defects or process improvements can be reflected in the knowledge graph in real time. Newly detected defects or process improvements are mapped to the corresponding nodes and edges in the knowledge graph. As new data continues to enter, the knowledge graph will be automatically updated to ensure that each new information can be accurately incorporated into the existing knowledge structure to form a complete, real-time knowledge network.

[0055] (5) Result visualization module, such as Figure 4The figure shows a schematic diagram of knowledge graph visualization. The result visualization module uses graphical nodes and edges to display the causes of different defects and their related attributes so that users can intuitively understand the complex fault diagnosis process. In this visualization method, each node represents a key entity, such as equipment, process steps, materials, defect types, etc., and each edge represents the relationship or interaction between these entities. In this way, users can clearly see how defects are caused by different factors, as well as the nature and attributes of the defects themselves. Users can click on nodes to further view their detailed information, such as the time of failure, process steps, material properties, or equipment status. This graphical display method can help users quickly identify which factors may be the root cause of the defect. In addition, the relevant attributes of the defect are also displayed through the attribute values ​​of the node. For example, the severity, frequency of occurrence, possible risk level, etc. of the defect are presented as additional information of the node. Through nodes of different colors, sizes, or shapes, users can understand the nature of the defect and its impact at a glance.

[0056] like Figure 2 As shown, the reasoning analysis module consists of a knowledge reasoning engine and a fault diagnosis model.

[0057] (1) The knowledge reasoning engine, based on the constructed knowledge graph, uses the Bayesian algorithm to perform probabilistic reasoning on the relationship between two interrelated nodes in the knowledge graph, and calculates the probability value between each node, which can reflect the possibility of occurrence; if a certain node corresponds to a "defect", the probability value can be used to indicate the probability of the surface defect, and at the same time, the root cause of the defect can be derived. Through Bayesian reasoning, the present invention can quantitatively analyze the correlation between complex process parameters and defects. When new process data or defect information is input, the system can automatically update the node probability in the network, thereby deducing the possible root cause of the defect in real time. This reasoning process can help engineers and operators quickly identify the source of the problem, reduce the time and cost of manual analysis, and improve the accuracy and efficiency of fault diagnosis.

[0058] (2) The fault diagnosis model combines the long short-term memory network (LSTM) with the knowledge graph to predict the root causes of potential defects and equipment problems. LSTM is a special recursive neural network (RNN) that is good at processing and analyzing data with time series characteristics and can capture the long-term and short-term dependencies between process parameters and equipment status over time. First, the LSTM network is trained by learning process parameters, equipment operating conditions, and historical defect data; the knowledge graph probability data sequence obtained from the knowledge reasoning engine is used as the input of the LSTM network, and the LSTM network is used for prediction; the prediction results of the root causes of defects or equipment failures that may cause defects are output. By integrating the long short-term memory network (LSTM) with the knowledge graph, the fault diagnosis model can not only achieve efficient fault prediction, but also play a key role in equipment management and production optimization, helping enterprises improve the stability and reliability of production lines. By combining this data with information in the knowledge graph, LSTM uses traditional time series data and the rich process and defect association information in the knowledge graph to improve the accuracy of prediction.

[0059] like Figure 2 As shown in the figure, the feedback optimization module consists of a process optimization suggestion generator, an automatic process adjustment system, an adaptive feedback controller, and a process optimization effect evaluator.

[0060] (1) The process optimization suggestion generator generates system optimization suggestions based on the root causes of defects predicted by the fault diagnosis model. System optimization suggestions are targeted adjustment measures proposed by the suggestion generator based on the detected defects and the causes of the defects to improve product quality and production efficiency. For example, if non-standard pattern transfer occurs during the photolithography process, the process optimization suggestion generator will recommend adjusting the photolithography exposure time to improve the exposure effect; if excessive or insufficient corrosion is found during the etching process, the suggestion generator will recommend modifying the etching process parameters (such as gas flow, etching time, etc.) to ensure a more accurate etching process. In addition, the generator can also propose suggestions for optimizing the purity of materials or replacing specific batches of materials based on the characteristics of the materials in the production process. For example, the reasoning analysis results indicate that the defects of the final product are caused by insufficient material purity. At this time, the generator will recommend optimizing the material purity or selecting higher quality raw materials to eliminate or reduce the defects caused by the materials. The process optimization suggestion generator makes adjustments based on historical data and existing problems, and provides real-time feedback based on changes in the production environment to ensure that the optimization suggestions are always in line with the current production status. By automatically generating these specific and actionable optimization suggestions, the generator helps engineers identify problems more quickly and take corresponding improvement measures, thereby improving the stability of the overall production process and product quality.

[0061] (2) The automatic process adjustment system receives the system optimization suggestions generated by the process optimization suggestion generator, and automatically adjusts the process parameters of the production line through integration with the manufacturing execution system MES. The system can adjust key process parameters that affect product quality, such as temperature, pressure, time, etc., based on the system optimization suggestions, thereby effectively reducing the occurrence of potential defects and optimizing the production process. In actual applications, through close integration with MES, the automatic process adjustment system can directly affect the operation of the production line and provide dynamic adjustment throughout the production process. This automatic adjustment function can achieve real-time optimization of the production line, reduce the need for human intervention, and ensure that the production process remains stable and efficient under changing conditions.

[0062] (3) The adaptive feedback controller monitors changes in the production process in real time and dynamically adjusts the process settings based on the feedback from defect detection data to prevent the problem from further expanding. The controller integrates various sensors, visual inspection systems, and data acquisition technologies to capture fluctuations in process parameters (such as temperature, pressure, speed, etc.) and the occurrence of quality defects in real time. Once an abnormality or potential quality problem is detected, the controller will immediately process the feedback data and analyze whether the process parameters need to be adjusted. Through this closed-loop feedback mechanism, the system can intervene in time before the problem expands, ensuring that the production process remains stable and ultimately improving product quality.

[0063] (4) Process Optimization Effect Evaluator After the process optimization measures are implemented, the evaluator comprehensively evaluates the impact of the optimization measures on the occurrence of defects in the production process by comparing the new test data with the historical data. The new test data comes from the actual production process after the process adjustment, while the historical data is the production data before the adjustment, which contains the defect information and production parameters under the original process. First, the evaluator compares the number, type and distribution of defects to determine whether the optimization measures have effectively reduced the occurrence of defects; secondly, the evaluator analyzes the changes in relevant process parameters, such as temperature, pressure, speed, etc., and further verifies whether the optimization suggestions have achieved the expected effect by comparing the parameter fluctuations before and after the optimization; finally, the evaluator gives feedback on the effect of the adjustment based on the comparison results. If the optimization measures fail to achieve the expected effect, the evaluator will feedback to the automatic process adjustment system to help it make further adjustments and optimizations. In this way, through the closed-loop feedback mechanism, the process optimization effect evaluator ensures the effectiveness of the optimization measures and continuously promotes defect reduction and process improvement.

[0064] The above embodiments are only used to illustrate the design ideas and features of the present invention, and their purpose is to enable those skilled in the art to understand the content of the present invention and implement it accordingly. The protection scope of the present invention is not limited to the above embodiments. Therefore, any equivalent changes or modifications made based on the principles and design ideas disclosed by the present invention are within the protection scope of the present invention.

Claims

1. A chip defect detection and optimization system based on knowledge graph reasoning, characterized in that: include: Chip defect detection module, data storage and knowledge graph construction module, reasoning analysis module, feedback optimization module; The chip defect detection module includes a scanning probe microscope SPM, an image processing unit and a YOLOv8 target detection model, wherein the scanning probe microscope SPM scans the chip surface to obtain image data; the image processing unit extracts defect features from the image data; the YOLOv8 target detection model identifies the defect features and outputs defect data; The data storage and knowledge graph construction module includes a data storage system, a data preprocessing and standardization unit, and a knowledge graph generation engine; the data storage system is used to store the defect data output by the chip defect detection module and the image data, process data, and historical defect records of the chip manufacturing process; The data preprocessing and standardization unit preprocesses the data in the data storage system; the knowledge graph generation engine constructs a knowledge graph for chip manufacturing based on the preprocessed data; The reasoning analysis module includes a knowledge reasoning engine and a fault diagnosis model; The knowledge reasoning engine uses the Bayesian algorithm to calculate the probability value between two mutually related nodes in the knowledge graph; The fault diagnosis model adopts a long short-term memory network LSTM, takes the knowledge graph probability data sequence obtained in the knowledge reasoning engine as the input of the LSTM network, and uses the LSTM network to predict the root cause of the defect or the prediction result of the equipment failure; The feedback optimization module includes a process optimization suggestion generator and an automatic process adjustment system. The process optimization suggestion generator generates system optimization suggestions based on the root causes of defects predicted by the fault diagnosis model; The automatic process adjustment system receives the system optimization suggestions generated by the process optimization suggestion generator and automatically adjusts the process parameters of the production line.

2. According to claim 1, a chip defect detection and optimization system based on knowledge graph reasoning is characterized in that: The data storage and knowledge graph construction module is also provided with a knowledge update and management system to map newly detected defects or process improvements into the knowledge graph; as new data continuously enters, the knowledge graph is automatically updated.

3. According to claim 1, a chip defect detection and optimization system based on knowledge graph reasoning is characterized in that: The data storage and knowledge graph construction module is also provided with a result visualization module.

4. According to claim 1, a chip defect detection and optimization system based on knowledge graph reasoning is characterized in that: The feedback optimization module is also provided with an adaptive feedback controller, which captures the process parameters in the production line in real time. When abnormal process parameters or potential quality problems are detected, the adaptive feedback controller immediately processes the feedback data and analyzes whether the process parameters need to be adjusted.

5. According to claim 1, a chip defect detection and optimization system based on knowledge graph reasoning is characterized in that: The feedback optimization module is also provided with a process optimization effect evaluator, which comprehensively evaluates the impact of optimization measures on the occurrence of defects in the production process by comparing new test data with historical data.

6. According to claim 1, a chip defect detection and optimization system based on knowledge graph reasoning is characterized in that: The image processing unit performs edge detection and morphological analysis on the image data to preliminarily screen potential defect areas in the chip image data.

7. The chip defect detection and optimization system based on knowledge graph reasoning according to claim 1 is characterized in that: The image processing unit performs Gaussian filtering and image enhancement processing on the image.

8. The chip defect detection and optimization system based on knowledge graph reasoning according to claim 1 is characterized in that: The defect data output by the YOLOv8 target detection model includes: defect category, confidence level, and defect location information on the chip.

9. The chip defect detection and optimization system based on knowledge graph reasoning according to claim 1 is characterized in that: In the data preprocessing and standardization unit, the data is cleaned, preprocessed, and standardized in sequence.

10. The chip defect detection and optimization system based on knowledge graph reasoning according to claim 1, characterized in that: Use the Neo4j graph database management system to build a knowledge graph for chip manufacturing.

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