Time delay detection method and device, electronic equipment and storage medium

The proposed method for detecting and classifying delays in quantum computing channels addresses the challenge of error-prone signal transmission by comparing pre-stored and calculated delay values, enhancing the accuracy and reliability of quantum computations.

CN119721271APending Publication Date: 2025-03-28ORIGIN QUANTUM COMPUTING TECH (HEFEI) CO LTD
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Patent Information

Application Number
CN202311283861.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-09-28
Publication Date
2025-03-28

AI Technical Summary

Technical Problem

In quantum computing, the accurate detection of delays in signal transmission through various channels is crucial for maintaining the precision of quantum computations, but existing methods often fail to accurately determine abnormal delays, which can lead to errors in quantum bit operations due to interconnected channel dependencies.

Method used

A method and apparatus for detecting delays in quantum computing channels by comparing pre-stored delay values with calculated differences, determining link establishment between channels, and assessing these differences against a pre-set threshold to classify delays as normal or abnormal, thereby enhancing the accuracy of signal transmission.

Benefits of technology

This approach effectively reduces the likelihood of delay-related errors, improves the accuracy of quantum computations by ensuring precise timing in signal transmission across quantum computing channels, and maintains the integrity of quantum bit operations.

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Abstract

The embodiment of the invention provides a time delay detection method and device, electronic equipment and a storage medium. According to the scheme, when a first detection task is received, a first time delay corresponding to a first line channel and a second time delay corresponding to a second line channel are obtained according to a pre-stored first corresponding relation between each line channel and the time delay; determining whether a link is established between the first line channel and the second line channel according to a pre-stored second corresponding relationship among a third line channel, a fourth line channel and the numerical value; if it is determined that the link is established between the first line channel and the second line channel, the first difference value is compared with a preset time threshold value; and when the first difference value is smaller than or equal to a preset time threshold value, determining that the first time delay and the second time delay are normal time delay data. Through the technical scheme provided by the embodiment of the invention, the detection of the time delay corresponding to each line channel is realized, so that the accuracy of the time delay corresponding to each line channel is improved.
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Description

Technical Field

[0001] The present application relates to the field of quantum computing technology, and in particular to a delay detection method, device, electronic device and storage medium. Background Art

[0002] Quantum computing is a computational model that uses the basic properties of quantum mechanics to solve problems. It is achieved by building a quantum physics hardware system that can be precisely operated and running quantum computing software to implement quantum algorithms, solve computational problems, and apply quantum computing to specific problems or fields.

[0003] In the process of quantum computing, for single qubit gate operation, the quantum computing measurement and control system (such as the integrated measurement and control machine) transmits the quantum state modulation signal to the interface of the pulse modulation line (i.e., XY line) corresponding to the qubit through the pulse modulation line channel, and transmits the qubit frequency control signal to the interface of the flux modulation line (i.e., Z line) corresponding to the same qubit through the flux modulation line channel. The qubit performs quantum computing based on the received quantum state control signal and qubit frequency control signal.

[0004] For multi-qubit gate operations, such as two-qubit gate operations, the quantum computing measurement and control system transmits the quantum state modulation signal to the interface of the XY line corresponding to two adjacent qubits through two pulse modulation line channels, and transmits the qubit frequency control signal to the interface of the Z line corresponding to the two adjacent qubits and the adjustable coupler coupling the two adjacent qubits through three flux modulation line channels. Summary of the invention

[0005] The purpose of the embodiments of the present invention is to provide a delay detection method, device, electronic device and storage medium to detect the delay corresponding to each line channel, thereby improving the accuracy of the delay corresponding to each line channel. The specific technical solution is as follows:

[0006] The present application provides a delay detection method, the method comprising:

[0007] When receiving a first detection task for a first line channel and a second line channel, obtaining a first delay corresponding to the first line channel and a second delay corresponding to the second line channel according to a pre-stored first correspondence relationship between each line channel and the delay;

[0008] Determining whether the first line channel and the second line channel are linked according to a pre-stored second correspondence between a third line channel, a fourth line channel, and a numerical value, wherein the third line channel is used to transmit a quantum state control signal, the fourth line channel is used to transmit a quantum bit frequency control signal, and the numerical value is used to indicate whether the third line channel and the fourth line channel are linked;

[0009] If it is determined that the first line channel and the second line channel establish a link, compare the first difference with a preset time threshold, wherein the first difference is a difference between a first relative delay and a second relative delay, the first relative delay is a difference between a first duration of signal transmission corresponding to the first line channel and a second duration of signal transmission corresponding to the second line channel, and the second relative delay is a difference between the first delay and the second delay;

[0010] When the first difference is less than or equal to a preset time threshold, it is determined that the first delay and the second delay are normal delay data.

[0011] The present application also provides a delay detection device, the device comprising:

[0012] A first acquisition module, configured to, upon receiving a first detection task for a first line channel and a second line channel, acquire a first delay corresponding to the first line channel and a second delay corresponding to the second line channel according to a pre-stored first correspondence relationship between each line channel and the delay;

[0013] a first determination module, configured to determine whether the first line channel and the second line channel are linked according to a pre-stored second correspondence between a third line channel, a fourth line channel and a numerical value, wherein the third line channel is used to transmit a quantum state control signal, the fourth line channel is used to transmit a quantum bit frequency control signal, and the numerical value is used to indicate whether the third line channel and the fourth line channel are linked;

[0014] a first comparison module, configured to compare a first difference with a preset time threshold if it is determined that the first line channel and the second line channel are linked, wherein the first difference is a difference between a first relative delay and a second relative delay, the first relative delay being a difference between a first duration of signal transmission corresponding to the first line channel and a second duration of signal transmission corresponding to the second line channel, and the second relative delay being a difference between the first delay and the second delay;

[0015] The second determining module is used to determine that the first delay and the second delay are normal delay data when the first difference is less than or equal to a preset time threshold.

[0016] The embodiment of the present application also provides an electronic device, including a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory communicate with each other via the communication bus;

[0017] Memory, used to store computer programs;

[0018] The processor is used to implement any of the above-mentioned delay detection method steps when executing the program stored in the memory.

[0019] An embodiment of the present application further provides a computer-readable storage medium, characterized in that a computer program is stored in the computer-readable storage medium, and when the computer program is executed by a processor, any of the above-mentioned delay detection method steps is implemented.

[0020] An embodiment of the present invention further provides a computer program product comprising instructions, which, when executed on a computer, enables the computer to execute any of the above-mentioned delay detection methods.

[0021] An embodiment of the present application also provides a quantum computing measurement and control system to implement any of the above-mentioned delay detection methods.

[0022] Beneficial effects of the embodiments of the present invention:

[0023] The technical solution provided by the embodiment of the present invention can, when receiving a first detection task for a first line channel and a second line channel, obtain a first delay corresponding to the first line channel and a second delay corresponding to the second line channel according to a first corresponding relationship, and when it is determined according to the second corresponding relationship that the first line channel and the second line channel are linked, compare the difference between the first relative delay and the second relative delay with a preset time threshold, so as to determine whether the first delay and the second delay are abnormal delay data, thereby realizing the detection of the corresponding delays of the first line channel and the second line channel, reducing the possibility of abnormal delays, improving the accuracy of the corresponding delays of each line channel, thereby improving the accuracy of signal transmission based on the delays of each line channel, and further improving the accuracy of quantum computing.

[0024] Of course, it is not necessary to achieve all of the advantages described above at the same time to implement any product or method of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0026] Figure 1 A schematic diagram of a first process flow of a delay detection method provided in an embodiment of the present application;

[0027] Figure 2 A second flow chart of the delay detection method provided in the embodiment of the present application;

[0028] Figure 3 A third flow chart of the delay detection method provided in the embodiment of the present application;

[0029] Figure 4 A fourth flow chart of the delay detection method provided in the embodiment of the present application;

[0030] Figure 5 A fifth flow chart of the delay detection method provided in the embodiment of the present application;

[0031] Figure 6 A sixth flow chart of the delay detection method provided in the embodiment of the present application;

[0032] Figure 7 A seventh flow chart of the delay detection method provided in the embodiment of the present application;

[0033] Figure 8 An eighth flow chart of the delay detection method provided in the embodiment of the present application;

[0034] Fig. 9 A ninth flow chart of the delay detection method provided in the embodiment of the present application;

[0035] Fig.10 A tenth flow chart of the delay detection method provided in the embodiment of the present application;

[0036] Fig.11 This is a schematic diagram of an eleventh flow chart of the delay detection method provided in an embodiment of the present application;

[0037] Fig.12 A twelfth flow chart of the delay detection method provided in an embodiment of the present application;

[0038] Fig.13 A thirteenth flow chart of the delay detection method provided in an embodiment of the present application;

[0039] Fig.14 A schematic diagram of the structure of a delay detection device provided in an embodiment of the present application;

[0040] Fig.15 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0041] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0042] At present, a quantum chip can include multiple quantum bits, and adjacent quantum bits are coupled and connected through an adjustable coupler. The adjustable coupler is similar to the structure of the quantum bit, except that the adjustable coupler does not have an XY line interface for receiving quantum state control signals and a resonant cavity for directly reading information. The structure of the quantum bit and the adjustable coupler can be referred to the quantum bit and adjustable coupler in the relevant technology, and will not be described in detail here.

[0043] The quantum computing measurement and control system can be connected to the quantum bits on the quantum chip and the adjustable coupler through the above-mentioned pulse modulation line channel (i.e., the third line channel hereinafter) and the flux modulation line channel (i.e., the fourth line channel hereinafter). Due to the differences in the devices and line lengths set on the third line channel and the fourth line channel, the quantum state modulation signal and the quantum bit frequency control signal simultaneously emitted from the quantum computing measurement and control system cannot be transmitted to the quantum bit and the adjustable coupler at the same time, which will affect the quantum computing process of the quantum bit.

[0044] Therefore, in the related technology, the delay corresponding to each line channel can be determined, and then the corresponding line channel can be called for signal transmission based on the delay. However, due to various factors, there may be abnormal delay data in the delay corresponding to each line channel, which will seriously affect the quantum computing process of quantum bits.

[0045] For example, during the delay update process, due to manual errors or system errors, the delay of a certain line channel becomes abnormal, and the delays corresponding to each line channel are interrelated. At this time, the appearance of the abnormal delay data will affect the delay update of other line channels, thereby affecting the accuracy of the corresponding delays of all line channels.

[0046] For another example, when the line channels corresponding to the XY line interface and the Z line interface of a quantum bit are changed, if there is an abnormality in the delay corresponding to the changed line channel, this will affect the accuracy of quantum computing of the quantum computing bit.

[0047] In order to solve the problems in the related art, the present application embodiment provides a delay detection method. Figure 1 As shown, Figure 1The first flow chart of the delay detection method provided in the embodiment of the present application. The method can be applied to any electronic device, such as a quantum computing measurement and control system (i.e., a measurement and control integrated machine), or a management unit in a quantum computing measurement and control system, etc., and the electronic device is not specifically limited here. Figure 1 The method shown includes the following steps.

[0048] Step S101, when receiving a first detection task for a first line channel and a second line channel, obtaining a first delay corresponding to the first line channel and a second delay corresponding to the second line channel according to a pre-stored first correspondence between each line channel and the delay.

[0049] Step S102, based on the second correspondence between the pre-stored third line channel, the fourth line channel and the numerical value, determine whether the first line channel and the second line channel are linked, the third line channel is used to transmit the quantum state control signal, the fourth line channel is used to transmit the quantum bit frequency control signal, and the numerical value is used to indicate whether the third line channel and the fourth line channel are linked.

[0050] Step S103: If it is determined that the first line channel and the second line channel are linked, the first difference is compared with a preset time threshold, wherein the first difference is the difference between the first relative delay and the second relative delay, the first relative delay is the difference between the first duration of signal transmission corresponding to the first line channel and the second duration of signal transmission corresponding to the second line channel, and the second relative delay is the difference between the first delay and the second delay.

[0051] Step S104: when the first difference is less than or equal to a preset time threshold, determine that the first delay and the second delay are normal delay data.

[0052] pass Figure 1 The method shown can, when receiving a first detection task for a first line channel and a second line channel, obtain a first delay corresponding to the first line channel and a second delay corresponding to the second line channel according to a first corresponding relationship, and when determining that the first line channel and the second line channel are linked according to the second corresponding relationship, compare the difference between the first relative delay and the second relative delay with a preset time threshold, so as to determine whether the first delay and the second delay are abnormal delay data, thereby realizing detection of the corresponding delays of the first line channel and the second line channel, reducing the possibility of abnormal delays, improving the accuracy of the corresponding delays of each line channel, thereby improving the accuracy of signal transmission based on the delays of each line channel, and further improving the accuracy of quantum computing.

[0053] The embodiments of the present application are described below through specific examples.

[0054] For the above step S101, that is, when the first detection task for the first line channel and the second line channel is received, the first delay corresponding to the first line channel and the second delay corresponding to the second line channel are obtained according to the pre-stored first correspondence between each line channel and the delay.

[0055] In an embodiment of the present application, the quantum computing measurement and control system may include multiple third line channels and multiple fourth line channels.

[0056] The third line channel is used to transmit quantum state control signals to the quantum bits on the quantum chip, and the fourth line channel is used to transmit quantum bit frequency control signals to the quantum bits or adjustable couplers on the quantum chip. The number of the third line channel and the fourth line channel in the quantum computing measurement and control system can be set according to the number of quantum bits and adjustable couplers included on the quantum chip. Taking into account the existence of the adjustable coupler, the number of the third line channel in the quantum computing measurement and control system is less than the number of the fourth line channel. Here, the number of the third line channel and the fourth line channel in the quantum computing measurement and control system is not specifically limited.

[0057] In various scenarios such as the delay update scenario of the line channel, the line channel call scenario, and the line channel replacement scenario, the user can choose to perform delay detection on one or more line channels in the quantum computing measurement and control system. At this time, the user can trigger the delay detection process for at least two line channels in the quantum computing measurement and control system. Correspondingly, the electronic device can generate a corresponding delay detection task according to the operation triggered by the user. At this time, the electronic device will receive the delay detection tasks corresponding to any two line channels of the at least two line channels. Each trigger operation of the user can generate at least one delay detection task, and each delay detection task corresponds to two line channels in the quantum computing measurement and control system.

[0058] In the embodiment of the present application, the electronic device pre-stores the corresponding relationship between each line channel and the delay (recorded as the first corresponding relationship).

[0059] The first correspondence relationship may be expressed in the form of a list or a string. In addition, since the line channels included in the quantum computing measurement and control system may be divided into the third line channels and the fourth line channels, the first correspondence relationship may include a correspondence relationship between each third line channel and a time delay, and a correspondence relationship between each fourth line channel and a time delay.

[0060] For ease of understanding, the first correspondence is described using the second list and the third list as examples. The second list is the correspondence between the third line channel and the delay, which can be specifically shown in Table 1; the third list is the correspondence between the fourth line channel and the delay, which can be specifically shown in Table 2.

[0061] Table 1

[0062] Line Channel XY1 XY2 XY3 … Latency 0 0 0 …

[0063] Table 2

[0064] Line Channel Z1 Z2 Z3 … Latency 0 0 0 …

[0065] XY1-XY3 in the above Table 1 are the channel identifiers corresponding to the three third line channels in the above quantum computing measurement and control system, and delay 0 is the delay corresponding to the corresponding third line channel. Z1-Z3 in the above Table 2 are the channel identifiers corresponding to the three fourth line channels in the above quantum computing measurement and control system, and delay 0 is the delay corresponding to the corresponding fourth line channel.

[0066] For the above second list and third list, the delay corresponding to each line channel in the second list and the third list can be expressed as: the waiting time corresponding to the line channel when transmitting the corresponding quantum state control signal or the quantum bit frequency control signal. The difference between the delays corresponding to any two line channels is the relative delay corresponding to the two line channels, and the relative delay is expressed as the time difference between the corresponding signal transmissions of the two line channels when transmitting the corresponding quantum state control signal or the quantum bit frequency control signal.

[0067] In the embodiment of the present application, each delay in the second list and the third list may be a preset delay, such as 0 in the above Table 1, or may be a delay updated before the current moment.

[0068] In an optional embodiment, for each delay in the second list and the third list, if the delay is a delay updated before the current moment, the delay may be a delay updated before the current moment according to a relative delay between any two line channels. The any two line channels may be any third line channel and any fourth line channel, or any two fourth line channels.

[0069] In another optional embodiment, for each delay in the second list and the third list, if the delay is a delay updated before the current moment, the delay may be a delay updated by a delay update amount when other line channels associated with the corresponding line channel are updated before the current moment. The association relationship between two line channels may be represented by the establishment of a link between the two line channels, which may be specifically described below and will not be described in detail here.

[0070] When the electronic device receives a delay detection task for a first line channel and a second line channel (recorded as a first detection task), the electronic device can obtain the delay corresponding to the first line channel in the first correspondence relationship based on a pre-stored first correspondence relationship between each line channel and the delay, as the first delay; and obtain the delay corresponding to the second line channel in the first correspondence relationship as the second delay.

[0071] For ease of understanding, the following description is given by taking Table 1 and Table 2 as examples. It is now assumed that the first line channel is XY1 in Table 1 and the second line channel is Z1 in Table 2.

[0072] The electronic device may determine that the first delay corresponding to XY1 is 0 according to Table 1. The electronic device may determine that the second delay corresponding to Z1 is 0 according to Table 3 above.

[0073] When the electronic device receives the first detection task, the delays corresponding to the line channels in the first corresponding relationship are different, and the first line channel and the second line channel are different, so the determined delay and the second delay will also be different. Here, the first delay and the second delay are not specifically limited.

[0074] In an embodiment of the present application, the signal type transmitted by the first line channel may be the same as the signal type transmitted by the second line channel, or may be different from the signal type transmitted by the second line channel. For example, the first line channel may be the third line channel for transmitting a quantum state control signal, or may be the fourth line channel for transmitting a quantum bit frequency control signal. The second line channel may be the third line channel or the fourth line channel. Here, the third line channel and the fourth line channel are not specifically limited.

[0075] For the above step S102, that is, according to the second corresponding relationship between the pre-stored third line channel, the fourth line channel and the numerical value, it is determined whether the first line channel and the second line channel are linked, the third line channel is used to transmit the quantum state control signal, the fourth line channel is used to transmit the quantum bit frequency control signal, and the numerical value is used to indicate whether the third line channel and the fourth line channel are linked.

[0076] In the embodiment of the present application, the electronic device may store the correspondence between the third line channel and the fourth line channel and the values ​​(recorded as the second correspondence). The data values ​​in the correspondence may be used to indicate the link relationship (or association relationship) between the corresponding third line channel and the fourth line channel.

[0077] In an optional embodiment, the second corresponding relationship may be represented in the form of a table, a character string, etc.

[0078] For ease of understanding, the second corresponding relationship is described below using the first table as an example. In the first table, each row corresponds to a third line channel, and each column corresponds to a fourth line channel.

[0079] Table 3

[0080] XY / Z Z1 Z2 Z3 … XY1 0 / 1 0 / 1 0 / 1 … XY2 0 / 1 0 / 1 0 / 1 … XY3 0 / 1 0 / 1 0 / 1 … … … … … …

[0081] In the above Table 3, XY1, XY2, and XY3 are channel identifiers corresponding to the above third line channel, and Z1, Z2, and Z3 in Table 3 are channel identifiers corresponding to the above fourth line channel. Each cell in Table 3 has a corresponding third line channel, fourth line channel, and value.

[0082] The value of each cell in the above Table 3 may be a first value or a second value. The first value indicates that the third line channel and the fourth line channel corresponding to the cell are not linked, such as 0 in the above Table 3; the second value indicates that the third line channel and the fourth line channel corresponding to the cell are linked, such as 1 in the above Table 1. For ease of understanding, the following description is only based on the example of the first value being 0 and the second value being 1, which does not serve any limiting role.

[0083] For each row in the first list, if the values ​​corresponding to any two cells in the row are the second values, the electronic device can determine that there is an association relationship between the fourth line channels corresponding to the two cells, that is, the fourth line channels corresponding to the two cells are linked.

[0084] For ease of understanding, cell 1 corresponding to XY1 and Z1, and cell 2 corresponding to XY1 and Z2 in the above Table 3 are taken as examples for description.

[0085] When the values ​​corresponding to the above-mentioned cell 1 and cell 2 are both 1, that is, the values ​​corresponding to cell 1 and cell 2 are 11, the electronic device can determine that there is an association between Z1 and Z2; when at least one of the values ​​corresponding to the above-mentioned cell 1 and cell 2 is 0, that is, the values ​​corresponding to cell 1 and cell 2 are 00, 01 or 10, the electronic device can determine that there is no association between Z1 and Z2.

[0086] In the embodiment of the present application, the second corresponding relationship may be generated during the update process of the delay corresponding to the line channel. For example, the electronic device determines the delay corresponding to the two line channels according to the relative delay between the two line channels, that is, after determining the delay in the first corresponding relationship, the values ​​corresponding to the delays of the two line channels in the second corresponding relationship may be updated to the second values. Here, the generation of the second corresponding relationship is not described in detail.

[0087] After receiving the first detection task, the electronic device may determine whether a link is established between the first line channel and the second line channel according to the second corresponding relationship.

[0088] In the above Figure 1 In the illustrated embodiment, after receiving the first detection task, the electronic device first obtains the first delay and the second delay, and then determines whether the first line channel and the second line channel are linked. In addition, after receiving the first detection task, the electronic device may also first determine whether the first line channel and the second line channel are linked, and then obtain the first delay and the second delay, or may perform both at the same time. Here, the execution order of the above steps S101 and S102 after receiving the first detection task is not specifically limited.

[0089] For the above step S103, that is, if it is determined that the first line channel and the second line channel are linked, the first difference is compared with the preset time threshold, wherein the first difference is the difference between the first relative delay and the second relative delay, the first relative delay is the difference between the first duration of the signal transmission corresponding to the first line channel and the second duration of the signal transmission corresponding to the second line channel, and the second relative delay is the difference between the first delay and the second delay.

[0090] In this step, when determining that the first line channel and the second line channel are linked, the electronic device can calculate the difference between the first delay and the second delay as the second relative delay, and compare the difference between the first relative delay and the second relative delay (recorded as the first difference) with a preset time threshold to obtain a comparison result (recorded as the first comparison result).

[0091] The first relative delay is the difference between the first duration of the signal transmission corresponding to the first line channel and the second duration of the signal transmission corresponding to the second line channel. The first relative delay can be carried in the first detection task, or can be calculated by the electronic device using the first duration and the second duration.

[0092] The first duration and the second duration may be obtained by measuring the first line channel and the second line channel before the current moment. The measurement method of the first duration and the second duration may refer to the measurement method of the signal transmission duration in the related art, or may be obtained by measuring the related measurement and control delay of the quantum bit. Here, the measurement method of the first duration and the second duration is not specifically limited.

[0093] The first comparison result may indicate that the first difference is less than or equal to a preset time threshold, or indicate that the first difference is greater than the preset time threshold.

[0094] In an optional embodiment, the preset time threshold may be an integer multiple of a sampling period corresponding to the line channel.

[0095] For example, when the signal type transmitted by the first line channel is different from the signal type transmitted by the second line channel, such as when the first line channel is one of the third line channels and the second line channel is one of the fourth line channels, the preset time threshold can be an integer multiple of the sampling period corresponding to the third line channel.

[0096] For another example, when the signal type transmitted by the first line channel is the same as the signal type transmitted by the second line channel, such as when the first line channel and the second line channel both belong to the fourth line channel, the preset time threshold may be an integer multiple of the sampling period corresponding to the fourth line channel.

[0097] In the embodiment of the present application, although the relative delay between each line channel is mainly affected by the line channel itself, when the line channel is used for signal transmission, the duration of signal transmission is also affected by the signal sampling period corresponding to the line channel. Therefore, if the above-mentioned preset time threshold is determined according to the sampling period corresponding to the line channel, the electronic device compares the difference between the above-mentioned two relative delays with the preset delay threshold, which can effectively improve the accuracy of abnormal delay data judgment, thereby improving the accuracy and effectiveness of delay detection.

[0098] The above-mentioned preset time threshold can be set according to user requirements, etc. Here, the setting of the above-mentioned preset time threshold is not specifically limited.

[0099] With respect to the above step S104, that is, when the first difference is less than or equal to the preset time threshold, it is determined that the first delay and the second delay are normal delay data.

[0100] In this step, when the first comparison result indicates that the first difference is less than or equal to the preset time threshold, the electronic device can determine the first delay of the first line channel and the second delay of the second line channel, and match the relative delay of the signal transmission corresponding to the first line channel and the second line channel. That is, based on the first delay and the second delay, when the first line channel and the second line channel are called for signal transmission, the time when the two signals arrive at the quantum bit is almost the same. At this time, the electronic device can determine that there is no abnormality in the first delay and the second delay, that is, determine that the first delay and the second delay are normal delay data.

[0101] In the embodiment of the present application, the above Figure 1The method shown can be applied to a variety of scenarios, such as the delay update scenario of the above-mentioned line channel, the line channel call scenario, and the line channel replacement scenario, which effectively improves the applicability of the above-mentioned delay detection method in different scenarios. In addition, in different scenarios, the accuracy of the delay corresponding to each line channel can be effectively improved through the above-mentioned delay detection method, thereby improving the accuracy of delay update or line channel call based on normal delay data.

[0102] In an optional embodiment, according to the above Figure 1 The method shown in the figure, the embodiment of the present application also provides a delay detection method. Figure 2 As shown, Figure 2 A second flow chart of the delay detection method provided in the embodiment of the present application. The method comprises the following steps.

[0103] Step S201, receiving a first delay detection instruction sent by a user terminal, the first delay detection instruction including a first channel identifier of a first line channel, a second channel identifier of a second line channel, a first duration of signal transmission corresponding to the first line channel, and a second duration of signal transmission corresponding to the second line channel.

[0104] In this step, the user may send a delay detection instruction (ie, a first delay detection instruction) for the first line channel and the second line channel to the electronic device through the user terminal.

[0105] The first delay detection instruction may include a channel identifier corresponding to each line channel to be detected and a duration of signal transmission. That is, the first delay detection instruction may include a first channel identifier of the first line channel, a second channel identifier of the second line channel, a first duration of signal transmission corresponding to the first line channel, and a second duration of signal transmission corresponding to the second line channel.

[0106] The first line channel and the second line channel targeted by the first delay detection instruction have different signal types transmitted by these two line channels. For example, the first line channel can be used to transmit the quantum state control signal, that is, the first line channel belongs to the third line channel, and the second line channel can be used to transmit the quantum bit frequency control signal, that is, the second line channel belongs to the fourth line channel. For another example, the first line channel can belong to the fourth line channel, and the second line channel can belong to the third line channel.

[0107] For ease of understanding, when the first line channel and the second line channel correspond to different signal types, the following is only explained by taking the first line channel belonging to the third line channel and the second line channel belonging to the fourth line channel as an example, which does not serve any limiting purpose.

[0108] Step S202: Generate a first detection task for the first line channel and the second line channel according to the first channel identifier, the second channel identifier, the first duration, and the second duration.

[0109] In this step, when the electronic device receives the first delay detection instruction, it can generate a delay detection task for the first line channel and the second line channel according to the information included in the first delay detection instruction, that is, the first detection task.

[0110] In an optional embodiment, the electronic device may calculate the difference between the first duration and the second duration as the first relative delay according to the first duration and the second delay included in the first delay detection instruction. The electronic device may generate a first detection task including a first channel identifier, a second channel identifier and a first relative delay.

[0111] Through the above steps S201-S202, the electronic device can generate a delay detection task corresponding to the first line channel and the second line channel according to the user's selection, so as to detect the delay stored in the electronic device, that is, the delay in the above first corresponding relationship, so as to provide a guarantee for calling the first line channel and the second line channel for signal transmission based on the second relative delay between the first delay and the second delay in the later stage, so that the signal can be transmitted to the quantum bits on the quantum chip through the first line channel and the second line channel at the same time for quantum computing, thereby improving the accuracy of quantum computing.

[0112] Step S203, when receiving the first detection task for the first line channel and the second line channel, according to the pre-stored first correspondence between each line channel and the delay, obtain a first delay corresponding to the first line channel and a second delay corresponding to the second line channel.

[0113] Step S204, based on the second correspondence between the pre-stored third line channel, the fourth line channel and the numerical value, determine whether the first line channel and the second line channel are linked, the third line channel is used to transmit the quantum state control signal, the fourth line channel is used to transmit the quantum bit frequency control signal, and the numerical value is used to indicate whether the third line channel and the fourth line channel are linked.

[0114] Step S205: If it is determined that the first line channel and the second line channel are linked, the first difference is compared with a preset time threshold, wherein the first difference is the difference between the first relative delay and the second relative delay, the first relative delay is the difference between the first duration of signal transmission corresponding to the first line channel and the second duration of signal transmission corresponding to the second line channel, and the second relative delay is the difference between the first delay and the second delay.

[0115] Step S206: When the first difference is less than or equal to a preset time threshold, determine that the first delay and the second delay are normal delay data.

[0116] The above steps S203 to S206 are the same as the above steps S101 to S104.

[0117] In the above Figure 2 In the illustrated embodiment, only the method in which the first detection task is triggered by the user is used as an example for explanation. In addition, according to different actual application scenarios, other methods can also be used to trigger the generation of the first detection task. For example, in the scenario of line channel delay update, when the electronic device updates the delay of any two line channels, it can automatically detect the delay corresponding to the two line channels, and perform an update operation when the detection result indicates that the corresponding delay is abnormal delay data. Here, the method of triggering the generation of the first detection task is not specifically limited.

[0118] In an optional embodiment, when the second corresponding relationship is represented by the first list, and the signal type transmitted by the first line channel is different from the signal type transmitted by the second line channel, according to the Figure 1 The method shown in the figure, the embodiment of the present application also provides a delay detection method. Figure 3 As shown, Figure 3 A third flow chart of the delay detection method provided in the embodiment of the present application. The method comprises the following steps.

[0119] Step S301, when receiving a first detection task for a first line channel and a second line channel, obtaining a first delay corresponding to the first line channel and a second delay corresponding to the second line channel according to a pre-stored first correspondence between each line channel and the delay.

[0120] The above step S301 is the same as the above step S101.

[0121] Step S302: searching the first list for cells corresponding to the first line channel and the second line channel as target cells.

[0122] In this step, for each cell in the first list, there is a third line channel and a fourth line channel corresponding to the cell. Since the first line channel belongs to the third line channel and the second line channel belongs to the fourth line channel, there must be cells corresponding to the first line channel and the second line channel in the first list. The electronic device can traverse each cell in the first list and search for cells corresponding to the first line channel and the second line channel as target cells.

[0123] Step S303: if the value corresponding to the target cell is the first value, it is determined that the first line channel and the second line channel are not linked.

[0124] For each cell in the first list, there is a corresponding value for the cell, which may be the first value or the second value.

[0125] After the electronic device finds the target cell, if the value of the target cell is the first value, the electronic device may determine that the first line channel is not linked to the second line channel.

[0126] Step S304: if the value corresponding to the target cell is the second value, determine that the first line channel is linked to the second line channel.

[0127] In this step, after the electronic device finds the target cell, if the value of the target cell is the second value, the electronic device may determine that the first line channel is linked to the second line channel.

[0128] The above step S303 and step S304 are steps executed when the value corresponding to the target cell is the first value and the second value, respectively. Here, the execution of the above step S303 and step S304 is not specifically limited.

[0129] The above steps S302 to S304 are refinements of the above step S102.

[0130] Through the above steps S302 to S304, the electronic device can directly determine whether the first line channel and the second line channel are linked according to the corresponding values ​​of the first line channel and the second line channel in the first list, that is, determine whether the delay corresponding to the first line channel and the second line channel in the above first corresponding relationship is obtained according to the relative delay between the two line channels, thereby determining the validity of the delay corresponding to the first line channel and the second line channel, and when the delay corresponding to the first line channel and the second line channel is valid, detect the delay corresponding to the first line channel and the second line channel, thereby effectively improving the pertinence and effectiveness of delay detection.

[0131] Step S305: If it is determined that the first line channel and the second line channel are linked, the first difference is compared with a preset time threshold, wherein the first difference is the difference between the first relative delay and the second relative delay, the first relative delay is the difference between the first duration of signal transmission corresponding to the first line channel and the second duration of signal transmission corresponding to the second line channel, and the second relative delay is the difference between the first delay and the second delay.

[0132] Step S306: When the first difference is less than or equal to a preset time threshold, determine that the first delay and the second delay are normal delay data.

[0133] The above steps S305 to S306 are the same as the above steps S103 to S104.

[0134] In an optional embodiment, according to the above Figure 3 The method shown in the figure, the embodiment of the present application also provides a delay detection method. Figure 4 As shown, Figure 4 A fourth flow chart of the delay detection method provided in the embodiment of the present application. Figure 4 The following step is added to the method shown, namely step S307.

[0135] Step S307: If it is determined that the first line channel and the second line channel are not linked, the first delay and / or the second delay is updated based on the first relative delay.

[0136] In this step, when the electronic device determines that the first line channel and the second line channel are not linked, the electronic device may determine that it has not set the delay for the first line channel and the second line channel according to the relative delay corresponding to the first line channel and the second line channel. At this time, the electronic device may update the first delay and / or the second delay according to the first relative delay.

[0137] In an optional embodiment, if the first delay is greater than the second delay, when the first difference is less than the first relative delay, the electronic device may update the first delay to the first sum value; when the first difference is greater than the first relative delay, the electronic device may update the second delay to the second difference. The first difference is the difference between the first delay and the second delay, the first sum is the sum of the second delay and the first relative delay, and the second difference is the difference between the first delay and the first relative delay.

[0138] In another optional embodiment, if the first delay is less than the second delay, when the third difference is less than the first relative delay, the electronic device may update the second delay to the second sum value; when the third difference is greater than the first relative delay, the electronic device may update the first delay to the fourth difference value. The third difference value is the difference between the second delay and the first delay, the second sum value is the sum value between the first delay and the first relative delay, and the fourth difference value is the difference between the second delay and the first relative delay.

[0139] In an optional embodiment, when the first difference or the second difference is equal to the first relative delay, the electronic device may determine that the first delay and the second delay match the first relative delay. At this time, the electronic device may not update the first delay and the second delay.

[0140] The above delay update is only described by taking the update of one of the first delay and the second delay as an example. In addition, the electronic device may also use other methods to update one of the first delay and the second delay. For example, the electronic device may choose to update the delay of the line channel with a larger duration or a smaller duration according to the first duration and the second duration. In addition, the electronic device may also update the first delay and the second delay at the same time according to the first relative delay. Here, the update method of the first delay and the second delay is not specifically limited.

[0141] In an embodiment of the present application, after the electronic device updates the first delay and / or the second delay based on the first relative delay, it can also update the value of the target cell, that is, update the value of the target cell from the first value to the second value. In addition, for the first line channel of the delay update or the second line channel of the delay update, which is recorded as the update line channel, the electronic device can also synchronously update the delay of the associated line channel that has an associated relationship with the update line channel according to the delay update amount corresponding to the update line channel. Here, the calculation method of the delay update amount corresponding to the update line channel and the determination method of the associated line channel corresponding to the update line channel are not specifically described.

[0142] Through the above step S307, when the first line channel and the second line channel are not linked, the electronic device updates the first delay and / or the second delay according to the first relative delay, so that the updated delay can match the first relative delay, effectively improving the accuracy of the updated delay, thereby improving the accuracy of subsequent quantum computing.

[0143] In the embodiment of the present application, the above step S305 and step S307 are steps respectively executed by the electronic device when the first line channel and the second line channel are linked or not linked. Here, the execution of the above step S305 and step S307 is not specifically limited.

[0144] In an optional embodiment, according to the above Figure 3 The method shown in the figure, the embodiment of the present application also provides a delay detection method. Figure 5 As shown, Figure 5 A fifth flow chart of the delay detection method provided in the embodiment of the present application. Figure 5 The following steps are added to the method shown, namely step S308-step S309.

[0145] Step S308: When the first difference is greater than a preset time threshold, determine that the first delay and the second delay are abnormal delay data.

[0146] In this step, when the first comparison result indicates that the first difference is greater than the preset time threshold, the electronic device can determine that the first delay of the first line channel and the second delay of the second line channel do not match the relative delay of the signal transmission corresponding to the first line channel and the second line channel. That is, based on the first delay and the second delay, when the first line channel and the second line channel are called for signal transmission, there is a large difference in the time when the two signals reach the quantum bit. At this time, the electronic device can determine that the first delay and the second delay are abnormal, that is, determine that the first delay and the second delay are abnormal delay data.

[0147] The above step S308 and step S306 are steps respectively executed by the electronic device when the comparison result between the first difference and the preset time threshold is different. Here, the execution of the above step S306 and step S308 is not specifically limited.

[0148] Step S309: Send an abnormal delay alarm for the first line channel and the second line channel.

[0149] In this step, after determining that the first delay and the second delay are abnormal delay data, the electronic device may send an abnormal delay alarm for the first line channel and the second line channel.

[0150] For example, the electronic device may send a delay abnormality warning message to the user terminal. The user terminal may display the received delay abnormality warning message so that the user can determine that the delays corresponding to the first line channel and the second line channel are abnormal.

[0151] In an optional embodiment, the abnormal delay alarm may carry channel identifiers corresponding to the first line channel and the second line channel, abnormal delay data, abnormal reasons, log information, etc. Here, the information carried in the abnormal delay alarm is not specifically limited.

[0152] Through the above steps S308-S309, the electronic device can determine that when the delay corresponding to the line channel is abnormal, it will issue an abnormal alarm for the line channel with the abnormal delay, so that the user can promptly determine the existence of the delay anomaly and avoid the abnormal delay from adversely affecting the subsequent delay update process or quantum computing process.

[0153] In an optional embodiment, according to the above Figure 3 The method shown in the figure, the embodiment of the present application also provides a delay detection method. Figure 6 As shown, Figure 6 The sixth flow chart of the delay detection method provided in the embodiment of the present application is as follows. Figure 6 The following step is added to the method shown, namely step S310.

[0154] Step S310: Based on the second relative delay, the first line channel and the second line channel are called to perform signal transmission.

[0155] In this step, after determining that the above-mentioned first delay and second delay are normal delay data, the electronic device can call the first line channel and the second line channel for signal transmission according to the difference between the first delay and the second delay, that is, according to the above-mentioned second relative delay, so that the quantum state control signal transmitted by the first line channel and the quantum bit frequency control signal transmitted by the second line channel can reach the same quantum bit connected by the first line channel and the second line channel at the same time.

[0156] Through the above step S310, the electronic device can call the line channel corresponding to the normal delay data for signal transmission according to the detected normal delay data, so that the two transmitted signals can reach the quantum bit for quantum calculation at the same time, thereby improving the accuracy of quantum calculation.

[0157] In an optional embodiment, the electronic device may receive a second detection task for the second line channel and the fifth line channel at the same time as receiving the first detection task. The first line channel, the second line channel and the fifth line channel are all fourth line channels. Figure 1 The method shown in the figure, the embodiment of the present application also provides a delay detection method. Figure 7 As shown, Figure 7 The seventh flow chart of the delay detection method provided in the embodiment of the present application includes the following steps.

[0158] Step S701: upon receiving a first detection task for a first line channel and a second line channel, obtaining a first delay corresponding to the first line channel and a second delay corresponding to the second line channel according to a pre-stored first correspondence between each line channel and the delay.

[0159] Step S702, based on the second correspondence between the pre-stored third line channel, the fourth line channel and the numerical value, determine whether the first line channel and the second line channel are linked, the third line channel is used to transmit the quantum state control signal, the fourth line channel is used to transmit the quantum bit frequency control signal, and the numerical value is used to indicate whether the third line channel and the fourth line channel are linked.

[0160] Step S703: If it is determined that the first line channel and the second line channel are linked, the first difference is compared with a preset time threshold, wherein the first difference is the difference between the first relative delay and the second relative delay, the first relative delay is the difference between the first duration of signal transmission corresponding to the first line channel and the second duration of signal transmission corresponding to the second line channel, and the second relative delay is the difference between the first delay and the second delay.

[0161] Step S704: when the first difference is less than or equal to a preset time threshold, determine that the first delay and the second delay are normal delay data.

[0162] The above steps S701 to S704 are the same as the above steps S101 to S104.

[0163] Step S705: Obtain a third delay corresponding to the fifth line channel according to the first corresponding relationship.

[0164] In this step, when the electronic device receives the second detection task, it can obtain the second delay corresponding to the second line channel and the third delay corresponding to the fifth line channel according to the first corresponding relationship.

[0165] In the above step S705, considering that the second delay corresponding to the second line channel has been obtained in the above step S701, the step of repeatedly obtaining the second delay is not reflected in the above step S705.

[0166] In an optional embodiment, the first detection task and the second detection task may be received simultaneously. In this case, the step S705 may be executed simultaneously with the step S701.

[0167] Step S706: Determine whether a link is established between the second line channel and the fifth line channel according to the second corresponding relationship.

[0168] In this step, the electronic device can determine whether the second line channel and the fifth line channel are linked according to the correspondence between the third line channel, the fourth line channel and the value in the first correspondence. The specific determination method can be found in the description below and will not be repeated here.

[0169] Step S707: If it is determined that the second line channel and the fifth line channel are linked, the second difference is compared with the preset time threshold, wherein the second difference is the difference between the third relative delay and the fourth relative delay, the third relative delay is the difference between the third duration of the signal transmission corresponding to the fifth line channel and the second duration of the signal transmission corresponding to the second line channel, and the fourth relative delay is the difference between the third delay and the second delay.

[0170] In this step, when determining that the second line channel and the fifth line channel are linked, the electronic device may calculate the difference between the third duration of signal transmission corresponding to the fifth line channel and the second duration of signal transmission corresponding to the second line channel as the second relative delay; and calculate the difference between the third delay and the second delay as the fourth relative delay. After calculating the third relative delay and the fourth relative delay, the electronic device may compare the difference between the third relative delay and the fourth relative delay (recorded as the second difference) with a preset time threshold to obtain a comparison result (recorded as the second comparison result).

[0171] The second comparison result may indicate that the second difference is less than or equal to a preset time threshold, or indicate that the second difference is greater than the preset time threshold.

[0172] Step S708: When the second difference is less than or equal to a preset time threshold, determine that the second delay and the third delay are normal delay data.

[0173] In this step, when the second comparison result indicates that the second difference is less than or equal to the preset time threshold, the electronic device can determine that the third delay of the fifth line channel and the second delay of the second line channel match the relative delay of the signal transmission corresponding to the fifth line channel and the second line channel. That is, based on the third delay and the second delay, when the fifth line channel and the second line channel are called for signal transmission, the time when the two signals arrive at the quantum bit is almost the same. At this time, the electronic device can determine that there is no abnormality in the third delay and the second delay, that is, determine that the third delay and the second delay are normal delay data.

[0174] In an embodiment of the present application, only when the first delay and the second delay are determined as normal delay data in the above step S704, and the second delay and the third delay are determined as normal delay data in the above step S708, the electronic device can determine that the first delay, the second delay and the third delay are normal delay data, and then perform signal transmission based on the first delay, the second delay and the third delay.

[0175] Through the above steps S705 to S708, the electronic device can simultaneously determine whether the delays corresponding to the three line channels are correct. Figure 7 The first line channel, the second line channel and the third line channel are all the fourth line channel mentioned above. Therefore, by detecting the delay of the first line channel, the second line channel and the third line channel, the delay detection of the line channel connected to the Z line interface on the two adjacent quantum bits on the quantum chip and the coupling link between the two quantum bits can be realized, providing delay guarantee for multi-qubit logic operations.

[0176] In the above Figure 7In the illustrated embodiment, only the execution of steps S705 to S708 after steps S701 to S704 is used as an example for description. Since the first detection task and the second detection task can be generated at the same time, the steps S705 to S708 can be executed before steps S701 to S704, or can be executed at the same time as steps S701 to S704. Here, the execution order of the steps S705 to S708 and steps S701 to S704 is not specifically limited.

[0177] In an optional embodiment, according to the above Figure 7 The method shown in the figure, the embodiment of the present application also provides a delay detection method. Figure 8 As shown, Figure 8 The eighth flow chart of the delay detection method provided in the embodiment of the present application is as follows. The method comprises the following steps.

[0178] Step S801, receiving a second delay detection instruction sent by a user terminal, where the second delay detection instruction includes a first channel identifier of a first line channel, a second channel identifier of a second line channel, a third channel identifier of a fifth line channel, a first duration of signal transmission corresponding to the first line channel, a second duration of signal transmission corresponding to the second line channel, and a third duration of signal transmission corresponding to the fifth line channel.

[0179] In this step, the user may send a delay detection instruction (ie, a second delay detection instruction) for the first line channel, the second line channel, and the fifth line channel to the electronic device through the user terminal.

[0180] The second delay detection instruction may include a channel identifier corresponding to each line channel to be detected and a duration of signal transmission. That is, the second delay detection instruction may include a first channel identifier of the first line channel, a second channel identifier of the second line channel, a third channel identifier of the fifth line channel, a first duration of signal transmission corresponding to the first line channel, a second duration of signal transmission corresponding to the second line channel, and a third duration of signal transmission corresponding to the fifth line channel.

[0181] The first line channel, the second line channel and the fifth line channel targeted by the second delay detection instruction have the same signal type transmitted by these three line channels. For example, the first line channel, the second line channel and the fifth line channel can all be used to transmit the quantum bit frequency control signal.

[0182] Step S802: Generate a first detection task for the first line channel and the second line channel, and a second detection task for the second line channel and the fifth line channel according to the first channel identifier, the second channel identifier, the third channel identifier, the first duration, the second duration, and the third duration.

[0183] The generation method of the first detection task and the second detection task in the above step S802 can refer to the generation method of the first detection task in the above step S202, and will not be described in detail here.

[0184] Through the above steps S801-S802, the electronic device can generate delay detection tasks corresponding to the first line channel, the second line channel and the fifth line channel according to the user's selection, so as to detect the delay stored in the electronic device, that is, the delay in the above first corresponding relationship, so as to provide a guarantee for calling the first line channel, the second line channel and the fifth line channel for signal transmission based on the second relative delay and the fourth relative delay corresponding to the first delay, the second delay and the third delay in the later stage, so that the signal can be transmitted through the first line channel, the second line channel and the fifth line channel to the quantum bits on the quantum chip for quantum computing, thereby improving the accuracy of quantum computing.

[0185] Step S803: upon receiving a first detection task for a first line channel and a second line channel, obtaining a first delay corresponding to the first line channel and a second delay corresponding to the second line channel according to a pre-stored first correspondence between each line channel and the delay.

[0186] Step S804, based on the second correspondence between the pre-stored third line channel, the fourth line channel and the numerical value, determine whether the first line channel and the second line channel are linked, the third line channel is used to transmit the quantum state control signal, the fourth line channel is used to transmit the quantum bit frequency control signal, and the numerical value is used to indicate whether the third line channel and the fourth line channel are linked.

[0187] Step S805: If it is determined that the first line channel and the second line channel are linked, the first difference is compared with a preset time threshold, wherein the first difference is the difference between the first relative delay and the second relative delay, the first relative delay is the difference between the first duration of signal transmission corresponding to the first line channel and the second duration of signal transmission corresponding to the second line channel, and the second relative delay is the difference between the first delay and the second delay.

[0188] Step S806: When the first difference is less than or equal to a preset time threshold, determine that the first delay and the second delay are normal delay data.

[0189] Step S807: Obtain a third delay corresponding to the fifth line channel according to the first corresponding relationship.

[0190] Step S808: Determine whether a link is established between the second line channel and the fifth line channel according to the second corresponding relationship.

[0191] Step S809: If it is determined that the second line channel and the fifth line channel establish a link, the second difference is compared with the preset time threshold, wherein the second difference is the difference between the third relative delay and the fourth relative delay, the third relative delay is the difference between the third duration of the signal transmission corresponding to the fifth line channel and the second duration of the signal transmission corresponding to the second line channel, and the fourth relative delay is the difference between the third delay and the second delay.

[0192] Step S810: When the second difference is less than or equal to a preset time threshold, determine that the second delay and the third delay are normal delay data.

[0193] The above steps S803 to S810 are the same as the above steps S701 to S708.

[0194] In an optional embodiment, when the second corresponding relationship is represented as a first list, according to the above Figure 7 The method shown in the figure, the embodiment of the present application also provides a delay detection method. Fig. 9 As shown, Fig. 9 The ninth flow chart of the delay detection method provided in the embodiment of the present application. Fig. 9 In the method shown, the above step S702 can be refined into the following steps, namely step S7021-step S7023.

[0195] Step S7021, searching whether there is a first cell group in the first list, the first cell group being cells whose two values ​​are the second value and which correspond to the first line channel and the second line channel respectively on the same third line channel.

[0196] In this step, for the column where the first line channel and the second line channel are located in the first list, the electronic device may traverse each row in the first list row by row to find out whether the first cell group exists in the first list.

[0197] For each third line channel in the first list, when the value of the cell corresponding to the third line channel and the first line channel is the second value, and the value of the cell corresponding to the third line channel and the second line channel is the second value, the electronic device can determine that these two cells are the first cell group.

[0198] For ease of understanding, the first cell group is described with reference to Table 4 as an example.

[0199] Table 4

[0200] XY / Z Z1 Z2 Z3 Z4 Z5 Z6 Z7 Z8 XY1 1 0 1 0 1 0 0 0 XY2 0 1 0 0 0 0 0 0 XY3 0 0 1 0 1 0 0 0 XY4 0 0 0 1 0 0 0 0

[0201] In one example, if the first line channel and the second line channel are Z1 and Z2 in Table 4, respectively, according to Table 1, there is no row in the column where Z1 and Z2 are located whose values ​​are both 1. At this time, the electronic device can determine that the first cell group is not found in the first list.

[0202] In another example, if the first line channel and the second line channel are Z1 and Z3 in Table 4, respectively, it can be seen from Table 1 that there are rows in the columns where Z1 and Z3 are located whose values ​​are both 1, namely, the cells corresponding to XY1 and Z1, and the cells corresponding to XY1 and Z3. At this time, the electronic device can determine that the first cell group is found in the first list.

[0203] Step S7022: When the first cell group is not found, determine that the first line channel and the second line channel are not linked.

[0204] Step S7023: when the first cell group is found, determine whether the first line channel is linked to the second line channel.

[0205] The above steps S7022 and S7023 are steps respectively executed by the electronic device according to the search result of the first cell group. Here, the execution of the above steps S7022 and S7023 is not specifically limited.

[0206] Through the above steps S7021 to S7023, the electronic device can determine whether the first line channel and the second line channel are linked by searching the first cell in the first list, thereby effectively improving the accuracy of the judgment on whether the link between the first line channel and the second line channel is established. Therefore, when the first line channel and the second line channel are linked, the delay corresponding to the first line channel and the second line channel is detected, thereby effectively improving the pertinence and effectiveness of the delay detection.

[0207] In the above Fig. 9 In the method shown, the above step S706 can be refined into the following steps, namely step S7061-step S7063.

[0208] Step S7061, searching whether there is a second cell group in the first list, the second cell group being cells whose two values ​​are second values ​​and which correspond to the second line channel and the fifth line channel respectively on the same third line channel.

[0209] The method for searching the second cell group may refer to the method for searching the first cell group, and will not be described in detail here.

[0210] Step S7062: When the second cell group is not found, determine that the second line channel and the fifth line channel are not linked.

[0211] Step S7063: when the second cell group is found, determine that the second line channel is linked to the fifth line channel.

[0212] The above steps S7062 and S7063 are steps respectively executed by the electronic device according to the search result of the second cell group. Here, the execution of the above steps S7062 and S7063 is not specifically limited.

[0213] Through the above steps S7061-S7063, the electronic device can determine whether the second line channel and the fifth line channel are linked by searching the second cell in the first list, which effectively improves the accuracy of the judgment on whether the second line channel and the fifth line channel are linked. Therefore, when the second line channel and the fifth line channel are linked, the delay corresponding to the second line channel and the fifth line channel is detected, which effectively improves the pertinence and effectiveness of the delay detection.

[0214] In an optional embodiment, according to the above Figure 7 The method shown in the figure, the embodiment of the present application also provides a delay detection method. Fig.10 As shown, Fig.10 The tenth flow chart of the delay detection method provided in the embodiment of the present application is as follows. Fig.10 The following steps are added to the method shown, namely step S709 to step S710.

[0215] Step S709: when the first difference is greater than the preset time threshold and the second difference is greater than the preset time threshold, determine that the first delay, the second delay and the third delay are abnormal delay data.

[0216] In this step, when the above-mentioned first difference is greater than the above-mentioned preset delay threshold, and the above-mentioned second difference is greater than the preset time threshold, the electronic device can determine that the first delay of the first line channel and the second delay of the second line channel do not match the relative delay of the signal transmission corresponding to the first line channel and the second line channel; and the second delay of the second line channel and the third delay of the fifth line channel do not match the relative delay of the signal transmission corresponding to the second line channel and the fifth line channel. That is, based on the first delay, the second delay and the third delay, when the first line channel, the second line channel and the fifth line channel are called for signal transmission, there is a large difference in the time when the three signals arrive at the quantum bit. At this time, the electronic device can determine that the first delay, the second delay and the third delay are abnormal, that is, determine that the first delay, the second delay and the third delay are abnormal delay data.

[0217] The above step S709 is executed when the above step S703 corresponds to the first comparison result indicating that the first difference is greater than the preset time threshold, and the above step S707 corresponds to the second comparison result indicating that the second difference is greater than the preset time threshold. Here, the execution of the above step S709 is not specifically limited.

[0218] Step S710: Send abnormal delay alarms for the first line channel, the second line channel, and the fifth line channel.

[0219] The sending of the abnormal delay alarm in the above step S710 can refer to the sending method of the abnormal delay alarm in the above step S309, and will not be described in detail here.

[0220] Through the above steps S709-S710, the electronic device can determine that when the delay corresponding to the line channel is abnormal, it will issue an abnormal alarm for the line channel with the abnormal delay, so that the user can promptly determine the existence of the delay anomaly and avoid the abnormal delay from adversely affecting the subsequent delay update process or the quantum computing process.

[0221] In an optional embodiment, according to the above Figure 7 The method shown in the figure, the embodiment of the present application also provides a delay detection method. Fig.11 As shown, Fig.11 This is a schematic diagram of the eleventh flow chart of the delay detection method provided in the embodiment of the present application. Fig.11 The following step is added to the method shown, namely step S711.

[0222] Step S711: Based on the second relative delay and the fourth relative delay, the first line channel, the second line channel and the fifth line channel are called to perform signal transmission.

[0223] In this step, after determining that the above-mentioned first delay, second delay and third delay are normal delay data, the electronic device can call the first line channel, the second line channel and the fifth line channel for signal transmission according to the above-mentioned second relative delay and the fourth relative delay, that is, the above-mentioned quantum bit frequency control signal is transmitted to the Z-line interface corresponding to the respectively connected quantum bits and adjustable couplers through the first line channel, the second line channel and the fifth line channel, so that the three-way quantum bit frequency control signals can reach the corresponding Z-line interface at the same time, so that the two quantum bits and the adjustable coupler can perform quantum calculations according to the received signals.

[0224] For ease of understanding, the second relative delay is t1 and the fourth relative delay is t2. Now assume that the first line channel, the second line channel and the fifth line channel are connected to the first qubit, the second qubit and the Z line interface of the adjustable coupler respectively.

[0225] At time t, the electronic device uses the first line channel to transmit the quantum bit frequency control signal to the first quantum bit. At t+t2, the electronic device can use the second line channel to transmit the quantum bit frequency control signal to the second quantum bit. At t+t2+t1, the electronic device can use the fifth line channel to transmit the quantum bit frequency control signal to the adjustable coupler.

[0226] In the above step S711, when the above first quantum bit, the second quantum bit and the adjustable coupler perform quantum computing, the first quantum bit and the second quantum bit require not only the above quantum bit frequency control signal, but also a quantum state control signal. That is, it is necessary to receive the quantum state control signal transmitted through the above third line channel. After the corresponding delay of the third line channel connected to the corresponding XY line interface of the first quantum bit and the second quantum bit is determined as normal delay data, the relative delay between each line channel corresponding to the connection of the first quantum bit, the second quantum bit and the adjustable coupler is also determined. The electronic device can transmit signals according to the relative delay between each line channel, which is not described in detail here.

[0227] Through the above step S711, the electronic device can send the quantum bit frequency control signal according to the above second relative delay and the fourth relative delay, so that the three-way quantum bit frequency control signal can reach two quantum bits and an adjustable coupler at the same time, ensuring the accuracy of quantum computing.

[0228] In an optional embodiment, according to the above Figure 7 The method shown in the figure, the embodiment of the present application also provides a delay detection method. Fig.12 As shown, Fig.12 This is a twelfth flow chart of the delay detection method provided in the embodiment of the present application. Fig.12 The following step is added to the method shown, namely step S712.

[0229] Step S712: If it is determined that the second line channel and the fifth line channel are not linked, the second delay and / or the third delay is updated based on the third relative delay.

[0230] In this step, after the electronic device executes the above steps S704 and S706, if it is determined that the second line channel and the fifth line channel are not linked, the electronic device can determine that the above first delay and the second delay are normal delay data, but the second delay and the third delay are not delays determined when the second line channel and the fifth line channel are linked. At this time, the electronic device can update the above second delay and / or third delay according to the above third relative delay.

[0231] The updating method of the second delay and / or the third delay may refer to the updating method of the first delay and / or the second delay in the step S307, and will not be described in detail here.

[0232] In an optional embodiment, considering that the update of the second delay may cause the first delay and the updated second delay to not match the relative delay between the first line channel and the second line channel, when the electronic device executes the step S712, it may give priority to updating the third delay, or, after updating the second delay, synchronously update the first delay according to the delay update amount of the second delay.

[0233] In the embodiment of the present application, the manner of updating the second delay and / or the third delay based on the third relative delay is not specifically limited.

[0234] The above step S707 and step S712 are steps respectively executed when the second line channel and the fifth line channel are linked and not linked. Here, the execution of the above step S707 and step S712 is not specifically limited.

[0235] Through the above step S712, the electronic device updates the second delay and / or the third delay when the first delay and the second delay match the relative delay between the first line channel and the second line channel, but the second delay and the third delay do not match the relative delay between the second line channel and the fifth line channel, so that the updated delay can match the relative delay, improve the accuracy of each delay, and provide guarantee for the subsequent quantum computing process.

[0236] In an optional embodiment, according to the above Figure 7 The method shown in the figure, the embodiment of the present application also provides a delay detection method. Fig.13 As shown, Fig.13 This is a thirteenth flow chart of the delay detection method provided in the embodiment of the present application. Fig.13 The following step is added to the method shown, namely step S713.

[0237] Step S713: If it is determined that the first line channel and the second line channel are not linked, the first delay and / or the second delay is updated based on the first relative delay.

[0238] In this step, after the electronic device executes the above steps S702 and S708, if it is determined that the first line channel and the second line channel are not linked, the electronic device can determine that the above second delay and the third delay are normal delay data, but the first delay and the second delay are not delays determined when the first line channel and the second line channel are linked. At this time, the electronic device can update the above first delay and / or second delay according to the above first relative delay.

[0239] The updating method of the first delay and / or the second delay may refer to the updating method of the first delay and / or the second delay in the step S307, and will not be described in detail here.

[0240] In an optional embodiment, considering that the update of the second delay may cause the third delay and the updated second delay to not match the relative delay between the fifth line channel and the second line channel, when the electronic device executes the step S713, it may give priority to updating the first delay, or, after updating the second delay, it may synchronously update the third delay according to the delay update amount of the second delay.

[0241] In the embodiment of the present application, the manner of updating the first delay and / or the second delay based on the first relative delay is not specifically limited.

[0242] The above step S713 is executed after it is determined in the above step S702 that the first line channel is not linked to the second line channel, and it is determined in the above step S708 that the second delay and the third delay are normal delay data. Here, the execution of the above step S713 is not specifically limited.

[0243] Through the above step S713, the electronic device updates the first delay and / or the second delay when the second delay and the third delay match the relative delay between the second line channel and the first line channel, but the first delay and the second delay do not match the relative delay between the first line channel and the second line channel, so that the updated delay can match the relative delay, improve the accuracy of each delay, and provide guarantee for the subsequent quantum computing process.

[0244] Based on the same inventive concept, according to the delay detection method provided in the above embodiment of the present application, the embodiment of the present application also provides a delay detection device. Fig.14 As shown, Fig.14 A schematic diagram of the structure of a delay detection device provided in an embodiment of the present application. The device includes the following modules.

[0245] A first acquisition module 1401 is configured to, upon receiving a first detection task for a first line channel and a second line channel, acquire a first delay corresponding to the first line channel and a second delay corresponding to the second line channel according to a pre-stored first correspondence relationship between each line channel and the delay;

[0246] A first determination module 1402 is used to determine whether the first line channel and the second line channel are linked according to a pre-stored second correspondence between the third line channel, the fourth line channel and the numerical value, the third line channel is used to transmit the quantum state control signal, the fourth line channel is used to transmit the quantum bit frequency control signal, and the numerical value is used to indicate whether the third line channel and the fourth line channel are linked;

[0247] A first comparison module 1403 is configured to compare a first difference with a preset time threshold if it is determined that the first line channel and the second line channel are linked, wherein the first difference is a difference between a first relative delay and a second relative delay, the first relative delay is a difference between a first duration of signal transmission corresponding to the first line channel and a second duration of signal transmission corresponding to the second line channel, and the second relative delay is a difference between the first delay and the second delay;

[0248] The second determining module 1404 is configured to determine that the first delay and the second delay are normal delay data when the first difference is less than or equal to a preset time threshold.

[0249] Optionally, the second corresponding relationship is represented as a first list, each row in the first list corresponds to a third line channel, and each column corresponds to a fourth line channel;

[0250] The first determining module 1402 may be specifically configured to search the first list for cells corresponding to the first line channel and the second line channel as target cells if the type of the signal transmitted by the first line channel is different from the type of the signal transmitted by the second line channel.

[0251] If the value corresponding to the target cell is the first value, it is determined that the first line channel and the second line channel are not linked;

[0252] If the value corresponding to the target cell is the second value, it is determined that the first line channel is linked to the second line channel.

[0253] Optionally, the delay detection device may further include:

[0254] The first updating module is configured to update the first delay and / or the second delay based on the first relative delay if it is determined that the first line channel and the second line channel are not linked.

[0255] Optionally, the delay detection device may further include:

[0256] A third determination module, configured to determine that the first delay and the second delay are abnormal delay data when the first difference is greater than a preset time threshold;

[0257] The first sending module is used to send abnormal delay alarms for the first line channel and the second line channel.

[0258] Optionally, the delay detection device may further include:

[0259] The first calling module is used to call the first line channel and the second line channel for signal transmission based on the second relative delay after determining that the first delay and the second delay are normal delay data.

[0260] Optionally, the delay detection device may further include:

[0261] A first receiving module is used to receive a first delay detection instruction sent by a user terminal, where the first delay detection instruction includes a first channel identifier of a first line channel, a second channel identifier of a second line channel, a first duration of signal transmission corresponding to the first line channel, and a second duration of signal transmission corresponding to the second line channel;

[0262] The first generating module is used to generate a first detection task for the first line channel and the second line channel according to the first channel identifier, the second channel identifier, the first duration and the second duration.

[0263] Optionally, the delay detection device may further include:

[0264] A second acquisition module, configured to acquire a third delay corresponding to the fifth line channel according to the first corresponding relationship if, when receiving the first detection task, a second detection task for the second line channel and the fifth line channel is also received, and the first line channel, the second line channel and the fifth line channel are all fourth line channels;

[0265] a fourth determining module, configured to determine whether a link is established between the second line channel and the fifth line channel according to the second corresponding relationship;

[0266] a second comparison module, configured to compare the second difference with a preset time threshold if it is determined that the second line channel and the fifth line channel are linked, wherein the second difference is a difference between a third relative delay and a fourth relative delay, the third relative delay is a difference between a third duration of signal transmission corresponding to the fifth line channel and a second duration of signal transmission corresponding to the second line channel, and the fourth relative delay is a difference between the third delay and the second delay;

[0267] The fifth determining module is used to determine that the second delay and the third delay are normal delay data when the second difference is less than or equal to a preset time threshold.

[0268] Optionally, the second corresponding relationship is represented as a first list, each row in the first list corresponds to a third line channel, and each column corresponds to a fourth line channel;

[0269] The first determination module 1402 may be specifically used to search whether there is a first cell group in the first list, where the first cell group is two cells whose values ​​are the second value and correspond to the first line channel and the second line channel respectively on the same third line channel; when the first cell group is not found, it is determined that the first line channel and the second line channel are not linked; when the first cell group is found, it is determined that the first line channel and the second line channel are linked;

[0270] The fourth determination module is specifically used to search whether there is a second cell group in the first list, where the second cell group is two cells whose values ​​are the second value and correspond to the second line channel and the fifth line channel respectively on the same third line channel; when the second cell group is not found, it is determined that the second line channel and the fifth line channel are not linked; when the second cell group is found, it is determined that the second line channel and the fifth line channel are linked.

[0271] Optionally, the delay detection device may further include:

[0272] a sixth determination module, configured to determine that the first delay, the second delay, and the third delay are abnormal delay data when the first difference is greater than a preset time threshold and the second difference is greater than a preset time threshold;

[0273] The second sending module is used to send abnormal delay alarms for the first line channel, the second line channel and the fifth line channel.

[0274] Optionally, the delay detection device may further include:

[0275] The second calling module is used to call the first line channel, the second line channel and the fifth line channel for signal transmission based on the second relative delay and the fourth relative delay after determining that the second delay and the third delay are normal delay data.

[0276] Optionally, the delay detection device may further include:

[0277] The second updating module is used for updating the second delay and / or the third delay based on the third relative delay if it is determined that the second line channel and the fifth line channel are not linked after determining that the first delay and the second delay are normal delay data.

[0278] Optionally, the delay detection device may further include:

[0279] The third updating module is used to update the first delay and / or the second delay based on the first relative delay if it is determined that the first line channel and the second line channel are not linked after determining that the second delay and the third delay are normal delay data.

[0280] Optionally, the delay detection device may further include:

[0281] A second receiving module is used to receive a second delay detection instruction sent by the user terminal, where the second delay detection instruction includes a first channel identifier of the first line channel, a second channel identifier of the second line channel, a third channel identifier of the fifth line channel, a first duration of signal transmission corresponding to the first line channel, a second duration of signal transmission corresponding to the second line channel, and a third duration of signal transmission corresponding to the fifth line channel;

[0282] The second generation module is used to generate a first detection task for the first line channel and the second line channel, and a second detection task for the second line channel and the fifth line channel according to the first channel identifier, the second channel identifier, the third channel identifier, the first duration, the second duration and the third duration.

[0283] By using the device provided in the embodiment of the present application, when receiving a first detection task for a first line channel and a second line channel, a first delay corresponding to the first line channel and a second delay corresponding to the second line channel can be obtained according to a first corresponding relationship. When it is determined according to the second corresponding relationship that the first line channel and the second line channel are linked, the difference between the first relative delay and the second relative delay is compared with a preset time threshold, so as to determine whether the first delay and the second delay are abnormal delay data, thereby realizing detection of the delays corresponding to the first line channel and the second line channel, reducing the possibility of abnormal delays, improving the accuracy of the delays corresponding to each line channel, thereby improving the accuracy of signal transmission based on the delays of each line channel, and further improving the accuracy of quantum computing.

[0284] Based on the same inventive concept, according to the delay detection method provided in the above embodiment of the present application, the embodiment of the present application also provides an electronic device, such as Fig.15 As shown, it includes a processor 1501, a communication interface 1502, a memory 1503 and a communication bus 1504, wherein the processor 1501, the communication interface 1502, and the memory 1503 communicate with each other through the communication bus 1504.

[0285] Memory 1503, used for storing computer programs;

[0286] The processor 1501 is used to implement the following steps when executing the program stored in the memory 1503:

[0287] When receiving a first detection task for a first line channel and a second line channel, obtaining a first delay corresponding to the first line channel and a second delay corresponding to the second line channel according to a pre-stored first correspondence relationship between each line channel and the delay;

[0288] Determine whether the first line channel and the second line channel are linked according to a pre-stored second correspondence between the third line channel, the fourth line channel and the numerical value, the third line channel is used to transmit the quantum state control signal, the fourth line channel is used to transmit the quantum bit frequency control signal, and the numerical value is used to indicate whether the third line channel and the fourth line channel are linked;

[0289] If it is determined that the first line channel and the second line channel establish a link, the first difference is compared with the preset time threshold, wherein the first difference is the difference between the first relative delay and the second relative delay, the first relative delay is the difference between the first duration of signal transmission corresponding to the first line channel and the second duration of signal transmission corresponding to the second line channel, and the second relative delay is the difference between the first delay and the second delay;

[0290] When the first difference is less than or equal to a preset time threshold, the first delay and the second delay are determined to be normal delay data.

[0291] By using the electronic device provided by the embodiment of the present application, when receiving the first detection task for the first line channel and the second line channel, the first delay corresponding to the first line channel and the second delay corresponding to the second line channel can be obtained according to the first corresponding relationship. When it is determined according to the second corresponding relationship that the first line channel and the second line channel are linked, the difference between the first relative delay and the second relative delay is compared with a preset time threshold, so as to determine whether the first delay and the second delay are abnormal delay data, thereby realizing the detection of the corresponding delays of the first line channel and the second line channel, reducing the possibility of abnormal delays, improving the accuracy of the corresponding delays of each line channel, thereby improving the accuracy of signal transmission based on the delays of each line channel, and further improving the accuracy of quantum computing.

[0292] The communication bus mentioned in the above electronic device can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The communication bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, only one thick line is used in the figure, but it does not mean that there is only one bus or one type of bus.

[0293] The communication interface is used for communication between the above electronic device and other devices.

[0294] The memory may include a random access memory (RAM) or a non-volatile memory (NVM), such as at least one disk memory. Optionally, the memory may also be at least one storage device located away from the aforementioned processor.

[0295] The above-mentioned processor can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

[0296] Based on the same inventive concept, according to the delay detection method provided in the above-mentioned embodiments of the present application, the embodiments of the present application also provide a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, the steps of any of the above-mentioned delay detection methods are implemented.

[0297] Based on the same inventive concept, according to the delay detection method provided in the above-mentioned embodiments of the present application, the embodiments of the present application also provide a computer program product containing instructions, which, when executed on a computer, enables the computer to execute any delay detection method in the above-mentioned embodiments.

[0298] Based on the same inventive concept, according to the delay detection method provided in the above-mentioned embodiments of the present application, the embodiments of the present application also provide a quantum computing measurement and control system to implement any of the above-mentioned delay detection methods.

[0299] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented by software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present invention is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website site, computer, server or data center to another website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integrated. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state hard disk Solid State Disk (SSD)), etc.

[0300] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0301] Each embodiment in this specification is described in a related manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for embodiments such as devices, electronic devices, computer-readable storage media, computer program products, and quantum computing and control systems, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiments.

[0302] The above description is only a preferred embodiment of the present invention and is not intended to limit the protection scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention are included in the protection scope of the present invention.

Claims

1. A delay detection method, characterized in that: The method comprises: When receiving a first detection task for a first line channel and a second line channel, obtaining a first delay corresponding to the first line channel and a second delay corresponding to the second line channel according to a pre-stored first correspondence relationship between each line channel and the delay; Determining whether the first line channel and the second line channel are linked according to a pre-stored second correspondence between a third line channel, a fourth line channel, and a numerical value, wherein the third line channel is used to transmit a quantum state control signal, the fourth line channel is used to transmit a quantum bit frequency control signal, and the numerical value is used to indicate whether the third line channel and the fourth line channel are linked; If it is determined that the first line channel and the second line channel establish a link, compare the first difference with a preset time threshold, wherein the first difference is a difference between a first relative delay and a second relative delay, the first relative delay is a difference between a first duration of signal transmission corresponding to the first line channel and a second duration of signal transmission corresponding to the second line channel, and the second relative delay is a difference between the first delay and the second delay; When the first difference is less than or equal to a preset time threshold, it is determined that the first delay and the second delay are normal delay data.

2. The method according to claim 1, characterized in that: The second corresponding relationship is represented as a first list, wherein each row in the first list corresponds to a third line channel, and each column corresponds to a fourth line channel; If the type of signal transmitted by the first line channel is different from the type of signal transmitted by the second line channel, the step of determining whether to establish a link between the first line channel and the second line channel according to a pre-stored second correspondence between the third line channel, the fourth line channel and the numerical value comprises: Searching the first list for cells corresponding to the first line channel and the second line channel as target cells; If the value corresponding to the target cell is the first value, it is determined that the first line channel and the second line channel are not linked; If the value corresponding to the target cell is the second value, it is determined that the first line channel is linked to the second line channel.

3. The method according to claim 2, characterized in that The method further comprises: If it is determined that the first line channel and the second line channel are not linked, the first delay and / or the second delay are updated based on the first relative delay.

4. The method according to claim 2, characterized in that: The method further comprises: When the first difference is greater than the preset time threshold, determining that the first delay and the second delay are abnormal delay data; Sending abnormal delay alarms for the first line channel and the second line channel.

5. The method according to claim 2, characterized in that: After determining that the first delay and the second delay are normal delay data, the method further includes: Based on the second relative delay, the first line channel and the second line channel are called to perform signal transmission.

6. The method according to claim 1, characterized in that The method further comprises: receiving a first delay detection instruction sent by a user terminal, wherein the first delay detection instruction includes a first channel identifier of a first line channel, a second channel identifier of a second line channel, a first duration of signal transmission corresponding to the first line channel, and a second duration of signal transmission corresponding to the second line channel; A first detection task for the first line channel and the second line channel is generated according to the first channel identifier, the second channel identifier, the first duration, and the second duration.

7. The method according to claim 1, characterized in that If, when the first detection task is received, a second detection task for the second line channel and the fifth line channel is also received, and the first line channel, the second line channel and the fifth line channel are all the fourth line channel, the method further includes: According to the first corresponding relationship, obtaining a third delay corresponding to the fifth line channel; determining, according to the second corresponding relationship, whether a link is established between the second line channel and the fifth line channel; If it is determined that the second line channel and the fifth line channel establish a link, compare the second difference with the preset time threshold, wherein the second difference is the difference between the third relative delay and the fourth relative delay, the third relative delay is the difference between the third duration of signal transmission corresponding to the fifth line channel and the second duration of signal transmission corresponding to the second line channel, and the fourth relative delay is the difference between the third delay and the second delay; When the second difference is less than or equal to the preset time threshold, it is determined that the second delay and the third delay are normal delay data.

8. The method according to claim 7, characterized in that The second corresponding relationship is represented as a first list, wherein each row in the first list corresponds to a third line channel, and each column corresponds to a fourth line channel; The step of determining whether to establish a link between the first line channel and the second line channel according to the pre-stored second corresponding relationship between the third line channel, the fourth line channel and the numerical value comprises: Finding whether there is a first cell group in the first list, the first cell group being cells whose two values ​​corresponding to the first line channel and the second line channel respectively on the same third line channel are second values; When the first cell group is not found, determining that the first line channel and the second line channel are not linked; When the first cell group is found, determining that the first line channel is linked to the second line channel; The step of determining whether the second line channel is linked to the fifth line channel according to the second corresponding relationship includes: Finding whether there is a second cell group in the first list, the second cell group being cells whose two values ​​corresponding to the second line channel and the fifth line channel respectively on the same third line channel are second values; When the second cell group is not found, determining that the second line channel is not linked to the fifth line channel; When the second cell group is found, it is determined that the second line channel is linked to the fifth line channel.

9. The method according to claim 7, characterized in that: The method further comprises: When the first difference is greater than the preset time threshold, and the second difference is greater than the preset time threshold, determining that the first delay, the second delay, and the third delay are abnormal delay data; Sending abnormal delay alarms for the first line channel, the second line channel, and the fifth line channel.

10. The method according to claim 7, characterized in that After determining that the second delay and the third delay are normal delay data, the method further includes: Based on the second relative delay and the fourth relative delay, the first line channel, the second line channel and the fifth line channel are called to perform signal transmission.

11. The method according to claim 7, characterized in that After determining that the first delay and the second delay are normal delay data, the method further includes: If it is determined that no link is established between the second line channel and the fifth line channel, the second delay and / or the third delay is updated based on the third relative delay.

12. The method according to claim 7, characterized in that After determining that the second delay and the third delay are normal delay data, the method further includes: If it is determined that the first line channel and the second line channel are not linked, the first delay and / or the second delay are updated based on the first relative delay.

13. The method according to claim 7, characterized in that The method further comprises: receiving a second delay detection instruction sent by a user terminal, where the second delay detection instruction includes a first channel identifier of a first line channel, a second channel identifier of a second line channel, a third channel identifier of a fifth line channel, a first duration of signal transmission corresponding to the first line channel, a second duration of signal transmission corresponding to the second line channel, and a third duration of signal transmission corresponding to the fifth line channel; A first detection task for the first line channel and the second line channel, and a second detection task for the second line channel and the fifth line channel are generated according to the first channel identifier, the second channel identifier, the third channel identifier, the first duration, the second duration, and the third duration.

14. A delay detection device, characterized in that: The device comprises: A first acquisition module, configured to, upon receiving a first detection task for a first line channel and a second line channel, acquire a first delay corresponding to the first line channel and a second delay corresponding to the second line channel according to a pre-stored first correspondence relationship between each line channel and the delay; a first determination module, configured to determine whether the first line channel and the second line channel are linked according to a pre-stored second correspondence between a third line channel, a fourth line channel and a numerical value, wherein the third line channel is used to transmit a quantum state control signal, the fourth line channel is used to transmit a quantum bit frequency control signal, and the numerical value is used to indicate whether the third line channel and the fourth line channel are linked; a first comparison module, configured to compare a first difference with a preset time threshold if it is determined that the first line channel and the second line channel are linked, wherein the first difference is a difference between a first relative delay and a second relative delay, the first relative delay being a difference between a first duration of signal transmission corresponding to the first line channel and a second duration of signal transmission corresponding to the second line channel, and the second relative delay being a difference between the first delay and the second delay; The second determining module is used to determine that the first delay and the second delay are normal delay data when the first difference is less than or equal to a preset time threshold.

15. An electronic device, characterized in that: It includes a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory communicate with each other through the communication bus; Memory, used to store computer programs; A processor, for implementing the method steps described in any one of claims 1-13 when executing a program stored in a memory.

16. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method steps described in any one of claims 1 to 13 are implemented.

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