Automatic test method and device, readable storage medium and electronic equipment

By using random functions in simulation software to generate test sequences and automatically trigger tests, the problems of insufficient test coverage and low test efficiency in the prior art are solved, and more efficient testing and software development are achieved.

CN119739626AActive Publication Date: 2025-04-01BIWIN STORAGE TECH CO LTD

Patent Information

Application Number
CN202411652083.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-19
Publication Date
2025-04-01
Estimated Expiration
2044-11-19

AI Technical Summary

Technical Problem

When testing SD cards, existing simulation software lacks test coverage and lacks automation and data recording functions, resulting in low testing efficiency.

Method used

The test sequence is generated through preset random functions, and the simulation software is automatically triggered to run the test, and error troubleshooting and data recording are performed when an error is detected, saving the error sequence for subsequent correction.

Benefits of technology

It improves the test coverage of the simulation software for SD cards, improves the testing efficiency, and realizes the rapid positioning and data recording of simulation software errors, promoting the development and upgrading of software.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119739626A_ABST
    Figure CN119739626A_ABST
Patent Text Reader

Abstract

The invention discloses an automatic test method and device, a readable storage medium and electronic equipment, a first random number is generated through a random function, a test sequence with the first random number as the sequence length is generated based on the random function, and the randomness of the test sequence is improved, so that the test coverage of target simulation software is improved, and the test efficiency is improved. And manual setting of simulation variables is avoided, and the test efficiency is effectively improved. Besides, when the target simulation software runs mistakenly, data recording and summary analysis of the software are achieved by conducting error checking on the undetermined test sequence of the running mistakenly and determining and storing the error sequence, subsequent modification and upgrading of the target simulation software are facilitated, and the development efficiency of the target simulation software is improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the field of memory technology, and in particular to an automatic testing method, device, readable storage medium and electronic equipment. Background Art

[0002] SD (Secure Digital) card is a new generation of memory device based on semiconductor flash memory. When the SD card is tested at the factory, the FTL (Flash Translation Layer) code is generally tested through simulation software to determine whether there is an error in this part of the code, so as to reduce the time of repeated card opening tests. However, when using the simulation software for testing, it is necessary to manually set the corresponding simulation variables, resulting in insufficient test coverage of the simulation software for the SD card, and the simulation software does not have data recording and summarizing functions. Because the test sequence that triggers the error of the simulation software is long and the data volume is large, it is impossible to correct the simulation software in time by manually checking the test sequence to locate the error point of the simulation software, and the test efficiency is low. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide an automatic testing method, device, readable storage medium and electronic device to improve the test coverage of the simulation software on the SD card and improve the test efficiency.

[0004] In order to solve the above technical problems, a technical solution adopted by the present invention is: An automatic testing method comprises the steps of: Obtaining a first random number according to a preset random function; Generate a test sequence with the first random number as the sequence length by using the random function; Trigger the target simulation software to run the test according to the test sequence; If an operation error of the target simulation software is detected, troubleshooting is performed on the pending test sequence when the operation error occurs to obtain an error sequence, wherein the error sequence is a subset of the pending test sequence; The error sequence is saved and the test is completed.

[0005] In order to solve the above technical problems, another technical solution adopted by the present invention is: An automatic testing device, comprising: An acquisition module, used for acquiring a first random number according to a preset random function; A generating module, used for generating a test sequence with the first random number as the sequence length through the random function; A trigger module, used for triggering the target simulation software to run the test according to the test sequence; A positioning module, for, if a running error of the target simulation software is detected, troubleshooting the pending test sequence when the running error occurs to obtain an error sequence, wherein the error sequence is a subset of the pending test sequence; The recording module is used to save the error sequence and complete the test.

[0006] In order to solve the above technical problems, another technical solution adopted by the present invention is: A computer-readable storage medium stores a computer program, which implements each step of the above-mentioned automatic testing method when executed by a processor.

[0007] In order to solve the above technical problems, another technical solution adopted by the present invention is: An electronic device comprises a memory, a processor and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, each step in the above-mentioned automatic testing method is implemented.

[0008] The beneficial effects of the present invention are: a first random number is generated by a random function, and a test sequence with the first random number as the sequence length is generated based on the random function, thereby improving the randomness of the test sequence, thereby improving the test coverage of the target simulation software, and avoiding manual setting of simulation variables, and effectively improving the test efficiency. In addition, when the target simulation software runs incorrectly, by troubleshooting the pending test sequence with the running error, the error sequence is determined and saved, and the data recording and summary analysis of the software is realized, which is convenient for subsequent modification and upgrading of the target simulation software, and improves the development efficiency of the target simulation software. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 A flowchart of the steps of an automatic testing method provided by an embodiment of the present invention; Figure 2 A program flow chart for generating a test sequence provided by an embodiment of the present invention; Figure 3 A flowchart of a program for locating an error sequence provided by an embodiment of the present invention; Figure 4 A schematic diagram of the structure of an automatic testing device provided by an embodiment of the present invention; Figure 5 A schematic diagram of the structure of an electronic device provided by an embodiment of the present invention; Description of labels: 200. An automatic testing device; 201. Acquisition module; 201. Generation module; 202. Trigger module; 204. Positioning module; 205. Recording module; 300. An electronic device; 301. Memory; 302. Processor. DETAILED DESCRIPTION

[0010] In order to explain the technical content, achieved objectives and effects of the present invention in detail, the following is an explanation in combination with the implementation modes and the accompanying drawings.

[0011] Please refer to Figure 1 , an automatic testing method provided by an embodiment of the present invention comprises the steps of: Obtaining a first random number according to a preset random function; Generate a test sequence with the first random number as the sequence length by using the random function; Trigger the target simulation software to run the test according to the test sequence; If an operation error of the target simulation software is detected, troubleshooting is performed on the pending test sequence when the operation error occurs to obtain an error sequence, wherein the error sequence is a subset of the pending test sequence; The error sequence is saved and the test is completed.

[0012] From the above description, it can be seen that the beneficial effects of the present invention are: a first random number is generated by a random function, and a test sequence with the first random number as the sequence length is generated based on the random function, thereby improving the randomness of the test sequence, thereby improving the test coverage of the target simulation software, and avoiding manual setting of simulation variables, effectively improving the test efficiency. In addition, when the target simulation software runs incorrectly, by troubleshooting the pending test sequence with the running error, determining and saving the error sequence, realizing the data recording and summary analysis of the software, it is convenient for the subsequent modification and upgrading of the target simulation software, and improving the development efficiency of the target simulation software.

[0013] Furthermore, the error checking of the pending test sequence when the running error occurs to obtain the error sequence includes: Dividing the pending test sequence into corresponding pending test subsequences by binary division, and writing the pending test subsequences into the target simulation software to run the test in sequence; If a running error of the target simulation software is detected, the shortest pending test subsequence that triggers the running error of the target simulation software is marked as an error sequence.

[0014] From the above description, it can be seen that the binary search method can quickly find the corresponding error sequence from the erroneous pending test sequence, so as to save the error troubleshooting time and improve the efficiency of software analysis and summary.

[0015] Furthermore, the troubleshooting of the pending test sequence when the running error occurs to obtain the error sequence also includes: If the pending test subsequence with 1 sequence element still does not trigger the target simulation software running error, the pending test sequence is sequentially checked for errors to obtain an error sequence.

[0016] From the above description, it can be seen that when the pending test subsequence with 1 sequence element divided by binary division still does not trigger the target simulation software running error, it means that the corresponding error sequence cannot be found by binary division, then the pending test sequences are checked in turn to improve the accuracy of error location.

[0017] Further, the step of sequentially troubleshooting the pending test sequence to obtain an error sequence includes: Dividing the pending test sequence into a plurality of first subsequences with increasing numbers of sequence elements according to the current sequence order; Writing each first subsequence into the target simulation software one by one in a test order in which the number of sequence elements increases in sequence, triggering a running test each time a first subsequence is written, until a running error of the target simulation software is detected, and determining the first subsequence as an initial error sequence; Error troubleshooting is performed according to the initial error sequence to obtain an error sequence.

[0018] From the above description, it can be seen that the pending test sequence is divided into a first subsequence with the number of sequence elements increasing in sequence, and is written into the target simulation software in order for operation. When the target simulation software fails to operate, it means that the current first subsequence is the first sequence in the pending test sequence that causes the software operation error. Therefore, the current first subsequence is determined to be the initial error sequence. In this way, a shorter pending test sequence is obtained, thereby reducing the number of error detections, ensuring the accuracy of positioning, and improving the accuracy of software summary and analysis.

[0019] Further, performing error troubleshooting according to the initial error sequence to obtain an error sequence includes: Discarding the first elements of the initial error sequence one by one according to the sequence order, to obtain a second subsequence of multiple sequence segments with decreasing numbers of elements; Writing each second subsequence into the target simulation software one by one in the test order in which the sequence elements are in descending order, triggering a running test each time a second subsequence is written, until it is detected that the target simulation software runs normally, and determining the second subsequence that currently triggers the target simulation software to run normally as the target sequence; The second subsequence whose test sequence is located one bit before the target sequence is marked as an error sequence.

[0020] From the above description, it can be seen that the initial error sequence is shortened in sequence from the beginning to the end, so as to obtain a second subsequence with multiple sequence elements decreasing in sequence, and the second subsequence is written into the target simulation software in sequence for running until the target simulation software runs normally, which means that the current second subsequence does not belong to the error sequence; since the second subsequence is tested in a manner of decreasing the number of sequence elements, the second subsequence before the target simulation software runs normally is the shortest error sequence in the initial error sequence, and in this way the shortest error sequence is located, and the accurate positioning of the error sequence is achieved, so as to improve the correctness of the error analysis.

[0021] Further, the obtaining of the first random number according to a preset random function includes: Get the maximum length parameter of the test sequence; The maximum length parameter is used as an input parameter of the random function to generate a first random number corresponding to the maximum length parameter.

[0022] It can be seen from the above description that the first random number corresponding to the maximum length parameter is generated by a random function to improve the randomness of the test sequence length while ensuring the validity of the test sequence.

[0023] Further, the generating, by the random function, a test sequence with the first random number as the sequence length comprises: Get the parameter range of the test sequence; Using the parameter range as an input parameter of the random function, generating a plurality of second random numbers corresponding to the parameter range; Obtain a preset sequence structure, and set the length of the sequence structure to the first random number; The multiple second random numbers are written into the sequence variables corresponding to the sequence structure to obtain a test sequence.

[0024] From the above description, it can be seen that the sequence length and sequence variables of the random sequence are generated by a random function, which effectively improves the randomness of the random sequence, thereby ensuring the test coverage.

[0025] Furthermore, the troubleshooting of the pending test sequence when the running error occurs, before obtaining the error sequence, also includes: Repeating the test sequence to trigger the target simulation software to run the test according to a preset number of times; If the target simulation software still has a running error, then the pending test sequence at the time of the running error is troubleshooted to obtain an error sequence.

[0026] It can be seen from the above description that by repeatedly triggering the target simulation software to run the test, it is possible to confirm whether the simulation software has an accidental error or a real error, thereby avoiding invalid error positioning.

[0027] Please refer to Figure 4 Another embodiment of the present invention provides an automatic testing device, comprising: An acquisition module, used for acquiring a first random number according to a preset random function; A generating module, used for generating a test sequence with the first random number as the sequence length through the random function; A trigger module, used for triggering the target simulation software to run the test according to the test sequence; A positioning module, for, if a running error of the target simulation software is detected, troubleshooting the pending test sequence when the running error occurs to obtain an error sequence, wherein the error sequence is a subset of the pending test sequence; The recording module is used to save the error sequence and complete the test.

[0028] From the above description, it can be seen that the beneficial effects of the present invention are: a first random number is generated by a random function, and a test sequence with the first random number as the sequence length is generated based on the random function, thereby improving the randomness of the test sequence, thereby improving the test coverage of the target simulation software, and avoiding manual setting of simulation variables, effectively improving the test efficiency. In addition, when the target simulation software runs incorrectly, by troubleshooting the pending test sequence with the running error, determining and saving the error sequence, realizing the data recording and summary analysis of the software, it is convenient for the subsequent modification and upgrading of the target simulation software, and improving the development efficiency of the target simulation software.

[0029] Another embodiment of the present invention provides a readable storage medium having a computer program stored thereon, wherein the computer program implements each step of the above-mentioned automatic testing method when executed by a processor.

[0030] Please refer to Figure 5 Another embodiment of the present invention provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements each step of the above-mentioned automatic testing method when executing the computer program.

[0031] From the above description, it can be seen that the beneficial effects of the present invention are: a first random number is generated by a random function, and a test sequence with the first random number as the sequence length is generated based on the random function, thereby improving the randomness of the test sequence, thereby improving the test coverage of the target simulation software, and avoiding manual setting of simulation variables, effectively improving the test efficiency. In addition, when the target simulation software runs incorrectly, by troubleshooting the pending test sequence with the running error, determining and saving the error sequence, realizing the data recording and summary analysis of the software, it is convenient for the subsequent modification and upgrading of the target simulation software, and improving the development efficiency of the target simulation software.

[0032] The embodiments of the present invention provide an automatic testing method, device, readable storage medium and electronic device, which can be applied to the simulation test software of the SD card, improve the test coverage of the simulation software on the SD card, and realize the error positioning of the simulation software, thereby improving the development efficiency of the simulation software. The following is an explanation through specific embodiments: Embodiment 1 Please refer to Figures 1 to 3 , an automatic testing method of this embodiment includes the steps of: S1. Obtain a first random number according to a preset random function.

[0033] In some embodiments, before step S1, the method further includes: S0. Initialize the random number generator to obtain a preset random function.

[0034] Reference Figure 2 In this embodiment, the srand (unsigned int) time (NULL) function is called to initialize the random number generator. Among them, time (NULL) refers to the number of seconds from midnight on January 1, 1970 (New Year's Day) to the present, that is, the actual time. Before using the preset random function rand (), different random seeds are required to generate different random numbers. That is, the random seed is initialized by the current time (srandom (time (0))), and then the initial random number is obtained by the random function, and the initial random number is modulo a specific parameter (for example, a specific parameter = (max-min+1)+min, a total of 5 groups of different value ranges need to be set) to obtain a random number in the corresponding range, where max and min can be set through corresponding instructions.

[0035] Specifically, step S1 includes: S11, obtaining a maximum length parameter of a test sequence; In some embodiments, the user can modify the maximum length parameter N of the test sequence through a specific instruction, and the maximum length parameter N of the test sequence can be directly obtained through a corresponding instruction recognition algorithm.

[0036] S12. Use the maximum length parameter as an input parameter of the random function to generate a first random number corresponding to the maximum length parameter.

[0037] In some embodiments, rand()%N is called to obtain a first random number, where rand()%N represents a random function with a maximum length parameter N as an input parameter. Specifically, the maximum length parameter N can be input as max in the above specific parameters to obtain a random number in a corresponding range.

[0038] S2. Generate a test sequence with the first random number as the sequence length through the random function.

[0039] Specifically, step S2 includes: S21, obtaining a parameter range of a test sequence; S22, using the parameter range as an input parameter of the random function, generating a plurality of second random numbers corresponding to the parameter range; In some embodiments, rand()%X is called to obtain a second random number, where rand()%X represents a random function with a parameter range X as an input parameter. Specifically, the parameter range X can be input as the max and min in the above specific parameters to obtain a random number in the corresponding range.

[0040] S23, obtaining a preset sequence structure, and setting the length of the sequence structure to the first random number; S24. Write the multiple second random numbers into the sequence variables corresponding to the sequence structure to obtain a test sequence.

[0041] In some embodiments, each sequence member is composed of 4 sequence variables, and each sequence member corresponds to a sequence structure, thereby obtaining a test sequence.

[0042] S3. Trigger the target simulation software to run the test according to the test sequence.

[0043] In some embodiments, the target simulation software pulls corresponding parameters from a txt file for testing, so each sequence member in the test sequence is written into the txt file in a specific format to trigger the target simulation software to run the test.

[0044] S4. If an operation error of the target simulation software is detected, troubleshooting is performed on the pending test sequence when the operation error occurs to obtain an error sequence, where the error sequence is a subset of the pending test sequence.

[0045] Reference Figure 3 Specifically, step S4 includes: S40, repeatedly triggering the target simulation software to run the test according to the preset number of times. If the target simulation software running error is still detected, executing the following steps S41-S43; if the target simulation software running error is not detected, the test sequence does not need to perform error troubleshooting.

[0046] In some embodiments, the preset number of times is 5 times, and the test sequence is repeatedly written into the target simulation software to trigger the target simulation software to run the test.

[0047] S41, dividing the pending test sequence into corresponding pending test subsequences by binary division, and writing the pending test subsequences into the target simulation software to run the test in sequence.

[0048] S42: If an operation error of the target simulation software is detected, the shortest pending test subsequence that triggers the operation error of the target simulation software is marked as an error sequence.

[0049] In some embodiments, if the above pending test subsequence does not detect the target simulation software running error, the pending test subsequence is divided into corresponding pending test subsequences by binary division and tested again until the pending test subsequence cannot be divided (i.e., the shortest pending test subsequence). If the target simulation software running error still cannot be detected at this time, it means that the binary division method cannot find the error sequence.

[0050] In some embodiments, the pending test sequence is divided into two equal-length pending test subsequences by binary search. When the number of sequence elements of the pending test sequence is an odd number, the number of sequence elements of the pending test subsequence at the end of the sequence order is one more than the number of sequence elements of the pending test subsequence at the beginning of the sequence order. For example, when the pending test sequence is A={1,2,3,4,5,6,7,8,9,10}, the two pending test subsequences obtained based on binary search are A1={1,2,3,4,5} and A2={6,7,8,9,10}. When the pending test sequence is B={1,2,3,4,5}, the two pending test subsequences obtained based on binary search are B1={1,2} and B2={3,4,5}.

[0051] In some embodiments, the two pending test subsequences are written into the target simulation software for running the test respectively as follows: A1 is first input into the target simulation software for testing, and then A2 is input into the target simulation software for testing. If neither A1 nor A2 has a running error, A1 and A2 are divided into two again, and A1.1={1,2}, A1.2={3,4,5}, A2.1={6,7}, A2.2={8,9,10} are obtained. Combine A1 and A2.1 and input them into the target simulation software for testing, then combine A1.2 and A2 and input them into the target simulation software for testing; if there is no error, continue the binary test according to the above rules until it cannot be divided any further (when the number of sequence elements of the pending test subsequence is 1, the pending test subsequence is the shortest pending test subsequence, that is, it cannot be divided any further); if the sequence combined with A1 and A2.1 runs incorrectly, while the sequence combined with A1.2 and A2 runs normally, continue the binary test of the sequence combined with A1 and A2.1 according to the above rules until the shortest sequence in the pending test subsequence that triggers the target simulation software running error is obtained, which is used as the error sequence; for example, the pending test subsequences that trigger the target simulation software running error include {1,2,3}, {1,2}, {4,5,6}, then {1,2} is the error sequence.

[0052] It should be noted that the error sequence is the shortest sequence among the pending test sequences that causes software running errors.

[0053] S43. If none of the pending test subsequences with 1 sequence element triggers a running error of the target simulation software, then the pending test sequences are sequentially checked for errors to obtain an error sequence.

[0054] Specifically, step S43 includes: S431, dividing the pending test sequence into a plurality of first subsequences with increasing numbers of sequence elements according to the current sequence order; In some embodiments, assuming that the test sequence to be determined is B={1,2,3,4,5}, then through step S431, the first subsequences of multiple sequence elements with increasing numbers are obtained as B1={1}, B2={1,2}, B3={1,2,3}, B4={1,2,3,4}, and B5={1,2,3,4,5}.

[0055] S432, writing each first subsequence into the target simulation software one by one in a test order in which the number of sequence elements increases in sequence, triggering a running test each time a first subsequence is written, until a running error of the target simulation software is detected, and determining the first subsequence as an initial error sequence; In some embodiments, the first subsequence is written into the target simulation software in the order of B1, B2, B3, B4, and B5. If the first subsequence B4={1,2,3,4} triggers a running error of the target simulation software, the first subsequence B4={1,2,3,4} is determined as the initial error sequence.

[0056] S433: Perform error troubleshooting according to the initial error sequence to obtain an error sequence.

[0057] Specifically, step S433 includes: S4331, discarding the first elements of the initial error sequence one by one according to the sequence order, to obtain multiple second subsequences with decreasing numbers of sequence elements; In some embodiments, if the initial error sequence is B4={1,2,3,4}, then through step S4331, the second subsequences of multiple sequence elements with decreasing numbers are obtained, namely B4.1={2,3,4}, B4.2={3,4}, and B4.3={4}.

[0058] S4332, writing each second subsequence into the target simulation software one by one in a test order in which the number of sequence elements decreases in sequence, triggering a running test each time a second subsequence is written, until it is detected that the target simulation software runs normally, and determining the second subsequence that currently triggers the target simulation software to run normally as the target sequence; In some embodiments, the second subsequence is written into the target simulation software in the order of B4.1, B4.2, and B4.3. If the second subsequence B4.3={4} does not trigger a running error of the target simulation software, the second subsequence B4.3={4} is determined as the target sequence.

[0059] S4333: Mark the second subsequence whose test sequence is located before the target sequence as an error sequence.

[0060] In some embodiments, the second subsequence of the target sequence B4.3 whose test order is B4.2 is then an error sequence.

[0061] S5. Save the error sequence and complete the test.

[0062] Embodiment 2 Please refer to Figure 4 , an automatic testing device 200 of this embodiment includes: An acquisition module 201 is used to acquire a first random number according to a preset random function; A generating module 201, configured to generate a test sequence with the first random number as the sequence length through the random function; A trigger module 203, used to trigger the target simulation software to run the test according to the test sequence; The positioning module 204 is used to perform error troubleshooting on the pending test sequence when the target simulation software is running wrong, and obtain an error sequence, wherein the error sequence is a subset of the pending test sequence; The recording module 205 is used to save the error sequence and complete the test.

[0063] Embodiment 3 A computer-readable storage medium of this embodiment stores a computer program, and when the computer program is executed by a processor, each step of the automatic testing method described in the first embodiment is implemented.

[0064] Embodiment 4 Please refer to Figure 5 An electronic device 300 of this embodiment includes a memory 301, a processor 302, and a computer program stored in the memory 301 and executable on the processor 302. When the processor 302 executes the computer program, each step in an automatic testing method described in Example 1 is implemented.

[0065] In summary, the present invention provides an automatic testing method, device, readable storage medium and electronic device, which generates a first random number corresponding to the maximum length parameter of the test sequence through a random function, uses the first random number as the sequence length of the test sequence, and generates a second random number based on the random function to fill it into a preset sequence variable to obtain a test sequence. The present invention improves the randomness of the test sequence by replacing the manually set variables with random numbers to improve the test coverage of the target simulation software and effectively improve the test efficiency. When an error occurs in the target simulation software when running the test sequence, the error sequence is accurately located in the test sequence to determine the error test point of the target simulation software, and after the error test point of the target simulation software is modified, the target simulation software is tested through the error sequence to determine whether the target simulation software still has an error problem, thereby improving the development efficiency of the simulation software and facilitating the rapid upgrade of the subsequent simulation software.

[0066] In the above embodiments provided in the present application, it should be understood that the disclosed methods, devices, computer-readable storage media, and electronic devices can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the modules is only a logical function division. There may be other division methods in actual implementation, such as multiple components or modules can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or components or modules, which can be electrical, mechanical or other forms.

[0067] The components described as separate components may or may not be physically separated, and the components shown as components may or may not be physical modules, that is, they may be located in one place or distributed on multiple network modules. Some or all of the components may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0068] In addition, each functional module in each embodiment of the present invention may be integrated into one processing module, or each component may exist physically separately, or two or more modules may be integrated into one module. The above integrated modules may be implemented in the form of hardware or in the form of software functional modules.

[0069] If the integrated module is implemented in the form of a software function module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.

[0070] It should be noted that, for the convenience of description, the aforementioned method embodiments are all described as a series of action combinations, but those skilled in the art should be aware that the present invention is not limited by the described action sequence, because according to the present invention, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present invention.

[0071] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0072] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent transformations made using the contents of the present invention's specification and drawings, or directly or indirectly applied in related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. An automatic testing method, characterized in that: Includes steps: Obtaining a first random number according to a preset random function; Generate a test sequence with the first random number as the sequence length by using the random function; Trigger the target simulation software to run the test according to the test sequence; If an operation error of the target simulation software is detected, troubleshooting is performed on the pending test sequence when the operation error occurs to obtain an error sequence, wherein the error sequence is a subset of the pending test sequence; The error sequence is saved and the test is completed.

2. An automatic testing method according to claim 1, characterized in that: The error sequence obtained by troubleshooting the pending test sequence when the running error occurs includes: Dividing the pending test sequence into corresponding pending test subsequences by binary division, and writing the pending test subsequences into the target simulation software to run the test in sequence; If a running error of the target simulation software is detected, the shortest pending test subsequence that triggers the running error of the target simulation software is marked as an error sequence.

3. An automatic testing method according to claim 2, characterized in that: The troubleshooting of the pending test sequence when the running error occurs to obtain the error sequence further includes: If the pending test subsequence with 1 sequence element still does not trigger the target simulation software running error, the pending test sequence is sequentially checked for errors to obtain an error sequence.

4. An automatic testing method according to claim 3, characterized in that: The step of sequentially troubleshooting the pending test sequence to obtain an error sequence includes: Dividing the pending test sequence into a plurality of first subsequences with increasing numbers of sequence elements according to the current sequence order; Writing each first subsequence into the target simulation software one by one in a test order in which the number of sequence elements increases in sequence, triggering a running test each time a first subsequence is written, until a running error of the target simulation software is detected, and determining the first subsequence as an initial error sequence; Error troubleshooting is performed according to the initial error sequence to obtain an error sequence.

5. An automatic testing method according to claim 4, characterized in that: The performing error troubleshooting according to the initial error sequence to obtain an error sequence comprises: Discarding the first elements of the initial error sequence one by one according to the sequence order, to obtain a second subsequence of multiple sequence segments with decreasing numbers of elements; Writing each second subsequence into the target simulation software one by one in a test order in which the number of sequence elements decreases in sequence, triggering a running test each time a second subsequence is written, until it is detected that the target simulation software runs normally, and determining the second subsequence that currently triggers the target simulation software to run normally as the target sequence; The second subsequence whose test sequence is located one bit before the target sequence is marked as an error sequence.

6. An automatic testing method according to claim 5, characterized in that: The step of obtaining a first random number according to a preset random function includes: Get the maximum length parameter of the test sequence; The maximum length parameter is used as an input parameter of the random function to generate a first random number corresponding to the maximum length parameter.

7. An automatic testing method according to claim 1, characterized in that: The step of generating a test sequence with the first random number as the sequence length by using the random function comprises: Get the parameter range of the test sequence; Using the parameter range as an input parameter of the random function, generating a plurality of second random numbers corresponding to the parameter range; Obtain a preset sequence structure, and set the length of the sequence structure to the first random number; The multiple second random numbers are written into the sequence variables corresponding to the sequence structure to obtain a test sequence.

8. An automatic testing method according to claim 1, characterized in that: The troubleshooting of the pending test sequence when the running error occurs, before obtaining the error sequence, also includes: Repeating the test sequence to trigger the target simulation software to run the test according to a preset number of times; If the target simulation software still has a running error, then the pending test sequence at the time of the running error is checked for errors to obtain an error sequence.

9. An automatic testing device, characterized in that: include: An acquisition module, used for acquiring a first random number according to a preset random function; A generating module, used for generating a test sequence with the first random number as the sequence length through the random function; A trigger module, used for triggering the target simulation software to run the test according to the test sequence; A positioning module, for, if a running error of the target simulation software is detected, troubleshooting the pending test sequence when the running error occurs to obtain an error sequence, wherein the error sequence is a subset of the pending test sequence; The recording module is used to save the error sequence and complete the test.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, each step in an automatic testing method as claimed in any one of claims 1 to 8 is implemented.

11. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, each step in the automatic testing method as described in any one of claims 1 to 8 is implemented.

Citation Information

Patent Citations

  • Automatic and random SoC verification method

    CN107016165A

  • Testing method and device of memory

    CN108122596A

  • Method and apparatus for performing unit testing of software modules with use of directed automated random testing

    US20060253739A1

  • Method and system for providing a random sequence coverage

    US20130067280A1

  • Chip verification method and device

    WO2020113526A1

Cited By

  • Failure positioning method and device in chip simulation test and program product

    CN120805839A