Glass core protection using peripheral buffer layer

Abstract

Embodiments disclosed herein include an apparatus having a glass core package substrate. In an embodiment, an apparatus includes a substrate having a first surface and a second surface opposite the first surface. The sidewall is between the first surface and the second surface, and the substrate includes a glass layer. In an embodiment, a via through the substrate is disposed between the first surface and the second surface, and the via is electrically conductive. In an embodiment, a layer in contact with a sidewall of a substrate surrounds a perimeter of the substrate.

Description

Background Art

[0001] As semiconductor packaging architectures continue to evolve toward more complex and compact systems, new material solutions can be used to achieve such architectures. A promising candidate for packaging substrates is a glass core layer. In such substrates, a glass core is sandwiched between an upper buildup layer and a lower buildup layer. Conductive vias are provided through the glass core to provide electrical coupling between the upper buildup layer and the lower buildup layer. Glass cores are beneficial because they can provide high density vias. Glass is also a high modulus material, which provides the desired stiffness for the entire packaging substrate.

[0002] However, manufacturing process flows have not yet been developed to achieve high yield packaging in conjunction with glass core solutions. With conventional organic cores, multiple cells are manufactured in parallel in a panel structure. Once completed, the cells are singulated from one another. For example, the cells may be singulated using a saw. This involves passing a saw blade through the glass core. Unfortunately, when a glass core is singulated using a saw, cracks and other defects can be introduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0003] Figure 1A is a perspective view of a glass core having a buffer layer surrounding the periphery of the glass core according to an embodiment.

[0004] Figure 1B is a perspective view of a glass core having a buffer layer surrounding all surfaces of the glass core according to an embodiment.

[0005] Figure 2A is a cross-sectional view of a package substrate having a glass core including a buffer layer on a sidewall of the glass core according to an embodiment.

[0006] Figure 2B is a cross-sectional view of a package substrate having a glass core including a buffer layer conformal to a non-vertical sidewall of the glass core according to an embodiment.

[0007] Figure 2C is a cross-sectional view of a package substrate having a glass core including a buffer layer conforming to a sloped sidewall of the glass core according to an embodiment.

[0008] Figure 2D is a cross-sectional view of a package substrate having a glass core including a buffer layer surrounding an edge of the glass core according to an embodiment.

[0009] Figure 2E is a cross-sectional view of a package substrate having a glass core including a buffer layer completely surrounding the glass core according to an embodiment.

[0010] Figure 2F is a cross-sectional view of a package substrate having a buffer layer mechanically anchored to a glass core according to an embodiment.

[0011] Figure 3A is a cross-sectional view of a panel having a glass core separated by saw streets filled with a buffer layer according to an embodiment.

[0012] Figure 3B is a cross-sectional view of a glass core having a buffer layer around the periphery of the glass core according to an embodiment.

[0013] Figure 3C is a plan view of a panel having a plurality of glass core units separated by saw streets filled with a buffer layer according to an embodiment.

[0014] Figure 3D is a plan view of a cell including a non-homogeneous glass core surrounded by a buffer layer according to an embodiment.

[0015] Figure 3E is a cross-sectional view of a glass core including a plurality of glass layers according to an embodiment.

[0016] Figures 4A-4J is a cross-sectional view illustrating a process for forming a package substrate having a glass core surrounded by a buffer layer according to an embodiment.

[0017] Figure 5A is a cross-sectional view of a panel having multiple glass core layers and stacked saw streets filled with a buffer layer according to an embodiment.

[0018] Figure 5B is a cross-sectional view of a package substrate having a stacked glass core surrounded by a buffer layer according to an embodiment.

[0019] Figures 6A-6I is a cross-sectional view illustrating a process for forming a package substrate having a glass core and a buffer layer surrounding an edge of the glass core according to an embodiment.

[0020] Figures 7A-7I is a cross-sectional view illustrating a process for forming a package substrate having a glass core and a buffer layer surrounding the entire glass core according to an embodiment.

[0021] Figures 8A-8E is a cross-sectional view of a panel having a glass core embedded in two or more buffer layers having different configurations according to an embodiment.

[0022] Figures 9A-9F is a diagram showing a process for forming a packaging substrate having a buffer layer mechanically anchored to a glass core according to an embodiment.

[0023] Figures 10A-10K is a cross-sectional view illustrating a process for forming a package substrate having a glass core surrounded by a buffer layer according to an embodiment.

[0024] Figures 11A-11I is a cross-sectional view illustrating a process for forming a package substrate having a glass core completely surrounded by a buffer layer according to an embodiment.

[0025] Figures 12A-12G is a cross-sectional view illustrating a process for forming a package substrate having a glass core embedded in a buffer layer according to an embodiment.

[0026] Fig.13 is a schematic diagram of a computing device constructed in accordance with an embodiment. DETAILED DESCRIPTION

[0027] Electronic systems according to various embodiments are described herein, and more specifically, glass cores with peripheral buffer layers for electronic packaging are described. In the following description, various aspects of the illustrative embodiments will be described using terms commonly used by those skilled in the art to convey the essence of their work to other technicians in the field. However, it is obvious to those skilled in the art that the present disclosure can be implemented using only some of the described aspects. For the purpose of explanation, specific numbers, materials, and configurations are set forth in order to provide a thorough understanding of the illustrative embodiments. However, it is obvious to those skilled in the art that the present disclosure can be implemented without specific details. In other cases, well-known features are omitted or simplified so as not to make the illustrative embodiments difficult to understand.

[0028] Various operations will be described as multiple discrete operations in turn in a manner that is most helpful for understanding the present disclosure, however, the order of description should not be construed as implying that these operations must be order dependent. In particular, these operations do not need to be performed in the order presented.

[0029] As described above, implementing a glass core based packaging substrate has significant benefits for the electronics packaging industry. However, certain obstacles still need to be overcome in order to achieve a high yield, robust and relatively low cost solution. One particular problem is that the glass core tends to develop defects that can lead to cracks, breakage, etc. In particular, these defects may arise from the singulation process that is typically used for panel level manufacturing of individual units.

[0030] Therefore, embodiments disclosed herein include panel-level architectures in which the glass material in the saw lanes between units is replaced with a buffer material. Cutting the buffer material (e.g., molding material, epoxy resin, organic buildup film, metal material, etc.) using a conventional singulation process produces fewer defects. This is because the glass edge surface of the core is protected from the forces caused during singulation. Therefore, large-scale manufacturing and assembly (e.g., at the panel level) can be implemented to produce a high-yield glass core package substrate.

[0031] As will be described in more detail below, the buffer layer can have various configurations relative to the glass core. In some embodiments, the buffer layer is a ring around the outer periphery of the glass core. In other embodiments, the buffer layer surrounds the edge of the glass core. In yet another embodiment, the buffer layer is on the top surface, bottom surface, and sidewall surface of the glass core.

[0032] Embodiments may also include different manufacturing processes to manufacture glass core package substrate units. In some embodiments, existing glass saws are removed and replaced with buffer materials. Embodiments may also include forming a reconstructed panel. In this case, the molding material surrounding the individual glass core units can be a buffer material. In either method, the singulation process ultimately cuts through the buffer layer rather than the glass material. Therefore, defect generation is reduced (or eliminated).

[0033] The glass core described herein can be part of a packaging substrate. The packaging substrate can include a glass core having a buildup layer above and / or below the packaging substrate. The buffer layer can surround the glass core, and the buildup layer can be on the top surface and / or bottom surface of the buffer layer. Due to the singulation process, the outer surface of the buildup layer will be substantially coplanar with the outer surface of the buffer layer. The packaging substrate can also include one or more dies coupled to the buildup layer.

[0034] As used herein, "substantially coplanar" may refer to two surfaces that are coplanar within any manufacturing tolerance of the tool used to create the surface. For example, in a singulation process, a saw may be used to cut through multiple layers of material. Since a single saw with a single sawing path is used to cut through multiple layers, the exposed edges of the layers will be substantially coplanar. Substantially coplanar may also refer to two surfaces that are parallel to each other but on a plane that is about 3 μm or less apart from each other. Substantially coplanar may also refer to two surfaces that are within about 3° of being parallel to each other. As used herein, "about" may refer to a range of values ​​within ten percent of the stated value. For example, about 100 μm may refer to a range between 90 μm and 110 μm.

[0035] Reference now Figure 1A , a perspective view of a core assembly 120 according to an embodiment is shown. The core assembly 120 may include a core 125. The core 125 may be a glass layer. In some embodiments, the core 125 may be referred to as a glass core 125. The core 125 may be substantially all glass. It should be understood that the glass core 125 (e.g., the glass core described herein) is different from a traditional organic core that may include glass fibers for reinforcement. That is, the core 125 may substantially all include solid glass.

[0036] In an embodiment, the glass core 125 may be substantially all glass. The glass core 125 may be a solid material having an amorphous crystal structure. More specifically, the glass core 125 may be any appropriate glass formulation having the necessary mechanical robustness and compatibility with semiconductor package manufacturing and assembly processes. For example, the glass core 125 may include aluminosilicate glass, borosilicate glass, aluminoborosilicate glass, silicon dioxide, molten silica, and the like. In some embodiments, the glass core 125 may include one or more additives, such as but not limited to Al2O3, B2O3, MgO, CaO, SrO, BaO, SnO2, Na2O, K2O, SrO, P2O3, ZrO2, Li2O, Ti, and Zn. More generally, the glass core 125 may include silicon and oxygen, as well as any one or more of aluminum, boron, magnesium, calcium, barium, tin, sodium, potassium, strontium, phosphorus, zirconium, lithium, titanium, and zinc. In an embodiment, the glass core 125 may include at least 23% silicon (by weight) and at least 26% oxygen (by weight). In some embodiments, the glass core 125 may also include at least 5% aluminum (by weight).

[0037] In an embodiment, the glass core 125 can have a thickness (between the top and bottom surfaces) between about 50 μm and about 2000 μm. However, in other embodiments, a thinner or thicker glass core 125 can be used. The glass core 125 can have a substantially rectangular shape (when viewed from above in a plan view). However, other shapes can also be used for the glass core 125.

[0038] In an embodiment, one or more vias 121 may pass through the thickness of the glass core 125. The via 121 is a conductive structure. For example, the via 121 may include a metal element, such as copper or aluminum. In some cases, alloys of multiple metal elements may also be used. Although shown as a single integral structure, it should be understood that the via 121 may also include a seed layer, a barrier layer, or any other multi-layer configuration. Figure 1A In the embodiment, the via 121 is in direct contact with the glass core 125. In other embodiments, a liner (not shown) may be disposed between the glass core 125 and the via 121. The liner may be a compressible material that helps decouple the expansion difference between the glass core 125 and the via 121 due to the mismatch of the coefficient of thermal expansion (CTE) between the glass core 125 and the via 121.

[0039] In an embodiment, the core assembly 120 may further include a buffer layer 127. The buffer layer 127 may surround the periphery of the glass core 125. The buffer layer 127 may be a ring structure having an inner surface in contact with the glass core 125 and an outer surface facing away from the glass core 125. The buffer layer 127 may have a thickness (between the inner surface and the outer surface) between about 10 μm and about 200 μm. The thickness of the buffer layer 127 may also be between about 10% and about 150% of the thickness of the glass core 125. However, thinner or thicker buffer layers 127 may also be used in some embodiments. The outer surface of the buffer layer 127 may be defined by a singulation process, as will be described in more detail below. In some embodiments, this results in an outer surface that is substantially orthogonal to the top surface of the glass core 125 (i.e., within 5° of orthogonal).

[0040] The buffer layer 127 can be any material that is compatible with the singulation process (e.g., sawing) used to singulate the individual units from the panel. The buffer layer 127 can also include a material selected to have a CTE that is the same as (or close to) the CTE of the glass core 125. The CTE of the buffer layer 127 can be within 20% of the CTE of the glass core 125, or within 5% of the CTE of the glass core 125. In some embodiments, the buffer layer 127 can include materials such as, but not limited to, molding materials, epoxy resins, organic build-up materials, metallic materials, etc. The buffer layer 127 can be a monolithic material, or the buffer layer 127 can include a filler, such as inorganic filler particles. In an embodiment, the buffer layer 127 can have a first modulus, and the glass core 125 can have a second modulus greater than the first modulus.

[0041] Reference now Figure 1B , shows a perspective view of a core assembly 120 according to another embodiment. The core assembly may include a glass core (in Figure 1B 1). The glass core may be surrounded on all sides by a buffer layer 127. That is, the buffer layer 127 may surround the periphery of the glass core, and the buffer layer 127 may be disposed over the top and bottom surfaces of the glass core. Vias 121 may be exposed through the buffer layer 127 to allow connection to an upper / lower layer. In some cases, the buffer layer 127 may surround a pad above / below the via 121. In this configuration, only the pad passing through the buffer layer 127 is shown.

[0042] Reference now Figures 2A-2F , a series of cross-sectional views depicting a package substrate 200 having various architectures according to embodiments are shown. For example, different embodiments depict different interface structures that may occur between the buffer layer 227 and the glass core 225. The different interface structures may be the result of different process flows used to form the package substrate 200. Examples of different process flows are provided in more detail below.

[0043] Reference now Figure 2A , shows a cross-sectional view of a package substrate 200 according to an embodiment. In an embodiment, the package substrate 200 includes a glass core 225. The glass core 225 can be similar to any glass core described in more detail herein. The via 221 can pass through the thickness of the glass core 225. In the illustrated embodiment, the via 221 has a tapered sidewall. The tapered profile can be the result of a laser assisted etching process. Figure 2A In the particular embodiment shown, the via 221 has a double tapered profile to produce an hourglass-shaped cross-section of the via 221. In other embodiments, the via 221 may have a single taper or no taper at all. A pad 222 may be disposed above and / or below each via 221.

[0044] In an embodiment, a buildup layer 240 may be disposed above and below the glass core 225. The buildup layer 240 may include an organic buildup film. The buildup film may be disposed in a laminate layer having conductive features (not shown) embedded therein. For example, traces, vias, pads, etc. may be embedded in the buildup layer 240 using standard package assembly processes.

[0045] In an embodiment, a buffer layer 227 may be disposed along the sidewall 226 of the glass core 225. The buffer layer 227 may be similar to any buffer layer described in more detail herein. For example, the buffer layer 227 may be a molded material, an epoxy resin, a build-up material, or a metallic material. In some cases, the buffer layer 227 may include the same or similar material as the build-up layer 240.

[0046] In the illustrated embodiment, the sidewall 226 of the glass core 225 can be substantially vertical. That is, the sidewall 226 can be substantially perpendicular to the top surface of the glass core 225. Similarly, the outer surface 228 of the buffer layer 227 can also be substantially perpendicular to the top surface of the glass core 225. In such an embodiment, the outer surface 228 and the inner surface of the buffer layer 227 can be substantially parallel to each other. In other words, the thickness of the buffer layer 227 (between the outer surface 228 and the sidewall 226 of the glass core 225) can be substantially uniform over the entire height of the buffer layer 227. The thickness of the buffer layer 227 can be between about 10 μm and about 200 μm.

[0047] Although Figure 2A The left side of the buffer layer 227 and the right side of the buffer layer 227 in FIG. 1 show a consistent thickness, but the embodiment is not limited thereto. For example, different sidewalls 226 of the glass core 225 may have portions of the buffer layer 227 with different thicknesses. This may be due, at least in part, to manufacturing tolerances that result in imperfect placement of the saw blade during singulation.

[0048] In an embodiment, an outer surface 241 of the buildup layer 240 can be substantially coplanar with an outer surface 228 of the buffer layer 227. This may be due to the singulation process used to singulate the package substrate 200 from the panel structure, as will be described in more detail below. More generally, the width of the buildup layer 240 can be greater than the width of the glass core 225. This allows the buildup layer 240 to be disposed above (or below) both the glass core 225 and the buffer layer 227.

[0049] Reference now Figure 2B , shows a cross-sectional view of a package substrate 200 according to another embodiment. In an embodiment, in addition to the profile of the sidewall 226, Figure 2B The package substrate 200 in may be substantially similar to Figure 2A The package substrate 200 in FIG. 220 is a package substrate 200 in FIG. 220 . The sidewall 226 may have a tapered profile instead of being vertical. For example, Figure 2B The sidewall 226 in the via 221 has a first taper and a second taper. The first taper and the second taper may reach a point at a position along a line between the top surface and the bottom surface of the glass core 225. In some embodiments, the point is along a line equidistant from the top surface and the bottom surface of the glass core 225. In some cases, the point of the sidewall 226 may be at the same height as the height of the minimum diameter point of the via 221.

[0050] The tapered structure of the sidewall 226 can be the result of a laser-assisted patterning process used to singulate the glass core 225 from a larger glass substrate (not shown). Singulating the glass core 225 with a laser-assisted etching process does not produce significant defects along the sidewall 226. A buffer layer 227 is then applied around the glass core 225 (and other glass cores 225) to form a reconstructed plate. After the buildup layer 240 is added, singulation through the buffer layer 227 can be performed using sawing or the like without damaging the glass core 225.

[0051] exist Figure 2B In the embodiment shown, the outer surface 228 is not parallel to at least a portion of the inner surface of the buffer layer 227. This is because the inner surface conforms to the shape of the sidewall 226. The resulting shape of the buffer layer 227 can then have a non-uniform thickness throughout its height. This can result in thinner areas toward the center of the buffer layer 227 and thicker areas toward the top and bottom of the buffer layer 227.

[0052] Reference now Figure 2C , shows a cross-sectional view of a package substrate 200 according to another embodiment. In an embodiment, in addition to the profile of the sidewall 226 of the glass core 225, Figure 2C The package substrate 200 in may be substantially similar to Figure 2BThe package substrate 200 in FIG. The sidewall 226 may have a single inclined (or tapered) profile, rather than reaching a point between the top surface and the bottom surface. The single slope of the sidewall 226 may be the result of a single-sided laser-assisted etching process. In contrast, Figure 2B The illustrated embodiment can be formed using a double-sided laser assisted etching process. A single-sided approach can be suitable for thinner glass cores 225. Similarly, vias 221 can be formed using a single-sided etching process. As a result, vias 221 can also have a single taper.

[0053] The inclined sidewall 226 causes the glass core to have a top surface that is narrower than the bottom surface. Of course, in other arrangements, the bottom surface can be narrower than the top surface. Since the buffer layer 227 is conformal to the sidewall 226, the buffer layer 227 can also have an inner surface with a single taper. The inner surface may not be parallel to the outer surface 228.

[0054] Reference now Figure 2D , shows a cross-sectional view of a package substrate 200 according to another embodiment. In addition to the structure of the buffer layer 227, Figure 2D The package substrate in can be basically similar to Figure 2B The buffer layer 227 surrounds the edge of the glass core 225 instead of only contacting the sidewall 226 of the glass core 225. Therefore, the buffer layer 227 is disposed over the top and bottom portions of the glass core 225.

[0055] The glass core 225 can have a top surface 223 and a bottom surface 224. The top surface 223 can include a first recessed surface 231. The first recessed surface 231 can be disposed around the perimeter of the glass core 225. Similarly, the bottom surface 224 can have a second recessed surface 232 around the perimeter of the glass core 225. The first recessed surface 231 and the second recessed surface 232 can be offset from the top surface 223 and the bottom surface 224, respectively, by up to about 20 μm. However, a larger offset can also be used in some embodiments.

[0056] In an embodiment, buffer layer 227 may cover recessed surfaces 231 and 232 to form a "C-like" shape around the edge surface of glass core 225. In addition, the top surface of buffer layer 227 may still be substantially coplanar with top surface 223, and the bottom surface of buffer layer 227 may be substantially coplanar with bottom surface 224. Providing additional surface area for contact between buffer layer 225 and glass core 225 may increase adhesion strength and may improve reliability.

[0057] In the illustrated embodiment, the sidewall 226 of the glass core 225 has a dual tapered profile. However, embodiments may include a C-shaped buffer layer 227 using substantially vertical sidewalls 226 or by using a single tapered sidewall 226 profile, similar to the embodiments described in more detail above.

[0058] Reference now Figure 2E , shows a cross-sectional view of a package substrate 200 according to another embodiment. In the embodiment, in addition to the structure of the buffer layer 227, Figure 2E The package substrate 200 in may be substantially similar to Figure 2A 226. The buffer layer 227 is disposed on all surfaces of the glass core 225, rather than only along the sidewalls 226. For example, the sidewalls 226, the top surface 223, and the bottom surface 224 may be contacted by the buffer layer 227. In some cases, the glass core 225 may be considered to be embedded in the buffer layer 227. In an embodiment, the buffer layer 227 may surround the sidewalls of the pad 222 above and / or below the via 221.

[0059] In an embodiment, the thickness of the buffer layer 227 may be inconsistent between different surfaces of the covered glass core 225. For example, the buffer layer 227 on the sidewall 226 may be thicker than the buffer layer 227 on the top surface 223 and / or the bottom surface 224. In addition, the buffer layer 227 on the top surface 223 may have a different thickness than the buffer layer 227 on the bottom surface 224.

[0060] The embedded structure of the glass core 225 can cause the buildup layer 240 to be spaced apart from the glass core 225. For example, the buffer layer 227 can separate the glass core 225 from the buildup layer 240. That is, in some embodiments, the buffer layer 227 is between the glass core 225 and the buildup layer 240. Adding the buffer layer 227 between the glass core 225 and the buildup layer 240 can result in some reduction in the transfer of stress from the buildup layer 240 into the glass core 225.

[0061] exist Figure 2E In the embodiment of the present invention, the profile of the sidewall 226 is substantially vertical. In other embodiments, the sidewall 226 can have any profile, such as those described in more detail herein. In this case, the buffer layer 227 will conform to the non-vertical profile. This can result in the buffer layer 227 having an outer surface of a rectangular prism and an inner surface of an irregular three-dimensional shape.

[0062] Reference now Figure 2F , shows a cross-sectional view of a package substrate 200 according to another embodiment. In addition to the profile of the sidewall of the glass core 225, Figure 2F The package substrate 200 in the embodiment may be similar to Figure 2AThe package substrate 200 in the embodiment of the present invention. The sidewalls of the glass core 225 may have an interlocking profile rather than a vertical profile or a tapered profile. For example, one or more grooves 233 may be provided in the top surface 223 and / or the bottom surface 224 of the glass core 225. In an embodiment, the buffer layer 227 may then fill the grooves 233. Providing the grooves 233 further enhances the mechanical coupling between the buffer layer 227 and the glass core 225. This may improve the reliability of the package substrate 200.

[0063] Reference now Figure 3A and 3B , shows a cross-sectional view of a core assembly 320 according to an embodiment. Figure 3A In FIG. 1 , the core assembly 320 is shown in panel form and is Figure 3B , the core assembly 320 is shown in a singulated unit form.

[0064] Reference now Figure 3A , a cross-sectional view of a core assembly 320 according to an embodiment is shown. In an embodiment, the core assembly 320 may include a glass core 325. The glass core 325 may be part of a panel structure. That is, multiple individual glass cores 325 may be coupled together in a larger panel structure. This allows for a more efficient assembly and manufacturing process. In the illustrated embodiment, the complete glass core 325 is shown in the center (i.e., between the saw streets 305), while a portion of the glass core 325 is shown outside the saw streets 305.

[0065] The glass core 325 can have any suitable glass formulation and structure, similar to any glass core described in more detail herein. In an embodiment, one or more via openings 311 can be provided through the thickness of the glass core 325. The via openings 311 can be formed using any suitable patterning process. For example, a laser-assisted etching process can be used in some embodiments. Thus, the via openings 311 can have tapered sidewalls, etc.

[0066] In an embodiment, the perimeter of the glass core 325 can be surrounded by a buffer layer 327. The buffer layer 327 can mechanically couple multiple glass core 325 units together. In an embodiment, the buffer layer 327 can also have a tapered sidewall. For example, the sidewall 326 of the glass core 325 can have a double taper reaching a point, and the buffer layer 327 can be conformal to the contour of the sidewall 326. The buffer layer 327 can have a material composition similar to any buffer layer described in more detail herein. The saw streets 305 can be oriented so that they pass through the buffer layer 327. Therefore, the singulation process will not require any cutting or dicing through the glass material of the glass core 325. This helps to reduce the generation of cracks or other defects along the sidewall 326.

[0067] Reference now Figure 3B, shows a cross-sectional view of the core assembly 320 after singulation according to an embodiment. In the illustrated embodiment, the glass core 325 is singulated without an overlying buildup layer, etc. However, additional structures may be provided on the glass core 325 prior to singulation, including buildup layers, vias in the via openings 311, etc. In an embodiment, the singulation process results in an outer surface 328 of the buffer layer 327 being substantially vertical. That is, in some embodiments, the outer surface 328 may be substantially orthogonal to the top surface of the glass core 325. More generally, the surface of the outer surface 328 may not be parallel to the sidewall 326 of the glass core 325.

[0068] Reference now Figure 3C , shows a plan view of a panel 301 having a glass substrate 302 according to an embodiment. The panel 301 may include a plurality of glass core 325 units. The glass core 325 units may have been singulated from the glass substrate 302 (e.g., using a laser-assisted etching process). After singulation, the glass core 325 units may be separated from each other by saw streets filled with a buffer layer 327. Thus, after additional processing (e.g., including adding a buildup layer, etc.), the glass core 325 units may be singulated again using a mechanical singulation process (e.g., a saw) that does not require passing through the glass material.

[0069] Reference now Figure 3D , shows a plan view of a portion of a panel 301 according to an embodiment. As shown, the portion includes a first glass core region 325A and a second glass core region 325B. The glass core regions 325A and 325B may be surrounded by a buffer layer 327. Figure 3D As shown, the layout of glass core regions 325A and 325B need not be uniform or otherwise in a grid-like pattern. Instead, glass core regions 325A and 325B (as well as any other number of glass core regions 325) may be provided where a glass core structure is desired. For example, glass core 325 may be provided only in areas where a high density of vias is desired, and the remainder of the core may be a more traditional organic core material.

[0070] Reference now Figure 3E , shows a cross-sectional view of a core assembly 320 according to another embodiment. In an embodiment, the core assembly 320 may include a plurality of glass cores 325 stacked one above the other. For example, in Figure 3EThree glass cores 325 are shown in FIG. However, two or more glass cores 325 may be used in other embodiments. In the illustrated embodiment, the glass cores 325 are in direct contact with each other. In other embodiments, an adhesive or the like may be provided at the interface between the glass cores 325 to improve adhesion. When a thick core structure is required, the use of multiple stacked glass cores 325 allows the formation of high aspect ratio via openings 311. Each glass core 325 may have an hourglass-shaped via opening 311, and these via openings 311 may be aligned. The resulting structure may sometimes be referred to as a via opening having a sawtooth sidewall profile.

[0071] In an embodiment, a buffer layer 327 may also be disposed around the sidewalls 326 of the glass core 325. An outer surface 328 of the buffer layer 327 may be substantially vertical due to a singulation process, such as the singulation process described in more detail above. An inner surface of the buffer layer 327 may be conformal to the stacked sidewalls 326 of the glass core 325. In some embodiments, the inner surface of the buffer layer 327 may have a sawtooth profile.

[0072] In an embodiment, one or more glass cores 325 may have embedded components 318. For example, in Figure 3E 318. However, it should be understood that multiple components 318 may be provided in a single glass core 325 or multiple glass core 325 layers. Component 318 may be any suitable component for assisting the function of the package substrate. In some embodiments, component 318 is a passive component (e.g., a capacitor, a resistor, an inductor, etc.). In other embodiments, component 318 may be an active component.

[0073] Reference now Figures 4A-4J , shows a series of cross-sectional views depicting a process for forming a package substrate 400 according to an embodiment. The package substrate 400 may be formed with a glass core 425 including a protective buffer layer 427 around an outer perimeter of the glass core 425.

[0074] Reference now Figure 4A , shows a cross-sectional view of a panel 410 at a manufacturing stage according to an embodiment. In an embodiment, the panel 410 may include a carrier 450. The carrier 450 may be a glass carrier, a ceramic carrier, a metal carrier, or any other suitable material. The glass core 425 may be attached above and / or below the carrier 450. For example, an adhesive layer 451 may attach the glass core 425 to the carrier 450. The glass core 425 may be any glass formulation and structure similar to those described in more detail above.

[0075] Reference now Figure 4B, shows a cross-sectional view of a panel 410 after forming a via opening 411 and a buffer opening 412 according to an embodiment. In an embodiment, a laser-assisted etching process may be used to form the via opening 411 and the buffer opening 412. For example, the laser exposure process changes the structure of the glass core 425 and allows selective etching to form the openings 411 and 412. In some embodiments, the openings 411 and 412 may have tapered sidewalls. Due to the presence of the carrier 450, the laser-assisted etching process may be a single-sided process. Therefore, the sidewalls of the openings 411 and 412 may have a single tapered profile having a larger width at the surface and a smaller width near the carrier 450.

[0076] Reference now Figure 4C , shows a cross-sectional view of panel 410 after dispensing buffer layer 427 according to an embodiment. Buffer layer 427 can be any material similar to the buffer layer described in more detail herein. In an embodiment, buffer layer 427 is applied using any suitable process (e.g., spin coating, lamination, molding, chemical vapor deposition (CVD), physical vapor deposition (PVD), etc.). In an embodiment, buffer layer 427 fills via opening 411 and buffer opening 412. In some embodiments, buffer layer 427 can also be disposed on the exposed top / bottom surface of glass core 425.

[0077] Reference now Figure 4D , shows a cross-sectional view of panel 410 after recessing buffer layer 427 according to an embodiment. The recessing process may result in the removal of any cover layers over glass core 425. This leaves buffer layer 427 material within via opening 411 and buffer opening 412.

[0078] Reference now Figure 4E , shows a cross-sectional view of panel 410 after clearing via opening 411 according to an embodiment. In an embodiment, via opening 411 may be cleared using an etching process. For example, a resist layer may be deposited using an opening above via opening 411. Buffer opening 412 may remain covered. After the etching process, the resist layer may be removed.

[0079] Reference now Figure 4F , shows a cross-sectional view of panel 410 after forming buildup layer 440 according to an embodiment. In an embodiment, via opening 411 may be filled with a conductive material to form via 421. Via 421 may be formed using an electroplating process, etc. In some embodiments, a liner (not shown) may be provided between via 421 and glass core 425. After forming via 421, layer 452 may be deposited on the surface of glass core 425. Layer 452 may be another buffer-type material, an adhesive-type material, etc.

[0080] In an embodiment, a buildup layer 440 may be provided on top of layer 452. The buildup layer 440 may be an organic buildup material, such as a buildup film, etc. Multiple buildup film layers may be stacked one above the other. Conductive features 444 (e.g., vias, traces, pads, etc.) may be fabricated within the buildup layer 440 to provide the necessary electrical wiring for the system. The buildup layer 440 may be formed at the panel level. That is, the buildup layer 440 may span the width of the buffer layer 427.

[0081] Reference now Figure 4G , shows a cross-sectional view of panel 410 after removal of carrier 450 according to an embodiment. Carrier 450 and adhesive layer 451 may be removed by any suitable process. Thus, a pair of panels (i.e., top and bottom) are released for further processing on the surfaces previously in contact with carrier 450. Figure 4G As shown, saw street 405 is also shown. Saw street 405 passes through buildup layer 440 and intersects buffer layer 427.

[0082] Reference now Figure 4H , shows a cross-sectional view of a package substrate 400 after singulation according to an embodiment. As shown, the singulation process results in a buildup layer 440 and sidewalls 441 being substantially coplanar with an outer surface 428 of a buffer layer 427. In an embodiment, the outer surface 428 of the buffer layer 427 may not be parallel to an inner surface of the buffer layer 427, which is conformal to the sidewalls 426 of the glass core 425.

[0083] Reference now Fig. 4I , shows a cross-sectional view of a panel 410 according to another embodiment. Instead of singulating the panel 410 after removing the carrier 450, the back side of the glass core 425 is also processed. For example, a second buildup layer 440 having conductive features 444 is disposed on the opposite side of the glass core 425.

[0084] Reference now Figure 4J , shows a cross-sectional view of a package substrate 400 according to another embodiment. Figure 4J The package substrate 400 is Fig. 4I The panel 410 in FIG. 4 is singulated along the saw streets 405. As shown, the sidewalls 441 of both the top buildup layer 440 and the bottom buildup layer 440 are substantially coplanar with the outer surface 428 of the buffer layer 427.

[0085] Reference now Figure 5A and 5B , shows a cross-sectional view depicting the fabrication and singulation of a stacked glass core 525 according to an embodiment.

[0086] Reference now Figure 5A, a cross-sectional view of a panel 510 according to an embodiment is shown. In an embodiment, the panel 510 may include a plurality of stacked glass cores 525. Although three glass cores 525 are shown as an example, an embodiment may include two or more stacked glass cores 525. The stacked glass cores 525 may be in direct contact with each other, or an adhesive layer (not shown) may be provided between the glass cores. A conductive via 521 having a sawtooth profile may pass through the thickness of each glass core 525. Similarly, a sawtooth profile buffer layer 527 may pass through the thickness of each glass core 525. The saw street 505 is oriented to pass through the approximate center of the buffer layer 527.

[0087] Reference now Figure 5B , shows a cross-sectional view of a portion of a panel 510 according to an embodiment. As shown, an outer surface 528 of the buffer layer 527 has a substantially vertical profile, while an inner surface of the buffer layer 527 has a sawtooth profile conforming to the sidewall 526 of the glass core 525.

[0088] Reference now Figures 6A-6I , shows a series of cross-sectional views depicting a process for forming a package substrate having a buffer layer 627 around a glass core 625 according to an embodiment. In an embodiment, the buffer layer 627 covers the entire sidewall of the glass core 625 in addition to surrounding the edge surface of the glass core 625. This can provide enhanced adhesion to improve reliability.

[0089] Reference now Fig. 6A , a cross-sectional view of a panel 610 according to an embodiment is shown. In an embodiment, the panel 610 may include a glass core 625. The glass core 625 may have a material composition and structure similar to any glass core described in more detail herein. In an embodiment, the glass core 625 includes a top surface 623 and a bottom surface 624 opposite to the top surface 623. The glass core 625 may have a form factor that is larger than the size of a single package substrate unit. That is, multiple units may be manufactured from the panel 610.

[0090] Reference now Figure 6B , shows a cross-sectional view of panel 610 after a first etching process according to an embodiment. The first etching process may result in recessing of top surface 623 and bottom surface 624. A first recessed surface 631 may be disposed into top surface 623, and a second recessed surface 632 may be disposed into bottom surface 624. The recessed surfaces may be formed using any suitable etching process (e.g., wet etching, dry etching, etc.).

[0091] In the illustrated embodiment, the sidewalls between the first recessed surface 631 and the top surface 623 may be substantially vertical. However, other profiles may also be provided depending on the etching process used to form the recess. In addition, although the first recessed surface 631 is shown as being substantially parallel to the top surface 623, the first recessed surface 631 may be curved or otherwise non-parallel to the top surface 623. Similarly, the sidewalls between the second recessed surface 632 and the bottom surface 624 may be non-vertical, and the second recessed surface 632 may be non-planar or otherwise non-parallel to the bottom surface 624. The first recessed surface 631 may be recessed from the top surface 623 by up to about 20 μm. In a particular embodiment, the first recessed surface 631 is recessed from the top surface 623 by up to about 5 μm. The second recessed surface 632 may have a similar recessed size relative to the bottom surface 624.

[0092] Reference now Figure 6C , shows a cross-sectional view of panel 610 after attaching carrier 650 according to an embodiment. Carrier 650 can be any suitable material (e.g., glass, ceramic, metal, etc.). In some embodiments, carrier 650 can be attached to glass core 625 by an adhesive layer (not shown).

[0093] The glass core 625 may also be exposed using a laser process. The laser exposure may modify regions 607 of the glass core 625 so as to make them more susceptible to etching chemistries (e.g., wet etching chemistries). In some embodiments, double-sided exposure may be used. In this case, the laser exposure may be performed prior to attaching the carrier 650. In other embodiments, single-sided laser exposure may be used.

[0094] In an embodiment, the region 607 may be located within the recess. That is, the region 607 may have a top surface on the first recess 631 and a bottom surface on the second recess 632. The width of the region 607 may also be smaller than the width of the recess.

[0095] Reference now Fig.6D , shows a cross-sectional view of a panel 610 after forming a buffer opening 612 according to an embodiment. In an embodiment, the buffer opening 612 may be formed using an etching process that selectively removes the region 607. In an embodiment, the buffer opening 612 may have a tapered sidewall due to the laser enhanced etching process.

[0096] Reference now Fig. 6E, shows a cross-sectional view of a panel 610 after dispensing a buffer layer 627 in a buffer opening 612 according to an embodiment. The buffer layer 627 can be any material similar to the other buffer layers described in more detail herein. The buffer layer 627 can be applied using any suitable deposition process (e.g., coating, lamination, molding, CVD, PVD, etc.). Any excess buffer layer 627 can be recessed to expose the top surface 623 of the glass core 625. The buffer layer 627 can contact the sidewalls of the glass core 625 and the recessed surfaces 631 and 632. The top of the buffer layer 627 can be substantially coplanar with the top surface 623, and the bottom surface of the buffer layer 627 can be substantially coplanar with the bottom surface 624.

[0097] Reference now Fig. 6F , shows a cross-sectional view of panel 610 after removing carrier 650 according to an embodiment. In an embodiment, carrier 650 is removed using any suitable process. Any adhesive layer may also be removed and / or cleaned from bottom surface 624.

[0098] Reference now Figure 6G , shows a cross-sectional view of a panel 610 after forming a via 621 according to an embodiment. In an embodiment, the via 621 may be a conductive via 621 that passes through the thickness of the glass core 625. A liner (not shown) may be provided between the via 621 and the glass core 625. The via 621 may be formed using a laser-assisted etching process, followed by an electroplating process. Thus, the sidewalls of the via 621 may have a tapered profile. However, a vertical profile or any other profile may also be possible, depending on the manufacturing process used to form the via 621.

[0099] Reference now Figure 6H , shows a cross-sectional view of panel 610 after forming a buildup layer 640 above and / or below glass core 625 according to an embodiment. In an embodiment, buildup layer 640 may include a laminated organic buildup film, etc. In an embodiment, conductive features 644 (e.g., pads, traces, vias, etc.) may also be fabricated with buildup layer 640. Buildup layer 640 may extend across the width of buffer layer 627. As shown in FIG. Figure 6H As shown, saw street 605 passes through buildup layer 640 and intersects buffer layer 627 .

[0100] Reference now Fig.6I , shows a cross-sectional view of a package substrate 600 after singulation according to an embodiment. Panel 610 may be singulated along saw streets 605 to form individual units of package substrate 600. As shown, sidewalls 641 of buildup layer 640 may be substantially coplanar with outer surface 628 of buffer layer 627.

[0101] In an embodiment, the buffer layer 627 may cover the sidewall 626 of the glass core 625 and surround the end region of the glass core 625. For example, the buffer layer 627 fills the recess from the top surface 623 and the bottom surface 624. That is, the buffer layer 627 covers the first recess 631 and the second recess 632. Such a surrounding structure of the buffer layer 627 may be referred to as having a C-shaped structure. That is, the buffer layer 627 may have a vertical component conforming to the sidewall 626 of the glass core 625, and a pair of horizontal components extending away from the ends of the vertical component.

[0102] Reference now Figures 7A-7I , a series of cross-sectional views depicting a process for forming a package substrate 700 having a buffer layer 727 according to an embodiment are shown. In the illustrated embodiment, the package substrate 700 is manufactured using a reconstructed panel process. That is, known good glass cores 725 are assembled together and overmolded with a buffer layer 727 to form a reconstructed panel 710. After adding a buildup layer 740, individual package substrates 700 can be singulated from the panel 710.

[0103] Reference now Fig. 7A , shows a cross-sectional view of a panel 710 with a base carrier 750 according to an embodiment. The carrier 750 can be any suitable material (e.g., glass, ceramic, metal, etc.). The carrier 750 can have a form factor that accommodates multiple glass core 725 units (which are added in subsequent processing operations). In an embodiment, an adhesive layer 751 is disposed on the top surface of the carrier 750.

[0104] Reference now Figure 7B , shows a cross-sectional view of panel 710 after dispensing a first portion 727A of the buffer layer over carrier 750 according to an embodiment. In an embodiment, first portion 727A of the buffer layer may be deposited using a lamination process or any other suitable process.

[0105] Reference now Figure 7C , shows a cross-sectional view of a panel 710 after placing a glass core 725 on a first portion 727A of a buffer layer according to an embodiment. As shown, the glass core 725 can be a separate unit placed on a carrier (e.g., using a pick and place tool). The glass core 725 can have a conductive via 721 and a pad located above / below the via 721. In the illustrated embodiment, the glass core 725 can have vertical sidewalls. However, in other embodiments, the glass core 725 has tapered sidewalls.

[0106] Reference now Fig.7D, shows a cross-sectional view of a panel 710 after a second portion 727B of a buffer layer is disposed over a glass core 725, according to an embodiment. The second portion 727B of the buffer layer can be dispensed using a lamination process or any other suitable process. In the illustrated embodiment, the first portion 727A of the buffer layer and the second portion 727B of the buffer layer are the same shade to indicate a consistent material composition. In other embodiments, as will be described in more detail below, the first portion 727A of the buffer layer and the second portion 727B of the buffer layer can have different material compositions.

[0107] Reference now Fig. 7E , shows a cross-sectional view of a panel 710 after a molding operation according to an embodiment. For example, a press (not shown) may apply pressure to the second portion 727B of the buffer layer so as to squeeze the first portion 727A of the buffer layer against the second portion 727B of the buffer layer to form a uniform buffer layer 727. The buffer layer 727 may fill the gaps between the glass cores 725. In addition, the buffer layer 727 may surround all surfaces of the glass core 725. That is, the buffer layer 727 may be along the sidewalls of the glass core 725, as well as on the top and bottom surfaces of the glass core 725. The buffer layer 727 may surround the pads above and below the via 721.

[0108] Reference now Figure 7F , shows a cross-sectional view of panel 710 after removing carrier 750 according to an embodiment. In an embodiment, carrier 750 and adhesive 751 may be removed using any suitable process.

[0109] Reference now Figure 7G , shows a cross-sectional view of panel 710 after forming a buildup layer 740 according to an embodiment. In an embodiment, the buildup layer 740 may include a laminated organic buildup layer film. Conductive features 744 (e.g., pads, traces, vias, etc.) may also be provided within the buildup layer 740. In some embodiments, an embedded bridge 770 may also be provided in the buildup layer 740. The bridge 770 may include a substrate (e.g., silicon) that enables high-density wiring to communicatively couple a pair of dies together.

[0110] like Figure 7G As shown, saw streets 705 are provided between glass cores 725. The saw streets 705 pass through the buildup layer 740 and intersect the buffer layer 727. Thus, the glass is not cut through during the subsequent singulation process.

[0111] Reference now Figure 7H, shows a cross-sectional view of a package substrate 700 after singulation according to an embodiment. Since the singulation passes through the buffer layer 727, the outer surface 728 of the buffer layer 727 is substantially coplanar with the outer surface 741 of the buildup layer 740. Depending on the location of the singulation and the spacing between the glass cores 725, the thickness of the buffer layer 727 along the sidewalls 726 can be different from the thickness of the buffer layer 727 above the top surface 723 and / or the bottom surface 724 of the glass core 725.

[0112] Reference now Fig.7I , shows a cross-sectional view of a package substrate 700 after attaching a die 775 according to an embodiment. In an embodiment, the die 775 can be communicatively coupled to the buildup layer 740 via an interconnect 773 (e.g., any first level interconnect (FLI) architecture). A bridge 770 can communicatively couple two dies 775 together. In some embodiments, a second level interconnect (SLI) 774 is provided below the bottom buildup layer 740. For example, the SLI 774 can enable connection to a board (e.g., a printed circuit board (PCB)), an interposer, etc.

[0113] Reference now Figures 8A-8E , shows a cross-sectional view of a reconstructed panel 810 according to another embodiment. The reconstructed panel 810 includes different buffer layer 827 architectures. For example, an embodiment shows a structure with multiple different buffer layer 827 regions.

[0114] Reference now Fig. 8A , shows a cross-sectional view of a panel 810 according to an embodiment. In an embodiment, the panel 810 includes a glass core 825 having a via 821, and the via 821 is surrounded by a buffer layer 827. More specifically, the buffer layer 827 includes a first region 827A and a second region 827B. The first region 827A may have a different material composition than the second region 827B.

[0115] In an embodiment, the first region 827A may cover the bottom portion of the glass core 825, and the second region 827B may cover the top portion of the glass core 825. The interface between the first region 827A and the second region 827B may be approximately located at the midpoint (in the Z direction) of the glass core 825. However, the interface may be higher or lower. That is, in some embodiments, the first region 827A and the second region 827B may have different thicknesses.

[0116] Reference now Figure 8B, shows a cross-sectional view of a panel 810 according to another embodiment. As shown, the first region 827A of the buffer layer is between the glass cores 825. Some of the first regions 827A can surround the ends of the glass cores 825. The second region 827B of the buffer layer can be above the top and bottom surfaces of the glass core 825. That is, in some embodiments, the second region 827B can be surrounded by the first region 827A.

[0117] Reference now Figure 8C , shows a cross-sectional view of a panel 810 according to another embodiment. Figure 8C In the structure of FIG. 827A, the first region 827A of the buffer layer surrounds all surfaces of the glass core 825. The second region 827B of the buffer layer may be disposed above the glass core 825. For example, the second region 827B may not directly contact any portion of the glass core 825.

[0118] Reference now Fig.8D , shows a cross-sectional view of a panel 810 according to yet another embodiment. Fig.8D The embodiment shown is similar to Figure 8C In the illustrated embodiment, a third region 827C of a buffer layer is added below the glass core 825. The third region 827C can be the same material as the second region 827B, or the third region 827C can be a different material than the second region 827B.

[0119] Reference now Fig. 8E , shows a cross-sectional view of panel 810 according to another embodiment. Instead of having an adjacent glass core 825, glass core 825 can be adjacent to component 818. Component 818 can be embedded in buffer layer 827. Component 818 can be a passive component (e.g., capacitor, inductor, resistor, etc.) or an active component. Component 818 can then be integrated into the core of the package substrate by controlling where singulation occurs. For example, in Fig. 8E 8, the saw street can be on the right side of component 818, and the area between glass core 825 and component 818 can remain intact.

[0120] Reference now Figures 9A-9F , a series of diagrams depicting a process for forming a package substrate 900 having a glass core 925 according to an embodiment are shown. In an embodiment, the glass core 925 may include groove features to improve adhesion between the glass core 925 and the buffer layer. The panel level process may also be described as using a reconstructed panel process.

[0121] Reference now Fig.9A , showing a perspective view of a panel 910 according to an embodiment. The panel 910 may include a carrier 950 (eg, including glass, ceramic, metal, etc.). The carrier 950 may also include an adhesive ( Fig.9A 950). In an embodiment, a plurality of glass cores 925 may be placed on a carrier 950. The glass cores 925 may be similar to any of the glass cores described in more detail herein. In an embodiment, the glass cores 925 may be known good structures that are picked up and placed onto the carrier 950. Thus, a reconstructed panel 910 with a high yield of cells may be manufactured.

[0122] Reference now Fig. 9B , showing the Fig.9A 9-9' of panel 910. In an embodiment, glass core 925 can be adhered to carrier 950 by adhesive 951. Adhesive 951 can be a layer (as shown), or adhesive 951 can be locally dispensed under each glass core 925.

[0123] In an embodiment, the glass core 925 may have a center portion 962 and an edge portion 961. In an embodiment, the edge portion 961 may extend away from the sidewall of the glass core 925 by about 200 μm or more. In some embodiments, the edge portion 961 may have a width between about 10 μm and about 150 μm. The edge portion 961 may have a groove structure. The groove structure may be used to improve mechanical adhesion with a buffer layer that will be added in subsequent processing operations. The edge portion 961 may be manufactured into the glass core 925 before the glass core 925 is placed on the carrier 950.

[0124] Reference now Fig. 9C , shows a perspective view of a panel 910 after dispensing a buffer layer 927 around a glass core 925 according to an embodiment. In an embodiment, the buffer layer 927 can be dispensed using any suitable process. For example, lamination, molding, etc. can be used. The buffer layer 927 can be any material used for the buffer layer described in more detail herein. For example, epoxy resins, molding materials, build-up materials, metal materials, etc. can be used for the buffer layer 927. In some embodiments, a polishing process can be used to flatten the top surface of the glass core 925 with the top surface of the buffer layer 927.

[0125] Reference now Fig.9D , showing the Fig. 9C 9-9' of panel 910. As shown, buffer layer 927 surrounds edge portion 961 of glass core 925. Buffer layer 927 can also fill in grooves in the edge profile of glass core 925 to improve the mechanical coupling between buffer layer 927 and glass core 925.

[0126] Reference now Fig.9E, a cross-sectional view of panel 910 after carrier 950 is removed and buildup layer 940 is formed. In an embodiment, buildup layer 940 can be similar to any of the buildup layers described in more detail herein. For example, buildup layer 940 can include conductive features 944 (e.g., pads, traces, vias, etc.). Buildup layer 940 extends across buffer layer 927. As shown, saw street 905 passes through buildup layer 940 and buffer layer 927.

[0127] Reference now Fig.9F , shows a cross-sectional view of a package substrate 900 after singulation according to an embodiment. In an embodiment, the buildup layer 940 has a sidewall 941 that is substantially coplanar with the outer surface 928 of the buffer layer 927. In addition, the outer surface 928 of the buffer layer 927 has a different shape than the inner surface of the buffer layer 927. For example, instead of a single linear outer surface 928, one or more grooves 933, etc., may be provided along the inner surface.

[0128] Reference now Figures 10A-10K , shows a series of cross-sectional views depicting a process for forming a packaging substrate 1000 from a reconstituted panel 1010 according to an embodiment.

[0129] Reference now Fig. 10A , shows a cross-sectional view of a panel 1010 having a glass core 1025 according to an embodiment. In an embodiment, the panel 1010 includes multiple glass core 1025 units manufactured on a single glass sheet. The glass core 1025 may include a via 1021. The via 1021 may be similar in composition and structure to any via described in more detail herein. In an embodiment, the panel 1010 may have any glass formulation and thickness similar to the embodiments described in more detail herein.

[0130] Reference now Fig. 10B , shows a cross-sectional view of a panel 1010 after singulation of a single glass core 1025 unit according to an embodiment. In the illustrated embodiment, the singulation depicts vertical glass core 1025 sidewalls. However, other embodiments may include tapered or otherwise non-vertical edge profiles. For example, when a laser-assisted etching process is used for singulation, the edges of the glass core 1025 may be beveled.

[0131] Reference now Fig. 10C , shows a cross-sectional view of panel 1010 after placing individual glass cores 1025 onto carrier 1050 according to an embodiment. In an embodiment, glass cores 1025 may be known good units. That is, Fig. 10B After singulation in , glass core 1025 can be tested, where only fully functional units are placed on carrier 1050. In some embodiments, adhesive 1051 can be disposed between glass core 1025 and carrier 1050.

[0132] Reference now Fig. 10D , shows a cross-sectional view of panel 1010 after adding a buffer layer 1027 between glass cores 1025 according to an embodiment. In an embodiment, buffer layer 1027 can be dispensed with nozzle 1066 or by any other suitable deposition process. Buffer layer 1027 can have a material composition similar to any buffer layer described in more detail herein.

[0133] Reference now Fig. 10E , shows a cross-sectional view of panel 1010 after forming buildup layer 1040 according to an embodiment. Buildup layer 1040 may include an organic buildup film, etc. Conductive features 1045 (eg, vias, traces, pads, etc.) may also be disposed in buildup layer 1040 .

[0134] Reference now Fig.10F , shows a cross-sectional view of panel 1010 after attaching second carrier 1050 over buildup layer 1040 according to an embodiment. In an embodiment, second carrier 1050 can be attached using adhesive 1051 or the like. Second carrier 1050 can be similar to first carrier 1050 below glass core 1025. However, in some embodiments, different carrier 1050 structures can also be used.

[0135] Reference now Figure 10G , shows a cross-sectional view of panel 1010 after removing first carrier 1050 according to an embodiment. In an embodiment, removing first carrier 1050 exposes the bottom surface of glass core 1025.

[0136] Reference now Fig. 10H , shows a cross-sectional view of panel 1010 after forming a buildup layer 1040 on the bottom of glass core 1025 according to an embodiment. Buildup layer 1040 can be similar to the buildup layer formed above glass core 1025. In some embodiments, conductive features 1045 can also be embedded in buildup layer 1040 below glass core 1025.

[0137] Reference now Fig.10I , shows a cross-sectional view of panel 1010 after removing second carrier 1050 according to an embodiment. In an embodiment, second carrier 1050 may be removed by any suitable process.

[0138] Reference now Fig.10J, shows a cross-sectional view of panel 1010 after forming additional buildup layers 1040 according to an embodiment. In some cases, one or more bridges 1070 can be embedded in buildup layers 1040. Bridges 1070 can be silicon bridges 1070 to enable high density wiring between dies that will be attached to a singulated package substrate in subsequent processing operations.

[0139] Fig.10J 1. The saw street 1005 is shown in FIG. The saw street 1005 passes through the buildup layer 1040 and intersects the buffer layer 1027. Therefore, the singulation process will not need to pass through any glass material, and damage to the glass core 1025 is reduced.

[0140] Reference now Figure 10K , shows a cross-sectional view of a package substrate 1000 after singulation according to an embodiment. In an embodiment, the package substrate 1000 includes a buildup layer 1040 having an outer surface 1041 substantially coplanar with an outer surface 1028 of a buffer layer 1027. In an embodiment, an inner surface of the buffer layer 1027 is conformal to a sidewall 1026 of the glass core 1025. In the illustrated embodiment, the sidewall 1026 of the glass core 1025 is substantially parallel to the outer surface 1028 of the buffer layer 1027. However, in other embodiments, the outer surface 1028 of the buffer layer 1027 is along a plane that intersects a plane that includes at least a portion of the sidewall 1026.

[0141] Reference now Figures 11A-11I , a series of diagrams depicting a process for forming a packaging substrate 1100 having a glass core 1125 according to an embodiment are shown. The packaging substrate 1100 is manufactured by a panel-level process. More specifically, the panel-level process includes the use of a glass frame. The glass frame can have substantially the same CTE as the glass core, so there will be minimal warping after reconstruction. However, it should be understood that the frame can also include materials other than glass. For example, the frame can include polymers, polymer composites, etc. In addition, the stress caused by the CTE mismatch between the glass core and the stacked material above is proportional to the length. In the reconstructed panel, the stress is limited to the length of the unit size, so the stress is reduced compared to an interface with a full panel size.

[0142] Reference now Fig.11A, shows a plan view of a panel 1110 according to an embodiment. In an embodiment, the panel 1110 includes a frame 1180. The frame 1180 can be a glass frame. The glass formula of the frame 1180 can be similar or the same as the glass formula of the glass core used in the process flow. However, other materials can also be used for the frame 1180, such as but not limited to polymers, composite materials, etc. The frame 1180 may include an opening 1181. The size of the opening 1181 can be determined to accommodate the glass core during subsequent processing operations. The opening 1181 can be oversized to accommodate a buffer layer around the glass core. The opening 1181 can expose a portion of the glass core disposed in the core 1150 (in Fig.11A Lower adhesive 1151 above (not visible in FIG).

[0143] Reference now Fig. 11B , showing the Fig.11A A cross-sectional view of the panel 1110 along line 11 - 11 ′ in FIG. 1 . The carrier 1150 below the adhesive layer 1151 may be any suitable material (eg, glass, ceramic, metal, etc.).

[0144] Reference now Fig. 11C , shows a plan view of panel 1110 after placing glass core 1125 into opening 1181 according to an embodiment. Glass core 1125 may be a known good unit to provide improved process yield.

[0145] Reference now Fig.11D , showing the Fig. 11C 11 '. As shown, the glass core 1125 can have a thickness substantially equal to the thickness of the frame 1180. However, the glass core 1125 can also be thinner or thicker than the frame 1180. The width of the glass core 1125 can be narrower than the width of the opening 1181. In the illustrated embodiment, the glass core 1125 has substantially vertical side walls. However, in some embodiments, a glass core 1125 with tapered or non-vertical side walls can also be used. For simplicity, the glass core 1125 is a unitary structure. In other embodiments, conductive vias, etc. can be made in the glass core 1125 before the glass core 1125 is inserted into the frame 1180.

[0146] Reference now Fig.11E , shows a plan view of panel 1110 after applying buffer layer 1127 according to an embodiment. Buffer layer 1127 can be applied using any suitable deposition process. Buffer layer 1127 can be a material similar to any buffer layer material described in more detail herein. In an embodiment, buffer layer 1127 fills the remaining portion of opening 1181 and covers the top surface of frame 1180 and glass core 1125.

[0147] Reference now Fig.11F , showing the Fig.11E 11 is a cross-sectional view of panel 1110 along line 11-11'. As shown, buffer layer 1127 conforms to the sidewall shape of glass core 1125 and fills opening 1181. Buffer layer 1127 can cover the sidewall of glass core 1125 and the top surface of glass core 1125.

[0148] Reference now Fig.11G , shows a cross-sectional view of panel 1110 after carrier 1150 is removed according to an embodiment. In an embodiment, an additional portion of buffer layer 1127 may be applied over the bottom of frame 1180 and the bottom of glass core 1125 after carrier 1150 is removed. In an embodiment, the bottom portion of buffer layer 1127 may have a thickness substantially equal to the thickness of the top portion of buffer layer 1127 (i.e., the portion above the top surface of glass core 1125). In other embodiments, the bottom portion of buffer layer 1127 may have a thickness different from the thickness of the top portion of buffer layer 1127.

[0149] Reference now Fig.11H , shows a cross-sectional view of panel 1110 after stacking layer 1140 is disposed above and / or below frame 1180 and glass core 1125 according to an embodiment. Buildup layer 1140 may include laminated organic buildup film materials, etc. Conductive features (e.g., pads, traces, vias, etc.) may be disposed within buildup layer 1140. In an embodiment, saw street 1105 may pass through buildup layer 1140 and a portion of buffer layer 1127 between glass core 1125 and frame 1180.

[0150] Reference now Fig.11I , shows a cross-sectional view of a package substrate 1100 after singulation according to an embodiment. In an embodiment, an outer surface 1141 of the stacking layer 1140 is substantially coplanar with an outer surface 1128 of the buffer layer 1127. As shown, the buffer layer 1127 can be considered as at least three different regions. A first region 1127A is provided above the top surface 1123 of the glass core 1125, a second region 1127B is provided below the bottom surface 1124 of the glass core 1125, and a third region 1127C is provided along the sidewall 1126 of the glass core 1125. In an embodiment, the thicknesses of the different regions 1127A, 1127B, and 1127C may be substantially consistent with each other. In other embodiments, some or all of the different regions 1127A, 1127B, and 1127C may have different thicknesses.

[0151] Reference now Figures 12A-12G , shows a series of cross-sectional views depicting a process for forming a package substrate 1200 using a panel level process according to an embodiment.

[0152] Reference now Fig. 12A , shows a cross-sectional view of a panel 1210 according to an embodiment. In an embodiment, the panel 1210 includes a glass sheet including a plurality of glass cores 1225. The glass cores 1225 may include conductive vias 1221. The glass cores 1225 may be adhered to a carrier 1250 by an adhesive layer 1251. The carrier 1250 may include glass, ceramic, metal, etc.

[0153] Reference now Fig. 12B , a cross-sectional view of panel 1210 after forming grooves 1277 between glass cores 1225. In an embodiment, grooves 1277 can be formed using a mechanical sawing process or any other suitable process. In some cases, grooves 1277 can continue into adhesive layer 1251.

[0154] Reference now Fig. 12C , shows a cross-sectional view of panel 1210 after dispensing a buffer layer 1227 around glass core 1225 according to an embodiment. Buffer layer 1227 can include any material composition similar to other buffer layer structures described in more detail herein. Buffer layer 1227 can be disposed along the sidewalls of glass core 1225 and over the top surface of glass core 1225.

[0155] Reference now Fig.12D , shows a cross-sectional view of panel 1210 after removing carrier 1250 according to an embodiment. In an embodiment, carrier 1250 and adhesive 1251 can be removed by any suitable process. As shown, a small backbone of buffer layer 1227 can extend beyond the bottom surface of glass core 1225.

[0156] Reference now Fig.12E , a cross-sectional view of panel 1210 after adding an additional portion of buffer layer 1227. Additional portions of buffer layer 1227 can be added along the bottom surface of glass core 1225. The bottom portion of buffer layer 1227 can be the same material as the rest of buffer layer 1227, or the bottom portion of buffer layer 1227 can be a different material than the rest of buffer layer 1227.

[0157] Reference now Fig.12F , shows a cross-sectional view of panel 1210 after a buildup layer 1240 is disposed on buffer layer 1227 according to an embodiment. In an embodiment, buildup layer 1240 may include a laminated organic buildup film, etc. Conductive features (not shown) may also be embedded in buildup layer 1240. Fig.12F As shown, saw streets 1205 may be provided between the glass cores 1225. The saw streets 1205 may pass through the buildup layer 1240 and intersect portions of the buffer layer 1227 between the glass cores 1225.

[0158] Reference now Figure 12G , shows a cross-sectional view of a package substrate 1200 after singulation according to an embodiment. In an embodiment, the singulation process results in the sidewall 1241 of the buildup layer 1240 being substantially coplanar with the outer surface 1228 of the buffer layer 1227. Since the sidewall 1226 of the glass core 1225 is formed using a mechanical sawing process, the sidewall 1226 may also be substantially parallel to the edge 1228 of the buffer layer 1227.

[0159] In an embodiment, the buffer layer 1227 can be completely (or at least substantially) embedded in the glass core 1225. For example, the buffer layer 1227 can be disposed over at least a portion of the top surface 1223 of the glass core 1225, at least a portion of the bottom surface 1224 of the glass core 1225, and at least a portion of the sidewall 1226 of the glass core 1225. In other embodiments, the buffer layer 1227 covers the entirety of one or more of the top surface 1223, the bottom surface 1224, or the sidewall 1226 of the glass core 1225. Additionally, the buffer layer 1227 can have different thicknesses over different surfaces of the glass core 1225.

[0160] In an embodiment, any packaging substrate described herein can be used in an electronic system. For example, a glass core packaging substrate (e.g., a glass core packaging substrate described herein) can be mechanically and electrically coupled to a board (e.g., a motherboard). For example, a second level interconnect (SLI) (e.g., solder or a socket) can be used to couple the board to the glass core packaging substrate. In an embodiment, one or more dies can be coupled to the glass core packaging substrate via a first level interconnect (FLI) (e.g., solder balls, copper bumps, hybrid bonding interfaces, etc.). The die can include any suitable die architecture, such as a central processing unit (CPU), a graphics processing unit (GPU), an XPU, a communication die, a memory die, etc.

[0161] Fig.13 A computing device 1300 is shown according to one embodiment of the present disclosure. The computing device 1300 houses a board 1302. The board 1302 may include a number of components, including, but not limited to, a processor 1304 and at least one communication chip 1306. The processor 1304 is physically and electrically coupled to the board 1302. In some embodiments, the at least one communication chip 1306 is also physically and electrically coupled to the board 1302. In further embodiments, the communication chip 1306 is part of the processor 1304.

[0162] These other components include, but are not limited to, volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), flash memory, graphics processors, digital signal processors, cryptographic processors, chipsets, antennas, displays, touch screen displays, touch screen controllers, batteries, audio codecs, video codecs, power amplifiers, global positioning system (GPS) devices, compasses, accelerometers, gyroscopes, speakers, cameras, and mass storage devices (e.g., hard drives, compact disks (CDs), digital versatile disks (DVDs), etc.).

[0163] The communication chip 1306 implements wireless communication for data transmission to and from the computing device 1300. The term "wireless" and its derivatives can be used to describe circuits, devices, systems, methods, techniques, communication channels, etc. that can transmit data via non-solid media using modulated electromagnetic radiation. The term does not mean that the associated device does not include any wires, although in some embodiments they may not. The communication chip 1306 can implement any of a variety of wireless standards or protocols, including but not limited to Wi-Fi (IEEE 802.11 series), WiMAX (IEEE 802.16 series), IEEE 802.20, Long Term Evolution (LTE), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPRS, CDMA, TDMA, DECT, Bluetooth, its derivatives, and any other wireless protocols designated as 3G, 4G, 5G and later. The computing device 1300 may include multiple communication chips 1306. For example, the first communication chip 1306 can be dedicated to shorter-range wireless communications such as Wi-Fi and Bluetooth, and the second communication chip 1306 can be dedicated to longer-range wireless communications such as GPS, EDGE, GPRS, CDMA, WiMAX, LTE, Ev-DO, etc.

[0164] The processor 1304 of the computing device 1300 includes an integrated circuit die packaged within the processor 1304. In some implementations of the present disclosure, the integrated circuit die of the processor may be part of an electronic package including a packaging substrate having a glass core and a buffer layer surrounding the outer perimeter of the glass core in accordance with embodiments described herein. The term "processor" may refer to any device or part of a device that processes electronic data from registers and / or memory to convert the electronic data into other electronic data that may be stored in registers and / or memory.

[0165] The communication chip 1306 also includes an integrated circuit die packaged within the communication chip 1306. According to another embodiment of the present disclosure, the integrated circuit die of the communication chip can be part of an electronic package including a packaging substrate having a glass core and a buffer layer surrounding an outer perimeter of the glass core according to embodiments described herein.

[0166] In an embodiment, the computing device 1300 may be part of any apparatus. For example, the computing device may be part of a personal computer, a server, a mobile device, a tablet computer, an automobile, etc. That is, the computing device 1300 is not limited to use in any particular type of system, and the computing device 1300 may be included in any apparatus that may benefit from computing functionality.

[0167] The above description of the illustrated embodiments of the present disclosure, including what is described in the Abstract, is not intended to be exhaustive or to limit the present disclosure to the precise forms disclosed. Although specific embodiments and examples of the present disclosure are described herein for illustrative purposes, various equivalent modifications are possible within the scope of the present disclosure as will be appreciated by those skilled in the relevant art.

[0168] These modifications may be made to the present disclosure in light of the above detailed description. The terms used in the appended claims should not be interpreted as limiting the present disclosure to the specific embodiments disclosed in the specification and claims. On the contrary, the scope of the present disclosure is determined entirely by the appended claims, which will be interpreted in accordance with established principles of claim interpretation.

[0169] Example 1: A device comprising: a substrate having a first surface, a second surface opposite to the first surface, and a sidewall between the first surface and the second surface, wherein the substrate comprises a glass layer; a via passing through the substrate between the first surface and the second surface, wherein the via is conductive; and a layer in contact with the sidewall of the substrate, wherein the layer surrounds a periphery of the substrate.

[0170] Example 2: The device of Example 1, wherein the layer further contacts the first surface and / or the second surface.

[0171] Example 3: A device according to Example 1 or Example 2, wherein at least a portion of the sidewall is oriented at a non-orthogonal angle relative to the first surface.

[0172] Example 4: The device of Example 3, wherein the layer has an outer surface substantially orthogonal to the first surface and an inner surface conformal to the contour of the sidewall of the substrate.

[0173] Example 5: The device of Examples 1-4 further includes: a third surface surrounding a periphery of the first surface, wherein the third surface is recessed below the first surface; and wherein the layer further contacts the third surface.

[0174] Example 6: The apparatus of Example 5 further comprising: a groove extending into the third surface, wherein the layer fills the groove.

[0175] Example 7: The device of Examples 1-6, wherein the layer comprises an organic material.

[0176] Example 8: The device of Example 7, wherein the layer comprises a material compatible with molding, or wherein the layer comprises a built-up film.

[0177] Example 9: The device of Examples 1-8, wherein the thickness of the layer between the outer surface of the layer and the sidewall of the substrate is up to about 200 μm.

[0178] Example 10: The device of Examples 1-9, wherein the substrate has a thickness between about 100 μm and about 2000 μm.

[0179] Example 11: A device comprising: a first layer having a first width, wherein the first layer comprises a glass layer; a second layer above the first layer, wherein the second layer has a second width greater than the first width; and a buffer layer around the first layer, wherein an outer surface of the buffer layer is substantially coplanar with a sidewall of the second layer.

[0180] Example 12: The device of Example 11, wherein the buffer layer covers the entire height of the sidewalls of the first layer.

[0181] Example 13: A device according to Example 11 or Example 12, wherein the buffer layer has a first modulus and the first layer has a second modulus, and wherein the first modulus is lower than the second modulus.

[0182] Example 14: The device of Examples 11-13, wherein an outer surface of the buffer layer and a sidewall of the second layer are substantially orthogonal to a top surface of the second layer.

[0183] Example 15: The device of Example 14, wherein the outer surface of the buffer layer is not parallel to at least a portion of the inner surface of the buffer layer.

[0184] Example 16: The device of Examples 11-15, wherein the buffer layer separates at least a portion of the first layer from at least a portion of the second layer.

[0185] Example 17: The device of Examples 11-16, wherein the buffer layer has a first material composition and the second layer has a second material composition different from the first material composition.

[0186] Example 18: The device of Examples 11-17, wherein the buffer layer has a first material composition and the second layer has a second material composition that is the same as the first material composition.

[0187] Example 19: An apparatus comprising: a board; a packaging substrate coupled to the board, wherein the packaging substrate comprises: a core comprising a glass layer; and a buffer layer surrounding a perimeter of the core; and a tube die coupled to the packaging substrate.

[0188] Example 20: The device of Example 19, wherein the sidewalls of the core are not parallel to the outer surface of the buffer layer.

[0189] Example 21: A device comprising: a core, wherein the core comprises at least one glass layer; a layer over the core; and a buffer layer around the core, wherein an outer perimeter of the buffer layer is aligned with an outer perimeter of the layer.

[0190] Example 22: The device of Example 21, wherein the core comprises two or more glass layers stacked on top of each other.

[0191] Example 23: The device of Example 22, wherein the two or more glass layers are attached to each other by an adhesive.

[0192] Example 24: The apparatus of Example 22 or Example 23, wherein the via passes through two or more glass layers, and wherein a sidewall of the via has a sawtooth profile.

[0193] Example 25: The apparatus of Examples 21-24, further comprising: components embedded in the core, wherein the components include passive devices.

[0194] Example 26: The device of Examples 21-25, wherein the buffer layer and the layer comprise the same material composition.

[0195] Example 27: The device of Examples 21-26, wherein the core has a non-vertical sidewall profile and the buffer layer is conformal to the non-vertical sidewall profile.

[0196] Example 28: The apparatus of Examples 21-27, further comprising: a second layer below the core.

[0197] Example 29: The apparatus of Examples 21-18, further comprising: a via extending through the core.

[0198] Example 30: The apparatus of Example 29, wherein a liner separates the via from the core.

[0199] Example 31: A device comprising: a core having a first surface, a second surface opposite to the first surface, and a sidewall connecting the first surface to the second surface, wherein the core comprises a glass layer; and a buffer layer surrounding the periphery of the core, wherein the buffer layer surrounds at least a portion of the first surface and at least a portion of the second surface.

[0200] Example 32: A device according to Example 31, wherein the first surface includes a first recessed surface, and wherein the second surface includes a second recessed surface, and wherein the buffer layer covers the first recessed surface and the second recessed surface.

[0201] Example 33: The device of Example 32, wherein a top portion of the buffer layer is substantially coplanar with the first surface, and wherein a bottom portion of the buffer layer is substantially coplanar with the second surface.

[0202] Example 34: The device of Examples 31-33, wherein the sidewall has a non-vertical profile, and wherein the buffer layer conforms to the non-vertical profile.

[0203] Example 35: An apparatus according to Example 34, wherein the non-vertical profile includes a first slope and a second slope.

[0204] Example 36: The device of Example 34, wherein an outer surface of the buffer layer is substantially orthogonal to the first surface of the core.

[0205] Example 37: The apparatus of Examples 31-36 further comprising: a via extending through the thickness of the core.

[0206] Example 38: The device of Examples 31-37 further includes: a stacking layer above the core.

[0207] Example 39: The device of Example 38, wherein an edge surface of the stacking layer is substantially coplanar with an outer surface of the buffer layer.

[0208] Example 40: A device according to Example 38 or Example 39, wherein the stacking layer and the buffer layer include the same material composition.

[0209] Example 41: A device comprising: a core, wherein the core comprises glass; and a buffer layer over the core, wherein the buffer layer covers sidewalls of the core, a top surface of the core, and a bottom surface of the core.

[0210] Example 42: The apparatus of Example 41, wherein the core includes vias extending through a thickness of the core.

[0211] Example 43: The apparatus of Example 42 further includes: a first pad above the via and a second pad below the via, and wherein the buffer layer surrounds the first pad and the second pad.

[0212] Example 44: A device according to Examples 41-43, wherein the sidewalls of the core have a non-vertical profile.

[0213] Example 45: The device of Examples 41-44 further includes: a first layer above the core; and a second layer below the core, wherein an edge surface of the first layer and an edge surface of the second layer are substantially coplanar with an outer surface of the buffer layer.

[0214] Example 46: The device of Examples 41-45 further includes: a component adjacent to the core, wherein the component is surrounded by a buffer layer.

[0215] Example 47: The device of Examples 41-46, wherein the buffer layer includes a first region and a second region above the first region, wherein the first region has a different material composition than the second region.

[0216] Example 48: A device according to Examples 41-47, wherein the buffer layer includes a first region and a second region, wherein the first region is above the top surface and the bottom surface of the core, wherein the second region is on the sidewall of the core, and wherein the first region has a different material composition than the second region.

[0217] Example 49: A device according to Examples 41-48, wherein the buffer layer includes a first region and a second region, wherein the first region contacts the top surface, the bottom surface, and the sidewall surface of the core, and wherein the second region is above the first region, and wherein the first region has a different material composition than the second region.

[0218] Example 50: The device of Example 49, wherein the buffer layer further comprises a third region below the second region, wherein the first region has a different material composition than the third region.

[0219] Example 51: A device comprising: a core having a central region and an edge region, wherein a maximum thickness of the edge region is less than a thickness of the central region, wherein the core comprises glass; and a buffer layer around the core, wherein the buffer layer surrounds an outer surface, a top surface, and a bottom surface of the edge region of the core.

[0220] Example 52: The device of Example 51, wherein the buffer layer conforms to the contour of the edge region of the core.

[0221] Example 53: The device of Example 51 or Example 52, wherein the edge region includes a groove into the core.

[0222] Example 54: A device according to Example 53, wherein the buffer layer fills the groove.

[0223] Example 55: The device of Examples 51-54, wherein an outer surface of the buffer layer is substantially orthogonal to a top surface of a central region of the core.

[0224] Example 56: The device of Examples 51-55, wherein a top surface of the buffer layer is substantially coplanar with a top surface of a central region of the core, and wherein a bottom surface of the buffer layer is substantially coplanar with a bottom surface of a central region of the core.

[0225] Example 57: The device of Examples 51-56 further includes: a buildup layer on top of the core, wherein an edge surface of the buildup layer is substantially coplanar with an outer surface of the buffer layer.

[0226] Example 58: The device of Examples 51-57, wherein the buffer layer comprises an epoxy resin material or a metal material.

[0227] Example 59: A device according to Examples 51-58, wherein the outer surface of the core is substantially orthogonal to the top surface of the central region.

[0228] Example 60: The device of Examples 51-59, wherein the edge region extends between about 10 μm and 150 μm into the core.

[0229] Example 61: A device comprising: a core, wherein the core comprises a glass layer; and a buffer layer around the core, wherein the buffer layer forms a ring having an outer surface and an inner surface in direct contact with the core.

[0230] Example 62: The device of Example 61, wherein the buffer layer has a thickness between about 10 μm and 150 μm between the inner surface and the outer surface.

[0231] Example 63: The device of Example 61 or Example 62, wherein the buffer layer covers the entire side wall of the core between the top surface of the core and the bottom surface of the core.

[0232] Example 64: The device of Examples 61-63, wherein the outer surface of the buffer layer is substantially orthogonal to the top surface of the core.

[0233] Example 65: An apparatus according to Examples 61-64, wherein the inner surface of the buffer layer is substantially parallel to the outer surface of the buffer layer.

[0234] Example 66: The device of Examples 61-65, wherein the buffer layer comprises an epoxy resin or a molding compound.

[0235] Example 67: The device of Examples 61-66 further includes: a layer above the core, wherein an edge surface of the layer is substantially coplanar with an outer surface of the buffer layer.

[0236] Example 68: The apparatus of Examples 61-67 further comprising: a via passing through the core, wherein the via is conductive.

[0237] Example 69: The device of Examples 61-68, wherein the core has a thickness between about 100 μm and about 2000 μm.

[0238] Example 70: A device according to Examples 61-69, wherein the sidewalls of the core have a sloped profile.

[0239] Example 71: A device comprising: a core, wherein the core comprises a glass layer; and a buffer layer around the core, wherein the buffer layer contacts a top surface of the core, a bottom surface of the core, and a sidewall surface of the core.

[0240] Example 72: The device of Example 71, wherein the buffer layer has an outer surface that is substantially orthogonal to the top surface of the core.

[0241] Example 73: A device according to Example 71 or Example 72, wherein the buffer layer has a first thickness above the sidewall surface of the core and a second thickness above the top surface of the core, wherein the first thickness is different from the second thickness.

[0242] Example 74: A device according to Example 73, wherein the first thickness is less than the second thickness.

[0243] Example 75: The device of Examples 71-74, wherein no seam exists between a portion of the buffer layer along the sidewall of the core and a portion of the buffer layer above the top surface of the core.

[0244] Example 76: The device of Examples 71-75, wherein the buffer layer comprises an epoxy resin material, a molding material, or an organic build-up material.

[0245] Example 77: The device of Examples 71-76, wherein the sidewall surface of the core has a tapered profile.

[0246] Example 78: The device of Examples 71-77 further includes: a buildup layer above the core and buffer layer.

[0247] Example 79: The device of Example 78, wherein an edge surface of the stacking layer is substantially coplanar with an outer surface of the buffer layer.

[0248] Example 80: The device of Example 78 or Example 79, wherein a buffer layer is between the buildup layer and the core.

[0249] Example 81: A device comprising: a core having a first coefficient of thermal expansion (CTE), wherein the core comprises a glass layer; and a buffer layer around the core, wherein the buffer layer has a second CTE within 20% of the first CTE.

[0250] Example 82: The apparatus of Example 81, wherein the second CTE is within 5% of the first CTE.

[0251] Example 83: A device according to Example 81 or Example 82, wherein the buffer layer includes a resin with inorganic fillers or fibers.

[0252] Example 84: The device of Examples 81-83, wherein the buffer layer contacts the sidewalls of the core, the top surface of the core, and the bottom surface of the core.

[0253] Example 85: The device of Examples 81-84, wherein an outer surface of the buffer layer is substantially orthogonal to the top surface of the core.

[0254] Example 86: The device of Examples 81-85 further includes: a stacking layer above the core.

[0255] Example 87: The device of Example 86, wherein an edge surface of the stacking layer is substantially coplanar with an edge surface of the buffer layer.

[0256] Example 88: The device of Examples 81-87, wherein the thickness of the buffer layer is between about 10 μm and about 150 μm.

[0257] Example 89: The device of Examples 81-88, wherein the core is embedded in a buffer layer.

[0258] Example 90: A device according to Examples 81-89, wherein the core has side walls with a tapered profile.

Claims

1. A device comprising: a substrate having a first surface, a second surface opposite to the first surface, and a sidewall between the first surface and the second surface, wherein the substrate comprises a glass layer; a via extending through the substrate between the first surface and the second surface, wherein the via is conductive; and A layer is in contact with the sidewalls of the substrate, wherein the layer surrounds a perimeter of the substrate.

2. The device according to claim 1, wherein: The layer also contacts the first surface and / or the second surface.

3. The device according to claim 1 or 2, wherein: At least a portion of the sidewall is oriented at a non-orthogonal angle relative to the first surface.

4. The device according to claim 3, wherein: The layer has an outer surface substantially orthogonal to the first surface and an inner surface conforming to a contour of the sidewall of the substrate.

5. The device according to claim 1 or 2, further comprising: a third surface surrounding a perimeter of the first surface, wherein the third surface is recessed below the first surface; and Wherein, the layer further contacts the third surface.

6. The apparatus according to claim 5, further comprising: A recess is formed in the third surface, wherein the layer fills the recess.

7. The device according to claim 1 or 2, wherein: The layer comprises an organic material.

8. The device according to claim 7, wherein: The layer comprises a material compatible with molding, or wherein the layer comprises a built-up film.

9. The device according to claim 1 or 2, wherein: The thickness of the layer between the outer surface of the layer and the sidewalls of the substrate is up to about 200 μm.

10. The device according to claim 1 or 2, wherein: The substrate has a thickness between about 100 μm and about 2000 μm.

11. An apparatus comprising: a first layer, the first layer having a first width, wherein the first layer comprises a glass layer; a second layer, the second layer being above the first layer, wherein the second layer has a second width greater than the first width; and A buffer layer surrounds the first layer, wherein an outer surface of the buffer layer is substantially coplanar with a sidewall of the second layer.

12. The device according to claim 11, wherein The buffer layer covers the entire height of the sidewalls of the first layer.

13. The device according to claim 11 or 12, wherein: The buffer layer has a first modulus and the first layer has a second modulus, and wherein the first modulus is lower than the second modulus.

14. The device according to claim 11 or 12, wherein: An outer surface of the buffer layer and a sidewall of the second layer are substantially orthogonal to a top surface of the second layer.

15. The device according to claim 14, wherein: The outer surface of the buffer layer is not parallel to at least a portion of an inner surface of the buffer layer.

16. The device according to claim 11 or 12, wherein: The buffer layer separates at least a portion of the first layer from at least a portion of the second layer.

17. The device according to claim 11 or 12, wherein: The buffer layer has a first material composition, and the second layer has a second material composition different from the first material composition.

18. The device according to claim 11 or 12, wherein: The buffer layer has a first material composition, and the second layer has a second material composition that is the same as the first material composition.

19. An apparatus comprising: plate; a packaging substrate coupled to the board, wherein the packaging substrate comprises: a core comprising a glass layer; and a buffer layer surrounding a periphery of the core; and A die is coupled to the package substrate.

20. The device according to claim 19, wherein The sidewall of the core is not parallel to the outer surface of the buffer layer.

Images