Fault storage method, storage control module, fault storage system and vehicle

Abstract

The invention provides a fault storage method, a storage control module, a fault storage system and a vehicle, the method is applied to the storage control module in the vehicle, the storage control module comprises a memory, the storage control module is connected with at least one electronic control unit ECU, and the method comprises the following steps: obtaining a second fault message from at least one ECU; performing transmission reliability transmission based on the second fault message to obtain a first fault message; adding an error correction code to the first fault message to obtain a third fault message, wherein the error correction code is used for checking and correcting the first fault message; and writing the third fault message into a memory for storage. The reliability of the transmission process and the storage process of the fault data is ensured through hardware redundancy and software verification, and the credibility of the fault information is improved.

Description

Technical Field

[0001] The present application relates to the field of data storage, and in particular to a fault storage method, a storage control module, a fault storage system and a vehicle. Background Art

[0002] With the continuous development of the automobile industry, the storage of fault information of the Electronic Control Unit (ECU) that controls the driving status and various functions of the car is extremely important for the ECU to restore its own operating status in time to maintain the smooth and safe operation of the car and the subsequent vehicle fault analysis and processing.

[0003] At present, the automotive industry is gradually using wire control technology to replace traditional mechanical technology. However, the electronic components that wire control technology relies on have a certain probability of random failure. This random failure cannot be estimated at a certain time. It is a hardware failure that occurs according to probability, such as open circuit, short circuit, resistance offset, etc. These will cause duplication, loss, sorting errors, contamination, blockage or addressing errors in the transmission and storage of fault data, making the stored fault data unreliable. Summary of the invention

[0004] The present application proposes a fault storage method, a storage control module, a fault storage system and a vehicle, which ensure the reliability of the transmission process and storage process of fault data through hardware redundancy and software verification, thereby improving the credibility of fault information.

[0005] In a first aspect, an embodiment of the present application provides a fault storage method, which is applied to a storage control module in a vehicle, wherein the storage control module includes a memory, and the storage control module is connected to at least one ECU, and the method includes:

[0006] Obtaining a second fault message from at least one ECU;

[0007] Performing a transmission reliability check based on the second fault message to obtain a first fault message;

[0008] A third fault message is obtained after adding an error correction code to the first fault message, wherein the error correction code is used to check and correct the first fault message;

[0009] The third fault message is written into the memory for storage.

[0010] In a possible embodiment, the memory includes a working memory and at least one mirror memory, and writing the third fault message into the memory for storage includes: writing the third fault message into the working memory; and copying data in the working memory to the at least one mirror memory.

[0011] In one possible embodiment, after copying the data in the working memory to at least one mirror memory, the method further includes: determining whether the data in the working memory is successfully copied to the target mirror memory, where the target mirror memory is any one of the at least one mirror memory. In one possible embodiment, determining whether the data in the working memory is successfully copied to the target mirror memory includes: obtaining a first hash value corresponding to the third fault message in the working memory and a second hash value corresponding to the third fault message in the target mirror memory; if the first hash value is the same as the second hash value, determining that the data in the working memory is successfully copied to the target mirror memory; or if the first hash value is different from the second hash value, determining that the data in the working memory is failed to be copied to the target mirror memory.

[0012] In a possible embodiment, the second fault message also includes a message count value, and the transmission reliability check based on the second fault message includes: performing a count continuity check on the message count value of the second fault message, if the message count value is continuous, the transmission of the second fault message is reliable, if the message count value is discontinuous, the transmission of the second fault message is unreliable.

[0013] In a possible embodiment, the second fault message also includes a cyclic redundancy check code CRC field, and the transmission reliability check of the second fault message includes: performing a correctness check on the CRC field of the second fault message, if the CRC field is correct, the transmission of the second fault message is reliable, if the CRC field is incorrect, the transmission of the second fault message is unreliable.

[0014] In one possible embodiment, the error correction code is an error checking and correction ECC code.

[0015] In a possible embodiment, the method further includes: receiving a read instruction; performing an error correction code check on the third fault message in the working memory based on the read instruction, and sending the third fault message in the working memory after the error correction code check succeeds.

[0016] In a possible embodiment, the method further includes: if the error correction code check fails, performing an error correction code check on the third fault message in the at least one mirror memory, and sending the third fault message in the at least one mirror memory after the error correction code check succeeds.

[0017] In one possible embodiment, the storage control module is the first storage control module among multiple storage control modules located in different parts of the vehicle, and the multiple storage control modules also include a second storage control module. The third fault message stored in the memory of the second storage control module is the same as the third fault message stored in the memory of the first storage control module.

[0018] In a second aspect, an embodiment of the present application provides a storage control module, comprising a processor, a memory, and one or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by the processor, and the one or more programs include instructions for executing the steps in the method as described above.

[0019] In a third aspect, an embodiment of the present application provides a fault storage system, comprising an ECU and the storage control module as described above.

[0020] In a fourth aspect, an embodiment of the present application provides a vehicle, comprising the fault storage system as described above.

[0021] In a fifth aspect, an embodiment of the present application provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program is executed by a processor to implement the steps of the method described above.

[0022] It can be seen that in the present application, the storage control module in the vehicle includes a memory, and the storage control module is connected to at least one ECU. The storage control module first obtains the second fault message from at least one ECU, and then performs a transmission reliability check based on the second fault message to obtain the first fault message, and then adds an error correction code to the first fault message to obtain a third fault message. The error correction code is used to check and correct the first fault message, and finally the third fault message is written into the memory for storage. In this way, reliability checks are performed by software during fault message transmission, and the fault message is checked and corrected, ensuring the reliability of the transmission process and storage process of the fault data, and improving the credibility of the fault information. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0024] Figure 1 It is a structural diagram of a fault storage system provided in an embodiment of the present application;

[0025] Figure 2 is a structural diagram of another fault storage system provided in an embodiment of the present application;

[0026] Figure 3 It is a flowchart of a fault storage method provided in an embodiment of the present application;

[0027] Figure 4It is a schematic diagram of the composition of a storage control module provided in an embodiment of the present application;

[0028] Figure 5 It is a schematic diagram of the composition of a second fault message provided in an embodiment of the present application;

[0029] Fig. 6A is a schematic diagram of a coding space provided in an embodiment of the present application;

[0030] Figure 6B is a schematic diagram of another coding space provided in an embodiment of the present application;

[0031] Figure 7 It is a flowchart of a centralized fault storage method provided by the present application;

[0032] Figure 8 It is a flow chart of a distributed fault storage method provided by the present application;

[0033] Fig. 9 is a schematic diagram of the composition of another storage control module provided in an embodiment of the present application;

[0034] Fig.10 It is a schematic diagram of the composition of a vehicle provided in an embodiment of the present application;

[0035] Fig.11 It is a schematic diagram of the composition of another vehicle provided in an embodiment of the present application. DETAILED DESCRIPTION

[0036] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0037] The terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes steps or units that are not listed, or optionally includes other steps or units inherent to these processes, methods, products or devices.

[0038] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0039] In the embodiments of the present application, "and / or" describes the association relationship of the associated objects, indicating that three relationships may exist. For example, A and / or B can represent the following three situations: A exists alone; A and B exist at the same time; B exists alone. Among them, A and B can be singular or plural.

[0040] In the embodiment of the present application, the symbol " / " can indicate that the objects associated with each other are in an "or" relationship. In addition, the symbol " / " can also indicate a division sign, that is, performing a division operation. For example, A / B can indicate A divided by B.

[0041] In the embodiments of the present application, "equal to" can be used in conjunction with greater than, and is applicable to the technical solution adopted when greater than, and can also be used in conjunction with less than, and is applicable to the technical solution adopted when less than. When equal to is used in conjunction with greater than, it is not used in conjunction with less than; when equal to is used in conjunction with less than, it is not used in conjunction with greater than.

[0042] The following is an introduction to the relevant terms involved in this application.

[0043] Electronic Control Unit (ECU): refers to the comprehensive control device of the engine. Its function is to calculate, process, judge and output instructions based on the stored program of the engine to control the actions of the relevant actuators, so as to achieve the purpose of fast, accurate and automatic control of the engine operation.

[0044] At present, the mainstream wire control technology in the automotive industry relies on electronic components with a certain probability of random failure. The time of this random failure cannot be estimated with certainty. It is a hardware failure that occurs according to probability, such as open circuit, short circuit, and resistance offset. These will cause duplication, loss, sorting errors, contamination, blockage, or addressing errors in the transmission and storage of fault data, making the stored fault data unreliable.

[0045] In view of the above problems, an embodiment of the present application provides a fault storage method, which is described in detail below in conjunction with the accompanying drawings.

[0046] The fault storage method provided in the embodiment of the present application is applied to a storage control module in a vehicle, and the storage control module is connected to at least one ECU. Figure 1 , Figure 1 Schematic diagram of a fault storage system provided in an embodiment of the present application. Figure 1 As shown, the fault storage system 10 includes a storage control module and 4 ECUs, and the 4 ECUs are connected to the storage control module through corresponding connection buses, that is, ECU1 is connected to the storage control module 1 through the connection bus 1, ECU2 is connected to the storage control module 1 through the connection bus 2, ECU3 is connected to the storage control module 1 through the connection bus 3, and ECU4 is connected to the storage control module 1 through the connection bus 4. The fault storage system can be called a centralized fault storage system. The interface communication protocol of the connection bus can be a serial peripheral interface (Serial Peripheral Interface, SPI), an integrated circuit bus (Inter-Integrated Circuit, IIC), a universal asynchronous receiver / transmitter (UART), a local interconnect network (Local Interconnect Network, LIN), FlexRay, a controller area network bus (Controller Area Network, CAN) or Ethernet, etc. The storage control module can store the fault information data of all connected ECUs at the same time, without interference with each other, and will not block the data transmission and reading and writing, centrally manage all fault information, can be transmitted in parallel, the speed is fast, and the structure is simple and the installation is convenient. It is understandable that the number of ECUs in the embodiments of the present application only serves to assist in understanding and does not constitute any limitation to the present application.

[0047] See also Figure 2 , Figure 2 FIG. 1 is a schematic diagram of another fault storage system provided in an embodiment of the present application. Figure 2 As shown, the fault storage system 10 includes 2 storage control modules and 4 ECUs, which are all connected to the storage bus 110 and are interconnected through the storage bus 110. The fault storage system can be called a distributed fault storage system. When a certain ECU sends fault information to the storage bus, the storage control module 2 and the storage control module 3 can simultaneously receive the fault data and complete the storage of the fault data. The interface communication protocol of the storage bus can be SPI, IIC, UART, LIN, FlexRay, CAN or Ethernet, etc. Only one ECU can read and write the storage bus at a time. For example, Figure 2After the four ECUs simultaneously send out a read request or a write request, they need to wait for the storage bus arbitration. The ECU that wins the arbitration can occupy the storage bus to transmit the fault data, and the other ECUs wait for the completion of this data transmission to participate in the next arbitration. For example, if ECU5 wins the arbitration, ECU5 can transmit the data to the storage bus and to all storage control modules, while ECU6, ECU7 and ECU8 need to wait for ECU5 to complete the data transmission and then arbitrate again to decide the next ECU to perform data transmission until all ECUs have completed the transmission. It is understandable that the number of storage control modules and ECUs is only exemplary and does not constitute any limitation to this application.

[0048] See also Figure 3 , Figure 3 FIG. 1 is a flow chart of a fault storage method provided in an embodiment of the present application. Figure 3 As shown, the method includes the following steps.

[0049] S301, obtaining a second fault message from the at least one ECU.

[0050] S302: Perform a transmission reliability check based on the second fault message to obtain a first fault message.

[0051] The transmission reliability check may be a parity check, a cyclic redundancy check (CRC) check or a checksum.

[0052] The second fault message includes fault information, and the first fault message also includes fault information. The fault information in the second fault message may be information obtained by ECU truncating a complete fault message according to a fixed length, and the fixed length may be customizable.

[0053] S303: Add an error correction code to the first fault message to obtain a third fault message, where the error correction code is used to check and correct the first fault message.

[0054] S304: Write the third fault message into the memory for storage.

[0055] The memory may be a working memory or a mirror memory, the working memory may be used to directly store the third fault message, and the mirror memory may be used to store the third fault message in its corresponding working memory. In particular, when the third fault message is added with an error correction code based on the first fault message, the error correction code may be calculated by error checking and correction (Error Correcting Code, ECC), which is an algorithm for error checking and correction, and can be used on storage devices such as random access memory (Random Access Memory, RAM) and FLASH of automobile ECU.

[0056] It can be seen that in this example, the first fault message information is obtained after the second fault message is checked for transmission reliability by software, which avoids transmission errors in the fault information, and the error correction code is added to the first fault message to obtain the third fault message, which ensures the correctness of the fault information, ensures the reliability of the fault information during the storage process, and improves the credibility of the fault information.

[0057] In a possible embodiment, the memory includes a working memory and at least one mirror memory, and writing the third fault message into the memory for storage includes: writing the third fault message into the working memory; and copying data in the working memory to the at least one mirror memory.

[0058] See also Figure 4 , Figure 4 FIG. 1 is a schematic diagram of a storage control module provided in an embodiment of the present application. Figure 4 As shown, the storage control module 20 includes a controller and multiple memories. There is a hardware direct memory access (DMA) path between the controller and each memory, which can transmit data. The multiple memories can be divided into working memories and mirror memories. The working memory can be used to store the third fault message. The working memory can correspond to one or more mirror memories. The mirror memory stores all the data of the working memory as a backup of the working memory. The number of mirror memories can be set by the storage control module. For example, memory 0 can be the working memory, and the remaining memories are mirror memories, or memory 0, memory 3 and memory 5 are working memories, memory 1 and memory 2 are mirror memories corresponding to memory 0, memory 4 is the mirror memory corresponding to memory 3, and memory 6, memory 7 and memory 8 are the mirror memories corresponding to memory 5. For example, Figure 1 In the centralized fault storage system shown in FIG. , the number of working memories is related to the number of ECUs, and each working memory corresponds to one ECU. Figure 2In the distributed fault storage system shown, the number of working memories is also related to the ECU. Since there is a situation where the storage control module fails to store data, the number of ECUs is not less than the number of working memories. When the ECU needs to store fault information, the storage control module first stores the data in the working memory corresponding to the ECU, and then copies it to the corresponding mirror memory. In particular, the storage control module can configure the time point of the copy, and can choose to configure the time to copy when the storage bus is idle, or to copy periodically.

[0059] It can be seen that in this example, the fault information is first stored in the working memory and then copied to the mirror memory, and the security and correctness of the data are guaranteed through multiple backups.

[0060] In a possible embodiment, after copying the data in the working memory to at least one mirror memory, the method further includes: determining whether the data in the working memory is successfully copied to the target mirror memory.

[0061] Specifically, determining whether the data in the working memory is successfully copied to the target mirror memory includes: obtaining a first hash value corresponding to the third fault message in the working memory, and a second hash value corresponding to the third fault message in the target mirror memory; if the first hash value is the same as the second hash value, determining that the data in the working memory is successfully copied to the target mirror memory; or if the first hash value is different from the second hash value, determining that the data in the working memory is failed to be copied to the target mirror memory.

[0062] The target mirror storage is any one of the at least one mirror storage.

[0063] The acquisition of the first hash value and the second hash value can be achieved through a hash algorithm, which is also called a hash algorithm, a hash algorithm or a digital fingerprint, and can compress a message of any length into a message of a fixed length. The hash algorithm can include a message digest algorithm (Message Digest, MD) series algorithm and a secure hash algorithm (Secure Hash Algorithm, SHA) series algorithm. After the data is calculated by the MD series algorithm, a 128-bit new data can be output; after the data is calculated by the SHA series algorithm, a 160-bit, 224-bit, 256-bit, 384-bit or 512-bit new data can be output. Therefore, the length of the first hash value and the second hash value can be 128 bits, 160 bits, 256 bits, 384 bits or 512 bits. In particular, only when the first hash value of the third fault message in the working memory is equal to the second hash value of the third fault message in the target mirror memory can the target mirror memory be deemed to have successfully copied the fault data; otherwise, it is deemed to have failed to copy the fault data. When multiple attempts to copy the fault information fail, the storage control module is reset and restarted. If the target mirror memory still cannot successfully copy the fault information after restarting, both the target mirror memory and the working memory are marked as untrustworthy, and an idle memory is designated to be bound to the ECU as a new working memory and other idle memories are designated as new target mirror memories.

[0064] In order to improve the utilization of time and speed up the processing of fault information, the calculation of the first hash value and the second hash value can be implemented when the storage bus is idle or when a cycle arrives.

[0065] It can be seen that in this example, each time the backup fault information is copied, the hash values ​​corresponding to the respective fault messages are checked for consistency, ensuring that the fault information copied by each mirror memory corresponding to the working memory is consistent, thereby improving the credibility of the fault information.

[0066] In a possible embodiment, the second fault message also includes a message count value, and the transmission reliability check based on the second fault message includes: performing a count continuity check on the message count value of the second fault message, if the message count value is continuous, the transmission of the second fault message is reliable, if the message count value is discontinuous, the transmission of the second fault message is unreliable.

[0067] The second fault message may be a message in a fixed format. For example, see Figure 5 , Figure 5 FIG. 1 is a schematic diagram of the composition of a second fault message provided in an embodiment of the present application. Figure 5As shown, the second fault message includes a message count value, a fault type identification code and fault information. The fault information can be truncated according to a fixed length, and the fixed length can be a common data length such as 32 bits, 64 bits or 128 bits.

[0068] Among them, the message count value can be used to record the number of times the second fault message is transmitted, and the transmission reliability check of the second fault message can be achieved by checking the message count value, that is, whether the message count value is a continuous cumulative value. For example, if the message count value is 12345, it is determined that the message count value is a continuous cumulative value, and the transmission of the second fault message is reliable. If the message count value is 1235, it is determined that the message count value is not a continuous cumulative value, and the transmission of the second fault message is unreliable; or, if the message count value is 12 when the fault information is at the sending end, and the message count value is 13 when the fault information is at the receiving end, it can be determined that the message count value is a continuous cumulative value, and the transmission of the second fault message is reliable. Otherwise, it is determined that the message count value is not a continuous cumulative value, and the transmission of the second fault message is unreliable.

[0069] It can be seen that in this example, before storing the fault information each time, checking whether the message count value is a continuous cumulative value avoids problems such as duplication, loss or sorting errors of the fault information, ensures the reliability of the transmission process of the fault data, and improves the credibility of the fault information.

[0070] In a possible embodiment, the second fault message also includes a cyclic redundancy check (CRC) field, and the transmission reliability check based on the second fault message includes: performing a correctness check on the CRC field of the second fault message, if the CRC field is correct, the transmission of the second fault message is reliable, if the CRC field is incorrect, the transmission of the second fault message is unreliable.

[0071] Among them, CRC is a data transmission error detection function that performs polynomial calculations on the data and attaches the results to the end of the frame. The receiving device also executes a similar algorithm to ensure the correctness and integrity of data transmission. Figure 5It can be seen that the second fault message includes a CRC field and fault information. The reliability check of the second fault message can be implemented through the CRC field. For example, the fault information is 10110011 and the polynomial is 11001. Since the polynomial is 5 bits, 5-1=4 bits of "0" need to be added after the fault information. The fault information is changed to 101100110000. The changed fault information is divided by the polynomial in a "modulo 2 division" manner. The remainder obtained is the CRC field of the fault information, that is, 11010100 is the CRC field. In particular, the polynomial is selected by the user according to his own preferences, and the polynomial can be 0011, 11001 or 11011. It should be noted that to verify the reliability of the second fault message, it can be determined whether the CRC field of the second fault message is the same as the CRC field of the first fault message. If they are the same, it means that there is no error in the transmission of the fault information. If they are not the same, it means that there is an error in the transmission of the fault information, and the first fault message obtained is not credible.

[0072] Among them, the transmission reliability check of the second fault message can also be implemented by another way of CRC check. For example, the fault information is 1010, the polynomial is 1011, the fault information is changed to 1010000, and the changed fault information is divided by modulo 2 using the polynomial, and the CRC field is 011. To verify the reliability of the second fault message, the fault information in the first fault message can be divided by the CRC field, that is, 1010000 divided by 011, and the remainder is verified to be 0. If the remainder is 0, it means that there is no error in the fault information during transmission. If the remainder is not 0, it means that there is an error in the fault information during transmission, and the first fault message obtained is not credible.

[0073] It can be seen that in this example, by adding a CRC checksum to the fault information and checking whether the CRC field of the first fault message is equal to the CRC field of the second fault message before each storage, transmission errors of the fault information are avoided, the reliability of the transmission process of the fault data is guaranteed, and the credibility of the fault information is improved.

[0074] In one possible embodiment, the error correction code is an error checking and correction ECC code.

[0075] Among them, ECC is an algorithm that can be used for 1-bit detection and correction or 2-bit detection. Its characteristic is that it uses fewer check codes to achieve multi-bit data verification. Before storing the fault information in the working memory, the fault information needs to be ECC encoded. For example, if the fault information is 10101, the calculation of the ECC encoding needs to be obtained based on the position of the check code. First, create a coding space and fill the fault information into the corresponding position in the coding space. The size of the coding space is related to the number of bits of the ECC encoding. Since 2 4 -1≥5+4, ​​23 -1≤5+3, so 4 bits of ECC encoding are required. Fig. 6A , Fig. 6A Schematic diagram of a coding space provided in an embodiment of the present application. Fig. 6A As shown, the coding space is 9 bits, and the 4 bits of ECC coding correspond to the second position in the coding space. 0 , 2 1 , 2 2 and 2 3 The bits, i.e., position 1, position 2, position 4 and position 8, position 3, position 5, position 6, position 7 and position 9 are filled with fault information in order, i.e., 1, 0, 1, 0 and 1 respectively. The calculation of the ECC code is determined by its position. All adjacent bits can be calculated and the bit position where it is located can be skipped, and then repeated until the last bit, i.e., the first bit of the ECC code can be XORed with the 3rd, 5th, 7th and 9th bits to be 0, the second bit of the ECC code can be XORed with the 3rd, 6th and 7th bits to be 0, the third bit of the ECC code can be XORed with the 4th, 5th, 6th and 7th bits to be 0, and the fourth bit of the ECC code can be XORed with the 8th and 9th bits. For example, please refer to Figure 6B , Figure 6B is a schematic diagram of another coding space provided in an embodiment of the present application, such as Figure 6B As shown, position 1 is the first bit of the ECC code, which satisfies the XOR of position 3, position 5, position 7 and position 9 to be 0, that is, the XOR of 1, 0, 0, 1 and 0 is 0, and position 1 is 0 at this time. Similarly, position 2 is the second bit of the ECC code, which satisfies the XOR of position 3, position 6 and position 7 to be 0, that is, the XOR of 1, 1 and 0 is 0, and position 2 is 0 at this time. Position 4 is the third bit of the ECC code, which satisfies the XOR of position 5, position 6 and position 7 to be 0, that is, the XOR of 0, 1 and 0 is 0, and position 4 is 1 at this time. Position 8 is the fourth bit of the ECC code, which satisfies the XOR of position 9 to be 0, that is, the XOR of 1 is 0, and position 8 is 1 at this time. As shown in FIG. Figure 6B As shown, the ECC code can be 0011 and the fault information can be 10101.

[0076] Among them, the error correction function of ECC will be specifically explained by taking an example. For example, the fault information is 00011, the ECC code is 0011, the fault information and the ECC code form a new code, that is, 001100011. According to the above rules, the bits corresponding to the 1st, 3rd, 5th, 7th, and 9th positions are XORed, that is, 0, 1, 1, 0 and 1 are XORed, and 0 is obtained. The bits corresponding to the 2nd, 3rd, 6th, and 7th positions are XORed, that is, 0, 1, 0 and 0 are XORed, and 0 is obtained. to 1, XOR the bits corresponding to the 4th, 5th, 6th, and 7th bits, that is, XOR 1, 0, 0, and 0 to obtain 1, XOR the bits corresponding to the 8th and 9th bits, that is, XOR 1 and 1 to obtain 0, and reverse the above results to obtain 0110, that is, 6 in decimal, indicating that the coding error is in the 6th bit. The 0 in the 6th bit can be replaced with 1, that is, the correct coding bit 001101011, that is, the correct fault information bit 01011. In particular, since ECC can only correct 1 bit, it cannot correct multi-digit numbers by detection alone. Therefore, if multiple ECC verification errors occur during the process of copying the fault information from the working memory to the mirror memory, it means that the reliability of the working memory is very low, and the working memory is marked as untrustworthy. The storage control module can also specify an idle memory to bind to the ECU as a new working memory and other idle memories as mirror memories.

[0077] It can be seen that in this example, before the fault information is stored in the memory, ECC coding is added to the fault information, which can not only verify the fault information, but also perform certain error correction, thereby enhancing the reliability of the data storage process.

[0078] In summary, since the fault storage system can include Figure 1 The centralized fault storage system shown and Figure 2 The distributed fault storage system shown in . The complete fault storage method is slightly different and is as follows. Figure 7 , Figure 7 This is a flow chart of a centralized fault storage method provided by the present application, which is applied to Figure 1 The centralized fault storage system shown in FIG. Figure 7As shown, the method includes the following steps: S401, when a fault occurs in the ECU, the fault message is truncated into separate fault information and a fixed format is added to form a fault message and sent to the fault storage module; S402, the fault storage module receives the fault message, and after verification, the fault storage module stores the fault information in the working memory; S403, when the storage is completed, the fault storage module sends a storage completion message to the ECU; S404, when the bus is idle or the cycle arrives, the fault storage module performs a HASH calculation on each working memory, and copies the current stored data and the generated HASH value to the corresponding mirror memory. It can be seen that when the ECU sends data, it can be sent to the storage fault module through a separate connection bus, and a storage fault module can centrally manage the storage requirements of all connected ECUs.

[0079] See also Figure 8 , Figure 8 is a flow chart of a distributed fault storage method provided by an embodiment of the present application, and the method is applied to Figure 2 The distributed fault storage system shown in Figure 1 is Figure 8 As shown, the method includes the following steps: S411, when an ECU fails, the fault message is cut into separate fault information and a fixed format is added to form a fault message and sent to the storage bus; S412, all fault storage modules on the storage bus receive the fault message sent by the ECU at the same time, and after verification, each fault storage module stores the fault information in the working memory; S413, after the storage is completed, the fault storage module generates a HASH value for the data stored in the working memory using the HASH algorithm and stores it in the mirror memory; S414, the fault storage module sends a storage completion message to the ECU. It can be seen that when an ECU transmits data to the storage bus, all fault storage modules receive and store the data at the same time, and all fault storage modules on the storage bus are redundant backups for each other.

[0080] In a possible embodiment, the method further includes: receiving a read instruction; performing an error correction code check on the third fault message in the working memory based on the read instruction, and sending the third fault message in the working memory after the error correction code check succeeds.

[0081] The read instruction may be sent by the ECU, and the storage control module may determine the working memory corresponding to the ECU according to the read instruction. As can be seen from the above, the error correction code may be an ECC code, so the error correction code check may be an ECC code check, and the check process is as described above and will not be repeated here.

[0082] Before sending the third fault message, the storage control module performs CRC check on the fault information of the third fault message in the corresponding memory. Only if the CRC check is correct and the error correction code check is error-free, can the fault information be read from the storage and sent to the ECU.

[0083] In particular, for Figure 2 In the distributed fault storage system shown, when the ECU needs to read fault information, it sends a read instruction to the storage bus, and the storage control module on the storage bus responds to the read request according to the storage control module with the highest priority. The storage control module can perform CRC check and error correction code check on the fault information of the fault message in the memory. Only when the CRC check is correct and the error correction code check is error-free, can the fault information be sent to the ECU.

[0084] It can be seen that in this example, through the ECC algorithm, ECC coding is added to the fault information each time the memory stores fault information, so that the storage control module automatically checks the ECC coding when reading the fault information, thereby ensuring the reliability of reading the fault information. The reliability of the fault information transmission process is also ensured through CRC verification, thereby improving the credibility of the fault information.

[0085] In a possible embodiment, the method further includes: if the error correction code check fails, performing an error correction code check on the third fault message in at least one mirror memory, and sending the third fault message in at least one mirror memory after the error correction code check succeeds.

[0086] Among them, before sending the third fault message, the storage control module first sends the fault information from the corresponding working memory, and can perform CRC check on the fault information of the third fault message in the working memory. If the CRC check is correct and there is no error in the error correction code check, the fault information can be read from the working memory and sent to the ECU. If the CRC check is wrong and / or the error correction code check is wrong, a second CRC check and error correction code check can be performed on the mirror memory corresponding to the working memory. If the second CRC check is correct and there is no error in the error correction code check, the fault information can be read from the mirror memory and sent to the ECU. If the second CRC check is wrong and / or the error correction code check is wrong, the next mirror memory can be subjected to another CRC check error and / or error correction code check until the CEC check is correct and there is no error in the error correction code or all mirror memories corresponding to the working memory have been checked.

[0087] In particular, for Figure 2In the distributed fault storage system shown, when the ECU needs to read the fault information, it sends a read instruction to the storage bus, and the storage control modules on the storage bus respond to the read request according to the storage control module with the highest priority. The storage control module can perform CRC check and error correction code check on the fault information of the fault message in the memory. If the CRC check is correct and the error correction code check is error-free, the fault information can be sent to the ECU. If the CRC check is wrong and / or the error correction code check is wrong, the storage control module can reduce its own priority to the lowest and send a read instruction of the forwarding ECU to the storage bus, so that other storage control modules can respond to the read instruction of the ECU according to the priority, and repeat the CRC check and error correction code check until a certain storage control module passes the CRC check correctly and the error correction code is error-free or all storage control modules have CRC check errors and / or error correction code errors.

[0088] It can be seen that in this example, through CRC check and error correction code check, and according to the hardware redundant structure of the fault storage system, the fault information of the third fault message in the working memory and the mirror memory is checked in turn, thereby ensuring the reliability of the fault information reading and transmission process and improving the credibility of the fault information.

[0089] In one possible embodiment, the storage control module is the first storage control module among multiple storage control modules located in different parts of the vehicle, and the multiple storage control modules also include a second storage control module. The third fault message stored in the memory of the second storage control module is the same as the third fault message stored in the memory of the first storage control module.

[0090] The different parts of the vehicle may include various parts of the vehicle body such as the dashboard, windshield, door, shock absorber or roof, such as Figure 2 In the distributed fault storage system shown in FIG. 1 , each storage control module is distributed at various positions of the vehicle body through the layout of the storage bus in the vehicle body. The first storage control module may be Figure 2 The storage control module 2 shown in FIG. 1 , the second storage control module may be Figure 2 The storage control module 3 shown in FIG. 1 , or the first storage control module may be Figure 2 The storage control module 3 shown in FIG. 1 , the second storage control module may be Figure 2 The storage control module 2 shown in .

[0091] It can be seen that in the embodiment of the present application, the storage control module can be distributed in various positions of the vehicle body by means of hardware redundancy, and only needs to be connected through the storage bus, so that when one area of ​​the vehicle body is damaged, the redundant backup placed in another area of ​​the vehicle body will not be affected, and the intact data can still be read, which improves the credibility of the data.

[0092] Among them, all relevant contents of each scenario involved in the above method embodiment can be referred to the functional description of the corresponding functional module, and will not be repeated here. Figure 3 The fault storage method shown.

[0093] The above mainly introduces the scheme of the embodiment of the present application from the perspective of the execution process on the method side. It is understandable that, in order to realize the above functions, the electronic device includes a hardware structure and a software module corresponding to the execution of each function. It should be easily appreciated by those skilled in the art that, in combination with the units and algorithm steps of each example described in the embodiments provided herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present application.

[0094] The embodiment of the present application can divide the electronic device into functional units according to the above method example. For example, each functional unit can be divided according to each function, or two or more functions can be integrated into one processing unit. The above integrated unit can be implemented in the form of hardware or in the form of software functional units. It should be noted that the division of units in the embodiment of the present application is schematic and is only a logical function division. There may be other division methods in actual implementation.

[0095] An embodiment of the present application also provides a storage control module, which includes a processor, a memory, and one or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by the processor, and the one or more programs include instructions for executing the steps in the method described above.

[0096] Among them, see Fig. 9 , Fig. 9 2 is a schematic diagram of another storage control module provided in an embodiment of the present application. The storage control module 20 may be an electronic device with computing capabilities, which may include various other processing devices, as well as various forms of personal computers (PCs), servers, or network devices, etc. Fig. 9As shown, the storage control module 20 may include a processor 201, a memory 202, a communication interface 203, and one or more programs 204. The one or more programs 204 are stored in the memory 202 and are configured to be executed by the processor 201. The one or more programs 204 include functions for executing any step in the following schemes, and when performing data transmission such as sending, the communication interface 203 may be selectively called to complete the corresponding operation.

[0097] The present application also provides a vehicle, wherein, Fig.10 , Fig.10 Schematic diagram of a vehicle provided in an embodiment of the present application. Fig.10 As shown, the vehicle 80 includes a fault storage system 10, which includes an ECU 101 and a storage control module 20. The ECU and the storage control module are connected, and the fault storage system can be used to execute the fault storage method in the above embodiment.

[0098] Among them, see Fig.11 , Fig.11 FIG. 1 is a schematic diagram of another vehicle provided in an embodiment of the present application. Fig.11 As shown, the vehicle 80 includes: a processing module 812 and a communication module 811. The processing module 812 is used to control and manage the actions of the vehicle, and / or to perform other processes of the technology described herein. The communication module 811 is used for interaction between the vehicle and other devices. Fig.11 As shown, the vehicle 80 may further include a storage module 813, and the storage module 813 is used to store program codes and data of the vehicle.

[0099] Among them, the processing module 812 can be a processor or a controller, for example, a central processing unit (CPU), a general processor, a digital signal processor (DSP), an ASIC, an FPGA or other programmable logic device, a transistor logic device, a hardware component or any combination thereof. It can implement or execute various exemplary logic blocks, modules and circuits described in conjunction with the disclosure of this application. The processor can also be a combination that implements a computing function, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and the like. The communication module 811 can be a transceiver, an RF circuit or a communication interface, and the like. The storage module 813 can be a memory.

[0100] An embodiment of the present application also provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer program instructions, and the computer program instructions enable a computer to execute part or all of the steps of any method recorded in the above method embodiments, and the above computer includes an electronic device.

[0101] It should be noted that, for the aforementioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that the present application is not limited by the described order of actions, because according to the present application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present application.

[0102] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0103] In the several embodiments provided in the present application, it should be understood that the disclosed device can be implemented in other ways. For example, the device embodiments described above are only schematic, such as the division of the above-mentioned units, which is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, and the indirect coupling or communication connection of devices or units can be electrical or other forms.

[0104] The units described above as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0105] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0106] If the above-mentioned integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable memory. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a memory, including a number of instructions to enable a computer device (which can be a personal computer, server or network device, etc.) to perform all or part of the steps of the above-mentioned methods of each embodiment of the present application. The aforementioned memory includes: U disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, disk or CD-ROM and other media that can store program codes.

[0107] A person skilled in the art can understand that all or part of the steps in the various methods of the above embodiments can be completed by instructing related hardware through a program, and the program can be stored in a computer-readable memory, and the memory can include: a flash drive, a read-only memory (English: Read-Only Memory, abbreviated as: ROM), a random access memory (English: Random Access Memory, abbreviated as: RAM), a magnetic disk or an optical disk, etc.

[0108] The embodiments of the present application are introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core idea of ​​the present application. At the same time, for general technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

[0109] Although the present application is disclosed as above, the present application is not limited thereto. Any person skilled in the art can easily think of changes or substitutions without departing from the spirit and scope of the present application, and can make various changes and modifications, including the combination of the above-mentioned different functions and implementation steps, including software and hardware implementation methods, all of which are within the scope of protection of the present application.

Claims

1. A fault storage method, applied to a storage control module in a vehicle, wherein the storage control module includes a memory, and the storage control module is connected to at least one electronic control unit ECU, characterized in that: The method comprises: Obtaining a second fault message from the at least one ECU; Performing a transmission reliability check based on the second fault message to obtain a first fault message; Adding an error correction code to the first fault message to obtain a third fault message, wherein the error correction code is used to check and correct the first fault message; The third fault message is written into the memory for storage.

2. The method according to claim 1, characterized in that The memory includes a working memory and at least one mirror memory, and the step of writing the third fault message into the memory for storage includes: Writing the third fault message into the working memory; The data in the working memory is copied to the at least one mirror memory.

3. The method according to claim 2, characterized in that After copying the data in the working memory to the at least one mirror memory, the method further comprises: It is determined whether the data in the working memory is successfully copied to the target mirror memory, where the target mirror memory is any one of the at least one mirror memory.

4. The method according to claim 3, characterized in that The determining whether the data in the working memory is successfully copied to the target mirror memory includes: Obtaining a first hash value corresponding to the third fault message in the working memory and a second hash value corresponding to the third fault message in the target mirror memory; If the first hash value is the same as the second hash value, it is determined that the data in the working memory is successfully copied to the target mirror memory; or If the first hash value is different from the second hash value, it is determined that the copying of the data in the working memory to the target mirror memory fails.

5. The method according to claim 1, characterized in that: The second fault message also includes a message count value, and the message count value is used to record the number of times the second fault message is transmitted. The transmission reliability check based on the second fault message includes: performing a counting continuity check on the message count value of the second fault message. If the message count value is continuous, the transmission of the second fault message is reliable; if the message count value is discontinuous, the transmission of the second fault message is unreliable.

6. The method according to claim 5, characterized in that The second fault message also includes a cyclic redundancy check code CRC field, and the transmission reliability check based on the second fault message also includes: performing a correctness check on the CRC field of the second fault message. If the CRC field is correct, the transmission of the second fault message is reliable; if the CRC field is incorrect, the transmission of the second fault message is unreliable.

7. The method according to claim 1, characterized in that The error correction code is an error checking and correction ECC code.

8. The method according to claim 2, characterized in that: The method further includes: receiving a read instruction; performing an error correction code check on the third fault message in the working memory based on the read instruction, and sending the third fault message in the working memory after the error correction code check succeeds.

9. The method according to claim 8, characterized in that The method further includes: if the error correction code check fails, performing an error correction code check on the third fault message in the at least one mirror memory, and sending the third fault message in the at least one mirror memory after the error correction code check succeeds.

10. The method according to claim 1, characterized in that The storage control module is the first storage control module among multiple storage control modules located in different parts of the vehicle. The multiple storage control modules also include a second storage control module. The third fault message stored in the memory of the second storage control module is the same as the third fault message stored in the memory of the first storage control module.

11. A storage control module, characterized in that: The method comprises a processor, a memory, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the processor, and the one or more programs include instructions for executing the steps in the method according to any one of claims 1 to 10.

12. A fault storage system, characterized in that: The device comprises an ECU and the storage control module as claimed in claim 11.

13. A vehicle, characterized in that: Comprising the fault storage system as claimed in claim 12.

14. A computer-readable storage medium, characterized in that: A computer program is stored thereon, and the computer program is executed by a processor to implement the steps of the method according to any one of claims 1 to 10.

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