Memory allocation method, device, electronic device and storage medium

Abstract

The present application example provides a memory allocation method, device, electronic device and storage medium, the electronic device can obtain at least one cache efficiency variable in each storage area at a first time interval, and determine the cache balance value of each storage area used to characterize the memory occupancy in the storage area based on the at least one cache efficiency variable, and finally allocate part or all of the memory occupied by the first storage area whose cache balance value is higher than the preset threshold to the second storage area whose cache balance value is lower than the preset threshold. Through the above method, the storage area with less memory pressure for processing events can allocate free memory to the storage area with increased memory pressure for processing events. As the memory capacity is expanded, the storage area with increased memory pressure for processing events can use the cache to process the backlog of events faster, which increases the parallel ability of different storage areas to process events and reduces the load on the terminal device.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a memory allocation method, device, electronic device and storage medium. Background Art

[0002] With the rapid development of computer technology, the number of events that terminal devices need to process is increasing. Therefore, the memory of the terminal device can be divided into multiple storage areas, and each storage area can process different events to increase the parallel capability of event processing.

[0003] However, if the memory pressure of one storage area for processing events increases, other storage areas with less pressure cannot allocate free storage space to the storage area with increased pressure, which reduces the parallel ability of processing events and increases the load on the terminal device. Summary of the invention

[0004] In order to solve the above-mentioned problems in the prior art, the example of the present application provides a memory allocation method, device, electronic device and storage medium, which can increase the parallel capability of processing events and reduce the load of terminal devices.

[0005] In a first aspect, an embodiment of the present application provides a memory allocation method, comprising:

[0006] At least one cache efficiency variable in each storage area is obtained at each first time interval; each cache efficiency variable is used to characterize the usage efficiency of the storage area in the first time interval in a corresponding dimension, and different cache efficiency variables correspond to different dimensions;

[0007] Determine a cache balance value of each storage area based on the at least one cache efficiency variable; the cache balance value is used to characterize the memory occupancy in the storage area;

[0008] Allocate part or all of the memory occupied by the first storage area whose cache balance value is higher than the preset threshold to the second storage area whose cache balance value is lower than the preset threshold.

[0009] Through the above method, the memory occupancy in each storage area can be determined based on the cache balance value of each storage area, and the storage area with increased memory pressure for processing events and the storage area with lower memory pressure for processing events can be determined through the memory occupancy. Among them, the storage area with lower memory pressure for processing events can allocate free memory to the storage area with increased memory pressure for processing events. As the memory capacity expands, the storage area with increased memory pressure for processing events can use the cache to process backlog events faster, thereby increasing the parallel ability of different storage areas to process events, reducing the load on terminal devices, and avoiding the occurrence of various unnecessary problems.

[0010] In a possible implementation manner, determining the cache balance value of each storage area based on the cache efficiency variable includes:

[0011] For any storage area in the storage areas, the following steps are performed:

[0012] The cache balance value of any storage area is determined based on at least one cache efficiency variable in any storage area and a weight corresponding to each cache efficiency variable; the weight is used to characterize the degree of influence of the corresponding cache efficiency variable on the cache balance value.

[0013] Through the above method, different cache efficiency variables can be weighted according to the degree of influence of different cache efficiency variables on the cache balance value. After weighting, the cache efficiency variable with a greater influence on the cache balance value can be used to increase the accuracy of determining the cache balance value.

[0014] In a possible implementation manner, allocating part or all of the memory occupied by the first storage area whose cache balance value is higher than the preset threshold to the second storage area whose cache balance value is lower than the preset threshold includes:

[0015] For any storage area in the first storage area, perform the following steps:

[0016] If the cache balance value of any of the storage areas is the same as the preset upper limit value, allocating all memory occupied by any of the storage areas to the second storage area;

[0017] If the cache balance value of any storage area is different from the preset upper limit value, a portion of the memory occupied by any storage area is allocated to the second storage area.

[0018] Through the above method, different sizes of memory in the storage area can be allocated to the second storage area according to different cache balancing values, and all the memory of the unused storage area can be split to the second storage area, which increases the flexibility of memory allocation inside the terminal device.

[0019] In a possible implementation manner, allocating all memory occupied by any one storage area to the second storage area includes:

[0020] If the total memory occupied by any one of the storage areas is greater than the sum of the memory required by the second storage areas, the total memory is allocated to each of the second storage areas according to the memory size required by each of the second storage areas; the memory size required by each of the second storage areas is determined based on the cache balancing value of each of the second storage areas and the preset threshold;

[0021] If the total memory occupied by any one of the storage areas is equal to the sum of the memory required by the second storage areas, the total memory is allocated according to the memory size required by each of the second storage areas;

[0022] If the total memory occupied by any one of the storage areas is smaller than the sum of the memory required by each of the second storage areas, the total memory is allocated to each of the second storage areas according to the ratio of the memory required by each of the second storage areas.

[0023] Through the above method, the terminal device can determine the way to allocate all the memory that can be allocated in the first storage area to each second storage area based on the size of the total memory that can be allocated in the first storage area and the size of the memory required by each second storage area. By using different memory allocation methods, the flexibility and scalability of the terminal device can be enhanced, and the memory utilization can be improved.

[0024] In a possible implementation manner, allocating the entire memory to each of the second storage areas according to the memory size required by each of the second storage areas includes:

[0025] Determine the actual allocated memory size in each of the second storage areas based on the memory size required in each of the second storage areas, the total memory occupied by any of the storage areas, and the cache balance value of each storage area;

[0026] Allocating the memory size actually allocated to each storage area in sequence according to the size order of the cache balancing value; or

[0027] Dividing the entire memory into a first memory portion and a second memory portion, wherein the first memory portion is the sum of the memory required by each of the second storage areas, and the second memory portion is the memory in the entire memory except the first memory portion;

[0028] The first portion of memory is allocated according to the memory size actually allocated to each storage area, and the second portion of memory is evenly allocated to each of the second storage areas.

[0029] Through the above method, two different methods can be used to simultaneously allocate all the memory to each second storage area. If one of the methods is used to allocate all the memory, the other method can be used to verify the allocation result. Reallocation can be performed when the verification result is inconsistent, and allocation can be completed when the verification result is consistent. This increases the fault tolerance of terminal device memory allocation and avoids errors in the allocation process.

[0030] In a possible implementation manner, allocating part of the memory occupied by any one storage area to the second storage area includes:

[0031] If the number of storage areas included in the second storage area is one, the to-be-allocated memory of any storage area is allocated to the second storage area according to the memory size required by the second storage area; the memory size required by the second storage area is determined based on the cache balancing value of each second storage area and the preset threshold; the size of the to-be-allocated memory of any storage area is determined based on the cache balancing value of any storage area and the preset threshold;

[0032] If the second storage area includes a plurality of storage areas, the memory to be allocated is allocated to each of the second storage areas according to a ratio of memory required by each of the second storage areas.

[0033] Through the above method, different allocation methods can be distinguished according to the number of second storage areas that require memory. For one or more second storage areas, memory can be allocated in different ways, which can enhance the flexibility and scalability of the terminal device and improve memory utilization.

[0034] In a possible implementation manner, allocating the to-be-allocated memory of any storage area to the second storage area according to the memory size required by the second storage area includes:

[0035] If the memory to be allocated is less than or equal to the memory size required by the second storage area, allocating the memory to be allocated to the second storage area;

[0036] If the size of the memory to be allocated is larger than the memory size required by the second storage area, the memory to be allocated is allocated to the second storage area so that the cache balance value of any storage area is the same as that of the second storage area;

[0037] Allocating the memory to be allocated to each of the second storage areas according to a ratio of the memory required by each of the second storage areas includes:

[0038] If the size of the memory to be allocated is greater than the sum of the memory required by each of the second storage areas, allocating the memory to be allocated to each of the second storage areas according to the size of the memory required by each of the second storage areas;

[0039] If the size of the memory to be allocated is equal to the sum of the memory required by each of the second storage areas, the memory to be allocated is allocated according to the required memory size of each of the second storage areas;

[0040] If the size of the memory to be allocated is smaller than the sum of the memory required by each of the second storage areas, the memory to be allocated is allocated to each of the second storage areas in proportion to the required memory size of each of the second storage areas.

[0041] Through the above method, different memory allocation methods can be implemented for one or more second storage areas, which can also improve the memory utilization of the terminal device, avoid the generation of memory fragments in the first storage area, and allow one or more second storage areas to obtain the required memory to reduce the pressure of processing events.

[0042] In a second aspect, an embodiment of the present application provides a memory allocation device, including:

[0043] a cache balance value determination unit, configured to obtain at least one cache efficiency variable in each storage area at every first time interval; each cache efficiency variable is used to characterize the usage efficiency of the storage area in the first time interval in a corresponding dimension, and different cache efficiency variables correspond to different dimensions;

[0044] Determine a cache balance value of each storage area based on the at least one cache efficiency variable; the cache balance value is used to characterize the memory occupancy in the storage area;

[0045] The memory allocation unit is used to allocate part or all of the memory occupied by the first storage area whose cache balance value is higher than the preset threshold to the second storage area whose cache balance value is lower than the preset threshold.

[0046] In a third aspect, an embodiment of the present application provides an electronic device, including:

[0047] A memory for storing program instructions;

[0048] The processor is used to call the program instructions stored in the memory and execute the steps included in the method described in the first aspect according to the obtained program instructions.

[0049] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method described in the first aspect is implemented.

[0050] The present application example provides a memory allocation method, device, electronic device and storage medium, the electronic device can obtain at least one cache efficiency variable for characterizing the usage efficiency of the storage area in the first time interval in each storage area at each first time interval, and determine the cache balance value of each storage area for characterizing the memory occupancy in the storage area based on at least one cache efficiency variable, and finally allocate part or all of the memory occupied by the first storage area whose cache balance value is higher than a preset threshold to the second storage area whose cache balance value is lower than the preset threshold. Through the above method, the storage area with less memory pressure for processing events can allocate free memory to the storage area with increased memory pressure for processing events. As the memory capacity is expanded, the storage area with increased memory pressure for processing events can use the cache to process the backlog of events faster, which increases the parallel ability of different storage areas to process events and reduces the load on the terminal device. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0052] Figure 1 A schematic diagram of an application scenario of a memory allocation method provided in an embodiment of the present application;

[0053] Figure 2 A flowchart of a memory allocation method provided in an embodiment of the present application;

[0054] Figure 3 A specific interactive schematic diagram of a memory allocation method provided in an embodiment of the present application;

[0055] Figure 4 A structural block diagram of a memory allocation device provided in an embodiment of the present application;

[0056] Figure 5 A structural block diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0057] In order to make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Among them, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0058] In the description of the embodiments of the present application, unless otherwise specified, "and" means or. For example, A / B can mean A or B. The "and / or" in the text is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone.

[0059] Specifically, in the description of the present application, it needs to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application, and, unless otherwise specified, the "connection" and "connection" mentioned in the present application include direct and indirect connections (connections).

[0060] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0061] The present application is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0062] In one possible embodiment, Figure 1 A schematic diagram of an application scenario of a memory allocation method provided in an embodiment of the present application is shown. Figure 1 As shown, Figure 1 The present invention includes a terminal device 100, which may be a mobile phone, a tablet computer, a portable wearable device, etc., wherein the portable wearable device may be a smart watch, a smart bracelet, a head-mounted device, etc. In the memory of the terminal device 100, the terminal device 100 may be divided into any number of storage areas, which may be two, three or more, and this application does not limit this. Figure 1There are four storage areas, namely storage area 110, storage area 120, storage area 130, and storage area 140. The initial memory of these four storage areas is determined by the terminal device 100 when dividing the storage areas. In the related art, the initial memory of the storage area remains unchanged. If the memory pressure of one of the storage areas for processing events increases, other storage areas with less pressure cannot allocate free storage space to the storage area with increased pressure, and the parallel ability of processing events is reduced. At the same time, the load of the terminal device will also increase. Therefore, the present application provides a memory allocation method to solve the problems in the related art.

[0063] Figure 1 The application scenario is only an example of an application scenario for implementing the embodiment of the present application. The embodiment of the present application is not limited to the above Figure 1 The application scenarios described. The fault testing method provided by the exemplary embodiment of the present application is described below with reference to the accompanying drawings in combination with the application scenarios described above. It should be noted that the application scenarios described above are only shown to facilitate understanding of the spirit and principles of the present application, and the implementation of the present application is not limited in this respect.

[0064] Figure 2 A schematic diagram of a memory allocation method provided in an embodiment of the present application is shown. Figure 2 As shown, the method may include the following steps:

[0065] Step S201: acquiring at least one cache efficiency variable in each storage area at every first time interval.

[0066] In a possible embodiment, before executing step S201, the storage area can be divided into any number of storage areas, which can be two, three or more. An initial memory can also be set for each storage area. The size of the initial memory can be any value, which can be 10MB, 20MB or other values. The present application does not limit this. It should be noted that the sum of the memory sizes of each storage area cannot exceed the total memory of the terminal device. In the following description, the memory is divided into four storage areas.

[0067] In a possible embodiment, at least one cache efficiency variable in each storage area can be obtained at every first time interval, wherein the cache efficiency variable includes at least one of the following parameters: cache hit rate, cache replacement rate, cache request frequency, cache fill rate, cache life, and cache load time, wherein the cache hit rate is the proportion of data obtained from the cache of the storage area to the total data obtained; the cache replacement rate is the frequency at which data stored in the cache of the storage area is replaced; the cache request frequency is the number of accesses to the cache of the storage area within a set time; the cache fill rate is the utilization rate of the data stored in the cache of the storage area; the cache life is the length of time that data is stored in the cache of the storage area; and the cache load time is the time required to store data in the cache of the storage area. It should be noted that each cache efficiency variable is used to characterize the usage efficiency of the storage area in the first time interval in a corresponding dimension, and different cache efficiency variables correspond to different dimensions.

[0068] Step S202: determining a cache balance value of each storage area based on at least one cache efficiency variable.

[0069] In a possible embodiment, the following steps can be performed for any storage area in each storage area in the following manner, so that the cache balance value of each storage area can be determined based on at least one cache efficiency variable: the cache balance value of any storage area is determined based on at least one cache efficiency variable in any storage area and the weight corresponding to each cache efficiency variable, wherein the weight corresponding to each cache efficiency variable can be used to characterize the degree of influence of the corresponding cache efficiency variable on the cache balance value. For example, A can be used to represent the cache hit rate, and a can be used to represent the weight corresponding to the cache hit rate; B can be used to represent the cache replacement rate, and b can be used to represent the weight corresponding to the cache replacement rate; C can be used to represent the cache request frequency, and c can be used to represent the weight corresponding to the cache request frequency; D can be used to represent the cache fill rate, and d can be used to represent the weight corresponding to the cache fill rate; E can be used to represent the cache life, and e can be used to represent the weight corresponding to the cache life; F can be used to represent the cache load time, and f can be used to represent the weight corresponding to the cache load time, wherein, if the cache fill rate is compared to the cache The loading time has a greater impact on the cache balance value, so d is greater than f. If θ represents the cache balance value, the equation is: θ = a*A+b*B+c*C+d*D+e*E+f*F. If A is 80%, a is 0.7, B is 30%, b is 0.3, C is 100IOPS, c is 0.001, D is 90%, d is 0.2, E is 10 seconds, e is 0.03, F is 12 milliseconds, and f is 0.08, then θ = a*A+b*B+c*C+d*D+e*E+f*F = 1.326. If six values ​​are not obtained, the corresponding cache balance value can be determined according to the number of values ​​obtained. For example, if three values ​​are obtained, namely cache request frequency, cache fill rate and cache life, then θ=c*C+d*D+e*E. More cache efficiency variables or fewer cache efficiency variables can be obtained, and the cache balance value can have different value formulas according to the number of cache efficiency variables.

[0070] It should be noted that the cache balance value is not static. The storage area will change due to the memory usage, which means that the cache pressure will change. Therefore, the cache efficiency variable can be obtained at every first time interval to obtain a dynamic cache balance value. The first time interval can be set in advance by the user and can be 0.1ms, 0.2ms, or any other value that can be obtained. This application does not limit this.

[0071] Step S203: Allocate part or all of the memory occupied by the first storage area whose cache balance value is higher than the preset threshold to the second storage area whose cache balance value is lower than the preset threshold.

[0072] In a possible embodiment, a preset threshold value can be set for the cache balance value. When the cache balance value of a storage area is less than the preset threshold value, it can be determined that the storage area currently has cache pressure and needs more memory; when the cache balance value of a storage area is equal to the preset threshold value, it can be determined that the current memory usage of the storage area is moderate, and it neither needs the memory allocated by other storage areas nor can it allocate memory to other storage areas; when the cache balance value of a storage area is greater than the preset threshold value, it can be determined that the current memory usage of the storage area has no pressure, and memory can be allocated to other storage areas.

[0073] In a possible embodiment, after determining the cache balance value of each storage area, the storage areas can be classified according to the relationship between the cache balance value and the preset threshold. The first category is the storage areas whose cache balance values ​​are higher than the preset threshold. Such storage areas are called first storage areas. The second category is the storage areas whose cache balance values ​​are lower than the preset threshold. Such storage areas are called second storage areas. Part or all of the memory occupied by the first storage area can be allocated to the second storage area. Specifically, the memory can be allocated to any first storage area in the following manner:

[0074] In a possible embodiment, before performing memory allocation, it is necessary to judge the cache balance value of the first storage area. If the cache balance value of the first storage area is the same as the preset upper limit value, all the memory occupied by the first storage area is allocated to the second storage area; if the cache balance value of the first storage area is different from the preset upper limit value, part of the memory occupied by the first storage area is allocated to the second storage area. For example, the preset upper limit value is 2. If the cache balance value of the first storage area is 2, it can be determined that in the first storage area, there are no events or other applications occupying the memory in the first storage area, and all the memory occupied by the first storage area can be allocated to the second storage area. If the cache balance value of the first storage area is 1.9, it can be determined that there are events occupying memory in the first storage area, so it is impossible to allocate all the memory occupied by the first storage area to the second storage area, but part of the memory occupied by the first storage area can be allocated to the second storage area.

[0075] In a possible embodiment, if it is determined to allocate all the memory occupied by the first storage area to the second storage area, the total memory occupied by the first storage area and the memory size required for each second storage area can be compared, and the memory size required for each second storage area can be determined based on the cache balance value of each second storage area and a preset threshold. For example, the preset threshold is 1.5, and the cache balance value of the second storage area is 1.3. The memory required for the second storage area can be determined based on the difference between the two, which can be 2MB, or different memory corresponding values ​​can be set for different differences according to different needs.

[0076] Among them, if the total memory occupied by the first storage area is greater than the sum of the memory required by the second storage area, then the total memory is allocated to each second storage area according to the memory size required by each second storage area. The above memory allocation method can be implemented in the following two ways: Method 1, based on the memory size required in each second storage area, the total memory occupied by the first storage area, and the cache balance value of each storage area, the actual allocated memory size of each second storage area is determined, and the actual allocated memory size of each storage area is allocated to each second storage area in order of the size of the cache balance value. For example, if the total memory in the first storage area is 10MB, the actual allocated memory size of each second storage area is determined to be 5MB, 3MB, and 2MB according to the above information, and 10MB of memory is allocated according to the corresponding actual allocated memory size. Method 2, divides the entire memory into a first part of memory and a second part of memory, wherein the first part of memory is the sum of the memory required for each second storage area, and the second part of memory is the memory in the entire memory except the first part of memory. The first part of memory is allocated according to the memory size actually allocated to each storage area, and the second part of memory is evenly allocated to each second storage area. For example, if the entire memory in the first storage area is 16MB, and it is determined that the memory size required for each second storage area is 5MB, 3MB, and 2MB, then it can be determined that the sum of the memory required for each second storage area is 10MB. First, divide the entire memory 16MB in the first storage area into 10MB and 6MB, allocate 10MB to each second storage area according to 5MB, 3MB, and 2MB, and then evenly allocate the remaining 6MB to each second storage area, that is, each second storage area is allocated 2MB of memory.

[0077] If the total memory occupied by the first storage area is equal to the total memory required by each second storage area, the total memory is allocated according to the memory size required in each second storage area. For example, if the total memory occupied by the first storage area is 5MB, the memory required by each second storage area is 2MB, 2MB, and 1MB respectively, and the total memory required by each second storage area is also 5MB, the memory can be allocated to each second storage area according to 2MB, 2MB, and 1MB.

[0078] If the total memory occupied by the first storage area is less than the total memory required by each second storage area, the total memory is allocated to each second storage area according to the ratio of the memory required by each second storage area. For example, the total memory occupied by the first storage area is 6MB, and the memory required by each second storage area is 3MB, 3MB, and 3MB respectively. Since the total memory occupied by the first storage area is less than the total memory required by each second storage area, the total memory can be allocated according to the ratio of 1:1:1 for the memory required by each second storage area, that is, the first storage area allocates 2MB of memory to each second storage area.

[0079] In another possible embodiment, if it is determined that part of the memory occupied by the first storage area is allocated to the second storage area, the memory size required for the second storage area can also be determined based on the cache balance value of each second storage area and the preset threshold, and the size of the memory to be allocated for any storage area can be determined based on the cache balance value of any storage area and the preset threshold, and then it is determined whether the number of storage areas included in the second storage area is one or more, thereby realizing the memory allocation process for the second storage area. It should be noted that different required memories corresponding to different differences between different cache balance values ​​and the preset threshold can be set in advance, so the required memory can be determined based on the cache balance value and the preset threshold.

[0080] Among them, if the number of storage areas included in the second storage area is one, the memory to be allocated of any storage area can be allocated to the second storage area according to the memory size required by the second storage area. Specifically, if the memory to be allocated is less than or equal to the memory size required by the second storage area, the memory to be allocated is allocated to the second storage area. For example, if the memory to be allocated is 5MB and the memory size required by the second storage area is 7MB, 5MB of the memory to be allocated can be directly allocated to the second storage area; if the size of the memory to be allocated is larger than the memory size required by the second storage area, the memory to be allocated can be allocated to the second storage area so that the cache balance value of the first storage area and the second storage area are the same. For example, the cache balance value of the first storage area is 1.9, and the cache balance value of the second storage area is 1.4. After the first storage area allocates 5MB of memory to the second storage area, the cache balance values ​​of the first storage area and the second storage area are both 1.6. The memory to be allocated can also be allocated to the second storage area so that the memory of the first storage area and the second storage area are the same. Allocating memory in different ways may have different results. It can be determined according to the results of advance tests which allocation method is more reasonable and has a greater performance improvement on the terminal device, so as to select the corresponding allocation method.

[0081] If the number of storage areas included in the second storage area is multiple, and the size of the memory to be allocated is greater than the sum of the memory required by each second storage area, the memory to be allocated is allocated to each second storage area according to the size of the memory required by each second storage area; if the size of the memory to be allocated is equal to the sum of the memory required by each second storage area, the memory to be allocated is allocated according to the required memory size of each second storage area; if the size of the memory to be allocated is less than the sum of the memory required by each second storage area, the memory to be allocated is allocated to each second storage area according to the ratio of the required memory size of each second storage area. The specific implementation process of the above allocation method can refer to the specific process of allocating all the memory occupied by any storage area to the second storage area, which will not be repeated here.

[0082] It should be noted that in the above description of the present application, the memory allocation is described for a first storage area. In the actual implementation process, there may be multiple first storage areas. The memory allocation method provided in the embodiment of the present application can be executed for each first storage area, so as to realize memory allocation between multiple storage areas.

[0083] The present application example provides a memory allocation method, device, electronic device and storage medium, the electronic device can obtain at least one cache efficiency variable for characterizing the usage efficiency of the storage area in the first time interval in each storage area at each first time interval, and determine the cache balance value of each storage area for characterizing the memory occupancy in the storage area based on at least one cache efficiency variable, and finally allocate part or all of the memory occupied by the first storage area whose cache balance value is higher than a preset threshold to the second storage area whose cache balance value is lower than the preset threshold. Through the above method, the storage area with less memory pressure for processing events can allocate free memory to the storage area with increased memory pressure for processing events. As the memory capacity is expanded, the storage area with increased memory pressure for processing events can use the cache to process the backlog of events faster, which increases the parallel ability of different storage areas to process events and reduces the load on the terminal device.

[0084] In a specific embodiment, Figure 3 A specific flow chart of a memory allocation method provided in an embodiment of the present application is shown, such as Figure 3 As shown, the method may include the following steps:

[0085] Step S301: acquiring at least one cache efficiency variable in each storage area at every first time interval.

[0086] Step S302 is performed for any storage area in each storage area: determining a cache balance value of any storage area based on at least one cache efficiency variable in any storage area and a weight corresponding to each cache efficiency variable.

[0087] Step S303, determining whether the cache balance value of any storage area is the same as the preset upper limit value, if so, executing step S304; if not, executing step S309.

[0088] In a possible embodiment, any storage area refers to any first storage area, the first storage area is a storage area whose cache balance value is higher than a preset threshold, and the second storage area is a storage area whose cache balance value is lower than the preset threshold.

[0089] Step S304, determining whether the total memory occupied by any storage area is greater than the sum of the memory required by the second storage area, if so, executing step S305; if not, executing step S306.

[0090] Step S305: Allocate all memory to each second storage area according to the memory size required by each second storage area.

[0091] In a possible embodiment, the memory size actually allocated in each second storage area can be determined based on the memory size required in each second storage area, the total memory occupied by any storage area, and the cache balance value of each storage area, and the memory size actually allocated to each storage area is allocated to each second storage area in order of the size of the cache balance value; or the entire memory is divided into a first part of memory and a second part of memory, wherein the first part of memory is the sum of the memory required for each second storage area, and the second part of memory is the memory in the entire memory except the first part of memory, the first part of memory is allocated according to the memory size actually allocated to each storage area, and the second part of memory is evenly distributed to each second storage area.

[0092] Step S306, determining whether the total memory occupied by any storage area is equal to the sum of the memory required by the second storage area, if so, executing step S307; if not, executing step S308.

[0093] Step S307: Allocate all memory according to the required memory size in each second storage area.

[0094] Step S308: Allocate all memory to each second storage area according to the ratio of memory required by each second storage area.

[0095] Step S309, determining whether the number of storage areas included in the second storage area is one, if so, executing step S310; if not, executing step S311.

[0096] Step S310: Allocate the to-be-allocated memory in any storage area to the second storage area according to the memory size required by the second storage area.

[0097] In a possible embodiment, if the memory to be allocated is less than or equal to the memory size required by the second storage area, the memory to be allocated is allocated to the second storage area; if the size of the memory to be allocated is larger than the memory size required by the second storage area, the memory to be allocated is allocated to the second storage area so that the cache balance value of any storage area is the same as that of the second storage area.

[0098] Step S311, allocating the memory to be allocated to each second storage area according to the memory size required by each second storage area, or according to the ratio of the memory required by each second storage area.

[0099] In a possible embodiment, if the size of the memory to be allocated is larger than the sum of the memory required by each second storage area, the memory to be allocated is allocated to each second storage area according to the size of the memory required by each second storage area; if the size of the memory to be allocated is equal to the sum of the memory required by each second storage area, the memory to be allocated is allocated according to the required memory size of each second storage area; if the size of the memory to be allocated is smaller than the sum of the memory required by each second storage area, the memory to be allocated is allocated to each second storage area according to the ratio of the required memory size of each second storage area.

[0100] Based on the same inventive concept, Figure 4 A structural block diagram of a memory allocation device provided in an embodiment of the present application, such as Figure 4 As shown, the memory allocation device 400 may include:

[0101] The cache balance value determination unit 401 is used to obtain at least one cache efficiency variable in each storage area at each first time interval; each cache efficiency variable is used to characterize the usage efficiency of the storage area in the first time interval in a corresponding dimension, and different cache efficiency variables correspond to different dimensions;

[0102] Determine a cache balance value of each storage area based on the at least one cache efficiency variable; the cache balance value is used to characterize the memory occupancy in the storage area;

[0103] The memory allocation unit 402 is configured to allocate part or all of the memory occupied by the first storage area whose cache balance value is higher than a preset threshold to the second storage area whose cache balance value is lower than the preset threshold.

[0104] In a possible implementation manner, the cache balance value determining unit 401 is specifically configured to perform the following steps for any storage area in the storage areas:

[0105] The cache balance value of any storage area is determined based on at least one cache efficiency variable in any storage area and a weight corresponding to each cache efficiency variable; the weight is used to characterize the degree of influence of the corresponding cache efficiency variable on the cache balance value.

[0106] In a possible implementation, the memory allocation unit 402 is specifically configured to perform the following steps for any storage area in the first storage area:

[0107] If the cache balance value of any of the storage areas is the same as the preset upper limit value, allocating all memory occupied by any of the storage areas to the second storage area;

[0108] If the cache balance value of any storage area is different from the preset upper limit value, a portion of the memory occupied by any storage area is allocated to the second storage area.

[0109] In a possible implementation, the memory allocation unit 402 is specifically configured to allocate the total memory to each of the second storage areas according to the memory size required by each of the second storage areas if the total memory occupied by any of the storage areas is greater than the sum of the memory required by the second storage areas; the memory size required by each of the second storage areas is determined based on the cache balancing value of each of the second storage areas and the preset threshold;

[0110] If the total memory occupied by any one of the storage areas is equal to the sum of the memory required by the second storage areas, the total memory is allocated according to the memory size required by each of the second storage areas;

[0111] If the total memory occupied by any one of the storage areas is smaller than the sum of the memory required by each of the second storage areas, the total memory is allocated to each of the second storage areas according to the ratio of the memory required by each of the second storage areas.

[0112] In a possible implementation, the memory allocation unit 402 is specifically configured to determine the actual allocated memory size in each of the second storage areas based on the memory size required in each of the second storage areas, the total memory occupied by any of the storage areas, and the cache balance value of each storage area;

[0113] Allocating the memory size actually allocated to each storage area in sequence according to the size order of the cache balancing value; or

[0114] Dividing the entire memory into a first memory portion and a second memory portion, wherein the first memory portion is the sum of the memory required by each of the second storage areas, and the second memory portion is the memory in the entire memory except the first memory portion;

[0115] The first portion of memory is allocated according to the memory size actually allocated to each storage area, and the second portion of memory is evenly allocated to each of the second storage areas.

[0116] In a possible implementation, the memory allocation unit 402 is specifically configured to allocate the to-be-allocated memory of any storage area to the second storage area according to the memory size required by the second storage area if the number of storage areas included in the second storage area is one; the memory size required by the second storage area is determined based on the cache balancing value of each second storage area and the preset threshold; the size of the to-be-allocated memory of any storage area is determined based on the cache balancing value of any storage area and the preset threshold;

[0117] If the second storage area includes a plurality of storage areas, the memory to be allocated is allocated to each of the second storage areas according to a ratio of memory required by each of the second storage areas.

[0118] In a possible implementation, the memory allocation unit 402 is specifically configured to allocate the memory to be allocated to the second storage area if the memory to be allocated is less than or equal to the memory size required by the second storage area;

[0119] If the size of the memory to be allocated is larger than the memory size required by the second storage area, the memory to be allocated is allocated to the second storage area so that the cache balance value of any storage area is the same as that of the second storage area;

[0120] Allocating the memory to be allocated to each of the second storage areas according to a ratio of the memory required by each of the second storage areas includes:

[0121] If the size of the memory to be allocated is greater than the sum of the memory required by each of the second storage areas, allocating the memory to be allocated to each of the second storage areas according to the size of the memory required by each of the second storage areas;

[0122] If the size of the memory to be allocated is equal to the sum of the memory required by each of the second storage areas, the memory to be allocated is allocated according to the required memory size of each of the second storage areas;

[0123] If the size of the memory to be allocated is smaller than the sum of the memory required by each of the second storage areas, the memory to be allocated is allocated to each of the second storage areas in proportion to the required memory size of each of the second storage areas.

[0124] Based on the same inventive concept, the embodiment of the present application provides an electronic device, which can implement the functions of the memory allocation method discussed above, please refer to Figure 5 The electronic device 500 includes a memory 501, a processor 502 and a bus 503.

[0125] The memory 501 is used to store computer programs executed by the processor 502. The memory 501 may mainly include a program storage area and a data storage area, wherein the program storage area may store an operating system and programs required for running the instant messaging function, etc.; the data storage area may store various instant messaging information and operation instruction sets, etc.

[0126] The memory 501 may be a volatile memory (volatile MBeMBory), such as a random access memory (rando MBeMBory, RAMB); the memory 501 may also be a non-volatile memory (non-volatile MBeMBory), such as a read-only memory, a flash memory (flash MBeMBory), a hard disk drive (HDD) or a solid-state drive (SSD), or the memory 501 is any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory 501 may be a combination of the above memories.

[0127] The processor 502 may include one or more central processing units (CPU) or a digital processing unit, etc. The processor 502 is used to implement the memory allocation method in the above embodiment when calling the computer program stored in the memory 501 .

[0128] The specific connection medium between the memory 501 and the processor 502 is not limited in the embodiment of the present application. Figure 5 In the embodiment, the memory 501 and the processor 502 are connected via a bus 503. The bus 503 is connected to the processor 502 via a bus 503. Figure 5 The connections between other components are shown in bold lines, and are not intended to be limiting. Bus 503 can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 5 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0129] Based on the same inventive concept, the embodiment of the present application provides a computer-readable storage medium, and the computer program product includes: computer program code, when the computer program code is run on a computer, the computer executes any of the memory allocation methods discussed above. Since the principle of solving the problem by the above-mentioned computer-readable storage medium is similar to that of the memory allocation method, the implementation of the above-mentioned computer-readable storage medium can refer to the implementation of the method, and the repeated parts will not be repeated.

[0130] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of complete hardware embodiments, complete software embodiments, or embodiments in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROMB, optical storage, etc.) that contain computer-usable program code.

[0131] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0132] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0133] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0134] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. A memory allocation method, characterized in that: include: acquiring at least one cache efficiency variable in each storage area at every first time interval; Each cache efficiency variable is used to characterize the usage efficiency of the storage area in the first time interval in a corresponding dimension, and different cache efficiency variables correspond to different dimensions; determining a cache balance value for each of the storage regions based on the at least one cache efficiency variable; The cache balance value is used to characterize the memory occupancy in the storage area; Allocate part or all of the memory occupied by the first storage area whose cache balance value is higher than the preset threshold to the second storage area whose cache balance value is lower than the preset threshold.

2. The method according to claim 1, characterized in that The determining the cache balance value of each storage area based on the at least one cache efficiency variable includes: For any storage area in the storage areas, the following steps are performed: The cache balance value of any storage area is determined based on at least one cache efficiency variable in any storage area and a weight corresponding to each cache efficiency variable; the weight is used to characterize the degree of influence of the corresponding cache efficiency variable on the cache balance value.

3. The method according to claim 1, characterized in that The step of allocating part or all of the memory occupied by the first storage area whose cache balance value is higher than the preset threshold to the second storage area whose cache balance value is lower than the preset threshold comprises: For any storage area in the first storage area, perform the following steps: If the cache balance value of any of the storage areas is the same as the preset upper limit value, allocating all memory occupied by any of the storage areas to the second storage area; If the cache balance value of any storage area is different from the preset upper limit value, a portion of the memory occupied by any storage area is allocated to the second storage area.

4. The method according to claim 3, characterized in that The allocating all memory occupied by any one storage area to the second storage area comprises: If the total memory occupied by any one of the storage areas is greater than the sum of the memory required by the second storage areas, the total memory is allocated to each of the second storage areas according to the memory size required by each of the second storage areas; the memory size required by each of the second storage areas is determined based on the cache balancing value of each of the second storage areas and the preset threshold; If the total memory occupied by any one of the storage areas is equal to the sum of the memory required by each of the second storage areas, the total memory is allocated according to the memory size required by each of the second storage areas; If the total memory occupied by any one of the storage areas is smaller than the sum of the memory required by each of the second storage areas, the total memory is allocated to each of the second storage areas according to the ratio of the memory required by each of the second storage areas.

5. The method according to claim 4, characterized in that The allocating the entire memory to each of the second storage areas according to the memory size required by each of the second storage areas comprises: Determine the actual allocated memory size in each of the second storage areas based on the memory size required in each of the second storage areas, the total memory occupied by any of the storage areas, and the cache balance value of each storage area; Allocating the memory size actually allocated to each storage area in sequence according to the size order of the cache balancing value; or Dividing the entire memory into a first memory portion and a second memory portion, wherein the first memory portion is the sum of the memory required by each of the second storage areas, and the second memory portion is the memory in the entire memory except the first memory portion; The first portion of memory is allocated according to the memory size actually allocated to each storage area, and the second portion of memory is evenly allocated to each of the second storage areas.

6. The method according to claim 3, characterized in that The allocating part of the memory occupied by any one of the storage areas to the second storage area comprises: If the number of storage areas included in the second storage area is one, the to-be-allocated memory of any storage area is allocated to the second storage area according to the memory size required by the second storage area; the memory size required by the second storage area is determined based on the cache balancing value of each second storage area and the preset threshold; the size of the to-be-allocated memory of any storage area is determined based on the cache balancing value of any storage area and the preset threshold; If the second storage area includes a plurality of storage areas, the memory to be allocated is allocated to each of the second storage areas according to the memory size required by each of the second storage areas or according to the ratio of the memory required by each of the second storage areas.

7. The method according to claim 6, characterized in that The allocating the to-be-allocated memory of any storage area to the second storage area according to the memory size required by the second storage area comprises: If the memory to be allocated is less than or equal to the memory size required by the second storage area, allocating the memory to be allocated to the second storage area; If the size of the memory to be allocated is larger than the memory size required by the second storage area, the memory to be allocated is allocated to the second storage area so that the cache balance value of any storage area is the same as that of the second storage area; Allocating the memory to be allocated to each of the second storage areas according to the memory size required by the second storage area, or according to the ratio of the memory required by each of the second storage areas, includes: If the size of the memory to be allocated is greater than the sum of the memory required by each of the second storage areas, allocating the memory to be allocated to each of the second storage areas according to the size of the memory required by each of the second storage areas; If the size of the memory to be allocated is equal to the sum of the memory required by each of the second storage areas, the memory to be allocated is allocated according to the required memory size of each of the second storage areas; If the size of the memory to be allocated is smaller than the sum of the memory required by each of the second storage areas, the memory to be allocated is allocated to each of the second storage areas in proportion to the required memory size of each of the second storage areas.

8. A memory allocation device, characterized in that: include: a cache balance value determination unit, configured to obtain at least one cache efficiency variable in each storage area at a first time interval; Each cache efficiency variable is used to characterize the usage efficiency of the storage area in the first time interval in a corresponding dimension, and different cache efficiency variables correspond to different dimensions; determining a cache balance value for each of the storage regions based on the at least one cache efficiency variable; The cache balance value is used to characterize the memory occupancy in the storage area; The memory allocation unit is used to allocate part or all of the memory occupied by the first storage area whose cache balance value is higher than the preset threshold to the second storage area whose cache balance value is lower than the preset threshold.

9. An electronic device, characterized in that: include: A memory for storing program instructions; A processor is used to call the program instructions stored in the memory, and execute the steps included in any one of claims 1-7 according to the obtained program instructions.

10. A computer-readable storage medium, wherein a computer program is stored in the computer-readable storage medium, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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