Chip structure preparation method and chip structure, chip packaging method and packaging structure

Abstract

The disclosed embodiment provides a chip structure preparation method and chip structure, a chip packaging method and packaging structure, and the chip structure preparation method includes: providing a chip with multiple pads; forming convex points corresponding to the pads; drilling holes in the convex points to form filling holes, and filling the filling holes with a preset dose of flux, wherein the melting point and density of the flux are less than the melting point and density of the convex points; and stamping and sealing the filling holes to form solder joints with embedded flux. A preset dose of flux is filled in the convex points of the chip structure, and when the substrate and the chip structure are flip-chip soldered, the flux is released from the convex points to play a fluxing role. While ensuring the flux dose, there is no need to spray the flux on the substrate, which simplifies the process flow, increases the reliability of the product, and improves the product production quality. In addition, no additional detection equipment is required to detect the flux spraying condition, which further simplifies the process flow, improves the yield, and saves production costs.

Description

Technical Field

[0001] The embodiments of the present disclosure belong to the field of semiconductor packaging technology, and specifically relate to a chip structure preparation method and a chip structure, a chip packaging method and a packaging structure. Background Art

[0002] The conventional flip chip packaging method is to immerse the chip bumps in flux so that the flux is set on the chip bumps, then place the chip bumps on the substrate for flip-chip soldering, and then reflow in a reflow furnace to flip the chip on the substrate. When a large-sized or complex-structured chip is flip-chip soldered to the substrate, a sufficient amount of flux is required for soldering. Therefore, in addition to dipping the chip bumps in flux, it is also necessary to spray flux on the pads of the substrate, and then solder the chip bumps to the pads of the substrate to flip the chip on the substrate.

[0003] Among them, the method of using chip bumps to dip soldering flux and spraying soldering flux on the substrate has the following problems:

[0004] 1) The dosage of flux sprayed on the substrate is unstable, and there is a problem of too much or too little spraying, which affects the quality of flip-chip soldering of the chip and further affects the reliability of the chip;

[0005] 2) After the flux is sprayed on the substrate, corresponding flux detection equipment is required to detect the spraying condition of the flux, which adds additional process flow, additional detection equipment, and increases production costs.

[0006] In view of the above problems, it is necessary to propose a chip structure preparation method and chip structure, a chip packaging method and packaging structure that are reasonably designed and effectively solve the above problems. Summary of the invention

[0007] The embodiments of the present disclosure aim to solve at least one of the technical problems existing in the prior art, and provide a chip structure preparation method and chip structure, a chip packaging method and packaging structure.

[0008] An aspect of an embodiment of the present disclosure provides a method for preparing a chip structure, the method comprising:

[0009] Providing a chip, wherein a functional surface of the chip is provided with a plurality of pads;

[0010] forming a bump corresponding to the pad on the pad;

[0011] Opening the bump to form a filling hole, and filling a preset dosage of soldering flux into the filling hole, wherein the melting point and density of the soldering flux are smaller than the melting point and density of the bump;

[0012] The filling hole after the soldering flux filling is stamped and sealed to form a soldering point with embedded soldering flux.

[0013] Optionally, forming a bump corresponding to the pad on the pad includes:

[0014] Printing solder paste on the pad and performing reflow forming to form tin bumps corresponding to the pad; wherein,

[0015] The filling hole formed by opening the tin bump penetrates the tin bump.

[0016] Optionally, the forming of a bump corresponding to the pad further comprises:

[0017] forming a photoresist layer on the seed layer of the chip, and patterning the photoresist layer to form openings corresponding to the pads;

[0018] A copper bump and a tin bump are formed at the opening in sequence by electroplating, and the copper bump and the tin bump are reflow-molded to form a copper-tin bump; wherein,

[0019] The filling holes formed by opening the copper-tin bumps penetrate the copper bumps and the tin bumps respectively.

[0020] Optionally, the step of opening a hole in the bump to form a filling hole comprises:

[0021] A hole is opened along the end of the bump away from the pad by laser drilling to form the filling hole.

[0022] Another aspect of the present disclosure provides a chip structure, which is prepared by the chip structure preparation method described above;

[0023] The chip structure includes a chip, a pad disposed on the functional surface of the chip, and a solder joint disposed on the pad; wherein,

[0024] A receiving cavity is arranged in the soldering point, and a preset dosage of soldering flux is arranged in the receiving cavity.

[0025] Optionally, the solder joint is a tin bump, and the accommodating cavity is arranged close to the solder pad.

[0026] Optionally, the solder joint is a copper-tin bump, and the accommodating cavity is arranged at the junction of the copper bump and the tin bump in the copper-tin bump.

[0027] Another aspect of the present disclosure provides a chip packaging method, the method comprising:

[0028] A substrate and a chip structure are provided, wherein the substrate is provided with a plurality of pads, and the chip structure adopts the chip structure described above;

[0029] Dipping the solder joints of the chip structure into flux to dip the solder flux at their ends, flip-chip mounting the chip structure on the substrate, and aligning the solder joints with their corresponding solder pads through the solder flux at the ends of the solder joints;

[0030] The chip structure and the substrate that have been mounted are subjected to reflow heating, wherein when the solder joint begins to melt, the soldering flux inside the solder joint is released and contacts the soldering flux at the end of the solder joint;

[0031] The soldering points and the soldering pads are completely melted and then cooled and solidified, thereby completing the soldering of the soldering points and the soldering pads, and then flip-chip soldering the chip structure to the substrate.

[0032] Optionally, after completing the welding of the welding spot and the welding pad, the method further includes:

[0033] The molten flux is cleaned and removed, and then baked and dried.

[0034] Another aspect of an embodiment of the present disclosure provides a chip packaging structure, which is formed by packaging using the chip packaging method described above.

[0035] The chip structure preparation method and chip structure, chip packaging method and packaging structure of the embodiments of the present disclosure, the chip structure preparation method, by opening holes in the bumps of the chip structure to form filling holes, and filling a preset dose of flux in the filling holes, stamping and sealing the filling holes after the flux filling, to form solder joints with embedded flux. A preset dose of flux is filled in the bumps of the chip structure, and when the substrate and the chip structure are flip-chip soldered, the flux is released from the bumps to play a fluxing role. While ensuring the flux dose, there is no need to spray flux on the substrate, which simplifies the process flow, increases product reliability, and improves product production quality. In addition, no additional testing equipment is required to detect the flux spraying condition, which further simplifies the process flow, improves productivity, and saves production costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 A schematic diagram of a process for preparing a chip structure in an embodiment of the present disclosure;

[0037] Figure 2 A schematic diagram of a process for forming a solder joint according to an embodiment of the present disclosure;

[0038] Figure 3 A schematic diagram of a process for forming a solder joint according to another embodiment of the present disclosure;

[0039] Figure 4This is a schematic diagram of a chip structure according to an embodiment of the present disclosure;

[0040] Figure 5 This is a schematic diagram of a chip structure of another embodiment of the present disclosure;

[0041] Figure 6 A schematic diagram of a chip packaging method according to an embodiment of the present disclosure;

[0042] Figures 7 to 10 The present invention is a process flow chart of a chip packaging method in an embodiment of the present invention. DETAILED DESCRIPTION

[0043] In order to enable those skilled in the art to better understand the technical solutions of the embodiments of the present disclosure, the embodiments of the present disclosure are further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0044] like Figure 1 As shown, one aspect of an embodiment of the present disclosure provides a chip structure preparation method S100, the method S100 comprising:

[0045] S110, providing a chip, wherein a functional surface of the chip is provided with a plurality of pads.

[0046] Specifically, Figure 2 , Figure 3 and Figure 4 As shown, a chip 110 is provided, and a functional surface of the chip 110 is provided with a plurality of pads 111. The pads 111 may be copper pads.

[0047] S120, forming a bump corresponding to the pad.

[0048] Specifically, the bumps 120 corresponding to the pads 111 are formed.

[0049] In one embodiment, the process of forming the bump 120 may be as follows:

[0050] First, a seed layer is formed on the pad 111 of the chip 110 , and a portion of the seed layer is removed by an etching process, so that the seed layer is only electrically connected to the pad 111 .

[0051] Next, solder paste is printed on the seed layer on the pad 111, and reflow forming is performed to form tin bumps corresponding to the pad 111. That is, the bumps 120 may be solder balls.

[0052] In another embodiment, the process of forming the bump 120 may also be as follows:

[0053] First, a photoresist layer is formed on the seed layer of the chip 110 , and the photoresist layer is patterned to form openings at locations corresponding to the pads 111 .

[0054] Next, a copper bump 121 and a tin bump 122 are formed in sequence by electroplating at the opening through an electroplating process.

[0055] Thirdly, an etching process is used to remove part of the seed layer, so that the seed layer is only connected to the copper bump.

[0056] Then, the copper bump 121 and the tin bump 122 are reflow-molded to form a copper-tin bump. In other words, the bump 120 can be a copper-tin bump.

[0057] Finally, the remaining photoresist layer is removed by etching and other processes.

[0058] S130, drilling the bump to form a filling hole, and filling a preset dose of soldering flux into the filling hole, wherein the melting point and density of the soldering flux are smaller than the melting point and density of the bump.

[0059] The filling hole 130 may be formed by drilling a hole along the end of the bump 120 away from the pad 111 by laser drilling or the like.

[0060] Specifically, Figure 2 As shown, in one embodiment, a hole may be opened along the end of the tin bump away from the pad 111 by laser drilling or the like to form the filling hole 130. Preferably, in this embodiment, the filling hole formed by opening the tin bump passes through the tin bump 130, which can provide more space for the filling of the soldering flux and can also better achieve the sealing of the filling hole 130. Of course, the formed filling hole 130 may not completely pass through the tin bump, and the size of the filling hole 130 may be set according to the amount of soldering flux filled, which is not specifically limited in this embodiment.

[0061] like Figure 3 As shown, in another embodiment, a hole may be opened along the end of the copper-tin bump away from the pad 111 by laser drilling or the like to form the filling hole 130. The filling hole formed by opening the copper-tin bump passes through the copper bump 121 and the tin bump 122 respectively, which can provide more space for filling the flux.

[0062] The melting point and density of the soldering flux are lower than those of the bumps 120. Since the soldering flux has a lower melting point and density, and can reduce the surface tension of the bumps 120, when the chip structure is flipped onto the substrate and hot-pressed, the soldering point is squeezed to release the soldering flux from the bumps 120, thereby achieving soldering of the chip structure and the substrate.

[0063] It should be noted that the dosage of the soldering flux filled in the bump 120 can be selected according to actual needs, and is not specifically limited in this embodiment.

[0064] In this embodiment, by filling a preset dose of flux into the filling hole of the bump, the dose of flux during the welding process can be ensured. At the same time, there is no need to spray flux on the substrate, which simplifies the process flow, increases product reliability, and improves product production quality.

[0065] S140, stamping and sealing the filling hole after the soldering flux is filled to form a soldering point with embedded soldering flux.

[0066] like Figure 2 and Figure 3 As shown, the filling hole 130 filled with solder flux is stamped and sealed to form a solder joint A with embedded solder flux B. Specifically, a stamping groove D is provided on the side of the stamping module facing the bump 120, so that the end of the bump 120 is completely in the stamping groove D during stamping and sealing, thereby ensuring the sealing effect of the filling hole 130.

[0067] It should be noted that other methods may also be used to seal the filling hole 130 , which is not specifically limited in this embodiment and can be selected according to actual needs.

[0068] The chip structure preparation method of the disclosed embodiment is to open holes in the bumps of the chip structure to form filling holes, fill a preset dose of flux in the filling holes, and stamp and seal the filling holes after the flux filling to form solder joints with embedded flux. A preset dose of flux is filled in the bumps of the chip structure, and when the substrate and the chip structure are flip-chip soldered, the flux is released from the bumps to play a fluxing role. While ensuring the flux dose, there is no need to spray flux on the substrate, which simplifies the process flow, increases product reliability, and improves product production quality. In addition, no additional testing equipment is required to detect the flux spraying condition, which further simplifies the process flow, improves yield, and saves production costs.

[0069] like Figure 4 and Figure 5 As shown, another aspect of the embodiment of the present disclosure provides a chip structure 100, which is prepared by the chip structure preparation method S100 described above. The specific steps of the chip structure preparation method S100 have been described in detail above and will not be repeated here.

[0070] The chip structure 100 includes a chip 110, a pad 111 disposed on a functional surface of the chip 110, and a solder joint A disposed on the pad 111; wherein,

[0071] The soldering point A is provided with a receiving cavity, and the receiving cavity is provided with a preset dosage of soldering flux B. Specifically, a seed layer 112 is provided on the soldering pad 111 , and the soldering point A is provided on the seed layer 112 .

[0072] For example, Figure 4 As shown, in one embodiment, the solder joint A is a tin bump, and the receiving cavity is arranged close to the pad 111, so that the soldering flux B in the solder joint A is arranged close to the pad 111. Figure 4 As shown, preferably, the accommodating cavity is arranged on the soldering pad 111. The accommodating cavity is arranged on the soldering pad 111 so that a preset dose of soldering flux B can be better filled into the accommodating cavity to meet the welding requirements.

[0073] For example, Figure 5 As shown, in another embodiment, the solder joint A is a copper-tin bump, and the receiving cavity is arranged at the junction of the copper bump 121 and the tin bump 122 in the copper-tin bump, so that the flux B is located in the central position of the receiving cavity, and the preset dose of flux B is better filled in the receiving cavity to meet the welding requirements.

[0074] In the chip structure of the disclosed embodiment, a solder joint is provided on the pad of the chip, and a preset dosage of flux is provided inside the solder joint. When the chip structure is flip-chip soldered to the substrate, the flux can be released from the solder joint to play a role of flux. While ensuring the dosage of flux, there is no need to spray flux on the substrate, which simplifies the process flow, increases product reliability, and improves product production quality. In addition, no additional testing equipment is required to detect the flux spraying condition, which further simplifies the process flow, improves productivity, and saves production costs.

[0075] like Figure 6 As shown, another aspect of the embodiment of the present disclosure provides a chip packaging method S200, the chip packaging method S200 comprising:

[0076] S210, providing a substrate and a chip structure, wherein the substrate is provided with a plurality of pads, and the chip structure adopts the chip structure described above.

[0077] Specifically, Figure 7 As shown, a substrate 210 and a chip structure 100 are provided. The substrate 210 is provided with a plurality of pads 211. The chip structure 100 adopts the chip structure 100 described above, and a solder joint A with embedded flux B is pre-prepared on the pad 111 of the chip structure 100. The specific structural features of the chip structure 100 have been described in detail above, and will not be repeated here.

[0078] In this embodiment, a pre-fabricated chip structure is used for flip-chip packaging of the chip, and a preset dose of flux is embedded in the solder joints of the chip, eliminating the need to spray flux on the substrate, thereby simplifying the process and saving packaging time and packaging costs.

[0079] S220, immersing the solder joints of the chip structure in flux to dip the solder flux at their ends, flip-chip mounting the chip structure on the substrate, and aligning the solder joints with their corresponding solder pads through the solder flux at the ends of the solder joints.

[0080] Specifically, Figure 7 As shown, the solder joint A of the chip structure 100 is immersed in flux to dip the solder flux C at the end of the solder joint A, and the chip structure 100 is flip-chip mounted on the substrate 210, and the solder joint A is aligned and fixed with its corresponding pad 211 through the solder flux C at the end of the solder joint A.

[0081] S230, performing reflow heating on the mounted chip structure and the substrate, wherein when the solder joint begins to melt, the flux inside the solder joint is released and contacts with the melted flux at the end of the solder joint.

[0082] Specifically, Figure 8 As shown, the chip structure 100 and substrate 210 after mounting are placed in a reflow oven for reflow heating. Since the flux has a smaller melting point and density than the solder joint A, and the flux can reduce the surface tension of the solder joint A, when the solder pad A begins to melt, the flux B inside the solder joint A is released and melts and contacts with the flux C at the end of the solder joint A, and the flux B and flux C begin to work to remove oxides and contaminants on the soldering surface and reduce the surface tension of the solder.

[0083] S240, the solder joints and the solder pads are completely melted and then cooled and solidified, thereby completing the soldering of the solder joints and the solder pads, and then flip-chip soldering the chip structure to the substrate.

[0084] Specifically, Fig. 9 As shown, as the reflow heating continues in the reflow oven, the solder joint A on the chip 110 and the solder pad 211 on the substrate 210 are completely melted together, and then cooled and solidified so that the solder joint A and the solder pad 211 are welded together, and then the chip structure 100 is flip-chip welded on the substrate 210. When the solder joint A and the solder pad 211 are welded together, the flux is distributed on both sides of the solder joint A and the solder pad 211 after welding.

[0085] Exemplarily, after completing the welding of the welding spot and the welding pad, the method further includes:

[0086] The molten soldering flux is cleaned and removed, and then baked and dried. Specifically, the soldering flux can be cleaned with a soldering flux cleaning agent, and then baked and dried to obtain a soldering flux. Fig.10 The chip packaging structure shown.

[0087] It should be noted that after the cleaning of the solder flux is completed, the packaging method S200 further includes:

[0088] An underfill is filled between the chip structure 100 and the substrate 210 to form an underfill layer that wraps around the solder joints A and the solder pads 211 , thereby further fixing the chip structure 100 and the substrate 210 .

[0089] The chip packaging method of this embodiment adopts the chip structure described above, and a solder joint is provided on the pad of the chip structure, and a preset dosage of flux is provided inside the solder joint. When the substrate and the chip structure are flip-chip soldered, the flux can be released from the solder joint to play a role of flux. While ensuring the dosage of flux, there is no need to spray flux on the substrate, which simplifies the process flow, increases product reliability, and improves product production quality. In addition, no additional detection equipment is required to detect the flux spraying condition, which further simplifies the process flow, improves productivity, and saves production costs.

[0090] Another aspect of the present disclosure provides a chip packaging structure, which is formed by packaging using the chip packaging method S200 described above. The specific steps of the chip packaging method S200 have been described in detail above and will not be repeated here. The chip packaging structure of the present disclosure embodiment has good reliability and good production quality.

[0091] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the embodiments of the present disclosure, but the embodiments of the present disclosure are not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and essence of the embodiments of the present disclosure, and these modifications and improvements are also considered to be within the protection scope of the embodiments of the present disclosure.

Claims

1. A method for preparing a chip structure, characterized in that: The method comprises: Providing a chip, wherein a functional surface of the chip is provided with a plurality of pads; forming a bump corresponding to the pad on the pad; Opening the bump to form a filling hole, and filling a preset dosage of soldering flux into the filling hole, wherein the melting point and density of the soldering flux are smaller than the melting point and density of the bump; The filling hole after the soldering flux filling is stamped and sealed to form a soldering point with embedded soldering flux.

2. The method according to claim 1, characterized in that The step of forming a bump corresponding to the pad comprises: Printing solder paste on the pad and performing reflow forming to form tin bumps corresponding to the pad; wherein, The filling hole formed by opening the tin bump penetrates the tin bump.

3. The method according to claim 1, characterized in that The forming of a bump corresponding to the pad also includes: forming a photoresist layer on the seed layer of the chip, and patterning the photoresist layer to form openings corresponding to the pads; A copper bump and a tin bump are formed at the opening in sequence by electroplating, and the copper bump and the tin bump are reflow-molded to form a copper-tin bump; wherein, The filling holes formed by opening the copper-tin bumps penetrate the copper bumps and the tin bumps respectively.

4. The method according to any one of claims 1 to 3, characterized in that: The step of opening the convex point to form a filling hole comprises: A hole is opened along the end of the bump away from the pad by laser drilling to form the filling hole.

5. A chip structure, characterized in that: The chip structure is prepared by the method for preparing the chip structure according to any one of claims 1 to 4; The chip structure includes a chip, a pad disposed on the functional surface of the chip, and a solder joint disposed on the pad; wherein, A receiving cavity is arranged in the soldering point, and a preset dosage of soldering flux is arranged in the receiving cavity.

6. The chip structure according to claim 5, characterized in that: The soldering point is a tin bump, and the accommodating cavity is arranged close to the soldering pad.

7. The chip structure according to claim 5, characterized in that: The solder joint is a copper-tin bump, and the accommodating cavity is arranged at the junction of the copper bump and the tin bump in the copper-tin bump.

8. A chip packaging method, characterized in that: The method comprises: A substrate and a chip structure are provided, wherein the substrate is provided with a plurality of pads, and the chip structure adopts the chip structure according to any one of claims 5 to 7; Dipping the solder joints of the chip structure into flux to dip the solder flux at their ends, flip-chip mounting the chip structure on the substrate, and aligning the solder joints with their corresponding solder pads through the solder flux at the ends of the solder joints; The chip structure and the substrate that have been mounted are subjected to reflow heating, wherein when the solder joint begins to melt, the soldering flux inside the solder joint is released and contacts the soldering flux at the end of the solder joint; The soldering points and the soldering pads are completely melted and then cooled and solidified, thereby completing the soldering of the soldering points and the soldering pads, and then flip-chip soldering the chip structure to the substrate.

9. The method according to claim 8, characterized in that After the welding of the welding spot and the welding pad is completed, the method further includes: The molten flux is cleaned and removed, and then baked and dried.

10. A chip packaging structure, characterized in that: The chip is packaged by the chip packaging method according to any one of claims 8 or 9.

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