Novel planar organic passivation chip manufacturing method

Abstract

The invention provides a novel planar organic passivation chip manufacturing method, which belongs to the technical field of chip manufacturing, and comprises the steps of diffusion, photoresist printing, exposure and development, acid etching, photoresist removal, alkali etching, dehydration and baking, polyimide printing, polyimide curing, electrical test, cutting and packaging to obtain a chip. The reliability of the product can be improved, the process can be simplified, and the cost is saved; the chip technology is simple in technological process and low in cost, the yield is about 1.5% higher than that of a GPP technology, and the production cost of the technology is 20-40% lower than that of the GPP technology. The thickness of the wafer is smaller than that of the GPP chip, and the energy consumption is low. The problems of complex process, high fragment rate, high cost and high energy consumption caused by the use of a GPP chip are solved; according to the method, micron-level patterns can be formed on the surface of the chip by printing the first surface photoresist and printing the second surface photoresist, extremely high precision and stability are ensured, and processing and treatment of the surface of the chip can be rapidly completed, so that the production efficiency is improved.

Description

Technical Field

[0001] The invention relates to the technical field of chip manufacturing, and in particular to a novel method for manufacturing a planar organic passivation chip. Background Art

[0002] The mainstream chip on the market currently uses glass passivation to protect the PN junction technology, referred to as GPP chip technology. The traditional GPP chip manufacturing process is: diffusion, one-time photolithography, etching grooves, Sipos / Sin passivation protection, glass passivation protection, LTO passivation protection, three-time photolithography, deoxidation, nickel-gold plating, cutting, packaging and testing, etc.

[0003] On the one hand, the manufacturing process of GPP chips is complicated, the breakage rate is high, and the cost of use is also high; on the other hand, GPP chips use glass passivation to protect the PN junction. Due to the large difference in expansion coefficient between glass and chip, the glass of GPP chips is prone to cracking during hot and cold shocks, resulting in device failure. In addition, in order to solve the problem of GPP chip breakage, thicker wafers are generally selected. The thicker the wafer, the greater the energy consumption. Summary of the invention

[0004] The present invention aims to solve the above technical problems and provides a novel method for manufacturing a planar organic passivation chip.

[0005] In order to solve the above technical problems, the technical solution provided by the present invention is:

[0006] A novel method for manufacturing a planar organic passivation chip comprises the following steps:

[0007] (1) Diffusion:

[0008] After pulling the crystal, the original wafer is diffused with phosphorus and boron, and the surface of the diffused wafer is metallized, dehydrated and dried to obtain the required wafer;

[0009] (2) Printing the first side photoresist:

[0010] The photoresist is evenly printed on the surface of the wafer by a precision printer with a thickness of 1 to 5 um, and then placed in an oven for baking at 60 to 150°C for 5 to 30 minutes;

[0011] (3) Printing the second side photoresist:

[0012] Turning over the wafer on which the photoresist is printed on the first side, and printing and baking the photoresist on the second side according to the method of step (2);

[0013] (4) Exposure:

[0014] Place the film on the wafer to be exposed and expose for 5 to 60 seconds;

[0015] (5) Development:

[0016] The exposed wafer is developed with a developer for 10 to 60 seconds at room temperature to obtain the desired pattern, and then baked at 60 to 150°C for 5 to 30 minutes;

[0017] (6) Acid etching:

[0018] Use mixed acid to etch the exposed pattern to obtain the required groove with a depth of 100 to 150 um;

[0019] (7) Removal of photoresist:

[0020] Using a stripping solution to remove the photoresist from the surface of the wafer;

[0021] (8) Alkali etching:

[0022] subjecting the wafer from which the photoresist has been removed to alkaline etching;

[0023] (9) Dehydration and baking:

[0024] The alkaline-washed wafers are dehydrated and then baked;

[0025] (10) Printing polyimide:

[0026] The wafer after alkali etching is subjected to printing of polyimide on the surface of the groove and the vicinity of the groove by a precision printer;

[0027] (11) Polyimide curing:

[0028] The printed wafer is placed in an oven for baking to fully cure the polyimide;

[0029] (12) Electrical test:

[0030] The wafers after curing polyimide are subjected to 100% electrical test by a spot tester, and defective products are marked with black dots;

[0031] (13) Cutting:

[0032] After the electrical test, the wafer is cut along the reserved groove using a cutting machine to obtain the required chip; or the wafer after the electrical test is cut along the reserved groove by 10 to 30 um, and then the chip is split using a splitting tool;

[0033] (14) Packaging:

[0034] Chips with qualified electrical properties are packaged after being cleaned.

[0035] Preferably, the metal used for the metallization treatment in step (1) is one or a combination of gold plating, nickel plating, titanium plating or nickel silver, and the diffusion temperature is 1200-1300° C. and the time is 38-42 hours.

[0036] Preferably, the photoresist is a negative photoresist.

[0037] Preferably, the mixed acid in step (6) consists of nitric acid, hydrofluoric acid, glacial acetic acid and sulfuric acid, and the volume ratio is 9:9:12:7, the etching temperature is -5 to 5°C, and the etching time is 500 to 1500s.

[0038] Preferably, the temperature of the stripping solution in step (7) is 50-100° C. and the time is 10-40 min.

[0039] Preferably, the alkali solution in step (8) is a potassium hydroxide solution, the volume ratio of the solution is 3-15%, the etching temperature is 60-90° C., and the time is 100-240 s.

[0040] Preferably, the baking temperature in step (9) is 100-150° C. for 10-30 min.

[0041] Preferably, the baking temperature in step (11) is 250-300° C., and the curing time is 10-30 hours.

[0042] After adopting the above method, the present invention has the following advantages:

[0043] The present invention obtains a chip through the steps of diffusion, photoresist printing, exposure and development, acid etching, photoresist removal, alkali etching, dehydration and baking, polyimide printing, polyimide curing, electrical property testing, cutting and packaging, which can improve the reliability of the product on the one hand, simplify the process and save costs on the other hand;

[0044] The chip process of the present invention has a simple process flow, low cost, and a yield rate that is about 1.5% higher than that of the GPP process. The production cost of this process is 20-40% lower than that of the GPP process. The wafer thickness is smaller than that of the GPP chip, and the energy consumption is low. It solves the problems of complex process, high breakage rate, high cost and high energy consumption caused by the use of GPP chips;

[0045] The present invention adopts printing of the first-side photoresist and printing of the second-side photoresist to form a micron-level pattern on the chip surface, ensures extremely high precision and stability, can quickly complete the processing and treatment of the chip surface, and thus improves production efficiency.

[0046] The above summary is for illustrative purposes only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments and features described above, further aspects, embodiments and features of the present invention will be readily apparent by reference to the accompanying drawings and the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0048] Figure 1 It is a process flow chart of the present invention. DETAILED DESCRIPTION

[0049] Specific embodiments of the present invention will now be mentioned in detail. Although the present invention is described in conjunction with these specific embodiments, it should be appreciated that it is not intended to limit the present invention to these specific embodiments. On the contrary, these embodiments are intended to cover substitutions, changes or equivalent embodiments that may be included in the spirit and scope of the invention defined by the claims. In the following description, a large number of specific details are set forth in order to provide a comprehensive understanding of the present invention. The present invention can be implemented without some or all of these specific details. In other cases, in order not to make the present invention unnecessarily obscure, well-known process operations are not described in detail.

[0050] When used in conjunction with "including," "methods comprising," or similar language in this specification and the appended claims, the singular forms "a," "an," and "the" include plural references unless the context clearly dictates otherwise. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.

[0051] The present invention is further described in detail below in conjunction with the full text.

[0052] Embodiment 1:

[0053] (1) Diffusion: Select the original wafer with the corresponding electroplating rate for phosphorus and boron diffusion. The wafer after diffusion is plated with nickel and gold, and then dehydrated and dried to obtain the wafer with the required voltage. The diffusion temperature is 1260℃ and the time is 40 hours.

[0054] (2) Printing the first side photoresist: The photoresist is evenly coated on the surface of the wafer using a wafer printer, and then placed in a 100°C oven for 10 minutes. The thickness of the photoresist is 2.5 um.

[0055] (3) Printing the photoresist on the second side: flipping the wafer printed with the photoresist on the first side, and printing and baking the photoresist on the second side according to the method of step (2);

[0056] (4) Exposure: Place the film on the wafer to be exposed and expose it once, with an exposure time of 20 seconds;

[0057] (5) Development: The exposed wafer is immersed in the developer for 30 seconds and then baked. The baking temperature and time are 80°C and 10 minutes respectively.

[0058] (6) Acid etching: prepare a mixed acid of 9:9:12:7, and use the mixed acid to etch the exposed pattern at 0°C to obtain the desired groove with a groove depth of 120 μm;

[0059] (7) Removing photoresist: Soak the etched wafer in a stripping solution for 30 minutes to remove the photoresist on the surface of the wafer. The temperature of the stripping solution is 80°C.

[0060] (8) Alkali etching: The wafer with the photoresist removed is subjected to alkaline etching, wherein the alkaline solution is a potassium hydroxide solution with a volume ratio of 10%, an etching temperature of 70° C., and a time of 80 seconds. This not only removes impurities in the grooves, but also forms a rough surface on the groove surface, which is beneficial to further stabilize the electrical properties.

[0061] (9) Dehydration and baking: The wafer after alkaline washing is dehydrated at a speed of 500 rpm for 5 min, and then baked at 150° C. for 20 min;

[0062] (10) Printing polyimide: Using a precision printer, print polyimide on the surface of the groove and the vicinity of the groove on the wafer after alkali etching;

[0063] (11) Polyimide curing: The printed wafer is placed in an oven for baking to completely cure the polyimide. The curing temperature is 275°C and the time is 15 hours.

[0064] (12) Electrical test: The wafers after film bonding are subjected to 100% electrical test by a spot tester, and defective products are marked with dots;

[0065] (13) Cutting: After the electrical test, the wafer is cut using a cutting machine to obtain the required chips;

[0066] (14) Packaging: Chips with qualified electrical properties are packaged after cleaning.

[0067] Embodiment 2:

[0068] (1) Diffusion: Select the original wafer with the corresponding electroplating rate for phosphorus and boron diffusion. The wafer after diffusion is plated with nickel and gold, and then dehydrated and dried to obtain the wafer with the required voltage. The diffusion temperature is 1260℃ and the time is 40 hours.

[0069] (2) Printing the first side photoresist: The photoresist is evenly coated on the surface of the wafer using a wafer printer, and then placed in a 120°C oven for 15 minutes. The thickness of the photoresist is 4.5 μm.

[0070] (3) Printing the photoresist on the second side: flipping the wafer printed with the photoresist on the first side, and printing and baking the photoresist on the second side according to the method of step (2);

[0071] (4) Exposure: Place the film on the wafer to be exposed and expose it once. The exposure time is 40 seconds. Exposure can achieve high-resolution pattern transfer, so that the circuit pattern on the chip can be designed very finely.

[0072] (5) Development: After exposure, the wafer is immersed in the developer for 45 seconds and then baked at 90°C and 15 minutes respectively. Development can shorten the manufacturing cycle and increase production capacity.

[0073] (6) Acid etching: prepare a mixed acid of 9:9:12:7, and use the mixed acid to etch the exposed pattern at 0°C to obtain the desired groove with a groove depth of 150 μm;

[0074] (7) Removing photoresist: Soak the etched wafer in a stripping solution for 45 minutes to remove the photoresist on the surface of the wafer. The temperature of the stripping solution is 80°C.

[0075] (8) Alkali etching: The wafer with the photoresist removed is subjected to alkaline etching, wherein the alkaline solution is a potassium hydroxide solution, the volume ratio of the solution is 10%, the etching temperature is 70° C., and the etching time is 80 s;

[0076] (9) Dehydration and baking: The wafer after alkaline washing is dehydrated at a speed of 500 rpm for 7 min, and then baked at 150° C. for 25 min;

[0077] (10) Printing polyimide: Using a precision printer, print polyimide on the surface of the groove and the vicinity of the groove on the wafer after alkali etching;

[0078] (11) Polyimide curing: The printed wafer is placed in an oven for baking to completely cure the polyimide. The curing temperature is 275°C and the time is 20 hours.

[0079] (12) Electrical test: The wafers after film bonding are subjected to 100% electrical test by a spot tester, and defective products are marked with dots;

[0080] (13) Cutting: After the electrical test, the wafer is cut using a cutting machine to obtain the required chips;

[0081] (14) Packaging: Chips with qualified electrical properties are packaged after cleaning.

[0082] The production information of the products prepared by the above-mentioned Example 1 and Example 2 is compared with the production information of the products prepared by the GPP process, as shown in the following Table 1:

[0083] Table 1. Comparison of production information of the two processes

[0084]

[0085] It can be seen from Table 1 that the yield of the process of the present invention is about 1.5% higher than that of the GPP process, and the production cost of the process is 20-40% lower than that of the GPP process.

[0086] The performance of the product prepared by the above embodiment is compared with the performance of the product prepared by the GPP process, as shown in Table 2 below:

[0087] Table 2. Comparison of production information of the two processes

[0088]

[0089] As can be seen from Table 2, the products produced by the process of the present invention have low leakage current and higher temperature resistance level (embodied in HTRB capability and TC capability, etc.). This is because the chip surface (near the groove) is coated with a layer of polyimide, which has excellent insulation and elasticity, can well protect the PN junction, thereby improving the reliability of the chip, and can play a role in moisture-proofing, so the product has a lower leakage current. In addition, polyimide has good insulation, heat resistance and flexibility, thereby improving the high temperature resistance (HTRB capability) of the product, and can completely solve the problem of GPP chip breaking due to the large difference in thermal expansion coefficient between glass and silicon wafer, thereby greatly improving the product's resistance to cold and heat shock (TC capability).

[0090] Therefore, the process flow of this new chip process is simple and the cost is low; the wafer thickness of this new chip process is smaller than that of the GPP chip and the energy consumption is low.

[0091] The present invention and its embodiments are described above, and such description is not restrictive. What is shown in the full text is only one of the embodiments of the present invention, and the actual structure is not limited thereto. In short, if ordinary technicians in the field are inspired by it, without departing from the purpose of the invention, they can design a structure and embodiment similar to the technical solution without creativity, which should belong to the protection scope of the present invention.

Claims

1. A novel method for manufacturing a planar organic passivation chip, characterized in that: The following steps are involved: (1) Diffusion: After pulling the crystal, the original wafer is diffused with phosphorus and boron, and the surface of the diffused wafer is metallized, dehydrated and dried to obtain the required wafer; (2) Printing the first side photoresist: The photoresist is evenly printed on the surface of the wafer by a precision printer with a thickness of 1 to 5 um, and then placed in an oven for baking at 60 to 150°C for 5 to 30 minutes; (3) Printing the second side photoresist: Turning over the wafer on which the photoresist is printed on the first side, and printing and baking the photoresist on the second side according to the method of step (2); (4) Exposure: Place the film on the wafer to be exposed and expose for 5 to 60 seconds; (5) Development: The exposed wafer is developed with a developer for 10 to 60 seconds at room temperature to obtain the desired pattern, and then baked at 60 to 150°C for 5 to 30 minutes; (6) Acid etching: Use mixed acid to etch the exposed pattern to obtain the required groove with a depth of 100 to 150 um; (7) Removal of photoresist: Using a stripping solution to remove the photoresist from the surface of the wafer; (8) Alkali etching: subjecting the wafer from which the photoresist has been removed to alkaline etching; (9) Dehydration and baking: The alkaline-washed wafers are dehydrated and then baked; (10) Printing polyimide: The wafer after alkali etching is subjected to printing of polyimide on the surface of the groove and the vicinity of the groove by a precision printer; (11) Polyimide curing: The printed wafer is placed in an oven for baking to fully cure the polyimide; (12) Electrical test: The wafers after curing polyimide are subjected to 100% electrical test by a spot tester, and defective products are marked with black dots; (13) Cutting: After the electrical test, the wafer is cut along the reserved groove using a cutting machine to obtain the required chip; or the wafer after the electrical test is cut along the reserved groove by 10 to 30 um, and then the chip is split using a splitting tool; (14) Packaging: Chips with qualified electrical properties are packaged after being cleaned.

2. A novel planar organic passivation chip manufacturing method according to claim 1, characterized in that: The metal for metallization treatment in step (1) is one or more of gold plating, nickel plating, titanium plating or nickel silver plating, and the diffusion temperature is 1200-1300° C. and the time is 38-42 hours.

3. A novel planar organic passivation chip manufacturing method according to claim 1, characterized in that: The photoresist is a negative photoresist.

4. The method for manufacturing a novel planar organic passivation chip according to claim 1, characterized in that: The mixed acid in step (6) is composed of nitric acid, hydrofluoric acid, glacial acetic acid and sulfuric acid, and the volume ratio is 9:9:12:

7. The etching temperature is -5 to 5°C and the etching time is 500 to 1500s.

5. The method for manufacturing a novel planar organic passivation chip according to claim 1, characterized in that: The temperature of the stripping solution in step (7) is 50-100° C. and the time is 10-40 minutes.

6. The novel planar organic passivation chip manufacturing method according to claim 1, characterized in that: The alkali solution in step (8) is a potassium hydroxide solution, the volume ratio of the solution is 3-15%, the etching temperature is 60-90° C., and the etching time is 100-240 seconds.

7. The novel planar organic passivation chip manufacturing method according to claim 1, characterized in that: The baking temperature in step (9) is 100-150° C. for 10-30 minutes.

8. The novel planar organic passivation chip manufacturing method according to claim 1, characterized in that: The baking temperature in the step (11) is 250 to 300° C., and the curing time is 10 to 30 hours.

Images