Chip packaging body and manufacturing method

Abstract

The invention discloses a chip packaging body and a manufacturing method, and the chip packaging body comprises a substrate main body, the substrate main body is provided with a mounting area, the mounting area is used for mounting a chip, and the substrate main body is provided with a plurality of LED chips. The mounting area is larger than the mounted chip; the flow guide groove is arranged around the mounting area; and drainage is carried out on the mounting glue when the chip is mounted. Through the mode, the influence of glue climbing and glue overflowing during packaging can be avoided, a thinner chip packaging body structure is realized, and the production processing level and the production quality are improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor packaging manufacturing, and in particular to a chip package and a manufacturing method thereof. Background Art

[0002] In order to meet the growing performance requirements and space constraints, semiconductor packaging is moving towards high integration and miniaturization. Thinner chips are conducive to faster transmission of data and instructions, improved operating speed and response time, and better heat handling and heat dissipation capabilities.

[0003] When the chip is mounted on the chip package, a conductive adhesive such as silver glue is used to fix the chip on the chip package. The conductive adhesive provides a good electrical conduction path for the chip.

[0004] During the installation process, the silver glue at the bottom of the chip spreads outward due to squeezing, which can easily cause glue overflow, affecting the chip performance or the circuit components around the chip package, causing product failure. Therefore, reliable semiconductor packaging is of great significance to product production and still needs to be improved. Summary of the invention

[0005] The present application provides a chip package and a manufacturing method, which can avoid the influence of glue creeping and overflowing during packaging, realize a thinner chip package structure, and improve the production and processing level and production quality.

[0006] In order to solve the above technical problems, the technical solution adopted in the present application provides a chip package, wherein the chip package comprises:

[0007] The substrate body is defined with a mounting area, wherein the mounting area is used to mount the chip; the mounting area is larger than the mounted chip; and a guide groove is arranged around the mounting area to guide the mounting glue when the chip is mounted.

[0008] The area range of the mounting region is determined by the chip area and the mounting gap, and the mounting gap is determined by the mounting accuracy, exposure accuracy and / or etching tolerance.

[0009] Among them, the bottom of the guide groove is a curved surface.

[0010] The width of the guide groove is 80 to 100 microns.

[0011] Wherein, the distance from the edge of the substrate body to the outer wall of the guide groove is 50 to 100 microns.

[0012] The edge of the chip package is formed with a metal block protruding outwards, and the width and length of the metal block are 50 to 100 microns respectively.

[0013] In order to solve the above technical problems, the second aspect of the present application provides a method for manufacturing a chip package, which is used to prepare any of the above chip packages, and the manufacturing method comprises:

[0014] Prepare a substrate body; set a mounting area on the surface of the substrate body; wherein the mounting area is used to mount the chip; etch the surfaces on both sides of the substrate body; form a guide groove on the side where the mounting area is set, and the guide groove surrounds the mounting area.

[0015] Among them, the step of etching the two side surfaces of the substrate main body includes: developing and exposing a side of the substrate main body provided with an installation area to form a pattern including the shape of a guide groove and the shape of a chip package; developing and exposing a side of the substrate main body opposite to the installation area to form a pattern including the shape of a chip package; etching the two side surfaces of the substrate main body formed with the pattern.

[0016] The step of etching the surfaces on both sides of the substrate body with patterns includes: forming through holes between the substrate bodies of the chip package, and metal bridges between the through holes connect the chip package; cutting the metal bridges to form a chip package with metal blocks protruding outward.

[0017] The step of etching the surfaces on both sides of the substrate body includes: forming the outline of the chip package; and forming the guide groove of the chip package by laser etching.

[0018] Different from the prior art, the chip package and manufacturing method provided by the present application avoid the influence of glue creeping and overflowing during packaging by setting a guide groove around the installation area. The structure is simple, and a thinner chip package structure is achieved to meet production and processing requirements and improve the production quality and efficiency of the chip package. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is a top view of the structure of an embodiment of a chip package of the present application;

[0020] Figure 2 It is a cross-sectional view of the structure of the mounted chip in one embodiment and one specific embodiment of the chip package of the present application;

[0021] Figure 3 It is a cross-sectional view of a structure in which a chip is mounted in another specific embodiment of an embodiment of a chip package of the present application;

[0022] Figure 4 is a top view of a chip mounted structure of another embodiment of the chip package of the present application;

[0023] Figure 5 is a cross-sectional view of a chip mounted structure of another embodiment of the chip package of the present application;

[0024] Figure 6 It is a flow chart of the processing steps of an embodiment of a method for manufacturing a chip package of the present application;

[0025] Figure 7 It is a flow chart of processing steps of another embodiment of the method for manufacturing a chip package of the present application;

[0026] Figure 8a to Figure 8e It is a structural schematic diagram group of processing steps of another embodiment of the manufacturing method of the chip package of the present application;

[0027] Fig. 9 It is a flow chart of processing steps of another embodiment of the method for manufacturing a chip package of the present application. DETAILED DESCRIPTION

[0028] The scheme of the embodiment of the present application is described in detail below in conjunction with the drawings of the specification.

[0029] In the following description, for the purpose of explanation rather than limitation, specific details such as specific system structures, interfaces, and technologies are provided to facilitate a thorough understanding of the present application.

[0030] The term "and / or" in this article is only a description of the association relationship of the associated objects. There can be three kinds of relationships. For example, A and / or B can be: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally means that the associated objects before and after are in an "or" relationship. In addition, "more" in this article means two or more than two.

[0031] Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present application.

[0032] The present application first provides a chip package 100. Figure 1 and Figure 2 , Figure 1 It is a top view of the structure of an embodiment of a chip package 100 of the present application; Figure 2 It is a structural cross-sectional view of an embodiment of a chip package 100 of the present application.

[0033] like Figure 1 As shown, in order to solve the above technical problems, the technical solution adopted in the present application provides a chip package 100, which is a carrier that provides electrical connection, protection, support, heat dissipation, assembly and other functions for the chip 1013, wherein the chip package 100 includes:

[0034] The substrate body 101 defines a mounting area 1011, wherein the mounting area 1011 is used to mount a chip 1013; the mounting area 1011 is larger than the mounted chip 1013; and the guide groove 102 is arranged around the mounting area 1011 to guide the mounting glue 1012 when the chip 1013 is mounted.

[0035] The chip package 100 can be a full copper substrate, a copper alloy substrate, or a copper-clad substrate. The thickness of the chip package 100 can be different, ranging from 0.1 mm to 1.5 mm. The chip package 100 can be manufactured by dry film exposure and etching, or by laser etching.

[0036] like Figure 2 As shown, the guide groove 102 can accommodate the installation glue 1012 overflowing during the installation of the chip 1013. The depth of the guide groove 102 can be one-half, one-third or one-fifth of the thickness of the chip package 100. The provision of the guide groove 102 can effectively prevent the silver glue on the side of the chip 1013 from creeping onto the front pin area of ​​the chip 1013 or overflowing to the outside of the chip package 100 due to the thin chip 1013, thereby affecting the circuit components around the chip package 100.

[0037] In a specific embodiment, the guide groove 102 is a single guide groove 102 formed around the installation area 1011 . In other embodiments, there may be two or more guide grooves 102 formed around the installation area 1011 .

[0038] In other embodiments, conductive glue other than silver glue or non-conductive glue may be used to mount the chip 1013 on the mounting area 1011 of the substrate body 101. The guide groove 102 arranged around the mounting area 1011 may also play a role in preventing the mounting glue 1012 from affecting the packaging of the chip 1013.

[0039] In an optional implementation, the area range of the mounting region 1011 is determined by the area of ​​the chip 1013 and the mounting gap, and is determined by the mounting accuracy, exposure accuracy and / or etching tolerance.

[0040] Since the chip 1013 is of different models, the area of ​​the installation area 1011 will also be different. In order to avoid the installation error affecting the use of the chip 1013, it is necessary to reserve the installation gap. Due to the installation tolerance and the different fixed silver glue, the overflow range will also be different. In addition, in order to avoid the chip package 100 in the production process, the error of etching and exposure production will affect the quality of chip 1013 installation. The installation area 1011 also needs to consider the exposure accuracy of the packaging structure pattern. The etching tolerances of the substrate body 101 with different thicknesses and the guide grooves 102 with different depths will also be different during the etching process.

[0041] like Figure 3 As shown, in an optional embodiment, the bottom of the guide groove 102 is a curved surface.

[0042] In order to improve the guiding effect of the guide groove 102 on the installation glue 1012, effectively guide the flow of fluid, reduce the impact of the fluid accumulation and collision with the groove bottom on the flow speed of the installation glue 1012 during the guidance, thereby avoiding the installation glue 1012 from accumulating at the edge of the chip 1013.

[0043] See also Figure 3 or Figure 4 , Figure 3 is a top view of the structure of another embodiment of the chip package 100 of the present application; Figure 4 It is a structural cross-sectional view of another embodiment of the chip package 100 of the present application.

[0044] The substrate body 101 defines a mounting area 1011, wherein the mounting area 1011 is used to mount a chip 1013; the mounting area 1011 is larger than the mounted chip 1013; and the guide groove 102 is arranged around the mounting area 1011 to guide the mounting glue 1012 when the chip 1013 is mounted.

[0045] The chip package 100 can be a full copper substrate, a copper alloy substrate, or a copper-clad substrate. The thickness of the chip package 100 can be different, ranging from 0.1 mm to 1.5 mm. The chip package 100 can be manufactured by dry film exposure and etching, or by laser etching.

[0046] The guide groove 102 can accommodate the installation glue 1012 overflowing during the installation of the chip 1013. The depth of the guide groove 102 can be one-half, one-third or one-fifth of the thickness of the chip package 100. The provision of the guide groove 102 can effectively prevent the silver glue on the side of the chip 1013 from creeping onto the front pin area of ​​the chip 1013 or overflowing to the outside of the chip package 100 due to the thin chip 1013, thereby affecting the circuit components around the chip package 100.

[0047] In a specific embodiment, the guide groove 102 is a single guide groove 102 formed around the installation area 1011 . In other embodiments, there may be two or more guide grooves 102 formed around the installation area 1011 .

[0048] In other embodiments, conductive glue other than silver glue or non-conductive glue may be used to mount the chip 1013 on the mounting area 1011 of the substrate body 101. The guide groove 102 arranged around the mounting area 1011 may also play a role in preventing the mounting glue 1012 from affecting the packaging of the chip 1013.

[0049] like Figure 4 As shown, in an optional implementation, the area range of the mounting region 1011 is determined by the area of ​​the chip 1013 and the mounting gap A, and is determined by the mounting accuracy, exposure accuracy and / or etching tolerance.

[0050] Since the chip 1013 is of different models, the area of ​​the installation area 1011 will also be different. In order to avoid the installation error affecting the use of the chip 1013, it is necessary to reserve the installation gap. Due to the installation tolerance and the different fixed silver glue, the overflow range will also be different. In addition, in order to avoid the chip package 100 in the production process, the error of etching and exposure production will affect the quality of chip 1013 installation. The installation area 1011 also needs to consider the exposure accuracy of the packaging structure pattern. The etching tolerances of the substrate body 101 with different thicknesses and the guide grooves 102 with different depths will also be different during the etching process.

[0051] In an optional implementation, the width of the guide groove 102 is 80-100 microns.

[0052] Depending on the size of the mounting chip 1013 , the amount of mounting glue 1012 used is also different. In order to reduce the range of the guide groove 102 , it can be 80 microns, 82 microns, 85 microns, 88 microns, 90 microns, 93 microns, 95 microns, 97 microns, and 100 microns.

[0053] In an optional embodiment, the distance B from the edge of the substrate body 101 to the outer wall of the guide groove 102 is 50 to 100 micrometers.

[0054] A certain area needs to be reserved from the edge of the substrate body 101 to the outer wall of the guide groove 102 to ensure that there is suitable clamping space for transfer or installation and to ensure the strength of the chip package 100. Specifically, the distance from the edge of the substrate body 101 to the outer wall of the guide groove 102 is 50 microns, 55 microns, 58 microns, 60 microns, 70 microns, 75 microns, 80 microns, 90 microns, 98 microns, and 100 microns.

[0055] Compared with the existing chip package 100, the chip package 100 provided with the guide groove 102 can effectively reduce the overall area of ​​the chip package 100, meet the current demand for miniaturization of the chip package 100, and during the panelization process, the same area of ​​material can be processed to produce a larger number of chip packages 100.

[0056] In an optional implementation, a metal block 103 protruding outward is formed at the edge of the chip package 100 , and the width and length of the metal block 103 are 50-100 microns.

[0057] The metal block 103 is arranged at the edge of the chip package 100 to effectively increase the heat dissipation area and improve the structural strength. In the subsequent processing of the chip package 100 , the metal block 103 can provide a better fixing point and access point for the chip package 100 .

[0058] The chip package 100 provided in the above embodiment has a guide groove arranged around the installation area to avoid the influence of glue creeping and overflowing during packaging. The structure is simple, and the same area of ​​material can be processed to produce a larger number of chip packages, thereby realizing a thinner chip package structure, meeting the production demand for the chip package to develop towards miniaturization and lightness, and improving the production quality and efficiency of the chip package.

[0059] In order to solve the above technical problems, the second aspect of the present application provides a method for manufacturing a chip package 100. The method for manufacturing the chip package 100 is used to prepare the above Figure 1 to Figure 4 The chip package 100 of any one of the items.

[0060] See also Figure 6 , Figure 6 This is a flow chart of the processing steps of an embodiment of a method for manufacturing a chip package of the present application. The manufacturing method comprises:

[0061] S101: preparing a substrate body 101; setting a mounting area 1011 on the surface of the substrate body 101; wherein the mounting area 1011 is used to mount a chip;

[0062] The substrate body 101 of the chip package 100 can be a full copper substrate, a copper alloy substrate, or a copper-clad substrate, and the thickness of the chip package 100 can be different, ranging from 0.1 mm to 1.5 mm. When processing the substrate body 101, the substrate body 101 can be made separately, or multiple substrate bodies 101 can be made through a plate-making process and then separated.

[0063] S102 : etching the surfaces of both sides of the substrate body 101 to form a guide groove 102 on the side where the mounting area 1011 is provided, and the guide groove 102 surrounds the mounting area 1011 .

[0064] Dry films are pasted on both sides of the substrate body 101 and then exposed. The pattern of the chip package 100 is transferred to the dry films using an exposure machine. The dry films that have not been cured by light are developed and removed to expose the substrate body 101 under the dry film pattern. The exposed substrate body 101 is etched using an etching solution to achieve the guide groove 102 and the shape setting of the chip package 100. Then, the exposed dry film protecting the copper surface is peeled off to form the chip package 100.

[0065] In a specific embodiment, the flow guide groove 102 of the chip package 100 can be etched separately first, and then the outer shape can be etched. When etching the outer shape structure of the chip package 100, single-sided etching or double-sided etching can be performed. In the case of double-sided etching, the etching tolerance can be effectively reduced due to the reduction in etching thickness on one side, the etching accuracy can be improved, and the product quality can be increased. The steps of applying dry film, exposing, and etching the substrate body 101 can be selected to be processed on a single side or on both surfaces at the same time. When processing both sides at the same time, the number of processing times can be effectively reduced.

[0066] The formed guide groove 102 can accommodate the mounting glue overflowing during the chip mounting process. The depth of the guide groove 102 can be one-half, one-third or one-fifth of the thickness of the chip package 100 .

[0067] In an optional embodiment, reference Figure 1 or Figure 4 In the chip package of the embodiment of the present application shown, the area range of the mounting area 1011 is determined by the chip area and the mounting gap, which is determined by the patch accuracy, exposure accuracy and / or etching tolerance. Due to different chip models, the area of ​​the mounting area 1011 will also be different. In order to avoid the error caused by the installation affecting the use of the chip, it is necessary to reserve the mounting gap. Due to the installation tolerance and the different fixed silver glue, the range of the overflow glue will also be different, and to avoid the chip package 100 in the production process, due to the error of etching and exposure production affecting the quality of chip installation, the mounting area 1011 must also consider the exposure accuracy of the packaging structure pattern. The etching tolerances produced during the etching process of the substrate body 101 with different thicknesses and the guide grooves 102 with different depths will also be different.

[0068] Please refer to Figure 7 , Figure 8a to Figure 8d , Figure 7 It is a flow chart of processing steps of another embodiment of the method for manufacturing a chip package of the present application; Figure 8a to Figure 8e This is a schematic diagram of another embodiment of the manufacturing method of the chip package of the present application. The manufacturing method includes:

[0069] S201: Figure 8aAs shown, a substrate body 101 is prepared; a mounting area 1011 is set on the surface of the substrate body 101; wherein the mounting area 1011 is used to mount a chip;

[0070] The substrate body 101 of the chip package 100 can be a full copper substrate, a copper alloy substrate, or a copper-clad substrate, and the thickness of the chip package 100 can be different, ranging from 0.1 mm to 1.5 mm. When processing the substrate body 101, the substrate body 101 can be made separately, or multiple substrate bodies 101 can be made through a plate-making process and then separated.

[0071] The steps of applying dry film, exposing, etching and removing dry film on the substrate body 101 can be performed on a single surface or on both surfaces at the same time. When both surfaces are processed simultaneously, the number of processing times can be effectively reduced.

[0072] The area range of the installation area 1011 is determined by the chip area and the installation gap, and is determined by the patch accuracy, exposure accuracy and / or etching tolerance. Due to different chip models, the area of ​​the installation area 1011 will also be different. In order to avoid the error caused by the installation affecting the use of the chip, it is necessary to reserve the installation gap. Due to the installation tolerance and the different fixed silver glue, the overflow range will also be different, and to avoid the chip package 100 in the production process, due to the error of etching and exposure production affecting the quality of chip installation, the installation area 1011 must also consider the exposure accuracy of the packaging structure pattern. The etching tolerances produced during the etching process of the substrate body 101 with different thicknesses and the guide grooves 102 with different depths will also be different.

[0073] In an optional implementation, S202: Figure 8b As shown, a pattern including the shape of the guide groove 102 and the shape of the chip package 100 is formed by developing and exposing a surface of the substrate body 101 provided with the mounting area 1011; Figure 8c As shown, a pattern including the outline of the chip package 100 is formed on a surface of the substrate body 101 opposite to the mounting area 1011 by development and exposure.

[0074] S203: Etching the surfaces of both sides of the substrate body 101 with patterns, forming a guide groove 102 on the side where the mounting area 1011 is provided, the guide groove 102 surrounds the mounting area 1011, and through holes 104 are formed between the substrate bodies 101 where the substrates are installed, and metal bridges 1041 between the through holes 104 connect the chip package 100.

[0075] When etching the outer structure of the chip package 100, single-sided etching or double-sided etching can be performed. In the case of double-sided dry film, exposure, development, and etching, the etching thickness on one side is reduced, which can effectively reduce the etching tolerance, improve the etching accuracy, and increase product quality.

[0076] In an optional embodiment, if Figure 8d As shown, multiple substrate bodies 101 are manufactured by a plate-making process and then separated. During etching, the metal bridge 1041 and the through hole 104 are formed by designing the outer shape pattern of each chip package 100 to achieve preliminary separation between the multiple substrate bodies 101. In an optional embodiment, the guide groove 102 with an arc bottom is formed by an etching process, which can effectively guide the flow of fluid and reduce the influence of the fluid on the flow speed of the mounting glue due to accumulation and collision with the groove bottom during the flow guidance, thereby avoiding the accumulation of mounting glue at the edge of the chip.

[0077] like Figure 8e As shown, S204: cutting the metal bridge 1041 to form a chip package 100 with a metal block 103 protruding outward.

[0078] The metal block 103 is arranged at the edge of the chip package 100 to effectively increase the heat dissipation area and improve the structural strength. In the subsequent processing of the chip package 100 , the metal block 103 can provide a better fixing point and access point for the chip package 100 .

[0079] Please refer to Fig. 9 , Fig. 9 It is a flow chart of processing steps of another embodiment of the method for manufacturing a chip package of the present application.

[0080] The packaging structure formed in this embodiment can refer to Figure 1 A top view of the structure of an embodiment of a chip package 100 of the present application. The manufacturing method includes:

[0081] S301: preparing a substrate body 101; setting a mounting area 1011 on the surface of the substrate body 101; wherein the mounting area 1011 is used to mount a chip;

[0082] The substrate body 101 of the chip package 100 can be a full copper substrate, a copper alloy substrate, or a copper-clad substrate, and the thickness of the chip package 100 can be different, ranging from 0.1 mm to 1.5 mm. When processing the substrate body 101, the substrate body 101 can be made separately, or multiple substrate bodies 101 can be made through a plate-making process and then separated.

[0083] S302: etching the surfaces of both sides of the substrate body 101 to form the outline of the chip package 100;

[0084] When etching the outer structure of the chip package 100, single-sided etching or double-sided etching can be performed. In the case of double-sided dry film, exposure, development, and etching, the etching thickness on one side is reduced, which can effectively reduce the etching tolerance, improve the etching accuracy, and increase product quality.

[0085] A plurality of substrate bodies 101 are manufactured by a plate-making process and then separated. During etching, the appearance pattern of each chip package 100 is formed by etching to achieve preliminary separation between the plurality of substrate bodies 101 .

[0086] In an optional embodiment, through holes 104 are formed between the substrate bodies 101 of the chip package 100, and metal bridges 1041 between the through holes 104 connect the chip package 100; the metal bridges 1041 are cut to form a chip package 100 with an outwardly protruding metal block 103. In other embodiments, the chip package 100 may not include the outer shape of the metal block 103.

[0087] S303 : forming the guide groove 102 of the chip package 100 by laser etching, wherein the guide groove 102 is formed on a side where the mounting area 1011 is provided, and the guide groove 102 surrounds the mounting area 1011 .

[0088] The guide groove 102 arranged around the installation area 1011 is made by laser, so that a high-precision processed guide groove 102 can be formed, and the use of laser-controlled etching can make the depth of the guide groove 102 and the shape of the two walls more accurate and stable, thereby improving product quality.

[0089] Through the above method, a chip package is provided. Different from the prior art, the chip package and manufacturing method provided by the present application set a guide groove around the installation area to avoid the influence of glue creeping and overflowing during packaging. The structure is simple and can adapt to different packaging technologies and materials. The same area of ​​material can be processed to produce a larger number of chip packages, realizing a thinner chip package structure, meeting the production needs of chip packages towards miniaturization and lightness, and improving the production quality and efficiency of chip packages.

[0090] In the several embodiments provided in the present application, it should be understood that the disclosed systems and devices can be implemented in other ways. For the technical solutions in the embodiments of the present application, it is obvious that the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present application. For example, the device implementation described above is only schematic. For example, the division of the modules or units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0091] It should be noted that if the embodiments of the present application involve directional indications (such as up, down, left, right, front, back...), the directional indications are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0092] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "coupled", "connected", "connected", "set", and "installed" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0093] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0094] In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the fact that they can be implemented by ordinary technicians in this field. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by this application.

[0095] The above description is only an implementation method of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly used in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A chip package, characterized in that: The chip package comprises: A substrate body, wherein the substrate body defines a mounting area, wherein the mounting area is used to mount a chip; the mounting area is larger than the mounted chip; A guide groove is arranged around the installation area to guide the installation glue when installing the chip.

2. The chip package according to claim 1, characterized in that: The area range of the mounting region is determined by the chip area and the mounting gap, and the mounting gap is determined by the chip mounting accuracy, exposure accuracy and / or etching tolerance.

3. The chip package according to claim 1, wherein: The bottom of the guide groove is a curved surface.

4. The chip package according to claim 1, wherein: The width of the guide groove is 80 to 100 microns.

5. The chip package according to claim 1, wherein: The chip package according to claim 1, characterized in that the distance from the edge of the substrate body to the outer wall of the guide groove is 50 to 100 microns.

6. The chip package according to claim 1, wherein: A metal block protruding outward is formed on the edge of the chip package, and the width and length of the metal block are 50-100 microns respectively.

7. A method for manufacturing a chip package, characterized in that: The chip package manufacturing method is used to prepare the chip package according to any one of claims 1 to 6, and the manufacturing method comprises: Prepare a substrate body; set a mounting area on the surface of the substrate body; wherein the mounting area is used to mount a chip; Etching the surfaces of both sides of the substrate body; A guide groove is formed on a side where the installation area is provided, and the guide groove surrounds the installation area.

8. The method according to claim 7, characterized in that: The step of etching the surfaces on both sides of the substrate body comprises: A pattern including the shape of the guide groove and the shape of the chip package is formed by developing and exposing on a side of the substrate body where the mounting area is provided; A pattern including the outline of the chip package is formed by developing and exposing a surface of the substrate body opposite to the mounting area; The surfaces on both sides of the substrate body with the pattern formed thereon are etched.

9. The manufacturing method according to claim 8, characterized in that: The step of etching the surfaces on both sides of the substrate body having the pattern formed thereon comprises: Through holes are formed between the substrate bodies of the chip package, and metal bridges between the through holes connect the chip package; The metal bridge is cut to form the chip package with metal blocks protruding outward.

10. The manufacturing method according to claim 7, characterized in that: The step of etching the surfaces on both sides of the substrate body comprises: forming an outer contour of the chip package; The guide groove of the chip package is formed by laser etching.

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