Packaging substrate and manufacturing method thereof

Abstract

The present invention provides a packaging substrate and a manufacturing method thereof. The packaging substrate includes a circuit structure having a ball implant side and a build-up side opposite to each other, a wiring structure formed on the build-up side of the circuit structure, and a fixing structure extending from the circuit structure and penetrating the wiring structure, so as to avoid interlayer delamination problems of the packaging substrate and improve the yield and reliability of the packaging substrate.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor packaging technology, and more particularly to a packaging substrate capable of preventing delamination and a manufacturing method thereof. Background Art

[0002] With the booming development of the electronics industry, electronic products tend to be thinner, lighter, shorter and smaller in shape, and their functions are developing towards high performance, high functionality and high speed. Therefore, in order to meet the needs of high integration and miniaturization of semiconductor devices, packaging substrates with high-density wiring, thinness and low warpage are often used in the packaging process.

[0003] However, in the existing manufacturing method of packaging substrates, in order to achieve high integration and high functionality, the packaging substrate has a multi-layer wiring structure, including a dielectric layer that is heterogeneous with the substrate, and there is a risk of delamination in a high temperature or humid environment. For example, due to the difference in the thermal expansion coefficient (CTE) between the dielectric material and the substrate, the material will expand and contract unevenly, and local bubbling and stratification will occur after being heated; or when the substrate process is heated, the moisture is converted into steam and penetrates between the substrate layers. The internal steam pressure weakens the bonding force between the two interfaces, and it is also easy to cause dielectric material delamination, affecting the reliability of the substrate and the life of the product. In particular, when mass-producing the entire panel substrate, it is difficult to ensure the yield of each substrate unit.

[0004] In addition, the existing method of manufacturing a packaging substrate with a core layer generally adopts a symmetrical process, which is difficult to meet the thinning requirements when a multi-layer wiring structure needs to be added; but if thinning is to be implemented and asymmetric layers are only added on one side of the core layer, the problem of substrate warping may be faced, and the different structures on both sides of the core layer will increase the difficulty of the process, which is not conducive to reducing production costs.

[0005] Therefore, how to overcome the above-mentioned problems of the prior art has become a topic that needs to be solved urgently. Summary of the invention

[0006] An object of the present invention is to provide a packaging substrate and a manufacturing method thereof to solve at least one of the above problems.

[0007] In view of the defects of the above-mentioned prior art, the present disclosure provides a packaging substrate, including: a circuit structure, a wiring structure and a fixed structure. The circuit structure has a relative ball implantation side and a layer build-up side, and the circuit structure includes: a core layer, having a relative first side and a second side, a plurality of through holes connecting the first side and the second side, and at least one fixed hole; a bonding layer, formed on the first side and the second side of the core layer, the through hole and the wall surface of the fixed hole; a plurality of conductive pillars formed in each of the through holes; and a circuit layer, formed on the relative first side and the second side of the core layer and electrically connected to the conductive pillars, wherein the first side corresponds to the ball implantation side, and the second side corresponds to the layer build-up side. The fixed structure includes a support portion formed in the fixed hole, an extension portion located in the wiring structure and correspondingly formed on the support portion, so that the fixed structure extends from the circuit structure through the wiring structure.

[0008] In a specific embodiment of the packaging substrate disclosed in the present invention, the circuit structure also includes an insulating layer formed on the bonding layer and filled into the multiple through-holes and the fixing holes, wherein the multiple conductive columns penetrate the insulating layer in the multiple through-holes, and the fixing structure penetrates the insulating layer.

[0009] In a specific embodiment of the package substrate disclosed in the present invention, the fixing structure includes a plurality of fastening portions formed on the extension portion and between the support portion and the extension portion, and the width of the fastening portion between the support portion and the extension portion is greater than the diameter of the support portion.

[0010] In a specific embodiment of the package substrate disclosed in the present invention, the outermost wiring layer on the build-up layer side has a plurality of electrical contact pads, and the width of the plurality of electrical contact pads is smaller than the width of the plurality of fastening portions.

[0011] In a specific embodiment of the package substrate disclosed in the present invention, the package substrate further includes a plurality of solder mask layers, which are respectively formed on the outermost sides of the circuit structure and the wiring structure to cover the fastening portion of the outermost wiring layer.

[0012] In a specific embodiment of the package substrate disclosed in the present invention, the bonding layer is an organic coating or an inorganic coating. For example, the material forming the organic coating is a polymer, and the thickness of the organic coating is 1 nanometer to 100 micrometers. The polymer is selected from at least one of the group consisting of polyoxyxylene, polyamide and polyparaxylene.

[0013] In a specific embodiment of the package substrate disclosed in the present invention, the material forming the inorganic coating layer includes silica sand with a diameter of 20 to 50 micrometers and a roughness Ra of 1 to 200 micrometers.

[0014] In a specific embodiment of the package substrate disclosed in the present invention, the insulating layer includes a dielectric material or an ink material. For example, the dielectric material is selected from at least one of the group consisting of polybenzoxazole (PBO), polyimide (PI), prepreg (PP) and ABF film (Ajinomoto Build-up Film ABF), and the ink material includes epoxy ink composites.

[0015] In a specific embodiment of the package substrate disclosed in the present invention, the ink material has a viscosity of 25 to 55 Pa.s and a glass transition temperature (Tg) of 145 to 180°C.

[0016] In a specific embodiment of the package substrate disclosed in the present invention, the fixing structure is in a rivet shape, a grid shape or a frame.

[0017] The present disclosure also provides a method for manufacturing a packaging substrate unit, including: providing a circuit structure having a relative ball implantation side and a build-up layer side; forming a wiring structure on the build-up layer side of the circuit structure; and forming a fixing structure. Specifically, the circuit structure includes: a core layer having a relative first side and a second side, a plurality of through-holes connecting the first side and the second side, and at least one fixing hole; a bonding layer formed on the first side and the second side of the core layer, the through-holes, and the walls of the fixing holes; a plurality of conductive pillars formed in each of the through-holes and a supporting portion formed in the fixing holes; and a circuit layer formed on the relative first side and the second side of the core layer and electrically connected to the conductive pillars, wherein the first side corresponds to the ball implantation side, and the second side corresponds to the build-up layer side. An extension portion corresponding to the supporting portion is formed in the wiring structure to form a fixing structure extending from the circuit structure through the wiring structure, including a supporting portion formed in the fixing hole and an extension portion located in the wiring structure and correspondingly formed on the supporting portion.

[0018] In a specific embodiment of the method for manufacturing a packaging substrate disclosed in the present invention, the method also includes combining the two ball implanting sides of the circuit structure on opposite sides of a carrier before forming the wiring structure, and then removing the carrier after forming the wiring structure on the layer-building side of the circuit structure to perform a singulation process to obtain multiple packaging substrates.

[0019] In a specific embodiment of the method for manufacturing the packaging substrate disclosed in the present invention, the steps of making the circuit structure include forming a bonding layer on the first side and the second side of the core layer, on the wall surfaces of the through-holes and the fixing holes; forming an insulating layer on the bonding layer and filling the multiple through-holes and the fixing holes; and forming multiple conductive columns of the insulating layer passing through the multiple through-holes and forming a support portion of the insulating layer passing through the fixing holes.

[0020] In a specific embodiment of the method for manufacturing the packaging substrate disclosed in the present invention, the method also includes forming a plurality of fastening portions on the extension portion and between the support portion and the extension portion after forming the support portion and after forming the extension portion, and the width of the fastening portion between the support portion and the extension portion is greater than the diameter of the support portion.

[0021] In a specific embodiment of the method for manufacturing a package substrate disclosed in the present invention, the outermost wiring layer on the build-up layer side has a plurality of electrical contact pads, and the width of the plurality of electrical contact pads is smaller than the width of the plurality of fastening portions.

[0022] In a specific embodiment of the method for manufacturing the package substrate disclosed in the present invention, the method further includes forming a solder mask layer on the outermost sides of the circuit structure and the wiring structure respectively to cover the fastening portion of the outermost wiring layer.

[0023] In a specific embodiment of the method for manufacturing a package substrate disclosed in the present invention, the bonding layer is an organic coating or an inorganic coating. For example, the material forming the organic coating is a polymer, and the thickness of the organic coating is 1 nanometer to 100 micrometers. The polymer is selected from at least one of the group consisting of polyoxyxylene, polyamide and polyparaxylene.

[0024] In a specific embodiment of the method for manufacturing a package substrate disclosed in the present invention, the material forming the inorganic coating layer includes silica sand with a diameter of 20 to 50 micrometers and a roughness Ra of 1 to 200 micrometers.

[0025] In a specific embodiment of the method for manufacturing the package substrate disclosed in the present invention, the insulating layer includes a dielectric material or an ink material. For example, the dielectric material is selected from at least one of the group consisting of polybenzoxazole (PBO), polyimide (PI), prepreg (PP) and ABF film (Ajinomoto Build-up Film ABF), and the ink material includes epoxy ink composites.

[0026] In a specific embodiment of the method for manufacturing a package substrate disclosed in the present invention, the ink material has a viscosity of 25 to 55 Pa.s and a glass transition temperature (Tg) of 145 to 180°C.

[0027] In a specific embodiment of the method for manufacturing a package substrate disclosed in the present invention, the fixing structure is in a rivet shape, a grid shape or a frame.

[0028] According to the present disclosure, the wiring structure includes at least one dielectric layer; at least one wiring layer formed on the dielectric layer; and a plurality of conductive blind holes arranged in the dielectric layer, so that the conductive blind holes electrically connect the wiring layer and the line layer, and the extension portion is located in the dielectric layer and is correspondingly formed on the support portion, and when there are multiple dielectric layers and wiring layers, each of the dielectric layers can be formed with an extension portion that overlaps each other up and down.

[0029] In addition, the packaging substrate disclosed in the present invention may be a full-page substrate, including a plurality of substrate strips or a form in which the full-page substrate is composed of a plurality of substrate strips, and each substrate strip has a plurality of packaging substrate units arranged in an array or spaced apart. Based on this, the packaging substrate disclosed in the present invention may also be a substrate strip or a packaging substrate unit. The fixed structure may be formed at the periphery of each packaging substrate unit, the periphery of each substrate strip and / or the periphery of the full-page substrate, and may also be formed between any two adjacent packaging substrate units or between any two adjacent substrate strips. In addition, the packaging substrate unit is generally defined with a wiring area and a peripheral area surrounding the wiring area. In addition to being formed in the peripheral area, the fixed structure may also be formed in the wiring area, as long as the fixed structure is not electrically connected to the circuit layer, the conductive column and the wiring layer.

[0030] As can be seen from the above, in the packaging substrate and its manufacturing method disclosed in the present invention, the dielectric layer is tightly adhered to the core layer mainly by means of a fixed structure. When the packaging substrate has multiple dielectric layers, the adhesion between the layers in the dielectric layer is enhanced, and the risk of dielectric layer delamination can be reduced regardless of the production process or reliability testing.

[0031] Secondly, the number, shape and layout of the fixing structure can be configured according to the packaging substrate layout to achieve an excellent fastening effect.

[0032] Furthermore, the fixed structure of the present disclosure is applicable to various core layers and dielectric materials, and is not limited by the substrate material. For example, the core layer can be made of organic material, glass, ceramic or any composite material that can form perforations; the dielectric layer can be made of PP, ABF or any composite material that can form perforations.

[0033] In addition, the present invention uses the circuit structure with the core layer as the ball implanting side to reduce the number of layers of the packaging substrate. Therefore, compared with the prior art, the total thickness of the packaging substrate is conducive to being thinned; and by simultaneously adding layers on both sides of the carrier, the problem of warping of the asymmetric substrate is effectively avoided, thereby achieving double production efficiency.

[0034] In addition, the present invention uses the bonding layer to strengthen the adhesion between the insulation layer, the core layer and the perforated surface, thereby further avoiding the delamination problem of the insulation layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1A , Figure 1B , Figure 1C , Figure 1D , Figure 1E and Figure 1F It is a cross-sectional schematic diagram of a first embodiment of a method for manufacturing a packaging substrate unit disclosed in the present invention.

[0036] Figure 1A-1 A cross-sectional schematic diagram showing that when the core layer is a high-hardness substrate, the bonding layer of the organic coating penetrates into the cracks of the core layer.

[0037] Figure 1E-1 It is a cross-sectional schematic diagram of a packaging substrate unit having a wiring structure of a multi-layer structure according to the first embodiment of the present disclosure.

[0038] Figure 2A and Figure 2B It is a top view schematic diagram of the rivet-shaped fixing structure of the full-page substrate and the package substrate unit disclosed in the present invention.

[0039] Figure 2C and Figure 2D It is a top view schematic diagram of the grid-shaped fixing structure of the full-page substrate and the package substrate unit disclosed in the present invention.

[0040] Figure 2E and Figure 2F It is a top view schematic diagram of the frame-shaped fixing structure of the full-page substrate and the package substrate unit disclosed in the present invention.

[0041] FIG. 3A to FIG. 3C It is a cross-sectional schematic diagram of a second embodiment of the method for manufacturing a packaging substrate unit disclosed in the present invention.

[0042] FIG. 4A to FIG. 4C It is a cross-sectional schematic diagram of a third embodiment of the method for manufacturing a packaging substrate unit disclosed in the present invention.

[0043] The reference numerals are as follows: 1,4,5 Package substrate unit 1a Line structure 10 Core Layer 10a First side 10b Second side 100 Perforation 101 Fixing hole 11. Binding layer 120 Through hole 121 Fixed through hole 111 Crack 12,42 Insulation layer 13 Conductive column 14 Circuit layer 15 Wiring Structure 150 Dielectric layer 151 Wiring Layer 152 Conductive blind vias 16 Solder mask 160 Opening 17,18 Electrical contact pads 19 Solder balls 2 base strips 2a,2a',2a'',2a''' Fixed structure 21 Support 22 Fastening part 23 Extension 3 Full-page substrate 52 Conductive layer 7 Bearing D,D F ,D V width P Spacing R,R F diameter. DETAILED DESCRIPTION

[0044] The following describes the implementation of the present disclosure by means of specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present disclosure from the contents disclosed in this specification.

[0045] It should be noted that the structures, proportions, sizes, etc. shown in the drawings attached to this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of the present disclosure, so they have no substantial technical significance. Any modification of the structure, change in the proportional relationship, or adjustment of the size, without affecting the effects and purposes that can be achieved by the present disclosure, should still fall within the scope of the technical contents disclosed in the present disclosure. At the same time, the terms such as "upper", "inner", "outer", "one", etc. cited in this specification are only for the convenience of description, and are not used to limit the scope of the implementation of the present disclosure. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of the present disclosure without substantially changing the technical contents.

[0046] Figures 1A to 1F It is a cross-sectional schematic diagram of a method for manufacturing a packaging substrate using the packaging substrate unit 1 as an example according to the present disclosure.

[0047] First, according to Figure 1A and Figure 1B Prepare a circuit structure. Figure 1AAs shown, a core layer 10 is provided, which has a first side 10a and a second side 10b opposite to each other, a plurality of through holes 100 connecting the first side 10a and the second side 10b, and at least one fixing hole 101. In order to improve the adhesion between the core layer 10 and the subsequently formed insulating layer, a bonding layer 11 is first formed on the first side 10a and the second side 10b of the core layer 10 and the walls of the through holes 100 and the fixing holes 101, and then the insulating layer 12 is bonded by the bonding layer 11, and a plurality of through holes 120 corresponding to each of the through holes 100 and a fixing through hole 121 corresponding to the fixing hole 101 are formed on the insulating layer 12.

[0048] In this embodiment, the core layer 10 can be made of any perforated substrate, such as an organic material or a high-hardness substrate such as glass, ceramic, SiC, AlO 2 or a composite material.

[0049] Furthermore, the bonding layer 11 may be an organic coating formed by a chemical process, for example, depositing an organic polymer such as polyphenylene oxide (PPO), polyamide (Polyamide) or poly-dimethylbenzene (PD). Furthermore, a thinner organic coating may be formed by a chemical vapor deposition (CVD) method to improve isolation, corrosion resistance and protection of the surface of the core layer 10, and the thickness thereof may be, for example, 1 nanometer to 100 micrometers, and the organic coating may penetrate into the cracks to limit the expansion of the cracks. Figure 1A-1 As shown, the organic coating bonding layer 11 penetrates into cracks 111 of, for example, the glass core layer 10 and reduces the dielectric constant (Dk) of the core layer 10 to 2.5 to 5 (1 GHz), for example, 2.5, 2.65, 2.7, 2.8, 2.9, 3.0, 3.2, 3.5, 3.7, 4.0, 4.2, 4.5, 4.7 and 5.0 (1 GHz).

[0050] On the other hand, the bonding layer 11 may also be an inorganic coating formed by a physical process to form a Van der Waals force. For example, using silica sand with a diameter of 20 to 50 microns and a roughness Ra of 1 to 200 microns for sandblasting can not only remove oxides and impurities on the core layer 10, but also increase the surface area of ​​the core layer 10, thereby helping to improve the adhesion of the insulating layer 12 formed on the core layer 10. Therefore, in a specific embodiment, the bonding layer 11 is formed by silica sand with a diameter of 20 to 50 microns and a roughness Ra of 1 to 200 microns.

[0051] In this embodiment, the insulating layer 12 is a dielectric material, such as polybenzoxazole (PBO), polyimide (PI), prepreg (PP), ABF film (Ajinomoto Build-up Film) or other dielectric materials. The insulating layer 12 can be combined with the bonding layer 11 by lamination or coating, and filled into the plurality of through holes 100 and the fixing hole 101 to cover the core layer 10.

[0052] In addition, the through hole 100 and the fixing hole 101 are straight-cylindrical, and the through hole 120 and the fixing through hole 121 are double-conical holes such as hourglass shapes. For example, a plurality of through holes 100 and the fixing holes 101 are formed simultaneously by laser, and then the through holes 120 and the fixing through holes 121 are formed simultaneously in the insulating layer 12 in the same manner.

[0053] like Figure 1B As shown, a conductive column 13 is formed in each through hole 120, and a patterning process is performed to form a circuit layer 14 electrically connected to the conductive column 13 on the insulating layer 12 on opposite sides of the core layer 10, so as to form a circuit structure 1a. In addition, a support portion 21 is formed in the fixing through hole 121 (the insulating layer 12 in the fixing hole 101), and a fastening portion 22 is formed on the insulating layer 12 corresponding to the support portion 21.

[0054] In this embodiment, the conductive column 13 and the support portion 21 can be formed simultaneously by plating metal (such as copper), but the support portion 21 is a partial structure of the fixed structure and needs to be formed outside the layout position of the circuit layer 14 and is not electrically connected to the circuit layer 14. However, the fastening portion 22 can be formed thereon when the support portion 21 is formed.

[0055] Furthermore, the first side 10a of the circuit structure 1a corresponds to the ball implantation side, so the circuit layer 14 on the ball implantation side is used as the electrical contact pad 17, and the second side 10b of the circuit structure 1a corresponds to the build-up layer side.

[0056] In addition, the diameter R of the through hole 100 may be smaller or larger than the diameter R of the fixing hole 101. F The width D of the electrical contact pad 17 may be smaller or larger than the width D of the fastening portion 22. F , only the fastening portion 22 needs to extend from around the top of the supporting portion 21 and cover a portion of the insulating layer 12 , so as to tightly fix the insulating layer 12 on the core layer 10 .

[0057] like Figure 1C As shown, two circuit structures 1 a are respectively combined on opposite sides of a carrier 7 , wherein the circuit structure 1 a is combined with the carrier 7 at its ball implanting side.

[0058] In this embodiment, the carrier 7 is a double-capacity adhesive material, such as a double-sided adhesive thermal release film, so that the circuit structure 1a is pressed on both sides of the carrier 7 respectively, so that the circuit layer 14 of the ball implanting side of the circuit structure 1a is buried in the carrier 7.

[0059] like Figure 1D As shown, a wiring structure 15 electrically connected to the wiring layer 14 is formed on the build-up side of each wiring structure 1a. In addition, a plurality of extensions 23 are formed in the wiring structure 15 corresponding to the support portion 21, and a plurality of fastening portions 22 are formed corresponding to each of the extensions 23 to form a fixing structure 2a extending from the wiring structure 1a through the wiring structure 15, including the support portion 21 formed in the fixing hole 101 and the extension portion 23 located in the wiring structure 15 and correspondingly formed on the support portion 21. In addition, the fixing structure 2a includes a plurality of fastening portions 22 formed on the extension portion 23 and between the support portion 21 and the extension portion 23, and the width D of the fastening portion 22 between the support portion 21 and the extension portion 23 is F is larger than the diameter R of the support portion 21 or the fixing hole F ,like Figure 1B shown.

[0060] In this embodiment, the wiring structure 15 includes at least one dielectric layer 150 formed on the insulating layer 12, at least one wiring layer 151 formed on the dielectric layer 150, and a plurality of conductive blind vias 152 formed in the dielectric layer 150, so that the conductive blind vias 152 electrically connect the wiring layer 151 and the circuit layer 14. For example, a wiring structure 15 with a redistribution layer (RDL) specification is manufactured by a build-up process by electroplating metal (such as copper) or other methods.

[0061] Furthermore, the extension portion 23 of the fixed structure 2a may be cone-shaped and may be formed by plating metal material at the same time as the conductive blind hole 152, but it is only a partial structure of the fixed structure 2a and is not electrically connected to the wiring layer 151. In addition, when forming the extension portion 23, a fastening portion 22 may be formed thereon, wherein the fastening portion 22 needs to extend from the top of the extension portion 23 and cover a portion of the dielectric layer 150 to tightly fix the dielectric layer 150 on the insulating layer 12. In a specific embodiment, the wiring structure 15 has a plurality of dielectric layers 150, so a plurality of the extension portions 23 are formed in each of the dielectric layers 150, and a fastening portion 22 is formed on the extension portion 23 of each layer to tightly fix the dielectric layers 150 of each layer to each other.

[0062] In addition, the dielectric layer 150 may be ABF film (Ajinomoto Build-up Film) material or other dielectric materials, and its material may be the same as or different from the insulating layer 12. Furthermore, the wiring layer 151, the extension portion 23 of the fixing structure 2a, and the fastening portion 22 are all made of metal such as copper.

[0063] like Figure 1E As shown, the carrier 7 is removed to expose the circuit layer 14 on the ball implant side, and then a solder mask 16 is formed on the outermost side of the wiring structure 15, the circuit layer 14 on the ball implant side, and both ends of the outermost fastening portion 22 of the fixing structure 2a. Next, the whole-panel substrate is singulated to obtain a plurality of package substrate units 1.

[0064] In this embodiment, the solder mask 16 is formed with a plurality of openings 160, so that the circuit layer 14 on the implant side and the outermost portion of the wiring layer 151 are exposed to the solder mask 16, which are used as electrical contact pads 17, 18. In addition, the fixing structure 2a is not used as an electrical connection, so the fastening portion 22 does not expose the solder mask 16. Of course, the fastening portion 22 can also expose the solder mask 16 as needed. In a specific embodiment, the width D of the plurality of electrical contact pads 18 on the outermost side of the wiring structure 15 is V is smaller than the width D of the plurality of electrical contact pads 17 of the wiring layer 14. Also, the width D of the plurality of electrical contact pads 18 on the outermost side of the wiring structure 15 is V is also smaller than the width D of the plurality of fastening portions 22 of the fixing structure 2a. F To ensure that the fastening portion 22 can provide sufficient clamping force to the dielectric layer 150 to prevent delamination.

[0065] Furthermore, the electrical contact pad 17 of the circuit layer 14 is used as a ball planting pad, so that the package substrate unit 1 forms a ball grid array package. For example, the specifications of the circuit structure 1a, such as the width (such as diameter) D of the electrical contact pad 17, the spacing P between the conductive pillars 13 and the diameter R of the through hole 100, are designed in accordance with the requirements of the ball grid array package, that is, the circuit structure 1a has only the circuit layer 14 (or the electrical contact pad 17) disposed on the side of the ball planting pad, and no wiring is made on the top.

[0066] like Figure 1E-1 As shown, the fixing structure 2a can be used to fix a multi-layer wiring structure 15, the number of layers of which can be increased according to wiring requirements without limitation. The wiring structure 15 has a plurality of dielectric layers 150, so a fastening portion 22 and an extension portion 23 are formed on each corresponding layer to ensure tight adhesion between the dielectric layers 150.

[0067] like Figure 1FAs shown, a plurality of solder balls 19 electrically connecting the outermost wiring layer 151 and the circuit layer 14 on the implanting side can be combined on the electrical contact pads 17, 18, so that the package substrate unit 1 can be connected to an electronic device such as a semiconductor chip, a passive component, a silicon interposer, a circuit board or other components through the solder balls 19 (not shown).

[0068] FIG. 2A to FIG. 2F It is a top view schematic diagram of the fixing structure 2a of the full-page substrate 3 and the package substrate unit 1 of the present disclosure.

[0069] like Figure 2A As shown, the fixing structures 2a can be distributed at intervals around the periphery of each packaging substrate unit 1 and the edge of the whole-panel substrate 3 to form rivet-shaped fixing structures 2a' scattered around the periphery of each packaging substrate unit 1 and the periphery of the whole-panel substrate 3.

[0070] In the mass production process, the full-page substrate 3 is composed of a plurality of substrate strips 2 arranged in an array, and each of the substrate strips 2 is composed of a plurality of package substrate units 1, so a full-page substrate 3 includes a plurality of package substrate units 1. That is, a full-page substrate 3 can manufacture a plurality of package substrate units 1 at the same time. After the manufacture is completed, a singulation process is performed to remove the edge strips of the substrate strip 2, and then the substrate strip 2 is cut to obtain a plurality of package substrate units 1.

[0071] In this embodiment, the rivet-shaped fixing structure 2a' is arranged around each substrate strip 2 and the periphery of the entire substrate 3. The rivet-shaped fixing structure 2a' has flexibility in arrangement, and its position and number are not limited and can be selected arbitrarily according to process requirements. For example, the fixing structure 2a can be formed only on the edge of the entire substrate 3 to ensure that the dielectric layer 150 is stabilized during the packaging substrate manufacturing process.

[0072] Figure 2B for Figure 2A The enlarged view of the periphery of the package substrate unit 1 shows that a rivet-shaped fixing structure 2a' is formed inside and outside each package substrate unit 1 to maintain the tightness of the dielectric layer 150 after the package substrate unit 1 is cut.

[0073] like Figure 2C As shown, the fixing structure 2 a ″ can form a grid-shaped or long strip-shaped fixing structure 2 a ″ at the periphery of each packaging substrate unit 1 and the edge portion of the whole-format substrate 3 .

[0074] Figure 2D for Figure 2C As shown in the enlarged view of the periphery of the packaging substrate unit 1, fixed structures 2a of different shapes can be formed simultaneously. For example, the interior of the packaging substrate unit 1 is a rivet-shaped fixed structure 2a', and the periphery of the packaging substrate unit 1 is a grid-shaped fixed structure 2a'' to meet the wiring requirements within the packaging substrate unit 1.

[0075] Different from the aforementioned fixed structure 2a' or fixed structure 2a'', the number of the fixed structure is multiple, such as Figure 2E The fixing structure 2 a ′″ is a frame, and is completely interconnected at the periphery of each packaging substrate unit 1 and the board edge of the full-panel substrate 3 to further prevent moisture from entering the packaging substrate unit 1 .

[0076] Figure 2F for Figure 2E The enlarged view of the periphery of the packaging substrate unit 1 shows that the interior of the packaging substrate unit 1 is a plurality of rivet-shaped fixing structures 2a', and the periphery of the packaging substrate unit 1 is a frame-shaped fixing structure 2a'''.

[0077] FIG. 3A to FIG. 3C Schematic diagram of the cross section of the manufacturing method of the package substrate unit 4 of the present disclosure. The difference between this embodiment and the first embodiment is only in the material of the insulating layer, so the same points will not be repeated below.

[0078] like Figure 3A As shown, the insulating layer 42 is an ink material formed by filling methods such as injection, plugging or coating. For example, after the paste ink material is injected into the through hole 100, it is heated for several hours to cross-link the molecules in the ink material and evaporate the solvent. After the ink is solidified, it is polished and leveled with a ceramic roller so that the ink is evenly coated on the surfaces of the opposite sides of the core layer 10 and tightly adheres to the bonding layer 11 on the core layer 10.

[0079] In this embodiment, the ink material mainly includes epoxy ink composites, which have physical properties such as viscosity of 25 to 55 Pa.s, glass transition temperature (Tg) of 145 to 180°C and / or Young's modulus of 3 to 10 GPa. Therefore, by filling the through-holes 100 of the core layer 10 with injection ink (plugging ink), the cost of process and material consumption can be reduced.

[0080] like Figure 3B As shown, continue as Figure 1B The process shown will obtain another type of packaging substrate unit 4.

[0081] like Figure 3C As shown, solder balls 19 can be combined on the electrical contact pads 17 and 18 so that the package substrate unit 4 can be connected to an electronic device such as a semiconductor chip, a passive component, a silicon interposer, a circuit board or other components (not shown) through a plurality of solder balls 19 .

[0082] FIG. 4A to FIG. 4CThe cross-sectional view of the manufacturing method of the package substrate unit 5 disclosed in the present invention is shown in FIG. The only difference between this embodiment and the first embodiment is that this embodiment does not include an insulating layer, so the similarities will not be described in detail below.

[0083] like Figure 4A As shown, a conductive layer 52 is formed on the bonding layer 11 at opposite sides of the core layer 10 and the walls of each through hole 100 , wherein the conductive layer 52 can be a metal layer such as copper to serve as a barrier and a seed layer.

[0084] like Figure 4B As shown, the continuation is similar Figure 1B The process is similar to that of the present invention, but the plurality of conductive pillars 13 and the supporting portions 21 are directly formed in each of the through holes 100 and the fixing holes 101 to obtain the package substrate unit 5.

[0085] like Figure 4C As shown, solder balls 19 can be combined on the electrical contact pads 17 and 18 so that the package substrate unit 5 can be connected to an electronic device such as a semiconductor chip, a passive component, a silicon interposer, a circuit board or other components (not shown) through a plurality of solder balls 19 .

[0086] Therefore, the packaging substrate units 1, 4, 5 and their manufacturing methods disclosed in the present invention mainly use the fixing structure 2a to make the dielectric layer 150 tightly adhere to the core layer 10 and enhance the adhesion between the layers in the dielectric layer 150, thereby reducing the risk of delamination of the dielectric layer 150 in both the production process and reliability testing.

[0087] Secondly, the number, shape and layout position of the fixing structure 2a can be configured according to the layout of the packaging substrate units 1, 4, 5. Whether it is a rivet-shaped fixing structure 2a', a grid-shaped fixing structure 2a'' or a frame-shaped fixing structure 2a''', it can surround the packaging substrate units 1, 4, 5, the substrate strip 2 and the edge of the entire substrate 3 as needed to achieve an excellent fastening effect.

[0088] In addition, the surface of the circuit structure 1a corresponding to the first side 10a of the core layer 10 is used as the ball planting side to reduce the number of layers of the packaging substrate units 1, 4, and 5. Therefore, compared with the prior art, the total thickness of the packaging substrate units 1, 4, and 5 is conducive to thinning; and because the layers are added on both sides of the carrier 7 at the same time, the problem of warping of the asymmetric substrate is effectively avoided, and double production efficiency is achieved.

[0089] In addition, the present disclosure uses the bonding layer 11 to strengthen the adhesion between the insulating layer 12 and the core layer 10 and the surface of the through hole 100, thereby further avoiding the delamination problem of the insulating layer 12.

[0090] The present disclosure also provides a packaging substrate unit 1, 4, 5, including: a circuit structure 1a, a wiring structure 15 and a fixing structure 2a.

[0091] The circuit structure 1a includes a core layer 10 having a first side 10a and a second side 10b opposite to each other, a plurality of through holes 100 connecting the first side 10a and the second side 10b and at least one fixing hole 101, a bonding layer 11 formed on the first side 10a and the second side 10b of the core layer 10 and on the walls of the through holes 100 and the fixing holes 101, a plurality of conductive pillars 13 formed in each of the through holes 100, and a circuit layer 14 formed on the first side 10a and the second side 10b opposite to each other of the core layer 10 and electrically connected to the conductive pillars 13, wherein the first side 10a of the circuit structure 1a corresponds to the ball implantation side, and the second side 10b corresponds to the build-up layer side.

[0092] The wiring structure 15 is arranged on the build-up side of the circuit structure 1a, and includes at least one dielectric layer 150, at least one wiring layer 151 formed on the dielectric layer 150, and a plurality of conductive blind holes 152 arranged in the dielectric layer 150, so that the conductive blind holes 152 electrically connect the wiring layer 151 and the circuit layer 14.

[0093] The fixing structure 2a passes through the circuit structure 1a and the wiring structure 15, and includes a supporting portion 21 formed in the fixing hole 101, an extending portion 23 located in the wiring structure 15 and correspondingly formed on the supporting portion 21, and a plurality of fastening portions 22 formed on each of the extending portions 23 and between the supporting portion 21 and the extending portion 23, and the fastening portion 22 extends to a portion of the dielectric layer 150 and / or the insulating layer 12.

[0094] In one embodiment, the circuit structure 1a also includes an insulating layer 12 formed on the bonding layer 11 and filled into the multiple through-holes 100 and the fixing holes 101, and the insulating layer 12 has multiple through-holes 120 corresponding to each of the through-holes 100 and fixed through-holes 121 corresponding to the fixing holes 101, so that the multiple conductive columns 13 penetrate the insulating layer 12 in the multiple through-holes 100, and the fixed structure 2a penetrates the insulating layer 12 in the fixing holes 101.

[0095] In one embodiment, the circuit layer 14 on the ball implant side and the outermost wiring layer 151 on the build-up layer side respectively have a plurality of electrical contact pads 17 and 18, and the width D of the plurality of electrical contact pads 18 of the outermost wiring layer 151 is V Smaller than the width D of the plurality of electrical contact pads 17 of the circuit layer 14 .

[0096] In one embodiment, the width D of the plurality of electrical contact pads 18 of the outermost wiring layer 151 is V smaller than the width D of the plurality of fastening portions 22 of the fixing structure 2aF .

[0097] In one embodiment, the circuit structure 1a and the wiring structure 15 are respectively formed with solder mask 16 on the outermost sides, wherein the plurality of electrical contact pads 17, 18 of the circuit layer 14 and the outermost wiring layer 151 are exposed to the solder mask 16, and the fastening portion 22 is not exposed to the solder mask 16. Of course, the fastening portion 22 may also be exposed to the solder mask 16 as needed.

[0098] In one embodiment, the bonding layer 11 is an organic coating or an inorganic coating.

[0099] In one embodiment, the material forming the organic coating is a polymer.

[0100] In one embodiment, the polymer is selected from at least one of the group consisting of polyoxyxylene, polyamide and polyparaxylene.

[0101] In one embodiment, the thickness of the organic coating is 1 nanometer to 100 micrometers.

[0102] In one embodiment, the material forming the inorganic coating includes silica sand with a diameter of 20 to 50 micrometers and a roughness Ra of 1 to 200 micrometers.

[0103] In one embodiment, the insulating layers 12 , 42 include dielectric materials or ink materials.

[0104] In one embodiment, the dielectric material is selected from at least one of the group consisting of polybenzoxazole (PBO), polyimide (PI), prepreg (PP) and ABF film (Ajinomoto Build-up Film), and the ink material includes epoxy ink composites.

[0105] In one embodiment, the ink material has a viscosity of 25 to 55 Pa.s and a glass transition temperature (Tg) of 145 to 180° C.

[0106] In summary, in the packaging substrate and its manufacturing method disclosed in the present invention, the dielectric layer is tightly adhered to the core layer mainly by means of a fixed structure. When the packaging substrate has multiple dielectric layers, the adhesion between the layers in the dielectric layer is enhanced, and the risk of dielectric layer delamination can be reduced regardless of the production process or reliability testing.

[0107] Secondly, the number, shape and layout of the fixing structure can be configured according to the packaging substrate layout to achieve an excellent fastening effect.

[0108] Furthermore, the fixing structure disclosed in the present invention is applicable to various core layers and dielectric materials, and is not limited by the substrate material. For example, the core layer can be made of organic material, glass, ceramic or any composite material that can form perforations; the dielectric layer can be made of PP, ABF film or any composite material that can form perforations.

[0109] In addition, the present invention uses the circuit structure with the core layer as the ball implanting side to reduce the number of layers of the packaging substrate. Therefore, compared with the prior art, the total thickness of the packaging substrate is conducive to being thinned; and by simultaneously adding layers on both sides of the carrier, the problem of warping of the asymmetric substrate is effectively avoided, thereby achieving double production efficiency.

[0110] In addition, the present disclosure further avoids the problem of delamination of the insulating layer by strengthening the adhesion between the insulating layer and the core layer and the perforated surface through the bonding layer. The above embodiments are only used to illustrate the principle and effect of the present disclosure, and are not used to limit the present disclosure. Those skilled in the art can modify the above embodiments without violating the spirit and scope of the present disclosure. Therefore, the scope of protection of the present disclosure should be as listed in the claims.

Claims

1. A packaging substrate, characterized in that: include: A circuit structure having opposing bumping sides and build-up sides, and the circuit structure includes: A core layer having a first side and a second side opposite to each other, a plurality of through holes connecting the first side and the second side, and at least one fixing hole; A bonding layer is formed on the first side and the second side of the core layer, and on the wall surfaces of the through holes and the fixing holes; a plurality of conductive pillars formed in each of the through holes; and A circuit layer is formed on a first side and a second side of the core layer and is electrically connected to the conductive pillar, wherein the first side corresponds to the ball implantation side and the second side corresponds to the build-up layer side; A wiring structure formed on a build-up layer side of the wiring structure; as well as The fixing structure includes a supporting portion formed in the fixing hole and an extending portion located in the wiring structure and correspondingly formed on the supporting portion, so that the fixing structure extends from the line structure to penetrate the wiring structure.

2. The packaging substrate according to claim 1, wherein: The circuit structure also includes an insulating layer formed on the bonding layer and filled into a plurality of through holes and the fixing hole, wherein a plurality of conductive columns penetrate the insulating layer in the plurality of through holes, and the fixing structure penetrates the insulating layer in the fixing hole.

3. The packaging substrate according to claim 2, wherein: The fixing structure includes a plurality of fastening parts formed on the extension part and between the support part and the extension part, and the width of the fastening part between the support part and the extension part is greater than the diameter of the support part.

4. The packaging substrate according to claim 3, characterized in that: The outermost wiring layer on the build-up layer side has a plurality of electrical contact pads, and the width of the plurality of electrical contact pads is smaller than the width of the plurality of fastening portions, and the packaging substrate also includes a plurality of solder mask layers, which are respectively formed on the outermost sides of the circuit structure and the wiring structure to cover the fastening portions of the outermost wiring layer.

5. The packaging substrate according to claim 1, wherein: The bonding layer is an organic coating or an inorganic coating, wherein the material forming the organic coating is a polymer, and the thickness of the organic coating is 1 nanometer to 100 micrometers, and the material forming the inorganic coating includes silica sand with a diameter of 20 to 50 micrometers and a roughness Ra of 1 to 200 micrometers.

6. The packaging substrate according to claim 5, characterized in that The polymer is at least one selected from the group consisting of polyoxyxylene, polyamide and polyparaxylene.

7. The packaging substrate according to claim 2, wherein: The insulating layer includes a dielectric material or an ink material.

8. The packaging substrate according to claim 7, wherein: The dielectric material is selected from at least one of the group consisting of poly(p-oxadiazole benzene), polyimide, prepreg and ABF film, and the ink material comprises epoxy ink composite material.

9. The packaging substrate according to claim 7, wherein: The ink material has a viscosity of 25 to 55 Pa.s and a glass transition temperature of 145 to 180°C.

10. The packaging substrate according to claim 1, wherein: The fixing structure is in the shape of a rivet, a grid or a frame.

11. A method for manufacturing a packaging substrate, characterized in that: include: A circuit structure is provided, having a ball implant side and a build-up layer side opposite to each other, and the circuit structure comprises: A core layer having a first side and a second side opposite to each other, a plurality of through holes connecting the first side and the second side, and at least one fixing hole; A bonding layer is formed on the first side and the second side of the core layer, and on the wall surfaces of the through holes and the fixing holes; A plurality of conductive posts formed in each of the through holes and a support portion formed in the fixing hole; and A circuit layer is formed on a first side and a second side of the core layer and electrically connected to the conductive pillar, wherein the first side corresponds to the ball implantation side and the second side corresponds to the build-up layer side; and A wiring structure is formed on the build-up side of the circuit structure, and an extension portion is formed in the wiring structure corresponding to the support portion to form a fixed structure extending from the circuit structure and passing through the wiring structure, including a support portion formed in the fixing hole and an extension portion located in the wiring structure and correspondingly formed on the support portion.

12. The method for manufacturing a packaging substrate according to claim 11, wherein: The manufacturing method also includes combining the ball implanting sides of two circuit structures on opposite sides of a carrier before forming the wiring structure, and then removing the carrier after forming the wiring structure on the build-up layer side of the circuit structure to perform a singulation process to obtain multiple packaging substrates.

13. The method for manufacturing a packaging substrate according to claim 11, wherein: The steps of making the circuit structure include forming a bonding layer on the first side and the second side of the core layer, the through-holes and the wall surface of the fixing holes; forming an insulating layer on the bonding layer and filling the multiple through-holes and the fixing holes; and forming multiple conductive columns of the insulating layer passing through the multiple through-holes and forming a supporting portion of the insulating layer passing through the fixing holes.

14. The method for manufacturing a packaging substrate according to claim 11, wherein: The manufacturing method also includes forming a plurality of fastening parts on the extension part and between the support part and the extension part after forming the support part and the extension part, and the width of the fastening part between the support part and the extension part is greater than the diameter of the support part.

15. The method for manufacturing a packaging substrate according to claim 14, wherein: The outermost wiring layer on the build-up layer side has multiple electrical contact pads, and the width of the multiple electrical contact pads is smaller than the width of the multiple fastening parts. The manufacturing method also includes forming solder mask layers on the outermost sides of the circuit structure and the wiring structure to cover the fastening parts of the outermost wiring layer.

16. The method for manufacturing a packaging substrate according to claim 11, wherein: The bonding layer is an organic coating or an inorganic coating, wherein the material forming the organic coating is a polymer, and the thickness of the organic coating is 1 nanometer to 100 micrometers, and the material forming the inorganic coating includes silica sand with a diameter of 20 to 50 micrometers and a roughness Ra of 1 to 200 micrometers.

17. The method for manufacturing a packaging substrate according to claim 16, wherein: The polymer is at least one selected from the group consisting of polyoxyxylene, polyamide and polyparaxylene.

18. The method for manufacturing a packaging substrate according to claim 13, wherein: The insulating layer includes a dielectric material or an ink material.

19. The method for manufacturing a packaging substrate according to claim 18, wherein: The dielectric material is selected from at least one of the group consisting of poly(p-oxadiazole benzene), polyimide, prepreg and ABF film, and the ink material comprises epoxy ink composite material.

20. The method for manufacturing a packaging substrate according to claim 18, wherein: The ink material has a viscosity of 25 to 55 Pa.s and a glass transition temperature of 145 to 180°C.

21. The method for manufacturing a packaging substrate according to claim 11, wherein: The fixing structure is in the shape of a rivet, a grid or a frame.

Images