Undervoltage protection circuit

Abstract

The invention provides an under-voltage protection circuit. The under-voltage protection circuit comprises a sampling module, a starting module, a reference module, a comparison module, a trigger module, a switch module and a load which are electrically connected in sequence, the input end of the sampling module is connected with a power supply; the reference module comprises a first transistor, a second transistor, a third transistor, a fourth transistor and a first resistor; the source electrode of the first transistor and the source electrode of the second transistor are connected and jointly connected with a power supply, the grid electrode of the first transistor is connected with the grid electrode of the second transistor, and the drain electrode of the first transistor is connected with the drain electrode of the third transistor. The grid electrode of the first transistor is connected with the drain electrode of the second transistor and the output end of the starting module and serves as the input end of the reference module. Drain electrodes of the first transistor are respectively drain electrodes and grid electrodes of the third transistor. According to the under-voltage protection circuit, power consumption can be reduced, the anti-noise capability is improved, and the product stability is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to an undervoltage protection circuit. Background Art

[0002] With the rapid development of integrated circuits, power management chips are increasingly used in portable mobile devices and smart electronic wearable devices. Each power chip has a minimum voltage that meets normal working requirements. If the external power supply is lower than the minimum voltage required for the normal operation of the chip, the internal control logic of the chip will be in an unstable state. The unstable state may cause irreversible damage to the internal components of the power chip, or even affect the security of the back-end application system of the power chip, causing major safety accidents. For this reason, we need to design an undervoltage protection circuit inside the chip. When the undervoltage protection circuit detects that the external power supply of the chip is lower than the minimum value set, the undervoltage protection circuit responds quickly and sends a logic control signal to shut down the chip to protect the entire circuit system.

[0003] In the related art, undervoltage protection circuits (such as Figure 3 The circuit diagram of the undervoltage protection circuit (as shown in the figure) generally includes a voltage regulator, multiple sampling resistors, a comparator, a control switch tube and an output terminal, etc. The voltage regulator is connected in series with the sampling resistor, and the comparator is connected to the negative electrode of the voltage regulator. The reference voltage is provided by the voltage regulator, and the accuracy of the reference voltage is not high. Resistors (R1 and R2) are used to sample the power supply, and the sampled voltage and the reference voltage are compared by the comparator. The comparator outputs a signal to control the on and off of the switch tube, thereby determining whether there is a voltage output at the output terminal. However, this method has poor anti-interference ability, and because voltage regulators cannot be provided or there are no matching voltage regulators in some processes, the application scope of this undervoltage protection circuit is relatively small. Summary of the invention

[0004] The present invention provides an undervoltage protection circuit, aiming to solve the problems of low reference voltage accuracy, poor anti-interference ability and small application range of the existing undervoltage protection circuit.

[0005] The embodiment of the present invention provides an undervoltage protection circuit, comprising: a sampling module, a start module, a reference module, a comparison module, a trigger module, a switch module and a load which are electrically connected in sequence; the input end of the sampling module is used to connect to a power supply;

[0006] The reference module includes a first transistor, a second transistor, a third transistor, a fourth transistor and a first resistor; the source of the first transistor is connected to the source of the second transistor and connected to the power supply together, the gate of the first transistor is connected to the gate of the second transistor, the drain of the first transistor is connected to the drain of the third transistor, the gate of the first transistor is also connected to the drain of the second transistor and the output end of the startup module respectively and serves as the input end of the reference module; the drain of the first transistor is respectively the drain and gate of the third transistor, the gate of the third transistor is connected to the gate of the fourth transistor, the source of the third transistor is grounded, the source of the fourth transistor is connected to the first resistor and grounded, the drain of the fourth transistor is connected to the drain of the second transistor and together as the output end of the reference module connected to the input end of the comparison module.

[0007] Preferably, the sampling module includes a second resistor and a third resistor, the first end of the second resistor serves as the input end of the sampling module, the second end of the second resistor is connected to the first end of the third resistor, the second end of the third resistor is grounded, and the second end of the second resistor is used to connect to the first bias voltage.

[0008] Preferably, the startup module includes a fifth transistor, a sixth transistor and a seventh transistor, the source of the fifth transistor is connected to the source of the sixth transistor and grounded, the gate of the fifth transistor is connected to the gate of the sixth transistor, the drain of the fifth transistor is respectively connected to the gate of the fifth transistor and the drain of the seventh transistor, the gate of the seventh transistor is used to connect to the second bias voltage, the source of the seventh transistor is connected to the power supply as the input end of the startup module, and the drain of the sixth transistor is used as the output end of the startup module.

[0009] Preferably, the comparison module includes an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor and a twelfth transistor; the source of the eighth transistor is connected to the source of the ninth transistor and is commonly connected to the power supply, the gate of the eighth transistor is connected to the gate of the ninth transistor, the drain of the eighth transistor is connected to the drain of the tenth transistor, and the gate of the eighth transistor is also connected to the drain of the eighth transistor; the source of the tenth transistor is respectively connected to the source of the eleventh transistor and the drain of the twelfth transistor, the gate of the tenth transistor serves as the input end of the comparison module, the drain of the eleventh transistor is connected to the drain of the ninth transistor, and the drain of the eleventh transistor also serves as the output end of the comparison module, the gate of the eleventh transistor is used to connect to a first bias voltage, the gate of the twelfth transistor is used to connect to a second bias voltage, and the source of the twelfth transistor is grounded.

[0010] Preferably, the trigger module includes a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, a seventeenth transistor and an eighteenth transistor;

[0011] The source of the fourteenth transistor is connected to the power supply, the drain of the fourteenth transistor is respectively connected to the source of the fifteenth transistor and the source of the sixteenth transistor, the gate of the fourteenth transistor is respectively connected to the gate of the fifteenth transistor, the gate of the seventeenth transistor and the gate of the eighteenth transistor, and the gate of the fourteenth transistor also serves as the input end of the trigger module; the drain of the fifteenth transistor is respectively connected to the drain of the seventeenth transistor, the gate of the sixteenth transistor and the gate of the thirteenth transistor, and the drain of the fifteenth transistor also serves as the output end of the trigger module; the source of the seventeenth transistor is respectively connected to the drain of the eighteenth transistor and the source of the thirteenth transistor, the source of the eighteenth transistor is grounded, and the drain of the thirteenth transistor is used to connect to the power supply.

[0012] Preferably, the switch module is a nineteenth transistor, the gate of the nineteenth transistor is connected to the drain of the fifteenth transistor, the source of the nineteenth transistor is connected to the power supply, and the drain of the nineteenth transistor is used to connect to the load.

[0013] Compared with the prior art, the beneficial effect of the present invention is that the sampling module, the startup module, the reference module, the comparison module, the trigger module, the switch module and the load are electrically connected in sequence; the input end of the sampling module is used to connect the power supply for power supply; the source of the first transistor of the reference module is connected to the source of the second transistor and connected to the power supply together, the gate of the first transistor is connected to the gate of the second transistor, the drain of the first transistor is connected to the drain of the third transistor, and the gate of the first transistor is also connected to the drain of the second transistor and the output end of the startup module respectively and serves as the input end of the reference module; the drain of the first transistor is respectively the drain and gate of the third transistor, the gate of the third transistor is connected to the gate of the fourth transistor, the source of the third transistor is grounded, the source of the fourth transistor is connected to the first resistor and grounded, the drain of the fourth transistor is connected to the drain of the second transistor and serves as the output end of the reference module and the input end of the comparison module. In this way, there is no need for an undervoltage protection circuit of a voltage regulator tube, which can reduce power consumption, improve noise resistance, and improve product stability. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The present invention will be described in detail below in conjunction with the accompanying drawings. The above and other aspects of the present invention will become clearer and easier to understand through the detailed description made in conjunction with the following drawings. In the accompanying drawings:

[0015] Figure 1 A module diagram of an undervoltage protection circuit provided by an embodiment of the present invention;

[0016] Figure 2 A circuit diagram of an undervoltage protection circuit provided by an embodiment of the present invention;

[0017] Figure 3 2 is a circuit diagram of the existing undervoltage protection circuit.

[0018] Among them, 1. sampling module, 2. starting module, 3. reference module, 4. comparison module, 5. trigger module, 6. switch module, 7. load. DETAILED DESCRIPTION

[0019] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0020] Combined with Figure 1-Figure 2 As shown, an embodiment of the present invention provides an undervoltage protection circuit, comprising: a sampling module 1, a starting module 2, a reference module 3, a comparison module 4, a trigger module 5, a switch module 6 and a load 7 electrically connected in sequence; the input end of the sampling module 1 is used to connect to a power supply VCC;

[0021] The reference module 3 includes a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4 and a first resistor R1; the source of the first transistor M1 is connected to the source of the second transistor M2 and connected to the power supply VCC, the gate of the first transistor M1 is connected to the gate of the second transistor M2, the drain of the first transistor M1 is connected to the drain of the third transistor M3, the gate of the first transistor M1 is also connected to the drain of the second transistor M2 and the output end of the startup module 2 respectively and serves as the input end of the reference module 3; the drain of the first transistor M1 is connected to the drain and gate of the third transistor M3 respectively, the gate of the third transistor M3 is connected to the gate of the fourth transistor M4, the source of the third transistor M3 is grounded, the source of the fourth transistor M4 is connected to the first resistor R1 and grounded, the drain of the fourth transistor M4 is connected to the drain of the second transistor M2 and together as the output end of the reference module 3 connected to the input end of the comparison module 4.

[0022] Among them, the first transistor M1, the second transistor M2, the third transistor M3 and the fourth transistor M4 are all NMOS transistors, the first transistor M1 and the second transistor M2 have the same width-to-length ratio, the third transistor M3 and the fourth transistor M4 have the same width-to-length ratio, and the output voltage V d =2(R1+r O6 ) / u n C ox (W / L)6R1R1(2), from the above formula, it can be seen that the output voltage Vd at point d is a fixed value and is not affected by the power supply VCC. Among them, R1 is the resistance of resistor R1, ro6 is the equivalent internal resistance of the sixth MOS tube M6, un is the electron mobility, Cox is the gate oxide layer capacitance, and W / L is the width-to-length ratio of the MOS tube.

[0023] Specifically, the sampling module 1, the starting module 2, the reference module 3, the comparison module 4, the trigger module 5, the switch module 6 and the load 7 are electrically connected in sequence; the input end of the sampling module 1 is used to connect the power supply VCC for power supply; the source of the first transistor M1 of the reference module 3 is connected to the source of the second transistor M2 and connected to the power supply VCC together, the gate of the first transistor M1 is connected to the gate of the second transistor M2, the drain of the first transistor M1 is connected to the drain of the third transistor M3, the gate of the first transistor M1 is also connected to the drain of the second transistor M2 and the output end of the starting module 2 respectively and serves as the input end of the reference module 3; the drain of the first transistor M1 is respectively the drain and gate of the third transistor M3, the gate of the third transistor M3 is connected to the gate of the fourth transistor M4, the source of the third transistor M3 is grounded, the source of the fourth transistor M4 is connected to the first resistor R1 and grounded, the drain of the fourth transistor M4 is connected to the drain of the second transistor M2 and together as the output end of the reference module 3 connected to the input end of the comparison module 4. In this way, an undervoltage protection circuit without a voltage regulator tube can reduce power consumption, improve noise resistance, and improve product stability.

[0024] In this embodiment, the sampling module 1 includes a second resistor R2 and a third resistor R3, the first end of the second resistor R2 serves as the input end of the sampling module 1, the second end of the second resistor R2 is connected to the first end of the third resistor R3, the second end of the third resistor R3 is grounded, and the second end of the second resistor R2 is used to connect the first bias voltage Va. By forming the sampling module 1 with the second resistor R2 and the third resistor R3, the a-point voltage Va is collected and transmitted to the gate of the NMOS tube M11 of the comparison module 4; the voltage at point a is V a =R3*VCC / (R2+R3)……(1). From the above formula, it can be seen that when the VCC voltage decreases, the voltage Va at point a also decreases.

[0025] In this embodiment, the startup module 2 includes a fifth transistor M5, a sixth transistor M6 and a seventh transistor M7, the source of the fifth transistor M5 is connected to the source of the sixth transistor M6 and is grounded, the gate of the fifth transistor M5 is connected to the gate of the sixth transistor M6, the drain of the fifth transistor M5 is respectively connected to the gate of the fifth transistor M5 and the drain of the seventh transistor M7, the gate of the seventh transistor M7 is used to connect the second bias voltage Vb, the source of the seventh transistor M7 is connected to the power supply VCC as the input end of the startup module 2, and the drain of the sixth transistor M6 is used as the output end of the startup module 2.

[0026] The fifth transistor M5, the sixth transistor M6 and the seventh transistor M7 are all PMOS transistors. The gate of the seventh transistor M7 of the start-up module 2 is connected to the point d of the reference module 3 and driven by Vd, and the drain of the sixth transistor M6 is connected to the point c.

[0027] In this embodiment, the comparison module 4 includes an eighth transistor M8, a ninth transistor M9, a tenth transistor M10, an eleventh transistor M11 and a twelfth transistor M12; the source of the eighth transistor M8 is connected to the source of the ninth transistor M9 and is commonly connected to the power supply VCC, the gate of the eighth transistor M8 is connected to the gate of the ninth transistor M9, the drain of the eighth transistor M8 is connected to the drain of the tenth transistor M10, and the gate of the eighth transistor M8 is also connected to the drain of the eighth transistor M8; the tenth transistor M The sources of the first transistor M10 and the second transistor M11 are respectively connected to the source of the eleventh transistor M11 and the drain of the twelfth transistor M12, the gate of the tenth transistor M10 serves as the input end of the comparison module 4, the drain of the eleventh transistor M11 is connected to the drain of the ninth transistor M9, the drain of the eleventh transistor M11 also serves as the output end of the comparison module 4, the gate of the eleventh transistor M11 is used to connect the first bias voltage Va, the gate of the twelfth transistor M12 is used to connect the second bias voltage Vb, and the source of the twelfth transistor M12 is grounded.

[0028] Optionally, the eighth transistor M8 and the ninth transistor M9 are PMOS transistors; the tenth transistor M10, the eleventh transistor M11 and the twelfth transistor M12 are NMOS transistors. This is a differential amplifier circuit, which can amplify the difference between the gate voltage Va of M11 and the gate voltage Vd of M10 and output it from point e; the voltage at point e is V e =g m11 (ron / / o13)(V a -V d)......(3), from the above formula, it can be seen that when the voltage Va at point a decreases, the voltage Ve at point e also decreases. Among them, gm11 is the transconductance of the eleventh MOS tube M11, ro11 is the equivalent internal resistance of the eleventh MOS tube M11, ro13 is the equivalent internal resistance of the thirteenth MOS tube M13, and ro11 / / ro13 represents the parallel connection of two equivalent internal resistances.

[0029] In this embodiment, the trigger module 5 includes a thirteenth transistor M13, a fourteenth transistor M14, a fifteenth transistor M15, a sixteenth transistor M16, a seventeenth transistor M17 and an eighteenth transistor M18; wherein the thirteenth transistor M13, the seventeenth transistor M17 and the eighteenth transistor M18 are all NMOS transistors; the fourteenth transistor M14, the fifteenth transistor M15 and the sixteenth transistor M16 are all PMOS transistors.

[0030] The source of the fourteenth transistor M14 is connected to the power supply VCC, the drain of the fourteenth transistor M14 is respectively connected to the source of the fifteenth transistor M15 and the source of the sixteenth transistor M16, the gate of the fourteenth transistor M14 is respectively connected to the gate of the fifteenth transistor, the gate of the seventeenth transistor M17 and the gate of the eighteenth transistor M18, and the gate of the fourteenth transistor M14 also serves as the input end of the trigger module 5; the drain of the fifteenth transistor M15 is respectively connected to the drain of the seventeenth transistor M17, the gate of the sixteenth transistor M16 and the gate of the thirteenth transistor M13, and the drain of the fifteenth transistor M15 also serves as the output end of the trigger module 5; the source of the seventeenth transistor M17 is respectively connected to the drain of the eighteenth transistor M18 and the source of the thirteenth transistor M13, the source of the eighteenth transistor M18 is grounded, and the drain of the thirteenth transistor M13 is used to connect to the power supply VCC.

[0031] Specifically, this is a Schmitt trigger; when point e is at a high level, point b is at a low level. When the voltage at point e decreases and exceeds the negative threshold voltage Vth1, the voltage at point b becomes a high level. When the voltage at point e increases and exceeds the positive threshold voltage Vth2, the voltage at point b becomes a low level. Due to the hysteresis characteristics, the Schmitt trigger has a good suppression effect on the noise in the input signal. The output signal will only change when the noise is large enough to make the input signal cross the threshold range, thereby avoiding the change of the output signal caused by small-amplitude noise.

[0032] In this embodiment, the switch module 6 is a nineteenth transistor M19, the gate of the nineteenth transistor M19 is connected to the drain of the fifteenth transistor M15, the source of the nineteenth transistor M19 is connected to the power supply VCC, and the drain of the nineteenth transistor M19 is used to connect the load 7. The gate of the nineteenth transistor M19 is connected to the output terminal b of the undervoltage protection circuit, and has the function of being turned on by a low level and turned off by a high level.

[0033] The nineteenth transistor M19 is a PMOS transistor.

[0034] In the specific embodiment of the present invention, when VCC is a normal voltage, the voltage a of the sampling module 1 is at a high level, and the output voltage Vd of the reference module 3 is fixed. It can be seen from formula (3) that the voltage at point e is at a high level, the voltage at point b output by the trigger module 5 is at a low level, and the switch module 6M1 is turned on, so that the power supply VCC can be provided to the load 7;

[0035] When VCC decreases, the voltage at point a also decreases, and the output voltage Vd of the reference module 3 remains unchanged. It can be seen from formula (3) that the output voltage Ve at point e of the comparison module 4 also decreases. When VCC decreases to below the lower threshold VCC1, the voltage Ve at point e decreases to exceed the negative threshold voltage Vth1 of the trigger module 5, and the voltage Vb at point b becomes high level. The switch module 6 is turned off and enters the undervoltage lockout state, disconnecting the power supply VCC of the load 7.

[0036] When VCC rises, the voltage at point a also rises, and the output voltage Vd of the reference module 3 remains unchanged. It can be seen from formula (3) that the voltage Ve at point e of the comparison module 4 also rises. When VCC rises to exceed the upper threshold value VCC2, the voltage Ve at point e rises to exceed the positive threshold voltage Vth2 of the trigger module 5, and the voltage Vb at point b becomes low level. The switch module 6M1 is turned on, and the contact undervoltage lockout state can be provided to the load 7.

[0037] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, article or device. In the absence of more restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, article or device including the element.

[0038] The embodiments of the present invention are described above in conjunction with the accompanying drawings. What is disclosed is only the preferred embodiment of the present invention. However, the present invention is not limited to the above-mentioned specific implementation manner. The above-mentioned specific implementation manner is only illustrative rather than restrictive. Under the enlightenment of the present invention, ordinary technicians in this field can also make many forms and equivalent changes without departing from the scope of protection of the purpose of the present invention and the claims, all of which are within the protection of the present invention.

Claims

1. An undervoltage protection circuit, characterized in that: include: A sampling module, a starting module, a reference module, a comparison module, a trigger module, a switch module and a load are electrically connected in sequence; the input end of the sampling module is used to connect to a power supply; The reference module includes a first transistor, a second transistor, a third transistor, a fourth transistor and a first resistor; the source of the first transistor is connected to the source of the second transistor and connected to the power supply together, the gate of the first transistor is connected to the gate of the second transistor, the drain of the first transistor is connected to the drain of the third transistor, the gate of the first transistor is also connected to the drain of the second transistor and the output end of the startup module respectively and serves as the input end of the reference module; the drain of the first transistor is respectively the drain and gate of the third transistor, the gate of the third transistor is connected to the gate of the fourth transistor, the source of the third transistor is grounded, the source of the fourth transistor is connected to the first resistor and grounded, the drain of the fourth transistor is connected to the drain of the second transistor and together as the output end of the reference module connected to the input end of the comparison module.

2. The undervoltage protection circuit according to claim 1, characterized in that: The sampling module includes a second resistor and a third resistor, the first end of the second resistor serves as the input end of the sampling module, the second end of the second resistor is connected to the first end of the third resistor, the second end of the third resistor is grounded, and the second end of the second resistor is used to connect to the first bias voltage.

3. The undervoltage protection circuit according to claim 1, characterized in that: The startup module includes a fifth transistor, a sixth transistor and a seventh transistor, the source of the fifth transistor is connected to the source of the sixth transistor and is grounded, the gate of the fifth transistor is connected to the gate of the sixth transistor, the drain of the fifth transistor is respectively connected to the gate of the fifth transistor and the drain of the seventh transistor, the gate of the seventh transistor is used to connect the second bias voltage, the source of the seventh transistor is connected to the power supply as the input end of the startup module, and the drain of the sixth transistor is used as the output end of the startup module.

4. The undervoltage protection circuit according to claim 1, characterized in that: The comparison module includes an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor and a twelfth transistor; the source of the eighth transistor is connected to the source of the ninth transistor and is commonly connected to the power supply, the gate of the eighth transistor is connected to the gate of the ninth transistor, the drain of the eighth transistor is connected to the drain of the tenth transistor, and the gate of the eighth transistor is also connected to the drain of the eighth transistor; the source of the tenth transistor is respectively connected to the source of the eleventh transistor and the drain of the twelfth transistor, the gate of the tenth transistor serves as the input end of the comparison module, the drain of the eleventh transistor is connected to the drain of the ninth transistor, and the drain of the eleventh transistor also serves as the output end of the comparison module, the gate of the eleventh transistor is used to connect to a first bias voltage, the gate of the twelfth transistor is used to connect to a second bias voltage, and the source of the twelfth transistor is grounded.

5. The undervoltage protection circuit according to claim 1, characterized in that: The trigger module includes a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, a seventeenth transistor and an eighteenth transistor; The source of the fourteenth transistor is connected to the power supply, the drain of the fourteenth transistor is respectively connected to the source of the fifteenth transistor and the source of the sixteenth transistor, the gate of the fourteenth transistor is respectively connected to the gate of the fifteenth transistor, the gate of the seventeenth transistor and the gate of the eighteenth transistor, and the gate of the fourteenth transistor also serves as the input end of the trigger module; the drain of the fifteenth transistor is respectively connected to the drain of the seventeenth transistor, the gate of the sixteenth transistor and the gate of the thirteenth transistor, and the drain of the fifteenth transistor also serves as the output end of the trigger module; the source of the seventeenth transistor is respectively connected to the drain of the eighteenth transistor and the source of the thirteenth transistor, the source of the eighteenth transistor is grounded, and the drain of the thirteenth transistor is used to connect to the power supply.

6. The undervoltage protection circuit according to claim 5, characterized in that: The switch module is a nineteenth transistor, the gate of the nineteenth transistor is connected to the drain of the fifteenth transistor, the source of the nineteenth transistor is connected to the power supply, and the drain of the nineteenth transistor is used to connect to the load.

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