Short-circuit protection of communication controller

Abstract

Aspects of the present disclosure provide a circuit (300). In some examples, the circuit includes: a first current source (302) having a terminal coupled to a first node (314) and a second terminal, a first switch (306) coupled between the second terminal of the first current source and a second node (316), a first resistor (310) coupled between the second node and a ground terminal (318), a second current source (304) having a terminal coupled to the first node and a second terminal, a second switch (308) coupled between the second terminal of the second current source and a third node (320), a second resistor (312) coupled between the third node and the ground terminal, a third current source having a terminal coupled to the first node and a second terminal, a third switch coupled between the second terminal of the third current source and a fourth node, and a third resistor coupled between the fourth node and the ground terminal.

Description

Technical Field Background Art

[0001] Universal Serial Bus (USB) communication occurs between a host having a downstream port (DFP) and a device having an upstream port (UFP). The DFP and UFP are sometimes implemented by a single port called a dual-role port (DRP), which can be controlled to operate as a DFP or a UFP. In some USB technologies, such as USB Type-C (USB-C), the orientation in which a plug (sometimes called a connector) is inserted into a socket (sometimes called a port) is reversible, and both the plug and the socket have pins, pads, or other conductive elements with a small pitch (e.g., the distance from the center point of one pin, pad, or other conductive element to the center point of an adjacent pin, pad, or other conductive element). Summary of the Invention

[0002] Aspects of the present disclosure provide a circuit. In some examples, the circuit includes a first current source, a first switch, a first resistor, a second current source, a second switch, a second resistor, a third current source, a third switch, and a third resistor. The first current source has a first terminal and a second terminal coupled to a first node. The first switch is coupled between the second terminal of the first current source and a second node. The first resistor is between the second node and a ground terminal. The second current source has a first terminal and a second terminal coupled to the first node. The second switch is coupled between the second terminal of the second current source and a third node. The second resistor is coupled between the third node and the ground terminal. The third current source has a first terminal and a second terminal coupled to the first node. The third switch is coupled between the second terminal of the third current source and a fourth node. The third resistor is coupled between the fourth node and the ground terminal.

[0003] Other aspects of the present disclosure provide a circuit. In an example, the circuit includes a configuration channel (CC) terminal short circuit protection circuit, a bus voltage (VBUS) terminal short circuit protection circuit, and a processing element. The CC terminal short circuit protection circuit is configured to close a first switch to apply a first constant current to a CC1 terminal coupled to a ground terminal via a first resistor to determine an amount of resistance present at the CC1 terminal, close a second switch to apply a second constant current to a CC2 terminal coupled to the ground terminal via a second resistor to determine an amount of resistance present at the CC2 terminal, and open the first switch and the second switch. The VBUS terminal short circuit protection circuit is configured to close a third switch to apply a third constant current to a VBUS terminal coupled to the ground terminal via a third resistor to determine an amount of resistance present at the VBUS terminal, and open the third switch. The processing element is configured to control the first switch, the second switch, and the third switch to close after determining that a plug has been inserted into a socket including the CC1 terminal, the CC2 terminal, and the VBUS terminal, measure a voltage present at the CC1 terminal to determine an amount of resistance present at the CC1 terminal, measure a voltage present at the CC2 terminal to determine an amount of resistance present at the CC2 terminal, measure a voltage present at the VBUS terminal to determine an amount of resistance present at the VBUS terminal, control the first switch, the second switch, and the third switch to open, and prevent a VBUS signal from being applied to the VBUS terminal when the determined amount of resistance present at the CC1 terminal and the determined amount of resistance present at the CC2 terminal or the determined amount of resistance present at the VBUS terminal indicates a short circuit condition.

[0004] Other aspects of the present disclosure provide a system. In some examples, the system includes a processor, a processor, a communication port, and a communication controller. The communication port has a first configuration channel (CC1) terminal, a second configuration channel (CC2) terminal, and a VBUS terminal. The communication controller is configured to facilitate communication of the processor via the communication port. The communication controller includes a first current source, a first switch, a first resistor, a second current source, a second switch, a second resistor, a third current source, a third switch, a third resistor, and a processing element. The first current source has a first terminal coupled to a first node and a second terminal. The first switch is coupled between the second terminal of the first current source and the CC1 terminal. The first resistor is coupled between the CC1 terminal and a ground terminal. The second current source has a first terminal coupled to the first node and a second terminal. The second switch is coupled between the second terminal of the second current source and the CC2 terminal. The second resistor is coupled between the CC2 terminal and the ground terminal. The third current source has a first terminal coupled to the first node and a second terminal. The third switch is coupled between the second terminal of the third current source and the VBUS terminal. The third resistor is coupled between the VBUS terminal and the ground terminal. The third resistor is coupled between the VBUS terminal and the ground terminal. The processing element is coupled to and configured to control the first switch, the second switch, and the third switch. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] For a detailed description of various examples, reference will now be made to the accompanying drawings, in which:

[0006] Figure 1 A block diagram of an illustrative system in accordance with various examples is shown;

[0007] Figure 2 A schematic diagram of an illustrative USB system in accordance with various examples is shown;

[0008] Figure 3 A schematic diagram of an illustrative circuit in accordance with various examples is shown;

[0009] Figure 4 A schematic diagram of an illustrative circuit in accordance with various examples is shown;

[0010] Figure 5 A schematic diagram of an illustrative circuit in accordance with various examples is shown;

[0011] Figure 6 A flowchart of an illustrative method in accordance with various examples is shown;

[0012] Figure 7 A flowchart of an illustrative method in accordance with various examples is shown;

[0013] Figure 8 An illustrative timing diagram in accordance with various examples is shown; and

[0014] Figure 9 Illustrative timing diagrams in accordance with various examples are shown. Detailed implementation

[0015] As the spacing in a USB port and / or receptacle decreases, the chance and probability of a short circuit occurring between one or more adjacent pins, pads, or other conductive elements increases. In various examples, a short circuit can cause an unintended or undesired operation of the device, damage the device, or destroy the device. Although some implementations of a USB communication system include external short circuit protection (e.g., external to the USB communication system), short circuit protection is most commonly implemented after the USB power delivery (PD) controller and before other circuitry of the device. Thus, despite the external short circuit protection, a short circuit can still damage the USB cable, USB plug, USB receptacle, or USB PD controller.

[0016] At least some aspects of the present disclosure provide short circuit protection in a USB communication system. In some examples, the short circuit protection is applied to the VBUS terminal of the USB communication system, the configuration channel (CC) 1 terminal of the USB communication system, and / or the configuration channel (CC) 2 terminal of the USB communication system. In other examples, the short circuit protection is applied to any one or more other terminals of the USB communication system. Additionally, although discussed herein in the context of a USB communication system, the various examples of the present disclosure are equally applicable to other communication systems having plugs and / or receptacles that may be vulnerable to short circuit conditions.

[0017] In at least one example, the short - circuit protection of the present disclosure includes selectively applying a known amount of current to the VBUS terminal, the CC1 terminal, and / or the CC2 terminal, and measuring the resulting voltage present at each terminal. Based on the known amount of current and the measured voltage, the resistance can be determined. Based on the determined resistance and / or the measured voltage, it can be determined whether a short - circuit condition exists between the terminals of a receptacle, a plug, or other device. For example, when the measured voltage is approximately equal to a predetermined value and / or the determined resistance is less than, equal to, or greater than one or more predetermined values, it can be determined that a short - circuit condition exists at the terminal where the voltage is measured. In some examples, the measurement and determination are performed by a USB PD controller, while in other examples, the measurement and / or determination are performed by another processing device coupled to the USB PD controller. In at least some examples, the determination of the existence of the short - circuit condition is performed before establishing USB communication between the host and the device, e.g., before providing the bus voltage (VBUS) from the host to the device to power the device. In various examples, determining the existence of the short - circuit condition before establishing USB communication between the host and the device protects the host and the device from unexpected operation, damage, and / or destruction of the host or the device at least partially due to the existence of the short - circuit condition at the start of USB communication (e.g., such as due to the existence of a short - circuit condition when voltage is applied to the VBUS terminal).

[0018] Now refer to Figure 1, shows a block diagram of an illustrative system 100. System 100 represents a computing or other electrical device having USB communication and / or charging capabilities. Generally, system 100 represents any device that includes a USB PD controller to manage the flow of power and / or data through a USB socket or plug. In at least one example, system 100 includes a processing element 102, a USB PD controller 104, a USB port 106, and a power supply 108. The processing element 102 is any suitable electrical component or device capable of performing processing functions. For example, the processing element 102 can be a processor, a microprocessor, a field-programmable gate array (FPGA), a logic structure, and / or any other one or more components that perform processing functions for system 100. The USB PD controller 104 is a USB PD controller that at least has the short-circuit protection function taught herein, is coupled to the processing element 102, and is configured to manage communication via the USB port 106. For example, the USB PD controller 104 is configured to determine whether the USB port 106 operates as a DFP or a UFP, and control the supply of power from the power supply 108 to the VBUS terminal of the USB port 106, and / or supply power from a power regulator 110 (e.g., a low-dropout regulator, a multi-switch power regulator, etc.) implemented at least partially within the USB PD controller 104 to the VBUS terminal of the USB port 106. In at least some examples, the processing element 102 and the USB PD controller 104 are integrated into a single circuit board, such as the main board or motherboard of an electronic device. In at least some examples, the power supply 108 is coupled to the processing element 102 and the USB PD controller 104, and is configured to supply power to the processing element and the USB PD controller 104, as well as the USB port 106 (e.g., at the VBUS terminal of the USB port 106), and the USB port 106 is controlled by the USB PD controller 104. In at least some examples, although not shown, the power supply 108 includes multiple outputs (e.g., where different outputs have different output voltage values and / or the ability to supply current) and / or one or more power regulation components (e.g., such as a low-dropout regulator) (not shown) are coupled between the output of the power supply 108 and the processing element 102, the USB PD controller 104, and / or the USB port 106 to modify the value of the output of the power supply 108 before the signal is received by the processing element 102, the USB PD controller 104, and / or the USB port 106. In at least some examples, the USB PD controller 104 advantageously enables the processing element 102 to communicate with another device (not shown) coupled to the USB port 106 according to the USB protocol, facilitating interoperability between devices.The USB PD controller 104 further advantageously protects the processing element 102, the power supply 108, and / or another device coupled to the USB port 106 from damage or performance degradation due to a short circuit occurring at the USB port 106.

[0019] Now referring to Figure 2 , a block diagram of a USB system 200 is shown. In one example, the USB system includes a host 202, a USB cable 204, and a device 206. In at least one example, the host 202 provides signals to the device 206 via the USB cable 204 such that the device 206 draws current from the host 202 via the USB cable 204. In at least some examples, the host 202 includes a power supply 208, a USB PD controller 210, and a voltage control circuit 212. The power supply 208 is a power supply capable of providing an output signal that, in some examples, has an adjustable voltage level that is adjusted, for example, based on a control signal received by the power supply 208. In at least some examples, the power supply 208 receives a control signal from the voltage control circuit 212 (e.g., via optical communication, such as via an optical coupler, or via receiving an analog or digital signal from any suitable source or coupling (not shown)), while in other examples, the power supply 208 receives a control signal from the voltage control circuit 212 via a physical coupling between the power supply 208 and the voltage control circuit 212. In other examples, the power supply 208 itself is non-adjustable, but an external component coupled to or configured to be coupled to the output of the power supply 208 adjusts the value of the signal output by the power supply 208. For example, the power supply output can be a signal having a substantially constant voltage value that is manipulated to output one or more other signals having a different voltage value from the power supply output. For example, the power supply output can be manipulated by a power converter (not shown), such as a buck converter, a boost converter, or a buck-boost converter, and the output of the power converter can be provided to node 218. In at least some examples, the power converter 208 is controlled by the voltage control circuit 212 to manipulate the power supply output to form one or more other signals. In at least one example, the USB PD controller 210 is or includes a microcontroller having processing capabilities. In other examples, the USB PD controller 210 is or includes any processing element capable of receiving one or more inputs and generating one or more outputs based on rules, analysis, or other processing applied to at least some of the inputs.

[0020] The voltage control circuit 212 is any circuit capable of adjusting and / or controlling the value of the signal present at node 218. For example, the voltage control circuit 212 is any circuit capable of receiving a reference voltage (VREF) from the USB PD controller 210 and controlling the power supply 208 based on VREF to control the value of the signal present at node 218. For example, the voltage control circuit 212 controls the power supply 208 based on VREF such that the signal present at node 218 has a value that is approximately equal to, proportional to, or otherwise related to the value of VREF, the range of which is not limited herein.

[0021] In at least some examples, the USB PD controller 210 includes and / or implements at least a portion of the short circuit protection circuit 214. For example, when the USB PD controller 210 is a microcontroller, at least a portion of the short circuit protection circuit 214 is implemented as specific programming within the USB PD controller 210 to perform at least some of the operations disclosed herein. In other examples, the short circuit protection circuit 214 is implemented separately from the USB PD controller 210 (e.g., as a separate microcontroller or other processing element) and is configured to be coupled to the USB PD controller 210. In some examples, the host 202 further includes a transistor 216 operable as a switch to control the output of the VBUS signal via the VBUS terminal 222 of the receptacle 224 of the host 202. The transistor 216 can have any suitable technology, including at least a p-type field effect transistor (FET) or an n-type FET. In other examples, the transistor 216 can represent a pair of back-to-back transistors (e.g., coupling their drain terminals together or coupling their source terminals together), such as back-to-back p-type FETs or back-to-back n-type FETs, such that the body diode of each of the pair of back-to-back transistors provides signal blocking in one direction. Additionally, although the transistor 216 is shown in Figure 1 as a separate component coupled to the USB PD controller 210, in at least some examples, the transistor 216 is integrated with the USB PD controller 210, such as on the same chip, in the same package, etc.

[0022] In at least one example architecture, the output of power supply 208 is coupled to node 218, the input of voltage control circuit 212 is coupled to node 218, the first terminal of USB PD controller 210 is coupled or configured to be coupled to node 218, and the first terminal (e.g., drain terminal) of transistor 216 is coupled to node 218. The first input of voltage control circuit 212 is coupled to the VREF output of USB PD controller 210, and the first output of voltage control circuit 212 is coupled to the CATH input of USB PD controller 210. The first terminal of USB PD controller 210 is coupled to the gate terminal of transistor 216, the second terminal of USB PD controller 210 is coupled to node 220, the second terminal (e.g., source terminal) of transistor 216 is coupled to node 220, and VBUS terminal 222 is coupled to node 220. The second terminal of circuit 214 is configured to be coupled to configuration channel (CC)2 terminal 232, and the third terminal of circuit 214 is configured to be coupled to CC2 terminal 234. In various examples, CC1 and CC2 can each be configured to be coupled to VCONN terminal 238 of USB cable 204 or CC terminal 236 of USB cable 204, depending on the orientation in which plug 226 is inserted into socket 224. In at least some examples, the fourth terminal of short circuit protection circuit 214 is further coupled to node 220. In some examples, VBUS terminal 222, CC1 terminal 232, and CC2 terminal 234 are housed in, are part of, or otherwise interact with socket 224 to communicatively couple host 202 to USB cable 204 via plug 226.

[0023] In at least one example, USB cable 204 includes plug 226 configured to interact with socket 224 to communicatively couple USB cable 204 to host 202. Plug 226 houses, includes, or otherwise interacts with VBUS terminal 240, CC terminal 236, and VCONN terminal 238, each configured to communicatively couple USB cable 204 to host 202. In various examples, USB cable 204 includes other components (not shown), such as switching cards, electronic markers, or other circuitry or components. Device 206 can be any device suitable for coupling to USB cable 204 to receive power from host 202 and / or communicate data with host 202, and the scope of device 206, its hardware architecture, or its method of operation are not limited herein. In at least some examples, device 206 also implements a USB controller that is substantially similar to USB PD controller 210 and / or includes functionality that is substantially similar to short circuit protection circuit 214.

[0024] In at least some examples, the USB PD controller 210 further includes a power management circuitry 242 configured to control the transistor 216 and generate one or more voltage signals for use within or output by the USB PD controller 210. For example, the power management circuitry 242 includes one or more voltage regulators (not shown), transistors (not shown), or other circuitry configured to generate, output, and / or control the output of one or more signals based on a signal present at node 218 and having a value scaled from the value of the signal present at node 218. In some examples, the USB PD controller 210 further includes a processing element 244. In some examples, the processing element 244 is any digital and / or analog circuitry that includes processing or decision-making functions. For example, based on one or more received signals, the processing element 244 controls the power management circuitry 242, the short circuit protection circuitry 214, and / or any one or more other components or circuitry of the USB PD controller 210.

[0025] In at least some examples, the short - circuit protection circuit 214 includes a VBUS short - circuit protection circuit 246 and a CC short - circuit protection circuit 248. In at least some examples, the VBUS short - circuit protection circuit 246 provides current through a resistor (not shown) coupled to node 220 to determine whether a short - circuit condition exists at node 220 (and correspondingly at the VBUS terminal 222). Similarly, in at least some examples, the CC short - circuit protection circuit 248 provides current through a resistor (not shown) coupled to the CC1 terminal 232 and a resistor (not shown) coupled to the CC2 terminal 234 to determine whether a short - circuit condition exists at the CC1 terminal 232 and the CC2 terminal 234, respectively. In at least some examples, when the voltage measured at node 220 is approximately 1.1 volts (V), the determined resistance is 5.1 kilo - ohms, plus or minus a twenty - percent variation, or the determined resistance is in the range of approximately 800 ohms to approximately 1.2 kilo - ohms, a short - circuit condition exists at node 220. In some examples, when the determined resistance at both the CC1 terminal 232 and the CC2 terminal 234 is less than approximately 500 ohms, a short - circuit condition exists at the CC1 terminal 232 and the CC2 terminal 234. In at least some examples, the resistance is determined by the processing element 244 based on the measurement results of the voltages present at the measured nodes or terminals. For example, the measurement results of the voltages present at the measured nodes or terminals are converted from analog values to digital values by an analog - to - digital converter (ADC) (not shown) of the processing element 244, and the processing element 244 divides the digital value by the current value obtained through the measured nodes or terminals to determine the resistance present at the measured nodes or terminals. In some examples, when a short - circuit condition exists at node 220 or the CC1 terminal 232 and the CC2 terminal 234, the processing element 244 outputs a signal to cause the system 200 or a device including the system 200 to generate a user notification to notify the user of the short - circuit condition. Additionally, in at least some examples, when a short - circuit condition exists at node 220 or the CC1 terminal 232 and the CC2 terminal 234, the processing element 244 prevents the USB PD controller 210 from coupling node 218 to node 220 through the transistor 216, protecting the USB PD controller 210 and / or other components of the system 200 or a device including the system 200 from damage caused by the short - circuit condition.

[0026] Although discussed herein and in Figure 2It is shown that the CC1 terminal 232 is configured to be coupled to the CC terminal 236, and the CC2 terminal 234 is configured to be coupled to the VCONN terminal 238, but in some examples, the coupling can be reversed. For example, at least some of the USB cables 204 can be reversible such that depending on the orientation in which the plug 226 is inserted into the socket 224, the CC1 terminal 232 is configured to be coupled to one of the CC terminal 236 or the VCONN terminal 238, and the CC2 terminal 234 is configured to be coupled to the other of the CC terminal 236 or the VCONN terminal 238. Thus, while the coupling associated with one orientation of the plug 226 inserted into the socket 224 is described herein, the coupling associated with any orientation of the plug 226 inserted into the socket 224 is contemplated and included within the scope of the present disclosure. Accordingly, in at least some examples, the USB PD controller 210 is further configured to detect and / or determine which of the CC1 terminal 232 or the CC2 terminal 234 is coupled to the VCONN terminal 238 (or the CC terminal 236) to determine which of the CC1 terminal 232 or the CC2 terminal 234 is coupled to the node 218.

[0027] Now referring to Figure 3 , a schematic diagram of an illustrative circuit 300 is shown. In at least some examples, the circuit 300 is suitable for implementation as the CC short circuit protection circuit 248 of the USB PD controller 210 of Figure 2 , and reference is made to the elements of Figure 2 when describing the circuit 300. In at least some examples, the circuit includes a first current source 302, a second current source 304, a switch 306, a switch 308, a resistor 310, and a resistor 312. In at least some examples, the resistor 306 has a resistance of approximately 500 ohms, and the resistor 308 has a resistance of approximately 500 ohms. In at least some examples, the first terminal of the first current source 302 is coupled to the first node 314, the second terminal of the first current source 302 is coupled to the first terminal of the switch 306, and the second terminal of the switch 306 is coupled to the second node 316. The resistor 310 is coupled between the second node 316 and the ground terminal 318. The first terminal of the second current source 304 is coupled to the first node 314, the second terminal of the second current source 304 is coupled to the first terminal of the switch 308, and the second terminal of the switch 308 is coupled to the third node 320. The resistor 312 is coupled between the third node 320 and the ground terminal 318. In at least some examples, the first node 314 is configured to be coupled to a voltage source, such as the output of the power management circuitry 242, the second node 316 is coupled to the CC1 terminal 232, and the third node 320 is coupled to the CC2 terminal 234.

[0028] In at least some examples, switches 306 and 308 are controlled by processing element 244 of USB PD controller 210. For example, when processing element 244 detects that plug 226 has been inserted into receptacle 224 and / or receptacle 224 is operating in DFP mode, processing element 244 controls switches 306 and 308 to close before controlling transistor 216 to couple node 218 to node 220. When switch 306 is closed, current source 302 is coupled to second node 316, and current flows through resistor 310 to ground terminal 318, generating a voltage at second node 316 that is approximately equal to the output of current source 302 divided by the resistance of resistor 310 in a non-shorted condition. When switch 308 is closed, current source 304 is coupled to third node 320, and current flows through resistor 312 to ground terminal 318, generating a voltage at third node 320 that is approximately equal to the output of current source 304 divided by the resistance of resistor 312.

[0029] In at least some examples, second node 316 and third node 320 are monitored by processing element 244 to determine the voltages present at second node 316 and third node 320, respectively, thereby determining the resistance of resistor 310 and the resistance of resistor 312. For example, the ADC of processing element 244 has inputs coupled to second node 316 and third node 320, and the digital values representative of the outputs of current source 302 and current source 304 are divided by the output of the ADC, respectively. When the resistance determined based on the voltage measured at second node 316 is less than approximately 500 ohms, processing element 244 determines that there is a short-circuit condition at CC1 terminal 232. When the resistance determined based on the voltage measured at third node 320 is less than approximately 500 ohms, processing element 244 determines that there is a short-circuit condition at CC2 terminal 234. When a short-circuit condition exists, USB PD controller 210 prevents node 218 from being coupled to node 220, protecting USB PD controller 210 from the determined short-circuit condition. In at least some examples, after determining the resistances of resistor 310 and resistor 312, switches 306 and 308 are controlled to open, decoupling current source 302 from second node 316 and current source 304 from third node 320, respectively.

[0030] Now referring to Figure 4 , a schematic diagram of an illustrative circuit 400 is shown. In at least some examples, circuit 400 is suitable for implementation as the VBUS short-circuit protection circuit 246 of USB PD controller 210 as Figure 2 , and reference is made to Figure 2components. In at least some examples, the circuit includes a current source 402, a switch 404, and a switch 406. In at least some examples, a first terminal of the switch 404 is coupled to a first node 410, a second terminal of the switch 404 is coupled to a first terminal of the current source 402, a second terminal of the current source 402 is coupled to a first terminal of the switch 406, and a second terminal of the switch 406 is coupled to a second node 412. In at least some examples, the resistor 408 is not a physical and / or discrete component, but represents the amount of resistance that would be present in the circuit 400 when a short circuit exists at the second node 412. When a short circuit exists at the second node 412, the amount of resistance caused by the short circuit is drawn into the circuit 400 as the resistor 408 coupled between the second node 412 and the ground terminal 414. In at least some examples, the first node 410 is configured to be coupled to a voltage source, such as an output of the power management circuitry 242, and the second node is coupled to the node 220 (and thus coupled to the VBUS terminal 222).

[0031] In at least some examples, the switches 404 and 406 are controlled by the processing element 244 of the USB PD controller 210. For example, when the processing element 244 detects that the plug 226 has been inserted into the socket 224, the processing element 244 controls the switches 404 and 406 to close before controlling the control transistor 216 to couple the node 218 to the node 220. When the switch 404 is closed, the current source 402 is coupled to the first node 410, and when the switch 406 is closed, the current source 402 is coupled to the second node 412. When a short circuit exists at the second node 412, current flows through the resistor 408 to the ground 414, generating a voltage at the second node 412 that is approximately equal to the output of the current source 402 divided by the resistance of the resistor 408. When no short circuit condition exists at the second node 412 and the resistor 408 is invisible to the circuit 400, the voltage at the second node 412 is approximately equal to the voltage present at the first node 410. Additionally, in at least some examples where the value of the signal present at the node 410 exceeds a predetermined value, the switch 404 is opened to decouple the current source 402 from the node 410 (e.g., such as when a high voltage exists at the node 410 and the current source 402 is a low voltage current source). In some examples where the ability to isolate the current source 402 from the node 410 is not desired, the switch 404 is omitted from the circuit 400.

[0032] In at least some examples, the second node 412 is monitored by the processing element 244 to determine the voltage present at the second node 412, and in at least some examples the resistance represented by the resistor 408 is determined thereby. For example, the ADC of the processing element 244 has an input coupled to the second node 412, and the digital value representing the output of the current source 402 is divided by the output of the ADC. When the resistance determined based on the voltage measured at the second node 412 is approximately 5.1 kiloohms, plus or minus a variation tolerance of approximately twenty percent, or between approximately 800 ohms and 1.2 kiloohms, the processing element 244 determines that a short circuit condition exists between the VBUS terminal 222 and the CC1 terminal 232 or between the VBUS terminal 222 and the CC2 terminal 234. Similarly, when the measured voltage is equal to approximately 1.1V, the processing element 244 determines that a short circuit condition exists between the VBUS terminal 222 and the CC1 terminal 232 or between the VBUS terminal 222 and the CC2 terminal 234. When a short circuit condition exists, the USB PD controller 210 prevents the node 218 from being coupled to the node 220, protecting the USB PD controller 210 from the determined short circuit condition. In at least some examples, after determining the resistance of the resistor 408, the switches 405 and 406 are controlled to open, decoupling the current source 402 from the second node 412.

[0033] Now referring to Figure 5 , a schematic diagram of a circuit 500 is shown. In at least one example, the circuit 500 is suitable for implementation as the Figure 2 voltage control circuit 212, and reference is made to the Figure 2 components of the

[0034] when describing the circuit 500. In at least one example, the circuit 500 includes an optocoupler 505 (which includes a light emitting diode 506 and a photosensor 507), resistors 510, 515, 530, 535, 540, 545 and 547, a shunt regulator 520, and a capacitor 525. In some examples, at least some aspects of the circuit 500 are implemented in other devices. For example, when implemented as the voltage control circuit 212, at least some components of the circuit 500 may be implemented in the USB PD controller 210. Additionally, in various examples, at least some components of the circuit 500 (e.g., the resistor 535) may be omitted, or additional components not shown may be added to the circuit 500 to support the functions described herein.

[0034] In at least one example architecture of circuit 500, optocoupler 505 has a first terminal coupled to node 565 and configured to receive voltage VDD for generating an output of a power supply, a second terminal coupled to node 570, a third terminal coupled to node 575 via resistor 510, and a fourth terminal coupled to node 580. Resistor 515 is coupled between node 575 and node 580. Shunt regulator 520 has a cathode coupled to node 580, an anode coupled to ground voltage potential 550, and a control input coupled to node 585. Capacitor 525 is coupled between node 580 and node 585. Resistor 530 is coupled between node 555 and node 575, resistor 535 is coupled between node 560 and node 585, resistor 540 is coupled between node 585 and ground voltage potential 550, resistor 545 is coupled between node 570 and ground voltage potential 550, and resistor 547 is coupled between node 575 and node 585. In some examples, circuit 500 is configured to receive a power supply output (VSOURCE) at node 555 (e.g., such that node 555 corresponds to Figure 2 node 218), receive VREF at node 560, receive CATH at node 580, and be coupled to a control input of a power supply (e.g., Figure 2 power supply 208) at node 570.

[0035] In an example operation of circuit 500, shunt regulator 520 converts the voltage present at node 585 into a proportional current that drives the brightness of light-emitting diode 506 of optocoupler 505. The light emitted by light-emitting diode 506 is converted back into a proportional voltage by photosensor 507, thereby approximately providing at node 570 a voltage proportional to the voltage present at node 585. When node 560 is in a floating state, resistors 547 and 540 form a voltage divider that establishes the voltage present at node 585 as proportional to the voltage present at node 555. When current is absorbed from node 560, the change in the voltage at node 585 is transferred by shunt regulator 520 and optocoupler 505 to node 570, causing the value of VSOURCE to change proportionally to the value of the current absorbed from node 560.

[0036] Now referring to Figure 6 , a flowchart of illustrative method 600 is shown. In some examples, method 600 is a method for determining whether a short circuit condition exists at a terminal of a device. In one example, the terminal is a CC terminal of a USB-C receptacle or plug. Thus, in at least some examples, method 600 is suitable for implementation by a communication controller, such as Figure 2 USBPD controller 210 of system 200.

[0037] At operation 602, short circuit detection begins and method 600 proceeds to operation 604. In some examples, short circuit detection begins when it is detected that a plug is inserted into a socket. The plug is, for example, a USB-C plug, and the socket is, for example, a USB-C socket having a VBUS terminal, a CC1 terminal, and a CC2 terminal. As part of detecting the plug insertion, the orientation of the plug is determined and / or the usage (e.g., UFP or DFP) of the socket (when the socket is part of a DRP) is determined. When the socket is part of a DRP and the usage determined based on the inserted plug is DFP, short circuit detection begins. In another example, when the plug has not been inserted into the socket, the DRP alternates between DFP and UFP usage, monitors for plug insertion, and subsequently determines DFP. In such examples, short circuit detection begins whenever the DRP transitions from UFP usage to DFP usage, and short circuit detection ends when the DRP transitions from DFP usage to UFP usage. In yet another example, when the socket is part of a DFP that does not have DRP capabilities, short circuit detection remains operative until the voltage present at the CC1 terminal reaches 2V and / or the voltage present at the CC2 terminal reaches 2V.

[0038] At operation 604, the communication controller controls a switch to close to cause current to flow to the CC1 terminal of the socket. In some examples, such as when the CC1 terminal is operating under normal conditions and not experiencing a short circuit, current flows from a constant current source through a resistor of approximately 500 ohms coupled from the CC1 terminal to ground. When the CC1 terminal is experiencing a short circuit condition, current flows through an alternative path to ground, where the resistance of the alternative path is less than the resistor of approximately 500 ohms.

[0039] At operation 606, the resistance present at the CC1 terminal is determined. In at least some examples, the resistance is determined by the communication controller measuring the voltage present at the CC1 terminal and dividing the measured voltage by the current value output by the constant current source at operation 604. In at least some examples, one or more of the current value output by the constant current source and / or the voltage present at the CC1 terminal are converted from the analog domain to the digital domain by an ADC before the division is performed. When the determined resistance is less than approximately 500 ohms, the communication controller determines that the CC1 terminal is experiencing a short circuit condition.

[0040] At operation 608, the communication controller controls the switch to close to allow current to flow to the CC2 terminal of the socket. In some examples, such as when the CC2 terminal is operating under normal conditions and not experiencing a short circuit, current flows from a constant current source through a resistor of approximately 500 ohms coupled from the CC2 terminal to ground. When the CC2 terminal is experiencing a short circuit condition, current flows through an alternative path to ground, where the resistance of the alternative path is less than that of the approximately 500 ohm resistor. In some examples, when both the CC1 terminal and the CC2 terminal are experiencing short circuit conditions, the alternative ground path associated with the CC1 terminal is the same alternative ground path associated with the CC2 terminal, while in other examples, the alternative ground path associated with the CC1 terminal is not the same alternative ground path associated with the CC2 terminal.

[0041] At operation 610, the resistance present at the CC2 terminal is determined. In at least some examples, the resistance is determined by the communication controller measuring the voltage present at the CC2 terminal and dividing the measured voltage by the current value output by the constant current source at operation 608. In at least some examples, one or more of the current value output by the constant current source and / or the voltage present at the CC2 terminal are converted from the analog domain to the digital domain by an ADC before the division is performed. When the determined resistance is less than approximately 500 ohms, the communication controller determines that the CC2 terminal is experiencing a short circuit condition.

[0042] At operation 612, the communication controller determines whether both the CC1 terminal and the CC2 terminal have been determined to be experiencing short circuit conditions (e.g., both determined resistances are less than approximately 500 ohms), and at operation 614, the communication controller disables the socket such that a device coupled to the communication controller via the socket and a plug does not start communicating. In at least some examples, disabling the socket includes preventing a signal from being applied to the VBUS terminal of the socket from a power source. When at least one of the CC1 terminal or the CC2 terminal is not experiencing a short circuit condition, at operation 616, the communication controller proceeds according to normal operation.

[0043] Although the operations of method 600 have been discussed and labeled with numerical references, method 600 may include additional operations not recited herein, any one or more of the operations recited herein may include one or more sub-operations, any one or more of the operations recited herein may be omitted, and / or any one or more of the operations recited herein may be performed in an order different from that presented herein (e.g., in reverse order, substantially simultaneously, overlapping, etc.), all of which are intended to fall within the scope of the present disclosure.

[0044] Now refer to Figure 7, shows a flowchart of an illustrative method 700. In some examples, method 700 is a method for determining whether a short - circuit condition exists at a terminal of a device. In one example, the terminal is the VBUS terminal of a USB - C receptacle or plug. Thus, in at least some examples, method 700 is suitable for implementation by a communication controller, such as Figure 2 the USB PD controller 210 of system 200 of

[0045] At operation 702, short - circuit detection begins and method 700 proceeds to operation 704. In some examples, short - circuit detection begins when a plug is detected to be inserted into a receptacle. The plug is, for example, a USB - C plug, and the receptacle is, for example, a USB - C receptacle having a VBUS terminal, a CC1 terminal, and a CC2 terminal. As part of detecting the plug insertion, the orientation of the plug is determined and / or the use (e.g., UFP or DFP) of the receptacle (when the receptacle is part of a DRP) is determined. When the receptacle is part of a DRP and the use determined based on the inserted plug is DFP, short - circuit detection begins. In another example, when the plug has not been inserted into the receptacle, the DRP alternates between DFP and UFP uses, monitors for plug insertion, and subsequently determines DFP. In such examples, short - circuit detection begins whenever the DRP transitions from a UFP use to a DFP use, and short - circuit detection ends when the DRP transitions from a DFP use to a UFP use. In yet another example, when the receptacle is part of a DFP that does not have DRP capabilities, short - circuit detection is always maintained.

[0046] At operation 704, the communication controller controls at least one switch to close to cause current to flow to the VBUS terminal of the receptacle. In some examples, such as when the VBUS terminal is operating under normal conditions and not experiencing a short - circuit, a constant - current source that generates current pulls the value of the VBUS terminal until it is approximately the voltage supply value of the constant - current source. When the VBUS terminal is experiencing a short - circuit condition, the resistance at the VBUS terminal becomes visible. In some examples, the constant - current source is applied to the VBUS terminal until the voltage present at the VBUS terminal reaches 2V, after which it is determined that the VBUS terminal is not experiencing a short - circuit condition and the constant - current source is disabled.

[0047] At operation 706, the resistance present at the VBUS terminal is determined. In at least some examples, the resistance is determined by the communication controller measuring the voltage present at the VBUS terminal and dividing the measured voltage by the current value output by the constant - current source at operation 704. In at least some examples, one or more of the current value output by the constant - current source and / or the voltage present at the VBUS terminal are converted from the analog domain to the digital domain by an ADC before the division is performed.

[0048] At operation 708, the communication controller determines whether the VBUS terminal is experiencing a short circuit condition. When the determined resistance is between approximately 800 ohms and approximately 1.2 kiloohms, or when the determined resistance is equal to approximately 5.1 kiloohms plus or minus a change of approximately twenty percent, the communication controller determines that the VBUS terminal is experiencing a short circuit condition to the CC1 terminal and / or the CC2 terminal. Similarly, when the measured voltage is equal to approximately 1.1V, the communication controller determines that the VBUS terminal is experiencing a short circuit condition to the CC1 terminal and / or the CC2 terminal.

[0049] When the communication controller determines that the VBUS terminal is experiencing a short circuit condition, at operation 710, the communication controller disables the socket such that a device coupled to the communication controller via the socket and the plug does not begin communication. In at least some examples, disabling the socket includes preventing a signal from being applied to the VBUS terminal from the power source. When the VBUS terminal is not experiencing a short circuit condition, at operation 712, the communication controller continues according to normal operation.

[0050] Although the operations of method 700 have been discussed and labeled with numerical references, method 700 may include additional operations not recited herein, any one or more of the operations recited herein may include one or more sub-operations, any one or more of the operations recited herein may be omitted, and / or any one or more of the operations recited herein may be performed in an order different from that presented herein (e.g., in reverse order, substantially simultaneously, overlapping, etc.), all of which are intended to fall within the scope of the present disclosure.

[0051] In addition, although methods 600 and 700 are described independently, in at least some examples, methods 600 and 700 are complementary such that the same communication controller may perform both methods 600 and 700. In addition, the operations of methods 600 and 700 may be arranged in any order such that some operations of method 700 are performed between the operations of method 600, or are performed substantially simultaneously with at least some operations of method 600. In another example, the same communication controller performs method 600 and performs method 700 before coupling the VBUS terminal 222 to a power source (e.g., providing VBUS power at the VBUS terminal 222) when no short circuit condition is detected, thereby protecting the communication controller, the socket, the plug, and / or the device including the communication controller from damage and reduced user experience.

[0052] Now turning to Figure 8 , an illustrative timing diagram 800 is shown. In at least some examples, the timing diagram 800 illustrates the operation of the circuit 300 of Figure 3 or the circuit 400 of Figure 4 , and / or at least partially corresponds to the method 600 of Figure 6 orFigure 7 Method 700, and reference may be made to Figure 3 , Figure 4 , Figure 6 and / or Figure 7 when describing timing diagram 800. As shown in timing diagram 800, at time t1, the DRP operates in UFP mode and short circuit detection is disabled (e.g., switches 306 and 308 or switches 404 and / or 406 are controlled to be open). At time t2, the DRP operates in DFP mode and short circuit detection is enabled (e.g., switches 306 and 308 or switches 404 and / or 406 are closed), but no short circuit is detected.

[0053] At time t3, the DRP operates in DFP mode again and a short circuit is detected. In some examples, when there is no connection between the plug and the socket, the DFP operation is in the normal process of the DRP alternating between UFP and DFP operation modes, while in other examples, the operation in DFP mode is due to the plug being inserted into the socket, and the DRP is a controller that operates in DFP mode based on a determination made in response to the plug being inserted into the socket. Also at time t4, the connection of the socket is disabled. In various examples, disabling the connection includes preventing VBUS from being applied to the VBUS terminal of the socket, and / or preventing a signal or voltage from being applied to the CC1 terminal and / or CC2 terminal of the socket.

[0054] Now turning to Figure 9 , an illustrative timing diagram 900 is shown. In at least some examples, timing diagram 900 illustrates the operation of Figure 4 circuit 400 and / or at least partially corresponds to Figure 7 method 700, and reference may be made to Figure 4 and / or Figure 7 when describing timing diagram 900. As shown in timing diagram 900, at time t1, the DRP operates in UFP mode and short circuit detection is disabled (e.g., switches 404 and / or 406 are controlled to be open). At time t2, the DRP operates in DFP mode and short circuit detection is enabled (e.g., switches 404 and 406 are closed), but no short circuit is detected.

[0055] At time t3, the plug is inserted into the socket, causing the DRP to operate in DFP mode based on the control of the DRP applied according to a determination made in response to the plug being inserted into the socket. At time t4, it is determined that there is no short circuit, and short circuit detection is disabled (e.g., switches 404 and / or 406 are controlled to be open). Also at time t4, VBUS is applied to the VBUS terminal of the socket. Although shown as 5V in Figure 9 , the value of VBUS can be any suitable value.

[0056] In the foregoing discussion, the terms "including" and "comprising" are used in an open-ended manner and should thus be interpreted to mean "including but not limited to...". Also, the term "couple, coupling" means an indirect or direct wired or wireless connection. Thus, if a first device, element, or component is coupled to a second device, element, or component, the coupling can be by direct coupling or by indirect coupling via other devices, elements, or components and connections. Similarly, a device, element, or component that is coupled between a first component or location and a second component or location can be by a direct connection or by an indirect connection via other devices, elements, or components and / or couplings. A device that is "configured to" perform a task or function can be configured (e.g., programmed and / or hardwired) by a manufacturer at the time of manufacture to perform the function, and / or can be configured (or reconfigured) by a user after manufacture to perform the function and / or other additional or alternative functions. The configuration can be by firmware and / or software programming of the device, by the construction and / or layout of the hardware components and interconnections of the device, or a combination thereof. Additionally, a circuit or device that is said to include certain components can instead be configured to be coupled to those components to form the described circuitry or device. For example, a structure described as including one or more semiconductor elements (such as transistors), one or more passive elements (such as resistors, capacitors, and / or inductors), and / or one or more sources (such as voltage and / or current sources) can instead include only semiconductor elements within a single physical device (e.g., a semiconductor die and / or an integrated circuit (IC) package), and can be configured to be coupled to at least some of the passive elements and / or sources at the time of manufacture or after manufacture to form the described structure, e.g., by an end user and / or a third party.

[0057] Although certain components are described herein as having a particular process technology (e.g., FET, metal-oxide FET (MOSFET), n-type, p-type, etc.), those components can be replaced with components of other process technologies (e.g., replacing a FET and / or MOSFET with a bipolar junction transistor (BJT), replacing n-type with p-type or vice versa, etc.) and the circuit including the replaced components can be reconfigured to provide a desired function that is at least partially similar to the function available prior to the component replacement. Additionally, in the foregoing discussion, the phrase "ground voltage potential" is intended to include chassis ground, earth ground, floating ground, virtual ground, digital ground, common ground, and / or any other form of ground connection applicable to or suitable for the teachings of the present disclosure. Unless otherwise specified, "about", "approximately", or "substantially" in front of a value means + / - 10% of the stated value.

[0058] The foregoing discussion is intended to illustrate the principles and various examples of the present disclosure. Once the foregoing disclosure is fully understood, those skilled in the art will recognize many variations and modifications. The foregoing disclosure is intended to interpret the present disclosure as covering all such variations and modifications.

Claims

1. A circuit for short - circuit protection, which comprises: a first current source having a first terminal and a second terminal; a first switch having respective first and second terminals, the first terminal of the first switch being coupled to the second terminal of the first current source; a first resistor coupled between the second terminal of the first switch and a ground terminal; a second current source having respective first and second terminals, the first terminal of the second current source being coupled to the first terminal of the first current source; a second switch having respective first and second terminals, the first terminal of the second switch being coupled to the second terminal of the second current source; a second resistor coupled between the second terminal of the second switch and the ground terminal; a third current source having respective first and second terminals, the first terminal of the third current source being coupled to the respective first terminals of the first current source and the second current source; and a third switch having respective first and second terminals, the first terminal of the third switch being coupled to the second terminal of the third current source, and the second terminal of the third switch being coupled to the ground terminal.

2. The circuit according to claim 1, comprising a fourth switch having respective first and second terminals, wherein: the first terminal of the fourth switch is coupled to the respective first terminals of the first current source and the second current source; and the second terminal of the fourth switch is coupled to the first terminal of the third current source.

3. The circuit according to claim 1, comprising a processing element, wherein the processing element is coupled to the first switch, the second switch and the third switch and is configured to control the first switch, the second switch and the third switch.

4. The circuit according to claim 3, comprising a power management circuit system, wherein the power management circuit system has a first input, a second input and an output, the first input being configured to be coupled to an output of a power supply, the second input being coupled to an output of the processing element, and the output being coupled to the respective first terminals of the first current source, the second current source and the third current source.

5. The circuit according to claim 4, wherein the power management circuit system includes a power regulator having an input coupled to the output of the power supply and having an output coupled to the respective first terminals of the first current source, the second current source and the third current source and coupled to the second terminal of the third switch.

6. The circuit according to claim 4, comprises: the power supply; and a transistor having a gate terminal coupled to a second output of the power management circuit system, a drain terminal coupled to the output of the power supply, and a source terminal coupled to the second terminal of the third switch, the second terminal of the first switch and the first resistor are coupled to the configuration channel 1 terminal of the socket, i.e., the CC1 terminal, The second terminal of the second switch and the second resistor are coupled to the CC2 terminal of the socket, and the second terminal of the third switch is coupled to the bus voltage terminal of the socket, i.e., the VBUS terminal.

7. The circuit according to claim 1, comprising a socket configured to receive a reversible plug, the socket having: a configuration channel 1 terminal, i.e., a CC1 terminal, the CC1 terminal being coupled to the second terminal of the first switch and coupled to the first resistor ； a CC2 terminal, the CC2 terminal being coupled to the second terminal of the second switch and coupled to the second resistor; and a bus voltage terminal, i.e., a VBUS terminal, the VBUS terminal being coupled to the second terminal of the third switch.

8. A circuit for short - circuit protection, which comprises: a configuration channel terminal short - circuit protection circuit, i.e., a CC terminal short - circuit protection circuit, which is configured to: close the first switch to apply a first constant current to the CC1 terminal coupled to the ground terminal via the first resistor to determine the amount of resistance present at the CC1 terminal; close the second switch to apply a second constant current to the CC2 terminal coupled to the ground terminal via the second resistor to determine the amount of resistance present at the CC2 terminal; and open the first switch and the second switch; a bus voltage terminal short - circuit protection circuit, i.e., a VBUS terminal short - circuit protection circuit, which is configured to: close the third switch to apply a third constant current to the VBUS terminal coupled to the ground terminal to determine the amount of resistance present at the VBUS terminal; and open the third switch; and a processing element, which is configured to: after determining that a plug has been inserted into a socket including the CC1 terminal, the CC2 terminal, and the VBUS terminal, control the first switch, the second switch, and the third switch to close; measure the voltage present at the CC1 terminal to determine the amount of resistance present at the CC1 terminal; measure the voltage present at the CC2 terminal to determine the amount of resistance present at the CC2 terminal; measure the voltage present at the VBUS terminal to determine the amount of resistance present at the VBUS terminal; control the first switch, the second switch, and the third switch to open; and when the determined amount of resistance present at the CC1 terminal and the determined amount of resistance present at the CC2 terminal, or the determined amount of resistance present at the VBUS terminal indicates the presence of a short - circuit condition, prevent the application of a VBUS signal to the VBUS terminal.

9. The circuit according to claim 8, wherein the CC terminal short - circuit protection circuit comprises: a first current source having a first terminal and a second terminal, the first current source being configured to output the first constant current at the second terminal of the first current source; the first switch coupled between the second terminal of the first current source and the CC1 terminal; the first resistor coupled between the CC1 terminal and the ground terminal; A second current source having a respective first terminal and second terminal, the first terminal of the second current source being coupled to the first terminal of the first current source, the second current source being configured to output the second constant current at the second terminal of the second current source; A second switch coupled between the second terminal of the second current source and the CC2 terminal; And A second resistor coupled between the CC2 terminal and the ground terminal.

10. The circuit according to claim 9, wherein the VBUS terminal short-circuit protection circuit Comprises: A third current source having a respective first terminal and second terminal, the first terminal of the third current source being coupled to the respective first terminals of the first current source and the second current source, the third current source being configured to output the third constant current at the second terminal of the third current source; And A third switch coupled between the second terminal of the third current source and the VBUS terminal.

11. The circuit according to claim 9, comprising a power management circuit system having a first input configured to be coupled to an output of a power supply, a second input having an output coupled to the processing element, and an output having an output coupled to the respective first terminals of the first current source and the second current source.

12. The circuit according to claim 11, Comprises: The power supply; And A transistor having a gate terminal coupled to a second output of the power management circuit system, a drain terminal coupled to the output of the power supply, and a source terminal coupled to the VBUS terminal.

13. The circuit according to claim 12, wherein when the short-circuit condition exists, the processing element is configured to prevent the VBUS signal from being applied to the VBUS terminal by controlling the power management circuit system to hold the transistor in a non-conducting state and electrically decouple the output of the power supply from the VBUS terminal.

14. The circuit according to claim 9, wherein the first resistor has a first resistance value and the second resistor has a second resistance value, and wherein when the determined amount of resistance present at the CC1 terminal is less than the first resistance value and the determined amount of resistance present at the CC2 terminal is less than the second resistance value, the processing element is configured to determine that the short-circuit condition exists.

15. A system for short-circuit protection, which Comprises: A processor; A communication port having a configuration channel terminal, namely the CC1 terminal, a second configuration channel terminal, namely the CC2 terminal, and a bus voltage terminal, namely the VBUS terminal; And A communication controller configured to facilitate communication of the processor via the communication port, wherein the communication controller comprises: A first current source having a first terminal and a second terminal; A first switch coupled between the second terminal of the first current source and the CC1 terminal; A first resistor coupled between the CC1 terminal and the ground terminal; A second current source having respective first and second terminals, the first terminal of the second current source being coupled to the first terminal of the first current source; A second switch coupled between the second terminal of the second current source and the CC2 terminal; A second resistor coupled between the CC2 terminal and the ground terminal; A third current source having respective first and second terminals, the first terminal of the third current source being coupled to the respective first terminals of the first current source and the second current source; A third switch coupled between the second terminal of the third current source and the ground terminal and coupled to the VBUS terminal; and A processing element coupled to the first switch, the second switch, and the third switch and configured to control the first switch, the second switch, and the third switch.

16. The system of claim 15, wherein the communication controller is configured to determine whether a short circuit condition exists at the VBUS terminal or at the CC1 and CC2 terminals after detecting that a plug has been inserted into the communication port.

17. The system of claim 15, further comprising a power management circuitry, wherein the power management circuitry has a first input configured to be coupled to an output of a power source, a second input coupled to an output of the processing element, and an output coupled to a first node, and the power management circuitry includes a power regulator having an input coupled to the output of the power source and an output coupled to the respective first terminals of the first current source, the second current source, and the third current source.

18. The system of claim 17, further comprising: The power source; and A transistor having a gate terminal coupled to a second output of the power management circuitry, a drain terminal coupled to the output of the power source, and a source terminal coupled to the VBUS terminal.

19. The system of claim 18, wherein when a short circuit condition exists, the communication controller prevents a VBUS signal from being applied to the VBUS terminal by controlling the power management circuitry to hold the transistor in a non-conducting state and electrically decouple the output of the power source from the VBUS terminal.

20. The system of claim 15, wherein the processing element is further configured to: After determining that a plug has been inserted into the communication port, control the first switch, the second switch, and the third switch to close; Measure the voltage present at the CC1 terminal to determine the amount of resistance present at the CC1 terminal; Measure the voltage present at the CC2 terminal to determine the amount of resistance present at the CC2 terminal; Measure the voltage present at the VBUS terminal to determine the amount of resistance present at the VBUS terminal; Control the first switch, the second switch, and the third switch to open; and When the determined amount of resistance present at the CC1 terminal and the determined amount of resistance present at the CC2 terminal, or the determined amount of resistance present at the VBUS terminal indicates the presence of a short circuit condition, prevent the application of the VBUS signal to the VBUS terminal.

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