Chip type surface mount diode assembly
By constructing positive and negative electrodes in parallel and designing grooves or guide channels on the back of the chip, and combining the method of making negative electrodes with L-shaped or semi-L-shaped guide channels, the problems of large volume and difficult environmental protection during the packaging of traditional diode components are solved, and the components are reduced and electrical characteristics are optimized.
Patent Information
- Application Number
- CN202411770595.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-17
- Publication Date
- 2025-04-04
- Estimated Expiration
- 2045-02-17
AI Technical Summary
During the packaging process, traditional diode components need to be welded with two upper and lower pieces, which makes the components large and difficult to miniaturize, and the environmental protection needs are difficult to meet.
By constructing positive and negative electrodes in parallel and designing grooves or transverse guide channels on the back of the chip to increase the back area, thin the components, and making negative electrodes using L- or semi-L-type guide channels, reducing dependence on the diffusion process.
The components are reduced, the electrical characteristics and adhesion effect are improved, the use of raw materials is reduced, and the requirements of energy conservation and carbon reduction are met.
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Figure CN119767769A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of chip technology, and more particularly to a chip-type surface-mounted diode component. The technical focus of manufacturing the component is to utilize the groove design on the back of the component crystal grain in the process design to effectively expand the back area, and to achieve a similar thinning and increased adhesion effect on the chip to improve the electrical characteristics and the protection effect of the component, and complete the manufacturing of the component in the chip. Background Art
[0002] In the diode manufacturing and packaging process, the crystal grains are all produced in the chip factory, and the chip factory then transfers the crystal grains to the packaging factory to complete the packaging of the components. In terms of the packaging form, except for a few that implement axial production packaging, most of them have adopted surface mount packaging. The packaging method is to weld additional metal conductive plates on both sides of the crystal grain, and the metal conductive plates used are mainly constructed of upper and lower sheets. In the production of the crystal grain, the positive and negative poles are designed on the front and back sides of the crystal grain respectively. This kind of crystal grain must undergo subsequent packaging testing, and the volume of the packaged component is usually several times larger than the crystal grain.
[0003] Nowadays, in order to protect the earth and improve the environment, countries around the world are actively promoting the implementation of ESG in various fields. Under the trend and requirements of energy conservation and carbon reduction, reducing the use of raw materials will definitely be one of the key goals of the industry. The miniaturization of various components will also be an important direction for all parties to work hard on research and development in the future. Among them, how to effectively integrate the manufacturing and packaging of traditional diodes into the chip is a major challenge; the present invention will design the above-mentioned target elements into the packaging of surface-mounted diode components, so that after the size of the components is reduced, they can maintain their stable characteristics and optimize electrical properties under effective necessary protection. This is the focus of the content of the present invention. Summary of the invention
[0004] As is known to all, the crystal grains used in the manufacture of diode components nowadays all have the positive and negative electrodes of the crystal grains respectively arranged on their front and back sides, and it is inevitable to use at least two types of upper and lower sheets to weld the crystal grains during assembly; in response to this problem, the present invention mainly constructs the positive and negative electrodes of the crystal grains in parallel, so that after obtaining the necessary insulation protection, it does not need to be packaged by two upper and lower sheets, or only a single sheet type conductive electrode plate / pin welding is required to form a complete component; in addition, the manufacture of traditional crystal grains all maintains their flatness on the back side, and in this part, the present invention will add a proper amount of grooves / point groups and or horizontal conductive channels to the back side of each crystal grain to increase its back side area, achieve a thinning effect, optimize its negative electrode characteristics, and enhance its adhesion in subsequent processing; in addition, the manufacture of negative electrodes is generally achieved through related diffusion processes, and the present invention will also provide another method for manufacturing negative electrodes without the need for diffusion processes: the manufacture and application of L-shaped conductive channels or semi-L-shaped conductive channels.
[0005] The present invention is a chip-type surface-mounted diode component, each component at least comprises: one K positive electrodes: K is the number of positive electrodes of the component, and its table is the external positive electrode of the component, K≧1; one M negative electrodes: M is the number of negative electrodes of the component, and its table is the external negative electrode of the component, which is constructed in parallel with each positive electrode, M≧0; a back groove / point group and or a transverse conductive channel: the production of this groove / point and or transverse conductive channel can make the chip thinner and increase the surface area, and can enhance the firmness of subsequent insulating material coating; a metal layer: a metal layer is produced on the positive and negative electrode surfaces of the component and the back of the component, which is beneficial to the conduction and electrical gain of subsequent applications; an insulating material protective layer: the back of the component and or the front where collision may occur are covered with insulating material to protect the integrity of the component.
[0006] The positive electrodes of the above components all include a guard ring or an insulating ring groove, while the negative electrode may include a guard ring or an insulating ring groove depending on its construction method.
[0007] The above components are all manufactured in the chip state through the above-mentioned related functional processes, and after the component manufacturing is completed, each component in the chip is cut and separated along the designed cutting path into single components for use.
[0008] After cutting, the components can be covered with the required insulation layer around them as needed.
[0009] When K>M≧1, it means that the component contains K unidirectional functional components, and at least two of the unidirectional components share a common negative electrode, and the positive electrode and the common negative electrode are constructed in parallel.
[0010] When K=2 and M=0, the component is a bidirectional electrical functional component.
[0011] When K≧1 and M=0, after the metal layer is made on the surface of the component, it is no longer covered with insulating material. The back side is used as the negative electrode of the component. Then this component can be used as K unidirectional functional grains.
[0012] In addition to the diffusion method, the negative shock and the positive electrode can be constructed in parallel on the component by making an L-shaped conductive channel or a semi-L-shaped conductive channel. The following is an explanation:
[0013] Production of L-shaped conductive channel: No matter the component uses epitaxial chip after the positive electrode is produced, or uses silicon chip after the front and back diffusion is completed, the negative electrode originally planned on the front side can be used to make an L-shaped conductive channel from the back side of the component, regardless of whether there is related diffusion. The channel extends from the back side of the positive electrode to the back side of the negative electrode and then reaches the planned negative electrode surface. After the surface is metallized, conductive material is filled in to make a new negative electrode at the originally planned negative electrode position on the front side, so as to construct the positive and negative electrodes of the component in parallel and achieve the goal of thinning and optimizing electrical characteristics.
[0014] Production of semi-L-shaped conductive channel: No matter the component uses epitaxial chip after the positive electrode is made, or uses silicon chip after the front and back diffusion is completed, the negative electrode originally planned on the front side can be used to make a lateral conductive channel from the back side of the component. From the appropriate position in the surface of the originally planned negative electrode on the front side, a conductive channel with a depth greater than the thickness of the epitaxial layer of the epitaxial chip or exceeding the PN junction depth of the silicon chip can be made downward. These two conductive channels that are not actually connected are collectively called semi-L-shaped conductive channels. The electrical properties of the components made by this process also have the effect of making L-shaped conductive channels.
[0015] When the negative electrode of a component or a crystal grain is manufactured by adopting an L-shaped conductive channel or a semi-L-shaped conductive channel, the outer protective ring or insulating ring groove of the negative electrode can be omitted.
[0016] If the grooves / dot groups and lateral conductive channels made on the back of the component are applied to the positive electrode of the component, the basic electrical properties of the component can also be appropriately adjusted.
[0017] In order to facilitate the subsequent packaging and testing needs of the user end, the positive and negative electrode surfaces of the above-mentioned components can be pre-welded with solder materials or welded with conductive electrode plates / pins in a single sheet type as required, and the insulation protection of the surrounding areas and / or each surface except the conductive electrode plates / pins of the components can be strengthened; since this package only welds the conductive electrode plates / pins to the electrode surface on the front side of the component, it can produce the thinnest and shortest diode component with conductive electrode plates / pins with the same electrical specifications.
[0018] The implementation of the present invention can produce the following benefits:
[0019] 1. The packaging volume of components with the same function is reduced.
[0020] 2. The adhesion of the insulating protective layer can be improved.
[0021] 3. The electrical properties of the components can be improved.
[0022] 4. More diversified miniaturized components can be produced.
[0023] 5. Reduce the use of related raw materials, in line with the ESG principle of energy conservation and carbon reduction. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.
[0025] Figure 1 It is a schematic diagram of the configuration design of a single unidirectional component built on a chip;
[0026] Figure 2 This is a schematic diagram of the configuration design of two unidirectional components with a common negative electrode constructed on a chip;
[0027] Figure 3 This is a schematic diagram of the configuration design of six unidirectional components with a common negative electrode constructed on a chip;
[0028] Figure 4 It is a schematic diagram of the configuration design of a single bidirectional component built on a chip;
[0029] Figure 5 It is a cross-sectional diagram of the back side of the Schottky device made of epitaxial chip with grooves / dots configured and covered with insulating material;
[0030] Figure 6 This is a cross-sectional diagram of a Schottky device made of an epitaxial chip with grooves / dots configured on the back and insulating materials on both the front and back sides;
[0031] Figure 7 It is a cross-sectional diagram of the back side of the Schottky device made of epitaxial chip with grooves / dots, lateral conductive channels and covered with insulating materials;
[0032] Figure 8 It is a cross-sectional diagram showing the depth of the back-side conductive channel of the Schottky device made of epitaxial chip and the groove / point equivalent;
[0033] Fig. 9 It is a cross-sectional diagram of a new negative electrode constructed by using an L-shaped conductive channel in epitaxial chip manufacturing of Schottky components;
[0034] Fig.10 It is a cross-sectional diagram of the back side of the bidirectional TVS component made of epitaxial chip with grooves / dots configured and covered with insulating material;
[0035] Fig.11 It is a cross-sectional diagram of the groove / dot group configured on the back side of the bidirectional TVS die made by epitaxial chip;
[0036] Fig.12 It is a cross-sectional diagram of a bidirectional TVS die without groove / dot group configured on the back side of epitaxial chip production;
[0037] Fig.13 It is a cross-sectional diagram of a silicon chip using a back groove / point group and an L-shaped conductive channel to make a unidirectional diode component;
[0038] Fig.14 It is a cross-sectional diagram of a silicon chip that uses grooves / dots on the back and a semi-L-shaped conductive channel to make a unidirectional diode component, with both the front and back sides covered with insulating materials except for the positive and negative electrodes;
[0039] Fig.15It is a cross-sectional diagram of an epitaxial chip that uses grooves / dots on the back and an L-shaped conductive channel to make a unidirectional diode component, and only covers the back with insulating material;
[0040] Fig.16 It is a cross-sectional diagram of the back side of a bidirectional TVS component made of silicon wafer with grooves / points configured and covered with insulating material;
[0041] Fig.17 It is a cross-sectional diagram of the back side of the bidirectional TVS die configured with grooves / points without being covered with insulating material.
[0042] Fig.18 It is a cross-sectional diagram of a bidirectional TVS die made of silicon wafer with a lateral conductive channel configured on the back side without being covered with insulating material;
[0043] Fig.19 It is a cross-sectional diagram of the production of a unidirectional TVS die system made of a silicon chip, with grooves / points configured on the back and a half L-shaped conductive channel constructed, and a conductive electrode plate / pin welded on each of the positive and negative electrodes;
[0044] Fig. 20 It is a cross-sectional schematic diagram of constructing a groove / point group and a half L-shaped conductive channel on the back and negative electrode surface when making a unidirectional functional die of a silicon crystal chip, and making a lateral conductive channel on the positive electrode;
[0045] Fig.21 It is a cross-sectional schematic diagram of making a lateral conductive channel on each of the double positive electrodes and the back side when making a bidirectional functional crystal grain on a silicon crystal chip;
[0046] Fig. 22 This is a cross-sectional diagram of making a lateral conductive channel on the positive electrode surface and a groove / dot group on the back side when making unidirectional grains of silicon crystal chips.
[0047] Description of Figure Numbers:
[0048] 10: Chip;
[0049] 10a: epitaxial layer;
[0050] 10b: substrate;
[0051] 11: positive electrode;
[0052] 11a: positive electrode region;
[0053] 12: negative electrode;
[0054] 12a: negative electrode region;
[0055] 13: protection ring;
[0056] 14: P+ diffusion layer;
[0057] 15: N+ diffusion layer;
[0058] 16: SKY barrier;
[0059] 16a: PN interface;
[0060] 17: Insulation ring groove;
[0061] 18: groove / point group;
[0062] 19: L-shaped guide channel;
[0063] 20: upper guide channel;
[0064] 21,21a: transverse guide channel;
[0065] 22: Semi-L-shaped guide channel;
[0066] 23: Conductive material;
[0067] 24: Metal layer;
[0068] 25: Insulating material;
[0069] 26: Oxide layer;
[0070] 27: cutting path;
[0071] 28: common negative electrode;
[0072] 29: welding materials;
[0073] 30,30a: Conducting electrode plate / pin;
[0074] 50: grain;
[0075] 60: Components.
[0076] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION
[0077] The actual application of the chip-type surface mount diode component of the present invention is so extensive that it is impossible to list them in detail. The following examples are mainly based on the content of the production of the component of the present invention with reference to single-layer epitaxial wafer chips and silicon wafers as partial examples:
[0078] Embodiment 1: Using epitaxial chip to manufacture Schottky chip type surface mount diode components:
[0079] like Figure 1 to Figure 3As shown, the positive and negative electrodes are constructed on the same epitaxial layer 10a of the chip 10: a plurality of parallel positive electrode regions 11a and negative electrode regions 12a are divided on the epitaxial layer 10a, and the positive electrodes 11 and negative electrodes 12 of each component 60 are constructed in the positive electrode regions 11a and negative electrode regions 12a. The number of positive electrodes 11 and negative electrodes 12 of each component 60 can be designed according to the functional requirements of each component. Let K be the number of positive electrodes 11 of each component 60, and M be the number of negative electrodes 12 of each component 60, K≧M≧1; and the required cutting paths 27 are set on the periphery of each component 60: Figure 1 This is an example of the configuration of the positive electrode 11 and the negative electrode 12 when K=1 and M=1; Figure 2 This is an example of the configuration of the positive electrode 11 and the common negative electrode 28 with K=2 and M=1; Figure 3 This is an example of the configuration of the positive electrode 11 and the common negative electrode 28 with K=6 and M=1.
[0080] Figures 5 to 8 The structure cross section of the component 60 is shown as an example after the chip 10 with K=1 and M=1 is cut after the component 60 manufacturing process is completed. Figure 5 Figure 6 The positive electrode 11 and the negative electrode 12 are designed in parallel (including the guard ring 13 or the insulating ring groove 17 and the oxide layer 26, which will not be described in detail in the following examples). A groove / point group 18 is made on the back substrate 10b, and the positive electrode 11, the negative electrode 12 and the back are metallized to generate a metal layer 24. Figure 5 In the embodiment, only the back side of the component 60 is covered with an insulating material 25 for protection; Figure 6 The area outside the positive electrode 11 and the negative electrode 12 is covered with an insulating material 25 for double-sided protection; Figure 7 In addition to making a groove / point group 18 on the back, the groove / point group 18 is connected by a transverse conductive channel 21 and a conductive material 23 is filled in the transverse conductive channel 21; Figure 8 This is an example diagram of constructing a transverse conductive channel 21 on the back side, whose depth is equivalent to that of the groove / point group 18 and is not filled with conductive material.
[0081] Example 2: Using an epitaxial chip and an L-shaped conductive channel to manufacture a Schottky chip type surface mount diode component:
[0082] like Fig. 9 As shown, K=1, M=1, after completing the electrical fabrication on the positive electrode 11 surface on the front side of each component 60 (the related diffusion operation for fabricating the negative electrode 12 is omitted on the predetermined negative electrode 12 surface), a groove / point group 18 and an L-shaped conductive channel 19 are fabricated from the back side of the component 60 to penetrate into the negative electrode 12 surface originally set on the front side, and after the surface is metallized to produce a metal layer 24, the conductive material 23 is filled into the groove / point group 18 and the L-shaped conductive channel 19 on the back side, and the back side is covered with an insulating material 25.
[0083] Embodiment 3: Using epitaxial chips to manufacture bidirectional TVS chip-type surface mount diode components:
[0084] Figure 4 FIG. 1 is a diagram showing the configuration of the components 60 on the surface of the chip 10 , wherein K=2 and M=0; Fig.10 As shown, it is a cross-sectional view of the component 60 structure with K=2 and M=0, wherein the front side of the component 60 is a double positive electrode 11 configuration after the TVS electrical diffusion is completed, and a groove / point group 18 is constructed on the back side. After the metallization of the surface, a metal layer 24 is made and then covered with an insulating material 25 for protection.
[0085] If the component 60 of the third example is not covered with the insulating material 25 after the front double positive electrodes 11, the groove / point group 18 and the surface metal layer 24 are completed, the component 60 can be used as a dual unidirectional TVS die 50, and the back side is the common negative electrode 28. Fig.11 As shown; the production of the groove / point group 18 can also be omitted, and the surface metal layer 24 can be directly made, such as Fig.12 shown.
[0086] Example 4: Using silicon chips to manufacture components such as STD, FR, TVS, etc. with unidirectional functions:
[0087] After the chip 10 has completed the P+ diffusion layer 14, the N+ diffusion layer 15 and the PN junction 16a, the components 60 are manufactured; Fig.13 As shown, K=1, M=1 of the component 60, an insulating ring groove 17 is made around the predetermined positive electrode 11 and negative electrode 12 of the component 60; a groove / point group 18 and an L-shaped guide channel 19 are constructed on the back of the component 60 to penetrate the PN junction 16a to the predetermined negative electrode 12 surface of the front of the component 60, and after the surface metal layer 24 is completed, the conductive metal 23 is filled in the L-shaped guide channel 19, and then the area outside the positive electrode 11 and negative electrode 12 surface is covered with insulating material 25; in this example, in order to facilitate the subsequent assembly and use of the component 60, the positive electrode 11 and negative electrode 12 surface are pre-coated with welding material 29. The above-mentioned L-shaped guide channel 19 can also be replaced with a non-penetrating semi-L-shaped guide channel 22 to make various components 60, such as Fig.14 As shown: an upper conductive channel 20 passing through the PN junction 16a is made downward at a predetermined position of the negative electrode 12 on the front side of the component 60, and a groove / point group 18 and a lateral conductive channel 21 from the back side of the positive electrode 11 to the back side of the negative electrode 12 are made on the back side of the component 60. After the surface metal layer 24 is completed, the upper conductive channel 20 on the front side and the lateral conductive channel 21 on the back side are filled with conductive material 23. Fig.15 The diagram shows a schematic diagram of the upper guide channel 20 penetrating the epitaxial layer 10 a when a semi-L-shaped guide channel 22 is fabricated on the component 60 .
[0088] Example 5: Using silicon chips to make bidirectional TVS and other components:
[0089] like Fig.16 The figure shows an example of a structural cross-section of a TVS component 60 with K=2 and M=0. The component 60 has two positive electrodes 11 on the front side, and a PN junction 16a is formed by bidirectional electrical diffusion on the front and back sides of the component 60. Insulating ring grooves 17 are made on the outside of the two positive electrodes 11 for protection, and a groove / point group 18 is made on the back side of the component. After a metal layer 24 is made on the two positive electrodes 11 on the front side and the back side of the component 60, the area outside the two external electrode surfaces is covered with an insulating material 25 for insulation protection, and the bidirectional TVS component 60 is completed.
[0090] If the previous insulation protection operation is omitted in the manufacturing process, each component 60 can be used as a bidirectional TVS die 50 after cutting. Fig.17 As shown: a grain 50 with a groove / dot group 18 is made on the back side; Fig.18 As shown: a bidirectional crystal grain 50 with a lateral conductive channel 21 formed on the back and filled with a conductive material 23; Fig.17 , Fig.18 Both examples can be used as dual unidirectional die 50 .
[0091] Embodiment 6: welding conductive electrode plates / pins to the external electrode surfaces of each component:
[0092] like Fig.19 As shown, K=1, M=1. After the diffusion operation is completed, an insulating ring groove 17 is made around the positive electrode 11 and the negative electrode 12 of this component 60, and a groove / point group 18 and a half L-shaped conductive channel 22 are made. The positive electrode 11 and the negative electrode 12 of the component 60 are constructed on the front side of the component 60, and the conductive electrode plates / pins 30, 30a are welded to the positive electrode 11 and the negative electrode 12 plates of the component 60 with a single sheet. Except for the conductive electrode plates / pins 30, 30a, the upper and lower surfaces of the component 60 are covered with a proper amount of insulating material 25 to strengthen the protection of the component 60.
[0093] Example 7: Example of making lateral conductive channels, upper conductive channels, groove / point groups and / or lateral conductive channels on the positive and negative electrode surfaces and back surfaces of the component:
[0094] like Figures 20-22 As shown, K and M are: Fig. 20 .K=1, M=1; Fig.21 .K=2、M=0; Fig. 22.K=1, M=0; these three examples are intended to illustrate the partial use of the transverse guide channel 20 / 21a, the upper guide channel 20 and the groove / point group 18 in the production of the component 60 or the grain 50; and in these three figures, only the positions of the groove / point 18, the upper guide channel 20, and the transverse guide channel 21 / 21a in the component 60 or the grain 50 are marked with symbols; the symbols of other structural parts have been described in the above examples, and will not be marked or explained in this example.
[0095] The above description is only a preferred embodiment of the present invention, and does not limit the patent scope of the present invention. All equivalent structural changes made by using the contents of the present invention specification and drawings under the concept of the present invention, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present invention.
Claims
1. A chip-type surface mount diode component, characterized in that: Each component includes at least: one K positive electrodes: K is the number of positive electrodes of the component, and its table surface is the external positive electrode of the component, K≧1; one M negative electrodes: M is the number of negative electrodes of the component, and its table surface is the external negative electrode of the component, and is constructed in parallel with the positive electrode, M≧0; a back groove / point group and / or a lateral conductive channel; a metal layer: located on the positive and negative electrode surfaces and the back of the component; an insulating material protective layer: on the back or front of the component.
2. The chip-type surface mount diode assembly according to claim 1, characterized in that: When K≧1 and M=0 of each component, the back of the component is no longer insulated after the surface metal layer is made, and is used as the negative electrode of the component. Then the component can be used as K unidirectional functional grains.
3. The chip-type surface mount diode assembly according to claim 1, characterized in that: When K>M≧1, it means that the component contains K unidirectional functional components, and at least two of the unidirectional components share a common negative electrode, and the positive electrode and the common negative electrode are constructed in parallel.
4. The chip-type surface mount diode assembly according to claim 1, characterized in that: The negative electrode originally intended for the front side of the component can be used to make an L-shaped conductive channel from the back side of the component, extending from the back side of the positive electrode to the back side of the negative electrode and then to the negative electrode surface originally intended for the front side to make a new negative electrode.
5. The chip-type surface mount diode assembly according to claim 1, characterized in that: The negative electrode originally planned on the front side of the component can be made into a lateral conductive channel from the back side of the component, and an upper half conductive channel with a depth greater than the thickness of the epitaxial layer of the epitaxial chip or exceeding the PN junction depth of the silicon chip can be made downward from an appropriate position in the negative electrode originally planned on the front side; and a lateral conductive channel is made from the back side of the component, and a half L-shaped conductive channel is combined to make a new negative electrode.
6. The chip-type surface mount diode assembly according to claim 1, characterized in that: The groove / point group, lateral conductive channel, etc. can be applied to the production of the positive electrode on the front side of the component.
7. The chip-type surface mount diode assembly according to any one of claims 1, 4, 5 or 6, characterized in that: The groove / point group, the upper guide channel, the lateral guide channel, the L-shaped guide channel or the semi-L-shaped guide channel are filled with conductive metal as required.
8. The chip-type surface mount diode assembly according to claim 1, characterized in that: The positive and negative electrode surfaces of the components can be pre-welded with welding materials or the conductive electrode plates / leads can be welded with a single sheet as required, and the insulation protection of the surrounding areas and / or surfaces other than the conductive electrode plates / leads can be strengthened.
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