Cavitation scaling for rendering and bandwidth workloads

Abstract

Aspects presented herein relate to methods and apparatus for graphics processing, including devices, such as a GPU or DPU. The apparatus can obtain at least one image of a set of images corresponding to a scene associated with the graphics processing. The apparatus is also capable of performing a non-linear fovea compression process on the at least one image, wherein the non-linear fovea compression process corresponds to a continuous non-linear compression for a portion of the at least one image. The apparatus is also capable of transmitting the at least one image after the non-linear fovea compression process such that the transmitted at least one image corresponds to at least one compressed image.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of U.S. patent application serial number 17 / 816,976, filed on August 2, 2022, entitled “FOVEATED SCALING FOR RENDERING AND BANDWIDTH WORKLOADS,” which is expressly incorporated herein by reference in its entirety. Technical Field

[0003] The present disclosure relates generally to processing systems and, more particularly, to one or more techniques for graphics processing. Background Art

[0004] Computing devices typically perform graphics and / or display processing (e.g., using a graphics processing unit (GPU), a central processing unit (CPU), a display processor, etc.) to render and display visual content. Such computing devices may include, for example, computer workstations, mobile phones (such as smart phones), embedded systems, personal computers, tablet computers, and video game consoles. The GPU is configured to execute a graphics processing pipeline that includes one or more processing stages that operate together to execute graphics processing commands and output frames. The central processing unit (CPU) can control the operation of the GPU by issuing one or more graphics processing commands to the GPU. Modern CPUs are typically capable of executing multiple applications concurrently, each of which may need to utilize a GPU during execution. The display processor is configured to convert digital information received from the CPU into analog values, and may issue commands to a display panel to display visual content. A device that provides content for visual presentation on a display may utilize a GPU and / or a display processor.

[0005] The GPU of a device may be configured to perform processes in a graphics processing pipeline. Additionally, a display processor or display processing unit (DPU) may be configured to perform processes for display processing. However, with the advent of wireless communications and smaller handheld devices, the need for improved graphics or display processing continues to increase. Summary of the invention

[0006] The following presents a simplified summary of one or more aspects in order to provide a basic understanding of these aspects. This summary is not an extensive overview of all contemplated aspects, and is neither intended to identify key or important elements of all aspects, nor to describe the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to a more detailed description presented later.

[0007] In one aspect of the present disclosure, a method, a computer-readable medium, and a device are provided. The device may be a graphics processing unit (GPU), a central processing unit (CPU), a display processing unit (DPU), or any device that can perform graphics processing. The device may obtain at least one image in a set of images corresponding to a scene associated with the graphics processing. The device may also perform a nonlinear foveal compression process on the at least one image, wherein the nonlinear foveal compression process corresponds to a continuous nonlinear compression of a portion of the at least one image. In addition, the device may encode the at least one image after performing the nonlinear foveal compression process and before sending the at least one image. The device may also send the at least one image after the nonlinear foveal compression process, so that the at least one image sent corresponds to at least one compressed image.

[0008] In one aspect of the present disclosure, a method, a computer-readable medium, and a device are provided. The device may be a display processing unit (DPU), a graphics processing unit (GPU), a central processing unit (CPU), or any device that can perform graphics processing. The device may obtain at least one compressed image in a scene associated with the graphics processing, wherein the at least one compressed image is associated with a nonlinear foveal compression process. The device may also decode the at least one compressed image after obtaining the at least one compressed image and before performing a nonlinear foveal decompression process. In addition, the device may perform a nonlinear foveal decompression process on the at least one compressed image, so that the at least one compressed image corresponds to at least one image, wherein the nonlinear foveal decompression process corresponds to a continuous nonlinear decompression of a portion of the at least one image. Additionally, the device may send the at least one image after the nonlinear foveal decompression process.

[0009] The details of one or more examples of the disclosure are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the disclosure will become apparent from the description and drawings, and from the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 is a block diagram illustrating an example content generation system.

[0011] Figure 2 An example graphics processing unit (GPU) is illustrated.

[0012] Figure 3 An example display framework including a display processor and a display is illustrated.

[0013] Figure 4 is a diagram 400 illustrating an example field of view (FoV) for graphics processing.

[0014] Figure 5 is a diagram illustrating an example of input-to-output mapping for graphics processing.

[0015] Figure 6 is a diagram illustrating an example foveal scaling process for graphics processing.

[0016] Figure 7 is a diagram illustrating an example pipeline flow including foveated scaling for graphics processing.

[0017] Figure 8 is a diagram illustrating an example vertex mesh used for graphics processing.

[0018] Fig. 9 is a diagram illustrating an example non-linear scaling process for graphics processing.

[0019] Fig.10 is a diagram illustrating an example non-linear scaling process for graphics processing.

[0020] Fig.11 is a communication flow diagram illustrating example communications between a GPU, GPU components, a DPU, and a display / panel.

[0021] Fig.12 is a flow chart of an example method of graphics processing.

[0022] Fig.13 is a flow chart of an example method of graphics processing.

[0023] Fig.14 is a flow chart of an example method of graphics processing.

[0024] Fig.15 is a flow chart of an example method of graphics processing. DETAILED DESCRIPTION

[0025] Some aspects of graphics processing may be associated with different types of applications, such as extended reality (XR), augmented reality (AR), or virtual reality (VR) applications. XR, AR, or VR systems used with certain devices (e.g., mobile devices or smart phones) may be under certain constraints on power and performance efficiency and certain benchmarks for realistic or photo-realistic content. In order to achieve photo-realistic XR, AR, and VR systems, display and rendering resolutions may continue to increase. Traditionally, time warping (i.e., timewarp) or synthesis procedures may output to full display resolution using lens distortion curves, and pass them through a display processing unit (DPU) and then to a display panel. As resolution increases, this brute force approach can utilize a large amount of system memory bandwidth, which can exceed any year-on-year improvements. There is also a need for GPU rendering because it utilizes a high DPU clock rate to transfer data to a display panel. XR, AR, and VR systems may also use lenses to magnify displays and provide a high field of view (FoV). Lenses used to magnify displays can typically have the highest clarity at the optical center, and the quality decreases toward the edges. In addition, the lens may have a pincushion distortion, which the compositor may counteract using barrel distortion rendering (i.e., barrel distortion). Thus, when barrel distorted, pixels in the periphery may be undersampled compared to pixels in the fovea, but then when passing through the lens, the pixels may be expanded. This process may reduce the visual quality around the edges of the image. One way to try to reduce this pressure and reduced visual quality is to scale the time warp output and use the DPU to increase the panel resolution. This can reduce system memory bandwidth, but it cannot alleviate the pressure on the data rate of the panel. This may also imply that the foveal area (i.e., the area corresponding to the center of the lens) and the peripheral area (i.e., the area corresponding to the edge of the lens) lose some clarity. An alternative solution may use multiple layers, typically with an unmagnified foveal layer and one or more peripheral layers magnified by the DPU. While this may solve the foveal scaling problem, it may also specify that multiple layers are passed to the DPU. Additionally, this solution may specify overlapping areas and alpha blending to avoid hard edges at boundary transitions. Aspects of the present disclosure may utilize compression scaling that matches human perception and / or the optics of lenses used in certain systems (e.g., XR, AR, and VR systems). For example, aspects of the present disclosure may employ nonlinear foveal compression scaling in XR, AR, and VR systems. More specifically, aspects of the present disclosure may employ nonlinear foveal compression scaling as the output of certain procedures (e.g., time warp procedures). Additionally, utilizing nonlinear foveal compression scaling as the output of a time warp procedure may match human perception and / or the optics of lenses used in XR, AR, and VR systems. Nonlinear encoding may also reduce the footprint of an output buffer (e.g., a time warp output buffer).Non-linear foveal compression scaling can reduce the pixel count of certain time warp procedures by a certain amount (e.g., reducing the pixel count by approximately 56%). In some aspects, non-linear foveal compression scaling can be decoded at the DPU or at the panel display driver integrated circuit (DDIC). Furthermore, non-linear foveal compression scaling can reduce both rendering workload and bandwidth pressure.

[0026] Various aspects of the system, device, computer program product and method will be described more fully below with reference to the accompanying drawings. However, the present disclosure can be embodied in many different forms and should not be interpreted as being limited to any specific structure or function presented throughout the present disclosure. On the contrary, these aspects are provided so that the present disclosure will be thorough and complete, and the scope of the present disclosure will be fully conveyed to those skilled in the art. Based on the teachings of this article, it should be understood by those skilled in the art that the scope of the present disclosure is intended to cover any aspect of the system, device, computer program product and method disclosed herein, whether it is implemented independently of other aspects of the present disclosure or implemented in combination with other aspects of the present disclosure. For example, any number of aspects set forth herein may be used to implement a device or practice method. In addition, the scope of the present disclosure is intended to cover such devices or methods practiced using other structures, functionality, or structures and functionality in addition to or different from the various aspects of the disclosure set forth herein. Any aspect disclosed herein may be embodied by one or more elements of the claims.

[0027] Although various aspects are described herein, many variations and arrangements of these aspects fall within the scope of the present disclosure. Although some potential benefits and advantages of various aspects of the present disclosure are mentioned, the scope of the present disclosure is not intended to be limited to specific benefits, uses or objectives. On the contrary, various aspects of the present disclosure are intended to be widely applicable to different wireless technologies, system configurations, networks and transmission protocols, some of which are illustrated by way of example in the drawings and the description below. The specific embodiments and drawings merely illustrate the present disclosure and do not limit the present disclosure, and the scope of the present disclosure is defined by the attached claims and their equivalent technical solutions.

[0028] Several aspects are presented with reference to various devices and methods. These devices and methods are described in the following detailed description and illustrated in the accompanying drawings by various blocks, components, circuits, processes, algorithms, etc. (collectively referred to as "elements"). These elements can be implemented using electronic hardware, computer software, or any combination thereof. Whether these elements are implemented as hardware or software depends on the specific application and the design constraints imposed on the overall system.

[0029] For example, an element or any part of an element or any combination of elements may be implemented as a "processing system" including one or more processors (which may also be referred to as processing units). Examples of processors include microprocessors, microcontrollers, graphics processing units (GPUs), general purpose GPUs (GPGPUs), central processing units (CPUs), application processors, digital signal processors (DSPs), reduced instruction set computing (RISC) processors, systems on chips (SOCs), baseband processors, application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), programmable logic devices (PLDs), state machines, gated logic devices, discrete hardware circuits, and other suitable hardware configured to perform various functionalities described in the present disclosure. One or more processors in a processing system may execute software. Software may be broadly interpreted as meaning instructions, instruction sets, codes, code segments, program codes, programs, subroutines, software components, applications, software applications, software packages, routines, subroutines, objects, executable files, threads of execution, procedures, functions, etc., whether expressed in software, firmware, middleware, microcode, hardware description languages, or other terms. The term "application" may refer to software. As described herein, one or more technologies may refer to an application, i.e., software, configured to perform one or more functions. In such examples, the application may be stored in a memory (e.g., an on-chip memory of a processor, a system memory, or any other memory). The hardware described herein (such as a processor) may be configured to execute an application. For example, an application may be described as including code that, when executed by hardware, causes the hardware to perform one or more technologies described herein. As an example, the hardware may access code from a memory and execute the code accessed from the memory to perform one or more technologies described herein. In some examples, components are identified in the present disclosure. In such examples, components may be hardware, software, or a combination thereof. Each component may be a separate component or a subcomponent of a single component.

[0030] Therefore, in one or more examples described herein, the functions described may be implemented in hardware, software, or any combination thereof. If implemented with software, the functions may be stored or encoded on a computer-readable medium as one or more instructions or codes. Computer-readable media include computer storage media. Storage media may be any available medium accessible by a computer. As an example and not limitation, such computer-readable media may include random access memory (RAM), read-only memory (ROM), electrically erasable programmable ROM (EEPROM), optical disk storage, magnetic disk storage, other magnetic storage devices, a combination of computer-readable media of the above type, or any other medium that can be used to store instructions or data structure forms of computer executable code accessible by a computer.

[0031] In summary, this disclosure describes techniques for having a graphics processing pipeline in a single device or multiple devices to improve rendering of graphics content and / or reduce load on a processing unit (i.e., any processing unit, such as a GPU, configured to perform one or more of the techniques described herein). For example, this disclosure describes techniques for performing graphics processing in any device that utilizes graphics processing. Other example benefits are described throughout this disclosure.

[0032] As used herein, instances of the term "content" may refer to "graphics content," "images," and vice versa. This is true regardless of whether these terms are used as adjectives, nouns, or other parts of speech. In some examples, as used herein, the term "graphics content" may refer to content produced by one or more processes of a graphics processing pipeline. In some examples, as used herein, the term "graphics content" may refer to content produced by a processing unit configured to perform graphics processing. In some examples, as used herein, the term "graphics content" may refer to content produced by a graphics processing unit.

[0033] In some examples, as used herein, the term "display content" may refer to content generated by a processing unit configured to perform display processing. In some examples, as used herein, the term "display content" may refer to content generated by a display processing unit. Graphics content may be processed to become display content. For example, a graphics processing unit may output graphics content (such as a frame) to a buffer (which may be referred to as a frame buffer). The display processing unit may read graphics content (such as one or more frames) from the buffer and perform one or more display processing techniques thereon to generate display content. For example, the display processing unit may be configured to perform synthesis on one or more rendering layers to generate a frame. As another example, the display processing unit may be configured to synthesize, blend or otherwise combine two or more layers into a single frame. The display processing unit may be configured to perform scaling on the frame, such as zooming in or out. In some examples, a frame may refer to a layer. In other examples, a frame may refer to two or more layers that have been mixed together to form the frame, that is, the frame includes two or more layers, and the frame including two or more layers may be subsequently mixed.

[0034] Figure 11 is a block diagram illustrating an example content generation system 100 configured to implement one or more techniques of the present disclosure. The content generation system 100 includes a device 104. The device 104 may include one or more components or circuits for performing various functions described herein. In some examples, one or more components of the device 104 may be components of a SOC. The device 104 may include one or more components configured to perform one or more techniques of the present disclosure. In the example shown, the device 104 may include a processing unit 120, a content encoder / decoder 122, and a system memory 124. In some aspects, the device 104 may include several components, such as a communication interface 126, a transceiver 132, a receiver 128, a transmitter 130, a display processor 127, and one or more displays 131. References to the display 131 may refer to one or more displays 131. For example, the display 131 may include a single display or multiple displays. The display 131 may include a first display and a second display. The first display may be a left-eye display, and the second display may be a right-eye display. In some examples, the first display and the second display may receive different frames for presentation thereon. In other examples, the first display and the second display may receive the same frame for presentation thereon. In another example, the result of the graphics processing may not be displayed on the device, for example, the first display and the second display may not receive any frame for presentation thereon. Instead, the frame or graphics processing result may be passed to another device. In some aspects, this may be referred to as split rendering.

[0035] Processing unit 120 may include internal memory 121. Processing unit 120 may be configured to perform graphics processing, such as in graphics processing pipeline 107. Content encoder / decoder 122 may include internal memory 123. In some examples, device 104 may include a display processor (such as display processor 127) to perform one or more display processing techniques on one or more frames generated by processing unit 120 before being presented by one or more displays 131. Display processor 127 may be configured to perform display processing. For example, display processor 127 may be configured to perform one or more display processing techniques on one or more frames generated by processing unit 120. One or more displays 131 may be configured to display or otherwise present frames processed by display processor 127. In some examples, one or more displays 131 may include one or more of the following: a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, a projection display device, an augmented reality display device, a virtual reality display device, a head mounted display, or any other type of display device.

[0036] Memory external to the processing unit 120 and the content encoder / decoder 122, such as the system memory 124, may be accessible to the processing unit 120 and the content encoder / decoder 122. For example, the processing unit 120 and the content encoder / decoder 122 may be configured to read from and / or write to the external memory, such as the system memory 124. The processing unit 120 and the content encoder / decoder 122 may be communicatively coupled to the system memory 124 via a bus. In some examples, the processing unit 120 and the content encoder / decoder 122 may be communicatively coupled to each other via the bus or a different connection.

[0037] The content encoder / decoder 122 may be configured to receive graphics content from any source, such as the system memory 124 and / or the communication interface 126. The system memory 124 may be configured to store the received encoded or decoded graphics content. The content encoder / decoder 122 may be configured to receive the encoded or decoded graphics content in the form of encoded pixel data, for example, from the system memory 124 and / or the communication interface 126. The content encoder / decoder 122 may be configured to encode or decode any graphics content.

[0038] Internal memory 121 or system memory 124 may include one or more volatile or non-volatile memories or storage devices. In some examples, internal memory 121 or system memory 124 may include RAM, SRAM, DRAM, erasable programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), flash memory, magnetic data media, or optical storage media, or any other type of memory.

[0039] According to some examples, the internal memory 121 or the system memory 124 may be a non-transitory storage medium. The term "non-transitory" may indicate that the storage medium is not embodied in a carrier wave or propagation signal. However, the term "non-transitory" should not be interpreted to mean that the internal memory 121 or the system memory 124 is non-removable or that its contents are static. For example, the system memory 124 may be removed from the device 104 and moved to another device. For another example, the system memory 124 may not be removable from the device 104.

[0040] The processing unit 120 may be a central processing unit (CPU), a graphics processing unit (GPU), a general purpose GPU (GPGPU), or any other processing unit that may be configured to perform graphics processing. In some examples, the processing unit 120 may be integrated into the motherboard of the device 104. In some examples, the processing unit 120 may be present on a graphics card installed in a port in the motherboard of the device 104, or may be otherwise incorporated into a peripheral device configured to interoperate with the device 104. The processing unit 120 may include one or more processors, such as one or more microprocessors, GPUs, application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), arithmetic logic units (ALUs), digital signal processors (DSPs), discrete logic, software, hardware, firmware, other equivalent integrated or discrete logic circuits, or any combination thereof. If the technology is partially implemented in software, the processing unit 120 may store instructions for the software in a suitable non-transitory computer-readable storage medium (e.g., internal memory 121), and may use one or more processors to execute instructions in hardware to perform the technology of the present disclosure. Any of the above (including hardware, software, a combination of hardware and software, etc.) may be considered to be one or more processors.

[0041] The content encoder / decoder 122 may be any processing unit configured to perform content decoding. In some examples, the content encoder / decoder 122 may be integrated into the mainboard of the device 104. The content encoder / decoder 122 may include one or more processors, such as one or more microprocessors, application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), arithmetic logic units (ALUs), digital signal processors (DSPs), video processors, discrete logic, software, hardware, firmware, other equivalent integrated or discrete logic circuits, or any combination thereof. If the technology is partially implemented in software, the content encoder / decoder 122 may store instructions for the software in a suitable non-transitory computer-readable storage medium (e.g., internal memory 123), and may use one or more processors to execute instructions in hardware to perform the technology of the present disclosure. Any of the above (including hardware, software, a combination of hardware and software, etc.) may be considered to be one or more processors.

[0042] In some aspects, the content generation system 100 may include a communication interface 126. The communication interface 126 may include a receiver 128 and a transmitter 130. The receiver 128 may be configured to perform any receiving functions described herein with respect to the device 104. Additionally, the receiver 128 may be configured to receive information from another device, such as eye or head position information, rendering commands, or positioning information. The transmitter 130 may be configured to perform any sending functions described herein with respect to the device 104. For example, the transmitter 130 may be configured to send information to another device, which may include a request for content. The receiver 128 and the transmitter 130 may be combined into a transceiver 132. In such examples, the transceiver 132 may be configured to perform any receiving functions and / or sending functions described herein with respect to the device 104.

[0043] Reference again Figure 1 In certain aspects, the processing unit 120 may include a compression component 198 configured to obtain at least one image in a set of images corresponding to a scene associated with the graphics processing. The compression component 198 may also be configured to perform a non-linear foveal compression process on the at least one image, wherein the non-linear foveal compression process corresponds to a continuous non-linear compression of a portion of the at least one image. The compression component 198 may also be configured to encode the at least one image after performing the non-linear foveal compression process and before transmitting the at least one image. The compression component 198 may also be configured to transmit the at least one image after the non-linear foveal compression process, such that the transmitted at least one image corresponds to the at least one compressed image.

[0044] Reference again Figure 1 In some aspects, the display processor 127 may include a decompression component 199 configured to obtain at least one compressed image in a scene associated with graphics processing, wherein the at least one compressed image is associated with a non-linear foveal compression process. The decompression component 199 may also be configured to decode the at least one compressed image after obtaining the at least one compressed image and before performing the non-linear foveal decompression process. The decompression component 199 may also be configured to perform a non-linear foveal decompression process on the at least one compressed image so that the at least one compressed image corresponds to at least one image, wherein the non-linear foveal decompression process corresponds to a continuous non-linear decompression of a portion of the at least one image. The decompression component 199 may also be configured to send the at least one image after the non-linear foveal decompression process. Although the following description may focus on graphics processing, the concepts described herein may be applicable to other similar processing techniques.

[0045] As described herein, a device such as device 104 may refer to any device, apparatus or system configured to perform one or more technologies described herein. For example, a device may be a server, a base station, a user equipment, a client device, a station, an access point, a computer (e.g., a personal computer, a desktop computer, a laptop computer, a tablet computer, a computer workstation or a mainframe computer), a final product, an apparatus, a phone, a smart phone, a server, a video game platform or console, a handheld device (e.g., a portable video game device or a personal digital assistant (PDA)), a wearable computing device (e.g., a smart watch, an augmented reality device or a virtual reality device), a non-wearable device, a display or display device, a television, a television set-top box, an intermediate network device, a digital media player, a video streaming device, a content streaming device, an onboard computer, any mobile device, any device configured to generate graphics content, or any device configured to perform one or more technologies described herein. The process herein may be described as being performed by a specific component (e.g., a GPU), but in further embodiments, other components (e.g., a CPU) consistent with the disclosed embodiments may be used to perform.

[0046] The GPU may process multiple types of data or data packets in the GPU pipeline. For example, in some aspects, the GPU may process two types of data or data packets, such as context register packets and draw call data. The context register packet may be a collection of global state information, such as information about global registers, shaders, or constant data, which may adjust how the graphics context is to be processed. For example, the context register packet may include information about the color format. In some aspects of the context register packet, there may be a bit indicating which workload belongs to the context register. In addition, there may be multiple functions or programs running simultaneously and / or in parallel. For example, a function or program may describe an operation, such as a color mode or color format. Therefore, the context register may define multiple states of the GPU.

[0047] The context state may be used to determine how individual processing unit functions (e.g., a vertex fetcher (VFD), a vertex shader (VS), a shader processor, or a geometry processor) operate and / or in which mode the processing unit functions operate. To this end, the GPU may use context registers and programming data. In some aspects, the GPU may generate workloads (e.g., vertex or pixel workloads) in a pipeline based on context register definitions of a mode or state. Certain processing units (e.g., VFDs) may use these states to determine certain functions, such as how to assemble vertices. Since these modes or states may change, the GPU may need to change the corresponding context. Additionally, the workload corresponding to the mode or state may follow the changed mode or state.

[0048] Figure 2 An example GPU 200 is illustrated in accordance with one or more techniques of this disclosure. Figure 2 As shown, GPU 200 includes a command processor (CP) 210, a draw call group 212, a VFD 220, a VS 222, a vertex cache (VPC) 224, a triangle setup engine (TSE) 226, a rasterizer (RAS) 228, a Z pass engine (ZPE) 230, a pixel interpolator (PI) 232, a fragment shader (FS) 234, a rendering back end (RB) 236, a second level (L2) cache (UCHE) 238, and a system memory 240. Although Figure 2 GPU 200 is shown to include processing units 220-238, but GPU 200 may include multiple additional processing units. Additionally, processing units 220 to 238 are merely examples, and any combination or order of processing units may be used with a GPU according to the present disclosure. GPU 200 also includes command buffer 250, context register group 260, and context state 261.

[0049] like Figure 2 As shown, the GPU may parse the command buffer into context register packets (e.g., context register packets 260) and / or draw call data packets (e.g., draw call packets 212) using a CP (e.g., CP 210) or a hardware accelerator. Subsequently, the CP 210 may transmit the context register packets 260 or the draw call packets 212 to a processing unit or block in the GPU through a separate path. In addition, the command buffer 250 may alternate different states of context registers and draw calls. For example, the command buffer may be constructed in the following manner: context registers of context N, draw calls of context N, context registers of context N+1, and draw calls of context N+1.

[0050] The GPU can render images in a variety of different ways. In some instances, the GPU can use rendering and / or tile rendering to render images. In a tile rendering GPU, the image can be divided or segmented into different parts or tiles. After the image is divided, each part or tile can be rendered separately. The tile rendering GPU can divide the computer graphics image into a grid format so that each part of the grid (i.e., tile) is rendered separately. In some aspects, during the binning process, the image can be divided into different boxes or tiles. In some aspects, during the binning process, a visibility stream can be constructed in which visible primitives or drawing calls can be identified. In contrast to tile rendering, direct rendering does not divide the frame into smaller boxes or tiles. On the contrary, in direct rendering, the entire frame is rendered at once. Additionally, some types of GPUs may allow both tile rendering and direct rendering.

[0051] In some aspects, the GPU may apply a drawing or rendering process to different bins or tiles. For example, the GPU may render for one bin and perform all drawing for the primitives or pixels in the bin. During the process of rendering for the bin, the render target may be located in GMEM. In some instances, after rendering for one bin, the contents of the render target may be moved to system memory and the GMEM may be released to render the next bin. Additionally, the GPU may render for another bin and perform drawing for the primitives or pixels in the bin. Therefore, in some aspects, there may be a small number of bins (e.g., four bins) that cover all the drawing in a surface. In addition, the GPU may loop through all the drawing in a bin, but perform drawing of visible drawing calls, i.e., drawing calls that include visible geometry. In some aspects, a visibility stream may be generated (e.g., in a binning process) to determine visibility information for each primitive in an image or scene. For example, the visibility stream may identify whether a primitive is visible. In some aspects, this information may be used to remove invisible primitives, such as during a rendering process. In addition, at least some of the primitives identified as visible may be rendered during a rendering process.

[0052] In some aspects of tile rendering, there may be multiple processing stages or processes. For example, rendering may be performed in two processes, such as a visibility or box visibility process and a rendering or box rendering process. During the visibility process, the GPU may input a rendering workload, record the positioning of primitives or triangles, and then determine which primitives or triangles fall into which box or region. In some aspects of the visibility process, the GPU may also identify or mark the visibility of each primitive or triangle in the visibility stream. During the rendering process, the GPU may input a visibility stream and process one box or region at a time. In some aspects, the visibility stream may be analyzed to determine which primitives or primitive vertices are visible or invisible. Therefore, visible primitives or primitive vertices may be processed. In this way, the GPU may reduce unnecessary workloads for processing or rendering invisible primitives or triangles.

[0053] In some aspects, during the visibility process, certain types of primitive geometry may be processed, such as only positioned geometry. Additionally, primitives may be classified into different bins or regions based on the position or positioning of primitives or triangles. In some instances, the classification of primitives or triangles into different bins may be performed by determining visibility information for these primitives or triangles. For example, the GPU may determine visibility information for each primitive in each bin or region or write it to, for example, system memory. The visibility information may be used to determine or generate a visibility stream. During the rendering process, the primitives in each bin may be rendered separately. In these instances, the visibility stream may be extracted from a memory for discarding primitives that are not visible to the bin.

[0054] Some aspects of the GPU or GPU architecture may provide a number of different options for rendering (e.g., software rendering and hardware rendering). In software rendering, the driver or CPU may process each view. Figure 1 In hardware rendering, the hardware or GPU may be responsible for copying or processing the geometry of each viewpoint in the image. Therefore, the hardware may manage the copying or processing of primitives or triangles for each viewpoint in the image.

[0055] Figure 3 is a block diagram 300 illustrating an example display framework including a processing unit 120 , a system memory 124 , a display processor 127 , and a display 131 , as may be identified in connection with device 104 .

[0056] The GPU may be included in a device that provides content for visual presentation on a display. For example, the processing unit 120 may include a GPU 310 configured to render graphics data for display on a computing device (e.g., device 104), which may be a computer workstation, a mobile phone, a smart phone or other smart device, an embedded system, a personal computer, a tablet computer, a video game console, etc. The operation of the GPU 310 may be controlled based on one or more graphics processing commands provided by the CPU 315. The CPU 315 may be configured to execute multiple applications concurrently. In some cases, each of the multiple applications executed concurrently may utilize the GPU 310 at the same time. The processing technology may be performed by outputting frames via the processing unit 120 over a physical or wireless communication channel.

[0057] System memory 124, which may be executed by processing unit 120, may include user space 320 and kernel space 325. User space 320 (sometimes referred to as "application space") may include software applications and / or application frameworks. For example, software applications may include operating systems, media applications, graphics applications, workspace applications, etc. The application framework may include a framework used by one or more software applications, such as libraries, services (e.g., display services, input services, etc.), application program interfaces (APIs), etc. Kernel space 325 may further include a display driver 330. Display driver 330 may be configured to control display processor 127. For example, display driver 330 may cause display processor 127 to synthesize a frame and send data of the frame to a display.

[0058] Display processor 127 includes display control block 335 and display interface 340. Display processor 127 may be configured to manipulate functions of display 131 (e.g., based on input received from display driver 330). Display control block 335 may also be configured to output image frames to display 131 via display interface 340. In some examples, display control block 335 may additionally or alternatively perform post-processing of image data provided based on execution of processing unit 120 on system memory 124.

[0059] The display interface 340 may be configured to cause the display 131 to display an image frame. The display interface 340 may output image data to the display 131 according to an interface protocol such as, for example, MIPIDSI (Mobile Industry Processor Interface, Display Serial Interface). That is, the display 131 may be configured according to the MIPIDSI standard. The MIPIDSI standard supports a video mode and a command mode. In an example where the display 131 operates in the video mode, the display processor 127 may continuously refresh the graphics content of the display 131. For example, the entire graphics content may be refreshed at each refresh cycle (e.g., line by line). In an example where the display 131 operates in the command mode, the display processor 127 may write the graphics content of the frame to the buffer 350.

[0060] In some such examples, display processor 127 may not continuously refresh the graphics content of display 131. Instead, display processor 127 may use vertical synchronization (Vsync) pulses to coordinate the rendering and consumption of graphics content at buffer 350. For example, when a Vsync pulse is generated, display processor 127 may output new graphics content to buffer 350. Thus, the generation of a Vsync pulse may indicate that current graphics content has been rendered at buffer 350.

[0061] Based on the display controller 345, the display client 355, and the buffer 350, the frame is displayed at the display 131. The display controller 345 may receive image data from the display interface 340 and store the received image data in the buffer 350. In some examples, the display controller 345 may output the image data stored in the buffer 350 to the display client 355. Thus, the buffer 350 may represent a local memory to the display 131. In some examples, the display controller 345 may output the image data received from the display interface 340 directly to the display client 355.

[0062] The display client 355 may be associated with a touch panel that senses interactions between a user and the display 131. When a user interacts with the display 131, one or more sensors in the touch panel may output a signal to the display controller 345 indicating which of the one or more sensors has sensor activity, the duration of the sensor activity, the pressure applied to the one or more sensors, etc. The display controller 345 may use the sensor output to determine the manner in which the user is interacting with the display 131. The display 131 may further be associated with / include other devices that operate in conjunction with the display client 355, such as a camera, a microphone, and / or a speaker.

[0063] Some processing techniques of device 104 may be performed through three stages (e.g., stage 1: rendering stage; stage 2: composition stage; and stage 3: display / delivery stage). However, other processing techniques may combine the composition stage and the display / delivery stage into a single stage, such that the processing technique may be performed based on a total of two stages (e.g., stage 1: rendering stage; and stage 2: composition / display / delivery stage). During the rendering stage, GPU 310 may process a content buffer based on the execution of an application that generates content on a pixel-by-pixel basis. During the composition and display stages, pixel elements may be assembled to form a frame that is delivered to a physical display panel / subsystem (e.g., display 131) that displays the frame.

[0064] Instructions (e.g., software instructions) executed by a CPU or instructions executed by a display processor may cause the CPU or display processor to search and / or generate a synthesis strategy for synthesizing a frame based on dynamic priorities and runtime statistics associated with one or more synthesis strategy groups. A frame to be displayed by a physical display device (such as a display panel) may include multiple layers. In addition, the synthesis of a frame may be based on combining multiple layers into a frame (e.g., based on a frame buffer). After combining multiple layers into a frame, the frame may be provided to a display panel for display on the display panel. The process of combining each layer in a plurality of layers into a frame may be referred to as synthesis, frame synthesis, synthesis procedure, synthesis process, etc.

[0065] The frame synthesis procedure or synthesis strategy may correspond to a technique for synthesizing different layers in a plurality of layers into a single frame. The plurality of layers may be stored in a double data rate (DDR) memory. Each layer in the plurality of layers may further correspond to a separate buffer. A synthesizer or hardware synthesizer (HWC) associated with a block or function may determine the input of each layer / buffer and execute the frame synthesis procedure to generate an output indicating a synthesized frame. That is, the input may be a layer, and the output may be a frame synthesis procedure for synthesizing a frame to be displayed on a display panel.

[0066] Some aspects of display processing may utilize different types of mask layers, such as a shape mask layer. The mask layer is a layer that can represent a portion of a display or display panel. For example, an area of ​​the mask layer may correspond to an area of ​​the display, but the entire mask layer may depict a portion of the content that is actually displayed at the display or panel. For example, a mask layer may include a top portion and a bottom portion of the display area, but the middle portion of the mask layer may be empty. In some examples, there may be multiple mask layers to represent different portions of the display area. In addition, for certain portions of the display area, the contents of different mask layers may overlap with each other. Thus, a mask layer may represent a portion of the display area that may or may not overlap with other mask layers.

[0067] Some aspects of graphics processing may be associated with different types of applications, such as extended reality (XR), augmented reality (AR), or virtual reality (VR) applications. XR, AR, or VR systems used with certain devices (e.g., mobile devices or smart phones) may be under certain constraints on power and performance efficiency and certain benchmarks for realistic or photo-realistic content. In order to achieve photo-realistic XR, AR, and VR systems, display and rendering resolutions may continue to increase. Traditionally, time warping (i.e., timewarp) or synthesis procedures may utilize lens distortion curves to output to full display resolution, and pass it through a display processing unit (DPU) and then to a display panel. As resolution increases, this brute force approach can utilize a large amount of system memory bandwidth, which can exceed any year-to-year improvements. It is also necessary for the GPU to render those pixels and transmit those pixels to the display panel at a high DPU clock rate, which also has requirements for performance and power consumption.

[0068] XR, AR, and VR systems can also use lenses to magnify displays and provide a high field of view (FoV), such as Figure 4 shown. Figure 4 4 is a diagram 400 illustrating an example FoV for graphics processing. More specifically, diagram 400 depicts a FoV from viewpoint 410 that includes 350 pixels in one direction (e.g., 27 pixels per degree) and 120 pixels in another direction (e.g., 9 pixels per degree). A lens used to magnify a display may typically have the highest clarity in the optical center and degrade in quality toward the edges. Additionally, the lens may have pincushion distortion, which the compositor may counteract using barrel distortion rendering (i.e., barrel distortion). As a result, when barrel distorted, pixels in the periphery may be undersampled compared to pixels in the fovea, but then the pixels may be expanded when passing through the lens. This process may reduce the visual quality around the edges of the image.

[0069] One way to attempt to reduce this pressure and reduced visual quality is to scale the time warp output and use the DPU to boost the panel resolution. This can reduce system memory bandwidth, but it does not relieve pressure on the data rate of the panel. This may also imply that the foveal area (i.e., the area corresponding to the center of the lens) and the peripheral area (i.e., the area corresponding to the edge of the lens) lose some clarity. An alternative solution may use multiple layers, typically with an unamplified foveal layer and one or more peripheral layers amplified by the DPU. While this may solve the foveal scaling problem, it may also specify that multiple layers are passed to the DPU. Additionally, this solution may specify overlapping areas and alpha blending to avoid hard edges at boundary transitions. Based on the above, it may be beneficial to utilize compression scaling that matches human perception and / or the optics of the lenses used in XR, AR, and VR systems.

[0070] Aspects of the present disclosure may utilize compression scaling that matches human perception and / or the optics of lenses used in certain systems (e.g., XR, AR, and VR systems). For example, aspects of the present disclosure may employ nonlinear foveal compression scaling in XR, AR, and VR systems. More specifically, aspects of the present disclosure may employ nonlinear foveal compression scaling as the output of certain procedures (e.g., time warp procedures). In addition, utilizing nonlinear foveal compression scaling as the output of a time warp procedure may match human perception and / or the optics of lenses used in XR, AR, and VR systems. Nonlinear encoding may also reduce the area occupied by an output buffer (e.g., a time warp output buffer). Nonlinear foveal compression scaling may reduce the pixel count of certain time warp procedures by a certain amount (e.g., reducing the pixel count by approximately 56%). In some aspects, nonlinear foveal compression scaling may be decoded at a DPU or at a panel display driver integrated circuit (DDIC). In addition, nonlinear foveal compression scaling may reduce both rendering workload and bandwidth pressure.

[0071] Figure 5 5 is a diagram 500 illustrating an example of an input-to-output mapping. More specifically, graph 500 depicts a foveal input-to-output mapping of mapping 510. Figure 5 As shown, graph 500 includes certain foveal inputs (e.g., inputs of 0, 200, 400, 600, 800, and 1000) and certain foveal outputs (e.g., outputs of 0, 100, 200, 300, 400, 500, 600, and 700). Figure 5 As illustrated, the foveal region of the image may include a particular scaling (e.g., 1:1 scaling), while the peripheral regions of the image may include parabolic distortion. Figure 5 As shown, there may be a smooth transition between the foveal region and the peripheral region.

[0072] Figure 6 600 is a diagram illustrating an example foveal scaling process for graphics processing. More specifically, diagram 600 depicts a certain foveal scaling (e.g., 2.25x foveal scaling) applied to an image with lens distortion. Figure 6 As shown, diagram 600 includes lens distortion 610 and corresponding image 612 , foveal scaling 620 (eg, 2.25x foveal scaling), and lens distortion and foveal scaling 650 including corresponding image 652 . Figure 6 Depicted is the application of foveal scaling 620 (eg, 2.25x foveal scaling) to image 612 to produce image 652. Additionally, Figure 6 A 2.25x reduction in time warp workload is shown. The process may save bandwidth, save rendering time, and / or preserve the quality of the image. Image 612 may include a certain resolution (e.g., 1832×1920 pixels), and image 652 may include another resolution (e.g., 1221×1280 pixels). For example, a 1:1 zoom of the center 50% of the image may correspond to 916×960 pixels per eye. Additionally, this may correspond to a certain amount of pixels on each side of the image (e.g., 25% of the pixels) being compressed into a certain amount of the output buffer (e.g., 12.5% ​​of the output buffer). In some aspects, there may be an overlay of the original zoom with the foveal zoom that may produce 1:1 preserved content in the center that is smoothly scaled to the edges of the image.

[0073] Figure 7 700 is a diagram illustrating an example pipeline flow including foveal scaling for graphics processing. More specifically, diagram 700 depicts a pipeline flow including specific foveal scaling applied to an image with lens distortion, foveal scaling, and foveal decoding. Figure 7 As shown, diagram 700 includes: original eye texture 710 and corresponding image 712, foveal scaling and lens distortion correction (LDC) including corresponding image 722 (e.g., foveal scaling and LDC 720), foveal decoding process 730 and corresponding image 732, and an image viewed through the lens (e.g., image 742). Figure 7 Depicted is image 712 associated with specific content (e.g., game, video, or camera content), image 722 associated with a GPU time warp process, and image 732 associated with decoding at a DPU or DDIC. Additionally, LDC and foveal scaling (e.g., foveal scaling and LDC 720) may be performed in a single pass. This may be a simple modification to an existing time warp process.

[0074] The nonlinear foveal compression process described herein may include many benefits and advantages. For example, the nonlinear foveal compression process may be added to an existing GPU synthesis as part of a lens distortion map (e.g., a chroma (UV) or vertex lens distortion map). The nonlinear foveal compression process may also significantly reduce rendering workload and system bandwidth, such as by providing a compressed output buffer that maintains full resolution in the foveal region of the image and only uses the footprint of the memory necessary to represent the undersampled periphery of the image. In addition, if decoding is performed at the display panel rather than at the DPU, certain data rates (e.g., the data rate of the system on chip (SoC) to the panel) may be reduced. In addition, there may be a smooth transition from the fovea to the periphery of the image without over-rendering or over-blending. Nonlinear foveal compression / decompression may also utilize a single layer at the DPU. This single-layer solution for nonlinear foveal compression / decompression may also avoid the complexity of handling multiple layers at the DPU.

[0075] In some aspects, the GPU may render to some type of reduced memory buffer (e.g., a smaller back buffer with a compressed footprint). For example, for certain resolutions of images (e.g., 2400×2400 pixels to 1600×1600 pixels), the GPU may utilize a reduced system memory buffer (e.g., a 56% smaller system memory buffer). Additionally, the vertex mesh may maintain a similar shape (e.g., similar to the original mesh) when utilizing a reduced system memory buffer. Figure 8 A flat or square vertex mesh in . Figure 8 8 is a diagram 800 illustrating an example vertex grid for graphics processing. More specifically, diagram 800 depicts a vertex grid 810 on top of a pixel map 820. Figure 8 As shown, the shape of vertex mesh 810 can be flat or square.

[0076] Additionally, in some aspects, the UV to vertex mapping of the image may correspond to the lens distortion of the image. In other aspects, the UV to vertex mapping of the image may be equal to the lens distortion and the fovea encoding (e.g., performed in the vertex shader). In addition, the DPU may invert the fovea encoding and may utilize existing chromatic aberration correction hardware to perform nonlinear scaling. This may reduce system bandwidth (e.g., GPU to DPU system bandwidth) but still extend the SoC output. To do this, there may be multiple options: (1) processing two layers at the DPU (e.g., one layer for the fovea of ​​the image and another layer for the periphery of the image), or (2) processing one layer at the DPU (e.g., one layer for the fovea and periphery of the image). The aspects presented herein may also implement nonlinear scaling (e.g., implemented at the panel DDIC) to further reduce bandwidth from the SoC to the panel.

[0077] Fig. 9 900 is a diagram illustrating an example nonlinear scaling process for graphics processing. More specifically, diagram 900 depicts a nonlinear scaling process for processing multiple layers at a DPU. Fig. 9 As shown, diagram 900 includes a GPU 910, a direct memory access (DMA) processor (e.g., DMA 920), a video graphics (VIG) processor (e.g., VIG 930, VIG 931, and VIG 932), a layer blender 940, a destination surface processor (DSPP) (e.g., DSPP 950), and a display 960. Fig. 9 It is depicted that memory data is transferred from the GPU 910 to the DMA 920. Thereafter, the red (R) and blue (B) (R / B) channels and peripheral data are transferred from the DMA 920 to the VIG 930. In addition, the green (G) channel of data is transferred from the DMA 920 to the VIG 931, and the RGB channels and fovea data are transferred from the DMA 920 to the VIG 932. Then, the VIG 930, the VIG 931, and the VIG 932 transfer the data to the layer mixer 940. Next, the data is transferred to the DSPP 950, and finally to the display 960.

[0078] like Fig. 9 As shown, the foveal data can be scaled using a single VIG (e.g., VIG 932). In addition, the peripheral data can be parabola corrected using the R / B channel in VIG 930, and the G channel in VIG 931 as R / B. There are many potential implications for this process. For example, the G channel may not have parabola correction in the VIG. In addition, the G channel can be rerouted to R / B in other VIGs. The R / B channel can be adjusted by chromatic aberration correction (CAC). The scaling ratio at the boundary of the transition may have discontinuity. Therefore, the various aspects presented herein can utilize soft mixing between the foveal area and the peripheral area.

[0079] Fig.10 1 is a diagram 1000 illustrating an example nonlinear scaling process for graphics processing. More specifically, diagram 1000 depicts a nonlinear scaling process for processing a single layer at a DPU. Fig.10 As shown, diagram 1000 includes a GPU 1010 , a direct memory access (DMA) processor (e.g., DMA 1020 ), a video graphics (VIG) processor (e.g., VIG 1030 ), a layer blender 1040 , a destination surface processor (DSPP) (e.g., DSPP 1050 ), and a display 1060 . Fig.10It is depicted that memory data is transferred from GPU 1010 to DMA 1020. Thereafter, RGB channels are transferred from DMA 1020 to VIG 1030. In addition, both foveal data and peripheral data are transferred from DMA 1020 to VIG 1030. VIG 1030 then transfers the data to layer mixer 1040. Next, the data is transferred to DSPP 1050, and finally to display 1060.

[0080] like Fig.10 As shown, various aspects presented herein can utilize a nonlinear scaling process that processes a single layer at the DPU. For example, foveal data can be scaled or bypassed using the central portion of a single VIG (e.g., VIG 1030). Additionally, peripheral data can be scaled using a single VIG (e.g., VIG 1030). Processing a single layer at the DPU can have a variety of potential implications. For example, parabolic scaling can be redefined. Additionally, the grid (e.g., XY grid) can be of a non-specific shape (e.g., rectangular) or variable. Additionally, the central portion of the image can have an arbitrary placement.

[0081] Additionally, re-refer to Figure 7 , the various aspects presented herein may utilize a pipeline flow that includes some foveal scaling applied to an image with lens distortion, foveal scaling, and foveal decoding. By doing so, the various aspects presented herein may improve the quality of an image that has undergone nonlinear foveal compression. Figure 7 As shown, the various aspects presented herein can utilize the following process: input an image with original eye texture, and then process the image that has undergone foveal scaling and LDC, and then process the image that has undergone a foveal decoding process, and finally process the image viewed through the lens. In addition, the result with foveal compression can maintain the same quality as the result without foveal compression.

[0082] The various aspects presented herein may include multiple benefits and advantages. For example, various aspects of the present disclosure may be added to existing GPU synthesis as part of distortion mapping. The various aspects presented herein may also significantly reduce rendering workload and system bandwidth, such as by providing a compressed output buffer that maintains full resolution in the foveal region of the image and only uses the footprint of the memory necessary to represent the undersampled periphery of the image. In addition, if decoding is performed at the panel rather than at the DPU, the data rate from the system on chip (SoC) to the panel may be reduced. In addition, there may be a smooth transition from the fovea to the periphery of the image without over-rendering or over-blending. The various aspects presented herein may also utilize a single-layer solution that avoids the complexity of handling multiple layers at the DPU.

[0083] Fig.11FIG. 1 is a communication flow diagram 1100 of a graphical process according to one or more techniques of the present disclosure. Fig.11 As shown, diagram 1100 includes example communications between a GPU 1102 (e.g., a GPU or a component in a GPU pipeline), a DPU 1104 (e.g., a component in a DPU or a display driver integrated circuit (DDIC)), a GPU component 1106 (e.g., a GPU or a component in a GPU pipeline, or other graphics processor), and a display panel 1108 in accordance with one or more techniques of the present disclosure.

[0084] At 1110, GPU 1102 may obtain at least one image (e.g., image 1112) from a set of images corresponding to a scene associated with graphics processing. In some aspects, obtaining at least one image may include receiving at least one image from at least one of a camera, at least one component in a graphics processing unit (GPU), or a video component. That is, the GPU may receive at least one image from at least one of a camera, at least one component in a graphics processing unit (GPU), or a video component.

[0085] At 1120, the GPU 1102 may perform a nonlinear foveal compression process on the at least one image, wherein the nonlinear foveal compression process corresponds to a continuous nonlinear compression of a portion of the at least one image. The portion of the at least one image may be within a threshold distance from one or more edges of the at least one image. In some examples, performing the nonlinear foveal compression process on the at least one image may include filtering data associated with the at least one image, wherein the filtered data is associated with a reduced amount of aliasing compared to unfiltered data associated with the at least one image. That is, the GPU may filter data associated with the at least one image, wherein the filtered data is associated with a reduced amount of aliasing compared to unfiltered data associated with the at least one image. Additionally, performing the nonlinear foveal compression process on the at least one image may include performing a nonlinear foveal scaling process on the at least one image. That is, the GPU may perform a nonlinear foveal scaling process on the at least one image. The nonlinear foveal compression process may be performed during a time warping process or a compositing process.

[0086] In some aspects, the nonlinear foveal compression process may correspond to at least one of: (i) a first continuous nonlinear compression for one or more first portions of at least one image, or (ii) a second continuous linear compression for one or more second portions of at least one image. Additionally, the nonlinear foveal compression process may correspond to at least one of: (i) a first continuous nonlinear compression for a first portion of at least one image, (ii) a second continuous linear compression for a second portion of at least one image, or (iii) a third continuous nonlinear compression for a third portion of at least one image. The nonlinear foveal compression process may also correspond to at least one of: (i) a first continuous linear compression for a first portion of at least one image, (ii) a second continuous nonlinear compression for a second portion of at least one image, or (iii) a third continuous linear compression for a third portion of at least one image. Additionally, the nonlinear foveal compression process may correspond to a continuous nonlinear compression for the entirety of at least one image, such that portions of at least one image are equal to the entirety of at least one image. The nonlinear foveal compression process may be associated with a lens distortion correction (LDC) process or an anamorphic scaling process. The LDC process may be associated with at least one lens, wherein the at least one lens may be associated with non-uniform image quality or non-uniform pixel quality. Additionally, the non-linear foveal compression process may reduce an amount of data of at least one image, wherein the data may be stored in at least one of a memory, a buffer, or an eye buffer.

[0087] At 1130 , the GPU 1102 may encode the at least one image after performing the non-linear foveal compression process and before sending the at least one image.

[0088] At 1140, GPU 1102 may send at least one image (e.g., image 1142) after a non-linear foveal compression process such that the at least one image sent corresponds to at least one compressed image. The at least one image may be sent to a display processing unit (DPU) or a display driver integrated circuit (DDIC).

[0089] At 1150, the DPU 1104 may obtain at least one compressed image (e.g., image 1142) in a scene associated with graphics processing, wherein the at least one compressed image is associated with a non-linear foveal compression process. In some aspects, obtaining the at least one compressed image may include receiving the at least one compressed image from a graphics processing unit (GPU). That is, the DPU may receive the at least one compressed image from the GPU.

[0090] At 1160, the DPU 1104 may decode the at least one compressed image after obtaining the at least one compressed image and before performing the non-linear foveal decompression process.

[0091] At 1170, the DPU 1104 may perform a nonlinear foveal decompression process on the at least one compressed image such that the at least one compressed image corresponds to the at least one image, wherein the nonlinear foveal decompression process corresponds to a continuous nonlinear decompression of a portion of the at least one image. The portion of the at least one image may be within a threshold distance from one or more edges of the at least one image. In some examples, performing the nonlinear foveal decompression process on the at least one image may include performing a nonlinear foveal scaling process on the at least one image. That is, the DPU may perform a nonlinear foveal scaling process on the at least one image.

[0092] In some aspects, the nonlinear foveal decompression process may correspond to at least one of: (i) a first continuous nonlinear decompression for one or more first portions of at least one image, or (ii) a second continuous linear decompression for one or more second portions of at least one image. The nonlinear foveal decompression process may also correspond to at least one of: (i) a first continuous nonlinear decompression for a first portion of at least one image, (ii) a second continuous linear decompression for a second portion of at least one image, or (iii) a third continuous nonlinear decompression for a third portion of at least one image. Additionally, the nonlinear foveal decompression process may correspond to at least one of: (i) a first continuous linear decompression for a first portion of at least one image, (ii) a second continuous nonlinear decompression for a second portion of at least one image, or (iii) a third continuous linear decompression for a third portion of at least one image. The nonlinear foveal decompression process may be performed during a time warping process or a synthesis process. The nonlinear foveal decompression process may correspond to a continuous nonlinear decompression for the entirety of at least one image, such that a portion of at least one image may be equal to the entirety of at least one image. Additionally, the nonlinear foveal decompression process may be associated with a lens distortion correction (LDC) process or an anamorphic scaling process. The LDC process may be associated with at least one lens, wherein the at least one lens may be associated with non-uniform image quality or non-uniform pixel quality.

[0093] At 1180, DPU 1104 may send at least one image (eg, image 1182) after a non-linear foveal decompression process. In some examples, the at least one image may be sent to a display panel or a memory.

[0094] Fig.121200 is a flowchart of an example method of graphics processing according to one or more techniques of the present disclosure. The method may be performed by a GPU, a GPU component (e.g., a component in a GPU or a GPU pipeline), a graphics processor, a CPU (or other central processing unit), a DPU (or other display processor), an apparatus for graphics processing, a wireless communication device, and / or an executable combination thereof. Figures 1 to 11 The examples are performed using any device for graphics processing.

[0095] At 1202, the GPU may obtain at least one image from a set of images corresponding to a scene associated with graphics processing, such as in conjunction with Figures 1 to 11 For example, Fig.11 As described in step 1110, GPU 1102 may obtain at least one image in a set of images corresponding to a scene associated with graphics processing. In addition, step 1202 may be performed by Figure 1 In some aspects, obtaining at least one image may include receiving at least one image from at least one of a camera, at least one component in a graphics processing unit (GPU), or a video component. That is, the GPU may receive at least one image from at least one of a camera, at least one component in a graphics processing unit (GPU), or a video component.

[0096] At 1204, the GPU may perform a non-linear foveal compression process on at least one image, wherein the non-linear foveal compression process corresponds to a continuous non-linear compression of a portion of the at least one image, such as in combination with Figures 1 to 11 For example, Fig.11 As described in step 1120, GPU 1102 may perform a nonlinear foveal compression process on at least one image, wherein the nonlinear foveal compression process corresponds to continuous nonlinear compression of a portion of at least one image. In addition, step 1204 may be performed by Figure 1 The portion of the at least one image may be within a threshold distance from one or more edges of the at least one image. In some instances, performing a nonlinear foveal compression process on the at least one image may include filtering data associated with the at least one image, wherein the filtered data is associated with a reduced amount of aliasing compared to unfiltered data associated with the at least one image. That is, the GPU may filter data associated with the at least one image, wherein the filtered data is associated with a reduced amount of aliasing compared to unfiltered data associated with the at least one image. Additionally, performing a nonlinear foveal compression process on the at least one image may include performing a nonlinear foveal scaling process on the at least one image. That is, the GPU may perform a nonlinear foveal scaling process on the at least one image. The nonlinear foveal compression process may be performed during a time warping process or a synthesis process.

[0097] In some aspects, the nonlinear foveal compression process may correspond to at least one of: (i) a first continuous nonlinear compression for one or more first portions of at least one image, or (ii) a second continuous linear compression for one or more second portions of at least one image. Additionally, the nonlinear foveal compression process may correspond to at least one of: (i) a first continuous nonlinear compression for a first portion of at least one image, (ii) a second continuous linear compression for a second portion of at least one image, or (iii) a third continuous nonlinear compression for a third portion of at least one image. The nonlinear foveal compression process may also correspond to at least one of: (i) a first continuous linear compression for a first portion of at least one image, (ii) a second continuous nonlinear compression for a second portion of at least one image, or (iii) a third continuous linear compression for a third portion of at least one image. Additionally, the nonlinear foveal compression process may correspond to a continuous nonlinear compression for the entirety of at least one image, such that the portions of at least one image are equal to the entirety of at least one image. The nonlinear foveal compression process may be associated with a lens distortion correction (LDC) process or an anamorphic scaling process. The LDC process may be associated with at least one lens, wherein the at least one lens may be associated with non-uniform image quality or non-uniform pixel quality. Furthermore, the non-linear foveal compression process may reduce the amount of data of the at least one image, wherein the data may be stored in at least one of a memory, a buffer, or an eye buffer.

[0098] At 1208, the GPU may send at least one image after a non-linear foveal compression process such that the sent at least one image corresponds to at least one compressed image, such as in combination with Figures 1 to 11 For example, Fig.11 In step 1140, GPU 1102 may send at least one image after the nonlinear foveal compression process, so that the at least one image sent corresponds to at least one compressed image. In addition, step 1208 may be performed by Figure 1 The at least one image may be sent to a display processing unit (DPU) or a display driver integrated circuit (DDIC).

[0099] Fig.13 1300 is a flowchart of an example method of graphics processing according to one or more techniques of the present disclosure. The method may be performed by a GPU, a GPU component (e.g., a component in a GPU or a GPU pipeline), a graphics processor, a CPU (or other central processing unit), a DPU (or other display processor), an apparatus for graphics processing, a wireless communication device, and / or an executable combination thereof. Figures 1 to 11 The examples are performed using any device for graphics processing.

[0100] At 1302, the GPU may obtain at least one image from a set of images corresponding to a scene associated with graphics processing, such as in conjunction with Figures 1 to 11 For example, Fig.11 As described in step 1110, GPU 1102 may obtain at least one image in a set of images corresponding to a scene associated with graphics processing. In addition, step 1302 may be performed by Figure 1 In some aspects, obtaining at least one image may include receiving at least one image from at least one of a camera, at least one component in a graphics processing unit (GPU), or a video component. That is, the GPU may receive at least one image from at least one of a camera, at least one component in a graphics processing unit (GPU), or a video component.

[0101] At 1304, the GPU may perform a non-linear foveal compression process on at least one image, wherein the non-linear foveal compression process corresponds to a continuous non-linear compression of a portion of the at least one image, such as in combination with Figures 1 to 11 For example, Fig.11 As described in step 1120, GPU 1102 may perform a nonlinear foveal compression process on at least one image, wherein the nonlinear foveal compression process corresponds to continuous nonlinear compression of a portion of at least one image. In addition, step 1304 may be performed by Figure 1 The portion of the at least one image may be within a threshold distance from one or more edges of the at least one image. In some instances, performing a nonlinear foveal compression process on the at least one image may include filtering data associated with the at least one image, wherein the filtered data is associated with a reduced amount of aliasing compared to unfiltered data associated with the at least one image. That is, the GPU may filter data associated with the at least one image, wherein the filtered data is associated with a reduced amount of aliasing compared to unfiltered data associated with the at least one image. In addition, performing a nonlinear foveal compression process on the at least one image may include performing a nonlinear foveal scaling process on the at least one image. That is, the GPU may perform a nonlinear foveal scaling process on the at least one image. The nonlinear foveal compression process may be performed during a time warping process or a synthesis process. In addition, the nonlinear foveal compression process may be associated with an anisotropic filtering process or a trilinear filtering process of one or more MIP maps, wherein the anisotropic filtering process or the trilinear filtering process may be associated with a reduced amount of undersampling or flickering artifacts. By doing so, when the DPU or DDIC inverts the compression, there may be no artifacts introduced by undersampling.

[0102] In some aspects, the nonlinear foveal compression process may correspond to at least one of: (i) a first continuous nonlinear compression for one or more first portions of at least one image, or (ii) a second continuous linear compression for one or more second portions of at least one image. Additionally, the nonlinear foveal compression process may correspond to at least one of: (i) a first continuous nonlinear compression for a first portion of at least one image, (ii) a second continuous linear compression for a second portion of at least one image, or (iii) a third continuous nonlinear compression for a third portion of at least one image. The nonlinear foveal compression process may also correspond to at least one of: (i) a first continuous linear compression for a first portion of at least one image, (ii) a second continuous nonlinear compression for a second portion of at least one image, or (iii) a third continuous linear compression for a third portion of at least one image. Additionally, the nonlinear foveal compression process may correspond to a continuous nonlinear compression for the entirety of at least one image, such that the portions of at least one image are equal to the entirety of at least one image. The nonlinear foveal compression process may be associated with a lens distortion correction (LDC) process or an anamorphic scaling process. The LDC process may be associated with at least one lens, wherein the at least one lens may be associated with non-uniform image quality or non-uniform pixel quality. Furthermore, the non-linear foveal compression process may reduce the amount of data of the at least one image, wherein the data may be stored in at least one of a memory, a buffer, or an eye buffer.

[0103] At 1306, the GPU may encode the at least one image after performing a non-linear foveal compression process and before sending the at least one image, such as in conjunction with Figures 1 to 11 For example, Fig.11 As described in step 1130, GPU 1102 may encode at least one image after performing the nonlinear foveal compression process and before sending the at least one image. In addition, step 1306 may be performed by Figure 1 The processing unit 120 in the embodiment is used for execution.

[0104] At 1308, the GPU may send at least one image after a non-linear foveal compression process such that the sent at least one image corresponds to at least one compressed image, such as in combination with Figures 1 to 11 For example, Fig.11 As described in step 1140, GPU 1102 may send at least one image after the nonlinear foveal compression process, so that the at least one image sent corresponds to at least one compressed image. In addition, step 1308 may be performed by Figure 1 At least one image may be sent to a display processing unit (DPU) or a display driver integrated circuit (DDIC).

[0105] Fig.14 1400 is a flowchart of an example method of graphics processing according to one or more techniques of the present disclosure. The method may be performed by a DPU (or other display processor), a DDIC, a GPU, a GPU component (e.g., a GPU or a component in a GPU pipeline), a graphics processor, a CPU (or other central processing unit), an apparatus for graphics processing, a wireless communication device, and / or an executable combination thereof. Figures 1 to 11 The examples are performed using any device for graphics processing.

[0106] At 1402, the DPU may obtain at least one compressed image of a scene associated with graphics processing, wherein the at least one compressed image is associated with a non-linear foveal compression process, such as in conjunction with Figures 1 to 11 For example, Fig.11 As described in 1150, DPU 1104 may obtain at least one compressed image in a scene associated with graphics processing, wherein the at least one compressed image is associated with a nonlinear foveal compression process. In addition, step 1402 may be performed by Figure 1 In some aspects, obtaining at least one compressed image may include receiving at least one compressed image from a graphics processing unit (GPU). That is, the DPU may receive at least one compressed image from the GPU.

[0107] At 1406, the DPU may perform a nonlinear foveated decompression process on the at least one compressed image so that the at least one compressed image corresponds to the at least one image, wherein the nonlinear foveated decompression process corresponds to a continuous nonlinear decompression of a portion of the at least one image, such as in combination with Figures 1 to 11 For example, Fig.11 As described in 1170, the DPU 1104 may perform a nonlinear foveal decompression process on at least one compressed image so that the at least one compressed image corresponds to at least one image, wherein the nonlinear foveal decompression process corresponds to a continuous nonlinear decompression of a portion of the at least one image. In addition, step 1406 may be performed by Figure 1 The portion of the at least one image may be within a threshold distance from one or more edges of the at least one image. In some examples, performing a non-linear foveal decompression process on the at least one image may include performing a non-linear foveal scaling process on the at least one image. That is, the DPU may perform a non-linear foveal scaling process on the at least one image.

[0108] In some aspects, the nonlinear foveal decompression process may correspond to at least one of: (i) a first continuous nonlinear decompression for one or more first portions of at least one image, or (ii) a second continuous linear decompression for one or more second portions of at least one image. The nonlinear foveal decompression process may also correspond to at least one of: (i) a first continuous nonlinear decompression for a first portion of at least one image, (ii) a second continuous linear decompression for a second portion of at least one image, or (iii) a third continuous nonlinear decompression for a third portion of at least one image. Additionally, the nonlinear foveal decompression process may correspond to at least one of: (i) a first continuous linear decompression for a first portion of at least one image, (ii) a second continuous nonlinear decompression for a second portion of at least one image, or (iii) a third continuous linear decompression for a third portion of at least one image. The nonlinear foveal decompression process may be performed during a time warping process or a synthesis process. Additionally, the nonlinear foveal compression process may be associated with an anisotropic filtering process or a trilinear filtering process of one or more MIP maps, wherein the anisotropic filtering process or the trilinear filtering process may be associated with a reduced amount of undersampling or flickering artifacts. By doing so, when the DPU or DDIC reverses the compression, there may not be any undersampling introduced artifacts. The nonlinear foveal decompression process may correspond to a continuous nonlinear decompression for the entirety of the at least one image, such that a portion of the at least one image may be equal to the entirety of the at least one image. Additionally, the nonlinear foveal decompression process may be associated with a lens distortion correction (LDC) process or an anamorphic scaling process. The LDC process may be associated with at least one lens, wherein the at least one lens may be associated with non-uniform image quality or non-uniform pixel quality.

[0109] At 1408, the DPU may send at least one image after a non-linear foveal decompression process, such as in conjunction with Figures 1 to 11 For example, Fig.11 As described in 1180, DPU 1104 may send at least one image after a non-linear foveal decompression process. In addition, step 1408 may be performed by Figure 1 In some examples, at least one image may be sent to a display panel or a memory.

[0110] Fig.15 1500 is a flowchart of an example method of graphics processing according to one or more techniques of the present disclosure. The method may be performed by a DPU (or other display processor), a DDIC, a GPU, a GPU component (e.g., a GPU or a component in a GPU pipeline), a graphics processor, a CPU (or other central processing unit), an apparatus for graphics processing, a wireless communication device, and / or an executable combination thereof. Figures 1 to 11 The examples are performed using any device for graphics processing.

[0111] At 1502, the DPU may obtain at least one compressed image of a scene associated with graphics processing, wherein the at least one compressed image is associated with a non-linear foveal compression process, such as in conjunction with Figures 1 to 11 For example, Fig.11 In step 1150, the DPU 1104 may obtain at least one compressed image in a scene associated with the graphics processing, wherein the at least one compressed image is associated with a nonlinear foveal compression process. In addition, step 1502 may be performed by Figure 1 In some aspects, obtaining at least one compressed image may include receiving at least one compressed image from a graphics processing unit (GPU). That is, the DPU may receive at least one compressed image from the GPU.

[0112] At 1504, the DPU may decode the at least one compressed image after obtaining the at least one compressed image and before performing a non-linear foveal decompression process, such as in conjunction with Figures 1 to 11 For example, Fig.11 As described in 1160, DPU 1104 may decode at least one compressed image after obtaining at least one compressed image and before performing the nonlinear foveal decompression process. In addition, step 1504 may be performed by Figure 1 The display processor 127 in the display processor 127 is used to execute.

[0113] At 1506, the DPU may perform a nonlinear foveated decompression process on the at least one compressed image so that the at least one compressed image corresponds to the at least one image, wherein the nonlinear foveated decompression process corresponds to a continuous nonlinear decompression of a portion of the at least one image, such as in combination with Figures 1 to 11 For example, Fig.11 As described in 1170, DPU 1104 may perform a nonlinear foveal decompression process on at least one compressed image so that at least one compressed image corresponds to at least one image, wherein the nonlinear foveal decompression process corresponds to a continuous nonlinear decompression of a portion of at least one image. In addition, step 1506 may be performed by Figure 1 The portion of the at least one image may be within a threshold distance from one or more edges of the at least one image. In some examples, performing a non-linear foveal decompression process on the at least one image may include performing a non-linear foveal scaling process on the at least one image. That is, the DPU may perform a non-linear foveal scaling process on the at least one image.

[0114] In some aspects, the nonlinear foveal decompression process may correspond to at least one of: (i) a first continuous nonlinear decompression for one or more first portions of at least one image, or (ii) a second continuous linear decompression for one or more second portions of at least one image. The nonlinear foveal decompression process may also correspond to at least one of: (i) a first continuous nonlinear decompression for a first portion of at least one image, (ii) a second continuous linear decompression for a second portion of at least one image, or (iii) a third continuous nonlinear decompression for a third portion of at least one image. Additionally, the nonlinear foveal decompression process may correspond to at least one of: (i) a first continuous linear decompression for a first portion of at least one image, (ii) a second continuous nonlinear decompression for a second portion of at least one image, or (iii) a third continuous linear decompression for a third portion of at least one image. The nonlinear foveal decompression process may be performed during a time warping process or a synthesis process. Additionally, the nonlinear foveal compression process may be associated with an anisotropic filtering process or a trilinear filtering process of one or more MIP maps, wherein the anisotropic filtering process or the trilinear filtering process may be associated with a reduced amount of undersampling or flickering artifacts. By doing so, when the DPU or DDIC reverses the compression, there may not be any undersampling introduced artifacts. The nonlinear foveal decompression process may correspond to a continuous nonlinear decompression for the entirety of the at least one image, such that a portion of the at least one image may be equal to the entirety of the at least one image. Additionally, the nonlinear foveal decompression process may be associated with a lens distortion correction (LDC) process or an anamorphic scaling process. The LDC process may be associated with at least one lens, wherein the at least one lens may be associated with non-uniform image quality or non-uniform pixel quality.

[0115] At 1508, the DPU may send at least one image after a non-linear foveal decompression process, such as in conjunction with Figures 1 to 11 For example, Fig.11 As described in 1180, DPU 1104 may send at least one image after a non-linear foveal decompression process. In addition, step 1508 may be performed by Figure 1 In some examples, at least one image may be sent to a display panel or a memory.

[0116] In a configuration, a method or apparatus for graphics processing is provided. The apparatus may be a GPU, a GPU component (e.g., a component in a GPU or GPU pipeline, software for controlling a GPU, or a processor for controlling a GPU), a graphics processor, a CPU (or other central processing unit), a DPU (or other display processor), an apparatus for graphics processing, a wireless communication device, and / or some other processor that can perform graphics processing. In various aspects, the apparatus may be a processing unit 120 within a device 104, or may be some other hardware within the device 104 or another device. The apparatus (e.g., processing unit 120) may include a component for obtaining at least one image in a set of images corresponding to a scene associated with graphics processing. The apparatus (e.g., processing unit 120) may also include a component for performing a nonlinear foveal compression process on at least one image, wherein the nonlinear foveal compression process corresponds to continuous nonlinear compression of a portion of at least one image. The apparatus (e.g., processing unit 120) may also include a component for sending at least one image after the nonlinear foveal compression process, so that the at least one image sent corresponds to at least one compressed image. The apparatus (e.g., processing unit 120) may also include means for encoding at least one image after performing the non-linear foveal compression process and before sending the at least one image. In various aspects, the apparatus may be a display processor 127 within device 104, or may be some other hardware within device 104 or another device. The apparatus (e.g., display processor 127) may include means for obtaining at least one compressed image in a scene associated with graphics processing, wherein the at least one compressed image is associated with a non-linear foveal compression process. The apparatus (e.g., display processor 127) may also include means for performing a non-linear foveal decompression process on the at least one compressed image so that the at least one compressed image corresponds to at least one image, wherein the non-linear foveal decompression process corresponds to a continuous non-linear decompression of a portion of the at least one image. The apparatus (e.g., display processor 127) may also include means for sending the at least one image after the non-linear foveal decompression process. The apparatus (e.g., display processor 127) may also include means for decoding the at least one compressed image after obtaining the at least one compressed image and before performing the non-linear foveal decompression process.

[0117] The subject matter described herein can be implemented to achieve one or more benefits or advantages. For example, the described graphics processing techniques can be used by a GPU, a GPU component, a CPU, a DPU, a display processor, a graphics processor, a device for graphics processing, or a certain other processor that can perform graphics processing to implement the fovea scaling techniques described herein. Compared to other graphics processing techniques, this can also be implemented at a low cost. In addition, the graphics processing techniques herein can improve or accelerate data processing or execution. In addition, the graphics processing techniques herein can improve resource or data utilization and / or resource efficiency. Additionally, various aspects of the present disclosure can utilize fovea scaling techniques to improve memory bandwidth efficiency and / or increase processing speed at a GPU, DPU, or CPU.

[0118] It should be understood that the specific order or hierarchy of the blocks in the disclosed process / flowchart is merely an illustration of the exemplary method. It should be understood that the specific order or hierarchy of the blocks in the process / flowchart can be rearranged based on design preferences. In addition, some blocks can be combined or omitted. The attached method claims provide the elements of each block in a sample order, but are not meant to be limited to the specific order or hierarchy presented.

[0119] The foregoing description is provided to enable any person skilled in the art to practice the various aspects described herein. Various modifications to these aspects will be apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects. Therefore, the claims are not intended to be limited to the various aspects shown herein, but should be given the full scope consistent with the language of the claims, wherein unless otherwise specified, reference to an element in the singular is not intended to mean "one and only one", but rather "one or more". The word "exemplary" is used herein to mean "used as an example, instance, or illustration". Any aspect described herein as "exemplary" is not necessarily to be construed as being preferred or having advantages over other aspects.

[0120] Unless specifically stated otherwise, the term “some” refers to one or more, and the term “or” may be interpreted as “and / or” if the context does not dictate otherwise. Combinations such as “at least one of A, B, or C,” “one or more of A, B, or C,” “at least one of A, B and C,” “one or more of A, B, and C,” and “A, B, C, or any combination thereof” include any combination of A, B, and / or C, and may include multiple A, multiple B, or multiple C. Specifically, combinations such as “at least one of A, B, or C,” “one or more of A, B, or C,” “at least one of A, B, and C,” “one or more of A, B, and C,” and “A, B, C, or any combination thereof” may be only A, only B, only C, A and B, A and C, B and C, or A and B and C, where any such combination may include one or more members of A, B, or C. All structural and functional equivalents of the elements of the various aspects described throughout this disclosure that are known or will later become known to those of ordinary skill in the art are expressly incorporated herein by reference and are intended to be covered by the claims. In addition, no matter whether such disclosure is explicitly recited in the claims, anything disclosed herein is not intended to be disclosed to the public. Words such as "module", "mechanism", "element", "device", etc. cannot replace the word "component". Therefore, no claim element will be understood as a component plus function unless the element is explicitly stated using the phrase "component for..."

[0121] In one or more examples, the functions described herein may be implemented in hardware, software, firmware, or any combination thereof. For example, although the term "processing unit" is used throughout this disclosure, such processing unit may be implemented in hardware, software, firmware, or any combination thereof. If any function, processing unit, technique, or other module described herein is implemented in software, the function, processing unit, technique, or other module described herein may be stored or sent as one or more instructions or codes on a computer-readable medium.

[0122] According to the present disclosure, the term "or" may be understood as "and / or" in the absence of context dictating otherwise. Additionally, while phrases such as "one or more" or "at least one" may have been used for some features disclosed herein but not for other features, features not using such language may be understood to have such implicit meanings in the absence of context dictating otherwise.

[0123] In one or more examples, the functions described herein may be implemented in hardware, software, firmware, or any combination thereof. For example, although the term "processing unit" is used throughout this disclosure, such processing unit may be implemented in hardware, software, firmware, or any combination thereof. If any function, processing unit, technique, or other module described herein is implemented in software, the function, processing unit, technique, or other module described herein may be stored on a computer-readable medium or sent on a computer-readable medium as one or more instructions or codes. Computer-readable media may include computer data storage media and communication media, including any media that facilitates the transfer of computer programs from one place to another. In this way, computer-readable media may generally correspond to (1) a non-transient tangible computer-readable storage medium or (2) a communication medium such as a signal or carrier wave. Data storage media may be any available medium that can be accessed by one or more computers or one or more processors to extract instructions, codes, and / or data structures for implementing the techniques described in this disclosure. As an example and not limitation, such computer-readable media may include RAM, ROM, EEPROM, CD-ROM, or other optical disk storage devices, magnetic disk storage devices, or other magnetic storage devices. As used herein, disk and disc include: compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk and Blu-ray disc, where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media. A computer program product may include a computer-readable medium.

[0124] The code may be executed by one or more processors, such as one or more digital signal processors (DSPs), general-purpose microprocessors, application-specific integrated circuits (ASICs), arithmetic logic units (ALUs), field programmable logic arrays (FPGAs), or other equivalent integrated or discrete logic circuits. Accordingly, the term "processor" as used herein may refer to any of the above structures or any other structure suitable for implementing the techniques described herein. In addition, these techniques may be fully implemented in one or more circuits or logic elements.

[0125] The technology of the present disclosure can be implemented in a variety of devices or apparatuses, including wireless mobile phones, integrated circuits (ICs) or IC groups (e.g., chipsets). Various components, modules or units are described in the present disclosure to emphasize the functional aspects of devices configured to perform the disclosed technology, but they do not necessarily need to be implemented by different hardware units. On the contrary, as described above, the various units can be combined in any hardware unit, or provided by a collection of interoperable hardware units (including one or more processors as described above) in combination with suitable software and / or firmware. Accordingly, the term "processor" as used herein may refer to any of the above structures or any other structure suitable for implementing the technology described herein. In addition, these technologies can be fully implemented in one or more circuits or logic elements.

[0126] The following aspects are merely illustrative and may be combined with other aspects or teachings described herein without limitation.

[0127] Aspect 1 is a device for graphics processing (e.g., a device at a GPU), comprising: a memory; and at least one processor, the at least one processor being coupled to the memory and, based at least in part on information stored in the memory, the at least one processor being configured to: obtain at least one image from a set of images corresponding to a scene associated with the graphics processing; perform a nonlinear foveal compression process on the at least one image, wherein the nonlinear foveal compression process corresponds to continuous nonlinear compression of a portion of the at least one image; and send the at least one image after the nonlinear foveal compression process, so that the at least one image sent corresponds to at least one compressed image.

[0128] Aspect 2 is the apparatus of aspect 1, wherein the portion of the at least one image is within a threshold distance from one or more edges of the at least one image.

[0129] Aspect 3 is a device according to any one of Aspects 1 and 2, wherein the nonlinear foveal compression process corresponds to at least one of the following: (i) a first continuous nonlinear compression for one or more first parts of the at least one image, or (ii) a second continuous linear compression for one or more second parts of the at least one image.

[0130] Aspect 4 is a device according to any one of Aspects 1 to 3, wherein the nonlinear foveal compression process corresponds to at least one of the following: (i) a first continuous nonlinear compression for a first portion of the at least one image, (ii) a second continuous linear compression for a second portion of the at least one image, or (iii) a third continuous nonlinear compression for a third portion of the at least one image.

[0131] Aspect 5 is a device according to any one of Aspects 1 to 4, wherein the nonlinear foveal compression process corresponds to at least one of the following: (i) a first continuous linear compression for a first portion of the at least one image, (ii) a second continuous nonlinear compression for a second portion of the at least one image, or (iii) a third continuous linear compression for a third portion of the at least one image.

[0132] Aspect 6 is an apparatus according to any one of aspects 1 to 5, wherein the at least one processor is further configured to: encode the at least one image after performing the non-linear foveal compression process and before sending the at least one image.

[0133] Aspect 7 is an apparatus according to any one of Aspects 1 to 6, wherein in order to perform the nonlinear foveal compression process on the at least one image, the at least one processor is configured to: filter data associated with the at least one image, wherein the filtered data is associated with a reduced amount of aliasing compared to unfiltered data associated with the at least one image.

[0134] Aspect 8 is a device according to any one of Aspects 1 to 7, wherein the nonlinear foveal compression process is performed during a time warping process or a synthesis process, wherein the nonlinear foveal compression process is associated with an anisotropic filtering process or a trilinear filtering process having one or more MIP maps, wherein the anisotropic filtering process or the trilinear filtering process is associated with a reduced amount of undersampling or flickering artifacts.

[0135] Aspect 9 is a device according to any one of Aspects 1 to 8, wherein the nonlinear foveal compression process corresponds to the continuous nonlinear compression of the entirety of the at least one image, so that the portion of the at least one image is equal to the entirety of the at least one image.

[0136] Aspect 10 is an apparatus according to any one of aspects 1 to 9, wherein in order to perform the non-linear foveal compression process on the at least one image, the at least one processor is configured to: perform a non-linear foveal scaling process on the at least one image.

[0137] Aspect 11 is an apparatus according to any one of aspects 1 to 10, wherein the nonlinear foveal compression process is associated with a lens distortion correction (LDC) process or an anamorphic scaling process.

[0138] Aspect 12 is an apparatus according to any one of aspects 1 to 11, wherein the LDC process is associated with at least one lens, wherein the at least one lens is associated with non-uniform image quality or non-uniform pixel quality.

[0139] Aspect 13 is a device according to any one of aspects 1 to 12, wherein the non-linear foveal compression process reduces the amount of data of the at least one image, wherein the data is to be stored in at least one of a memory, a buffer, or an eye buffer.

[0140] Aspect 14 is an apparatus according to any one of Aspects 1 to 13, wherein, in order to obtain the at least one image, the at least one processor is configured to: receive the at least one image from a camera, at least one component in a graphics processing unit (GPU), or at least one of a video component.

[0141] Clause 15 is an apparatus according to any one of clauses 1 to 14, wherein the at least one image is sent to a display processing unit (DPU) or a display driver integrated circuit (DDIC).

[0142] Aspect 16 is a device for graphics processing (e.g., a device at a DPU), comprising: a memory; and at least one processor, the at least one processor being coupled to the memory and, based at least in part on information stored in the memory, the at least one processor being configured to: obtain at least one compressed image in a scene associated with the graphics processing, wherein the at least one compressed image is associated with a nonlinear foveal compression process; perform a nonlinear foveal decompression process on the at least one compressed image so that the at least one compressed image corresponds to at least one image, wherein the nonlinear foveal decompression process corresponds to a continuous nonlinear decompression of a portion of the at least one image; and send the at least one image after the nonlinear foveal decompression process.

[0143] Clause 17 is the apparatus of clause 16, wherein the portion of the at least one image is within a threshold distance from one or more edges of the at least one image.

[0144] Aspect 18 is a device according to any one of Aspects 16 and 17, wherein the nonlinear foveal decompression process corresponds to at least one of the following: (i) a first continuous nonlinear decompression for one or more first portions of the at least one image, or (ii) a second continuous linear decompression for one or more second portions of the at least one image.

[0145] Aspect 19 is a device according to any one of Aspects 16 to 18, wherein the nonlinear foveal decompression process corresponds to at least one of: (i) a first continuous nonlinear decompression for a first portion of the at least one image, (ii) a second continuous linear decompression for a second portion of the at least one image, or (iii) a third continuous nonlinear decompression for a third portion of the at least one image.

[0146] Aspect 20 is a device according to any one of Aspects 16 to 19, wherein the nonlinear foveal decompression process corresponds to at least one of: (i) a first continuous linear decompression for a first portion of the at least one image, (ii) a second continuous nonlinear decompression for a second portion of the at least one image, or (iii) a third continuous linear decompression for a third portion of the at least one image.

[0147] Aspect 21 is an apparatus according to any one of aspects 16 to 20, wherein the at least one processor is further configured to: decode the at least one compressed image after obtaining the at least one compressed image and before performing the non-linear foveal decompression process.

[0148] Aspect 22 is a device according to any one of Aspects 16 to 21, wherein the nonlinear foveal decompression process is performed during a time warping process or a synthesis process, wherein the nonlinear foveal compression process is associated with an anisotropic filtering process or a trilinear filtering process having one or more MIP maps, wherein the anisotropic filtering process or the trilinear filtering process is associated with a reduced amount of undersampling or flickering artifacts.

[0149] Aspect 23 is an apparatus according to any one of Aspects 16 to 22, wherein the nonlinear foveal decompression process corresponds to the continuous nonlinear decompression of the entirety of the at least one image so that the portion of the at least one image is equal to the entirety of the at least one image.

[0150] Aspect 24 is an apparatus according to any one of aspects 16 to 23, wherein in order to perform the non-linear foveal decompression process on the at least one image, the at least one processor is configured to: perform a non-linear foveal scaling process on the at least one image.

[0151] Clause 25 is an apparatus according to any one of clauses 16 to 24, wherein the nonlinear foveal decompression process is associated with a lens distortion correction (LDC) process or an anamorphic scaling process.

[0152] Aspect 26 is an apparatus according to any one of aspects 16 to 25, wherein the LDC process is associated with at least one lens, wherein the at least one lens is associated with non-uniform image quality or non-uniform pixel quality.

[0153] Aspect 27 is an apparatus according to any one of aspects 16 to 26, wherein, in order to obtain the at least one compressed image, the at least one processor is configured to: receive the at least one compressed image from a graphics processing unit (GPU).

[0154] Clause 28 is an apparatus according to any one of clauses 16 to 27, wherein the at least one image is sent to a display panel or a memory.

[0155] Aspect 29 is an apparatus according to any one of aspects 1 to 28, wherein the apparatus is a wireless communication device, the apparatus further comprising at least one of an antenna or a transceiver coupled to the at least one processor.

[0156] Aspect 30 is a method for implementing a graphics processing method according to any one of aspects 1 to 28.

[0157] Aspect 31 is a device for performing graphics processing, comprising: a component for implementing any one of aspects 1 to 28.

[0158] Aspect 32 is a computer-readable medium (eg, non-transitory computer-readable medium) storing computer-executable code, which, when executed by at least one processor, causes the at least one processor to implement any one of aspects 1 to 28.

Claims

1. A device for graphics processing, the device comprising: Memory; and at least one processor coupled to the memory and based at least in part on the information stored in the memory, the at least one processor configured to: obtaining at least one image from a set of images corresponding to a scene associated with the graphics process; performing a non-linear foveal compression process on the at least one image, wherein the non-linear foveal compression process corresponds to a continuous non-linear compression of a portion of the at least one image; as well as The at least one image is transmitted after the non-linear foveal compression process such that the transmitted at least one image corresponds to at least one compressed image. 2 . The apparatus of claim 1 , wherein the portion of the at least one image is within a threshold distance from one or more edges of the at least one image.

3. An apparatus according to claim 1, wherein the nonlinear foveal compression process corresponds to at least one of the following: (i) a first continuous nonlinear compression of one or more first portions of the at least one image, or (ii) a second continuous linear compression of one or more second portions of the at least one image.

4. The apparatus of claim 1 , wherein the nonlinear foveal compression process corresponds to at least one of: (i) a first continuous nonlinear compression for a first portion of the at least one image, (ii) a second continuous linear compression for a second portion of the at least one image, or (iii) a third continuous nonlinear compression for a third portion of the at least one image.

5. The apparatus of claim 1 , wherein the nonlinear foveal compression process corresponds to at least one of: (i) a first continuous linear compression for a first portion of the at least one image, (ii) a second continuous nonlinear compression for a second portion of the at least one image, or (iii) a third continuous linear compression for a third portion of the at least one image.

6. The apparatus of claim 1 , wherein the at least one processor is further configured to: The at least one image is encoded after performing the non-linear foveal compression process and before transmitting the at least one image.

7. An apparatus according to claim 1, wherein in order to perform the nonlinear foveal compression process on the at least one image, the at least one processor is configured to: filter data associated with the at least one image, wherein the filtered data is associated with a reduced amount of aliasing compared to unfiltered data associated with the at least one image.

8. The apparatus of claim 1 , wherein the nonlinear foveal compression process is performed during a time warping process or a synthesis process, wherein the nonlinear foveal compression process is associated with an anisotropic filtering process or a trilinear filtering process with one or more MIP maps, wherein the anisotropic filtering process or the trilinear filtering process is associated with a reduced amount of undersampling or flickering artifacts.

9. The apparatus of claim 1, wherein the non-linear foveal compression process corresponds to the continuous non-linear compression of the entirety of the at least one image such that the portion of the at least one image is equal to the entirety of the at least one image.

10. The apparatus of claim 1, wherein to perform the non-linear foveal compression process on the at least one image, the at least one processor is configured to perform a non-linear foveal scaling process on the at least one image.

11. The apparatus of claim 1, wherein the nonlinear foveal compression process is associated with a lens distortion correction (LDC) process or an anamorphic scaling process.

12. The apparatus of claim 11, wherein the LDC process is associated with at least one lens, wherein the at least one lens is associated with non-uniform image quality or non-uniform pixel quality.

13. The device of claim 1, wherein the non-linear foveal compression process reduces an amount of data of the at least one image, wherein the data is to be stored in at least one of a memory, a buffer, or an eye buffer.

14. The apparatus of claim 1, wherein to obtain the at least one image, the at least one processor is configured to receive the at least one image from at least one of a camera, at least one component in a graphics processing unit (GPU), or a video component.

15. The apparatus according to claim 1, further comprising: At least one of an antenna or a transceiver coupled to the at least one processor, wherein the at least one image is sent to a display processing unit (DPU) or a display driver integrated circuit (DDIC).

16. A device for graphics processing, the device comprising: Memory; and at least one processor coupled to the memory and based at least in part on the information stored in the memory, the at least one processor configured to: obtaining at least one compressed image of a scene associated with the graphics processing, wherein the at least one compressed image is associated with a non-linear foveal compression process; performing a non-linear foveal decompression process on the at least one compressed image such that the at least one compressed image corresponds to at least one image, wherein the non-linear foveal decompression process corresponds to a continuous non-linear decompression of a portion of the at least one image; as well as The at least one image is transmitted after the non-linear foveal decompression process.

17. The apparatus of claim 16, wherein the portion of the at least one image is within a threshold distance from one or more edges of the at least one image.

18. The apparatus of claim 16, wherein the nonlinear foveal decompression process corresponds to at least one of: (i) a first continuous nonlinear decompression of one or more first portions of the at least one image, or (ii) a second continuous linear decompression of one or more second portions of the at least one image.

19. The apparatus of claim 16, wherein the nonlinear foveal decompression process corresponds to at least one of: (i) a first continuous nonlinear decompression for a first portion of the at least one image, (ii) a second continuous linear decompression for a second portion of the at least one image, or (iii) a third continuous nonlinear decompression for a third portion of the at least one image.

20. The device of claim 16, wherein the nonlinear foveal decompression process corresponds to at least one of: (i) a first continuous linear decompression for a first portion of the at least one image, (ii) a second continuous nonlinear decompression for a second portion of the at least one image, or (iii) a third continuous linear decompression for a third portion of the at least one image.

21. The apparatus of claim 16, wherein the at least one processor is further configured to: The at least one compressed image is decoded after obtaining the at least one compressed image and before performing the non-linear foveal decompression process.

22. The apparatus of claim 16, wherein the nonlinear foveal decompression process is performed during a time warping process or a synthesis process, wherein the nonlinear foveal compression process is associated with an anisotropic filtering process or a trilinear filtering process with one or more MIP maps, wherein the anisotropic filtering process or the trilinear filtering process is associated with a reduced amount of undersampling or flickering artifacts.

23. The apparatus of claim 16, wherein the non-linear foveal decompression process corresponds to the continuous non-linear decompression for the entirety of the at least one image such that the portion of the at least one image is equal to the entirety of the at least one image.

24. The apparatus of claim 16, wherein to perform the non-linear foveal decompression process on the at least one image, the at least one processor is configured to perform a non-linear foveal scaling process on the at least one image.

25. The apparatus of claim 16, wherein the nonlinear foveal decompression process is associated with a lens distortion correction (LDC) process or an anamorphic scaling process.

26. The apparatus of claim 25, wherein the LDC process is associated with at least one lens, wherein the at least one lens is associated with non-uniform image quality or non-uniform pixel quality.

27. The apparatus of claim 16, wherein to obtain the at least one compressed image, the at least one processor is configured to: receive the at least one compressed image from a graphics processing unit (GPU).

28. The apparatus of claim 16, further comprising: At least one of an antenna or a transceiver coupled to the at least one processor, wherein the at least one image is sent to a display panel or a memory.

29. A graphics processing method, comprising: obtaining at least one image from a set of images corresponding to a scene associated with the graphics process; performing a non-linear foveal compression process on the at least one image, wherein the non-linear foveal compression process corresponds to a continuous non-linear compression of a portion of the at least one image; as well as The at least one image is transmitted after the non-linear foveal compression process such that the transmitted at least one image corresponds to at least one compressed image.

30. A graphics processing method, comprising: obtaining at least one compressed image of a scene associated with the graphics processing, wherein the at least one compressed image is associated with a non-linear foveal compression process; performing a non-linear foveal decompression process on the at least one compressed image such that the at least one compressed image corresponds to at least one image, wherein the non-linear foveal decompression process corresponds to a continuous non-linear decompression of a portion of the at least one image; as well as The at least one image is transmitted after the non-linear foveal decompression process.

Images