Optical module

Abstract

The optical module provided by the invention comprises a circuit board and a light emitting device, the light emitting device is electrically connected with the circuit board, and the light emitting device comprises a tube socket and a tube cap which are buckled with the tube socket to form a light emitting space; the base is arranged on one side of the tube base and located in the light emitting space; one end of the pin penetrates through and protrudes out of the tube seat; the metal ceramic substrate is arranged on one side of the base, and the bottom surface of the metal ceramic substrate abuts against the tops of the pins; the maximum distance between the metal ceramic substrate and the base is greater than the minimum distance between the pin and the base; the other end of the pin penetrates through the tube base and protrudes out of the light emitting space; the light emitting device further comprises a laser chip connected with the pin; one end of the flexible circuit board sleeves the pin, and the other end of the flexible circuit board is connected with the circuit board; a matching resistor is arranged on the flexible circuit board, and the sum of the impedance of the matching resistor and the impedance of the laser driving chip is matched with the impedance of the laser chip.

Description

optical modules

[0001] This disclosure claims priority from application number 202321320478.3 filed with the China Patent Office on May 26, 2023; priority from application number 202310610784.9 filed with the China Patent Office on May 26, 2023; priority from application number 202310076995.9 filed with the China Patent Office on January 19, 2023; and priority from application number 202320151145.6 filed with the China Patent Office on January 29, 2023. Technical Field

[0002] The present disclosure relates to the field of communication technology, and in particular to an optical module. Background Art

[0003] The rapid development of application markets such as big data, blockchain, cloud computing, the Internet of Things, and artificial intelligence has led to explosive growth in data traffic. Optical communication technology, with its unique advantages such as high speed, high bandwidth, and low installation costs, has gradually replaced traditional electrical signal communications in various industries. In optical communication technology, optical modules are tools for converting optical and electrical signals and are one of the key components in optical communication equipment. Furthermore, the transmission rate of optical modules continues to increase with the development of optical communication technology.

[0004] Summary of the Invention

[0005] The present disclosure provides an optical module, comprising:

[0006] A circuit board is provided with a laser driving chip;

[0007] The light emitting device is electrically connected to the circuit board and is used to emit light signals. The light emitting device includes:

[0008] tube socket;

[0009] The tube cap is snap-fitted with the tube base to form a light emitting space;

[0010] A base is provided on one side of the tube holder and is located in the light emitting space;

[0011] The tube pin has one end that passes through and protrudes from the tube socket;

[0012] The metal ceramic substrate is arranged on one side of the base, with its bottom surface resting against the top of the pin;

[0013] The maximum distance between the metal ceramic substrate and the base is greater than the minimum distance between the pins and the base;

[0014] The other end of the pin passes through the tube base and protrudes outside the light emitting space;

[0015] The light emitting device also includes:

[0016] Laser chip, connected to the pins;

[0017] The flexible circuit board has one end sleeved on the pin and the other end connected to the circuit board; a matching resistor is provided on the flexible circuit board, and the sum of the impedance of the matching resistor and the laser driver chip matches the impedance of the laser chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] To more clearly illustrate the technical solutions of the present disclosure, the following briefly introduces the drawings required for use in some embodiments of the present disclosure. Obviously, the drawings described below are only drawings of some embodiments of the present disclosure, and those skilled in the art can also derive other drawings based on these drawings. Furthermore, the drawings described below are schematic diagrams and are not intended to limit the actual dimensions of the products, actual processes of the methods, actual timing of signals, and the like involved in the embodiments of the present disclosure.

[0019] FIG1 is a connection diagram of an optical communication system according to an embodiment of the present disclosure;

[0020] FIG2 is a structural diagram of an optical network terminal provided according to an embodiment of the present disclosure;

[0021] FIG3 is a structural diagram of an optical module provided according to an embodiment of the present disclosure;

[0022] FIG4 is an exploded view of an optical module provided according to an embodiment of the present disclosure;

[0023] FIG5 is a structural diagram of an optical emitting device in an optical module according to an embodiment of the present disclosure;

[0024] FIG6 is an exploded schematic diagram of a light emitting device in an optical module according to an embodiment of the present disclosure;

[0025] FIG7 is a partial schematic diagram of a light emitting device in an optical module according to an embodiment of the present disclosure;

[0026] FIG8 is a partial schematic diagram of a light emitting device in an optical module according to an embodiment of the present disclosure from another angle;

[0027] FIG9 is a schematic structural diagram of the cooperation between the socket and the base in the optical module according to an embodiment of the present disclosure;

[0028] FIG10 is a schematic structural diagram of a metal ceramic substrate in an optical module according to an embodiment of the present disclosure;

[0029] FIG11 is an exploded schematic diagram of a metal-ceramic substrate in an optical module according to an embodiment of the present disclosure;

[0030] FIG12 is another structural schematic diagram of a metal-ceramic substrate in an optical module according to an embodiment of the present disclosure;

[0031] FIG13 is a schematic diagram of another structure of a metal-ceramic substrate in an optical module according to an embodiment of the present disclosure;

[0032] FIG14 is a schematic diagram of the connection structure between the light emitting device and the circuit board in the optical module according to an embodiment of the present disclosure;

[0033] FIG15 is a schematic diagram of the exploded structure of the light emitting device and the circuit board in the optical module according to an embodiment of the present disclosure;

[0034] FIG16 is a schematic structural diagram of a first flexible circuit board in an optical module according to an embodiment of the present disclosure;

[0035] FIG17 is a schematic cross-sectional view of a first flexible circuit board in an optical module according to an embodiment of the present disclosure;

[0036] FIG18 is a schematic diagram of a first insulating film layer of a first flexible circuit board in an optical module according to an embodiment of the present disclosure;

[0037] FIG19 is a schematic diagram of a signal layer of a first flexible circuit board in an optical module according to an embodiment of the present disclosure;

[0038] FIG20 is a schematic diagram of a ground layer of a first flexible circuit board in an optical module according to an embodiment of the present disclosure;

[0039] FIG21 is a schematic diagram of a third insulating film layer of a first flexible circuit board in an optical module according to an embodiment of the present disclosure.

[0040] FIG22 is a diagram showing an internal structure of a light receiving component in an optical module according to an embodiment of the present disclosure;

[0041] FIG23 is a circuit structure diagram of a light receiving component in an optical module according to an embodiment of the present disclosure;

[0042] FIG24 is a structural diagram of a voltage detection unit in an optical module according to an embodiment of the present disclosure;

[0043] FIG25 is a schematic diagram showing an application principle of a voltage detection unit in an optical module according to an embodiment of the present disclosure;

[0044] FIG26 is another application principle diagram of a voltage detection unit in an optical module according to an embodiment of the present disclosure;

[0045] FIG27 is a diagram showing the internal structure of a controller in an optical module according to an embodiment of the present disclosure;

[0046] FIG28 is a structural diagram of the interior of a light receiving component in an optical module according to an embodiment of the present disclosure;

[0047] FIG29 is a circuit structure diagram of a light receiving component in an optical module according to an embodiment of the present disclosure;

[0048] FIG30 is a structural diagram of a sampling circuit in an optical module according to an embodiment of the present disclosure;

[0049] FIG31 is a schematic diagram illustrating an application principle of a sampling circuit in an optical module according to an embodiment of the present disclosure;

[0050] FIG32 is another application principle diagram of a sampling circuit in an optical module according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0051] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present disclosure. Obviously, the embodiments described are only some embodiments of the present disclosure, not all embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of the present disclosure.

[0052] In optical communication systems, light signals are used to carry the information to be transmitted. These signals are then transmitted via information transmission equipment such as optical fibers or optical waveguides to information processing equipment such as computers to complete the information transmission. Because light is passive when transmitted through optical fibers or optical waveguides, low-cost, low-loss information transmission is possible. Furthermore, the signals transmitted by information transmission equipment such as optical fibers or optical waveguides are optical signals, while the signals that information processing equipment such as computers can recognize and process are electrical signals. Therefore, in order to establish an information connection between information transmission equipment such as optical fibers or optical waveguides and information processing equipment such as computers, conversion between electrical and optical signals is necessary.

[0053] In the field of optical communications, optical modules implement the aforementioned conversion between optical and electrical signals. They include both an optical port and an electrical port. The optical port enables optical communication with information transmission equipment such as optical fibers or optical waveguides, while the electrical port enables electrical connection with an optical network terminal (e.g., an optical modem). The electrical connection is primarily used for power supply, I2C signal transmission, data transmission, and grounding. The optical network terminal transmits electrical signals to information processing equipment such as computers via network cables or wireless fidelity (Wi-Fi).

[0054] Figure 1 is a connection diagram of an optical communication system according to an embodiment of the present disclosure. As shown in Figure 1 , the optical communication system includes a remote server 1000 , a local information processing device 2000 , an optical network terminal 100 , an optical module 200 , an optical fiber 101 , and a network cable 103 .

[0055] One end of optical fiber 101 is connected to remote server 1000, and the other end is connected to optical network terminal 100 via optical module 200. Optical fiber itself can support long-distance signal transmission, for example, signal transmission over several kilometers (6 to 8 kilometers). Furthermore, if repeaters are used, theoretically, transmission over an unlimited distance is possible. Therefore, in typical optical communication systems, the distance between remote server 1000 and optical network terminal 100 can typically reach several thousand, tens of kilometers, or even hundreds of kilometers.

[0056] One end of the network cable 103 is connected to the local information processing device 2000, and the other end is connected to the optical network terminal 100. The local information processing device 2000 can be any one or more of the following devices: a router, a switch, a computer, a mobile phone, a tablet computer, a television, etc.

[0057] The physical distance between the remote server 1000 and the optical network terminal 100 is greater than the physical distance between the local information processing device 2000 and the optical network terminal 100. The connection between the local information processing device 2000 and the remote server 1000 is completed by the optical fiber 101 and the network cable 103; and the connection between the optical fiber 101 and the network cable 103 is completed by the optical module 200 and the optical network terminal 100.

[0058] Optical module 200 includes an optical port and an electrical port. The optical port is configured to connect to optical fiber 101, thereby establishing a bidirectional optical signal connection between optical module 200 and optical fiber 101. The electrical port is configured to connect to optical network terminal 100, thereby establishing a bidirectional electrical signal connection between optical module 200 and optical network terminal 100. Optical module 200 performs conversion between optical and electrical signals, thereby establishing an information connection between optical fiber 101 and optical network terminal 100. For example, optical signals from optical fiber 101 are converted to electrical signals by optical module 200 and then input into optical network terminal 100. Similarly, electrical signals from optical network terminal 100 are converted to optical signals by optical module 200 and then input into optical fiber 101. Since optical module 200 is a tool for converting optical and electrical signals and does not process data, the information remains unchanged during the aforementioned optical-to-electrical conversion process.

[0059] The optical network terminal 100 includes a roughly rectangular housing, an optical module interface 102, and a network cable interface 104 disposed on the housing. The optical module interface 102 is configured to connect to the optical module 200, thereby establishing a bidirectional electrical signal connection between the optical network terminal 100 and the optical module 200. The network cable interface 104 is configured to connect to the network cable 103, thereby establishing a bidirectional electrical signal connection between the optical network terminal 100 and the network cable 103. The connection between the optical module 200 and the network cable 103 is established through the optical network terminal 100. For example, the optical network terminal 100 transmits electrical signals from the optical module 200 to the network cable 103, and transmits electrical signals from the network cable 103 to the optical module 200. Therefore, the optical network terminal 100 serves as the host computer of the optical module 200 and can monitor the operation of the optical module 200. In addition to the optical network terminal 100, the host computer of the optical module 200 may also include an optical line terminal (OLT), etc.

[0060] The remote server 1000 establishes a bidirectional signal transmission channel with the local information processing device 2000 through the optical fiber 101 , the optical module 200 , the optical network terminal 100 and the network cable 103 .

[0061] Figure 2 is a structural diagram of an optical network terminal (ONT) according to an embodiment of the present disclosure. To clearly illustrate the connection between optical module 200 and ONT 100, Figure 2 only shows the structure of ONT 100 related to optical module 200. As shown in Figure 2, ONT 100 also includes a circuit board 105 disposed within a housing, a cage 106 disposed on the surface of circuit board 105, a heat sink 107 disposed on cage 106, and an electrical connector disposed within cage 106. The electrical connector is configured to connect to the electrical port of optical module 200; heat sink 107 has raised portions, such as fins, to increase the heat dissipation area.

[0062] Optical module 200 is inserted into cage 106 of optical network terminal 100. Cage 106 secures optical module 200, and heat generated by optical module 200 is transferred to cage 106 and then dissipated through heat sink 107. After optical module 200 is inserted into cage 106, its electrical port connects to an electrical connector inside cage 106, establishing a bidirectional electrical signal connection between optical module 200 and optical network terminal 100. Furthermore, its optical port connects to optical fiber 101, establishing a bidirectional optical signal connection between optical module 200 and optical fiber 101.

[0063] Figure 3 is a structural diagram of an optical module according to an embodiment of the present disclosure, and Figure 4 is an exploded view of an optical module according to an embodiment of the present disclosure. As shown in Figure 3, the optical module 200 includes a housing, a circuit board 206 disposed within the housing, and an optical transceiver assembly.

[0064] The housing includes an upper housing 201 and a lower housing 202 . The upper housing 201 covers the lower housing 202 to form the housing with two openings. The outer contour of the housing is generally a square.

[0065] In some embodiments of the present disclosure, the lower shell 202 includes a base plate 2021 and two lower side plates 2022 located on both sides of the base plate 2021 and arranged perpendicular to the base plate 2021; the upper shell 201 includes a cover plate 2011, and the cover plate 2011 covers the two lower side plates 2022 of the lower shell 202 to form the above-mentioned shell.

[0066] In some embodiments, the lower shell 202 includes a base plate 2021 and two lower side plates 2022 located on both sides of the base plate 2021 and arranged perpendicularly to the base plate 2021; the upper shell 201 includes a cover plate 2011 and two upper side plates located on both sides of the cover plate 2011 and arranged perpendicularly to the cover plate 2011. The two upper side plates are combined with the two lower side plates 2022 to achieve the upper shell 201 covering the lower shell 202.

[0067] The direction of the line connecting the two openings 205 can be consistent with the length of the optical module 200, or inconsistent with the length of the optical module 200. For example, one opening 205 is located at the end of the optical module 200 (the right end in FIG3 ), and the other opening 205 is also located at the end of the optical module 200 (the left end in FIG3 ). Alternatively, one opening 205 is located at the end of the optical module 200, and the other opening 205 is located on the side of the optical module 200. One of the openings 205 is an electrical port 204, from which the gold finger of the circuit board 206 extends and is inserted into the host computer (e.g., the optical network terminal 100); the other opening 205 is an optical port, which is configured to connect to the external optical fiber 101, so that the external optical fiber 101 can connect to the optical transceiver assembly inside the optical module 200.

[0068] The combined assembly of upper and lower housings 201 and 202 facilitates installation of components such as the circuit board 206 and optical transceiver assembly into the housing, with these components encapsulated and protected by the upper and lower housings 201 and 202. Furthermore, during assembly of components such as the circuit board 206 and optical transceiver assembly, positioning components, heat dissipation components, and electromagnetic shielding components are easily positioned, facilitating automated production.

[0069] In some embodiments, the upper shell 201 and the lower shell 202 are generally made of metal materials, which are conducive to electromagnetic shielding and heat dissipation.

[0070] In some embodiments, the optical module 200 further includes an unlocking component located outside its housing, and the unlocking component is configured to achieve a fixed connection between the optical module 200 and the host computer, or to release the fixed connection between the optical module 200 and the host computer.

[0071] For example, the unlocking component is located on the outer walls of the two lower side panels 2022 of the lower housing 202 and has a snap-fitting component that mates with the host computer cage (e.g., the cage 106 of the optical network terminal 100). When the optical module 200 is inserted into the host computer cage, the snap-fitting component of the unlocking component secures the optical module 200 in the host computer cage. When the unlocking component is pulled, the snap-fitting component of the unlocking component moves accordingly, thereby changing the connection between the snap-fitting component and the host computer, thereby releasing the snap-fitting relationship between the optical module 200 and the host computer, thereby allowing the optical module 200 to be removed from the host computer cage.

[0072] Circuit board 206 includes circuit traces, electronic components, and chips. The circuit traces connect the electronic components and chips according to the circuit design to achieve functions such as power supply, electrical signal transmission, and grounding. Examples of electronic components include capacitors, resistors, transistors, and metal-oxide-semiconductor field-effect transistors (MOSFETs). Examples of chips include microcontroller units (MCUs), laser driver chips, limiting amplifiers, clock and data recovery (CDR) chips, power management chips, and digital signal processing (DSP) chips.

[0073] The circuit board 206 is generally a rigid circuit board. Due to its relatively hard material, the rigid circuit board can also realize the load-bearing function. For example, the rigid circuit board can stably support the above-mentioned electronic components and chips; when the optical transceiver component is located on the circuit board, the rigid circuit board can also provide stable support; the rigid circuit board can also be inserted into the electrical connector in the upper computer cage.

[0074] The circuit board 206 also includes gold fingers formed on its end surfaces. The gold fingers are composed of multiple independent pins. The circuit board 206 is inserted into the cage 106, and the gold fingers are electrically connected to the electrical connectors within the cage 106. The gold fingers can be provided only on one side of the circuit board 206 (such as the top surface shown in FIG4 ), or they can be provided on both the top and bottom surfaces of the circuit board 206 to accommodate applications requiring a large number of pins. The gold fingers are configured to establish an electrical connection with the host computer to facilitate power supply, grounding, I2C signal transmission, data signal transmission, etc.

[0075] Of course, some optical modules also use flexible printed circuits. They are typically used in conjunction with rigid printed circuits to complement them. For example, a flexible printed circuit can be used to connect a rigid printed circuit to an optical transceiver assembly.

[0076] The optical transceiver assembly includes an optical transmitter 300 and an optical receiver. The optical transmitter is configured to transmit an optical signal, and the optical receiver is configured to receive an optical signal. For example, the optical transmitter and the optical receiver are combined to form an integrated optical transceiver assembly.

[0077] Figure 5 is a diagram illustrating the external structure of a light emitting device in an optical module according to an embodiment of the present disclosure. As shown in Figure 5, the light emitting device 300 provided in this embodiment includes a socket 310, a cap 320, and other components disposed within the cap 320 and socket 310. The cap 320 covers one end of the socket 310. The socket 310 includes a plurality of pins, which are used to electrically connect the flexible printed circuit board to the other electrical components within the light emitting device 300, and further to electrically connect the light emitting device 300 to the circuit board 206. This embodiment uses the structure shown in Figure 5 as an example.

[0078] Below, the internal structure of the light emitting device in the optical module provided by the embodiment of the present disclosure is first introduced in detail.

[0079] FIG6 is a schematic diagram of an exploded view of a light emitting device in an optical module according to an embodiment of the present disclosure. As shown in FIG6 , in some embodiments, the light emitting device includes a tube seat 310, a laser detector disposed on the surface of the tube seat, a base 330, a tube pin, and a tube cap 320. The base is arranged perpendicularly or approximately perpendicularly to the tube seat, and a metal ceramic substrate 350 is provided on the surface of the base. A laser chip 340 is provided on the surface of the metal ceramic substrate 350. The laser detector is connected to the tube pin via a wire (not shown in the figure). The tube cap is provided with a collimating lens (not shown in the figure) for collimating the signal light emitted by the laser chip.

[0080] The tube base 310 is used to support and carry the laser detector and the base 330. The tube base is provided with a plurality of through holes for fixing the tube pins.

[0081] Base 330 supports metal-ceramic substrate 350. In this example, base 330 primarily serves to dissipate heat and support the substrate. Materials for base 330 include, but are not limited to, tungsten-copper, Kovar, cold-rolled carbon steel (SPCC), or copper, among other metals or alloys. This facilitates heat transfer from the optoelectronic components to tube base 310 for dissipation. Metal-ceramic substrate 350 can be made of alumina ceramic, aluminum nitride ceramic, or other materials. In some examples, multiple conductive areas are provided on the surface of the metal-ceramic substrate for signal transmission. The cathode of laser chip 340 is connected to the cathode of the conductive area via a metal heat sink, and the anode is connected to the anode of the conductive area via a wire.

[0082] The tube cap is buckled onto the tube base to form a light emitting space, and the laser detector and the base 330 are arranged inside the light emitting space.

[0083] To provide electrical signals to components within the light-emitting device, the pins include a ground pin 311, a positive pin 312, and a negative pin 313. Positive pin 312 is connected to the positive terminal of the laser chip, and negative pin 313 is connected to the negative terminal of the laser chip. Ground pin 311 is connected to the base 310. In some examples, matching resistors may not be required within the light-emitting device.

[0084] In some embodiments of the present disclosure, the base 330 and the tube holder 310 may be an integrally formed structural component, and the base 330 is provided to protrude from the tube holder 310 to support the laser chip.

[0085] The light-emitting device is connected to the flexible printed circuit board via pins, which in turn are electrically connected to the circuit board 206. Typically, a laser driver chip is mounted on the circuit board 206 to power the laser chip. When the optical module transmits signals, the gold fingers on the flexible printed circuit board direct the electrical signal output by the laser driver chip to the pins. The pins then connect to the laser chip via the conductive area, and the laser chip 340 then converts the electrical signal into an optical signal.

[0086] Typically, in a coaxial package, one end of the pin passes through and protrudes from the tube seat 310, and the metal ceramic substrate 350 is located between the pin and the base. During the installation process, it is necessary to first mount the metal ceramic substrate 350 on the base 330, at which point the bottom surface of the metal ceramic substrate 350 is located above the top of the pin, and then push the metal ceramic substrate 350 from above into the gap between the pin and the base 330. Special tools are required to push in this process, which is costly. In some embodiments of the present application, the bottom surface of the metal ceramic substrate 350 is in contact with and connected to the top surface of the pin, and the conductive sheet is connected to the pin by bonding.

[0087] Figure 7 is a partial schematic diagram of a light emitting device in an optical module according to an embodiment of the present disclosure, and Figure 8 is a partial schematic diagram of a light emitting device in an optical module according to an embodiment of the present disclosure, viewed from another angle. As shown in Figures 7 and 8, in some embodiments of the present application, the bottom surface of the metal-ceramic substrate 350 abuts against the top surfaces of the positive pin 312 and the negative pin 313, one side of the metal-ceramic substrate 350 is in contact with the base 330, and the laser chip 340 is located on the other side of the metal-ceramic substrate 350, opposite the base 330.

[0088] In some embodiments of the present application, one side of the base 330 is a flat support surface with good flatness for supporting the metal ceramic substrate 350. The bottom of the base 330 is connected to the tube holder 310, and the tube holder 310 is connected to the ground pin 311, so that the base 330 is grounded.

[0089] In some examples, the metal-ceramic substrate 350 includes a substrate 353 and a positive conductive sheet 351 and a negative conductive sheet 352 disposed on one side of the substrate. In some embodiments of the present disclosure, the area of ​​the negative conductive sheet 352 is larger than that of the positive conductive sheet because the laser chip 340 is mounted on the negative conductive sheet 352 and a sufficient return path is provided for the laser chip 340.

[0090] It is understood that in some examples, the laser chip 340 may also be disposed on the positive electrode conductive sheet 351 , and the negative electrode is connected to the negative electrode conductive sheet 352 via a wire.

[0091] In some embodiments, the positive conductive sheet 351 and the negative conductive sheet 352 are connected to other devices by bonding to connect the circuit for transmitting high-frequency signals to the laser chip 340. Therefore, the positive conductive sheet 351 and the negative conductive sheet 352 extend from one end of the substrate 353 to the other end of the substrate 353, that is, the positive conductive sheet 351 and the negative conductive sheet 352 span the substrate 353.

[0092] For example, the laser chip 340 is arranged at one end of the negative conductive sheet 352, the positive electrode of the laser chip 340 is connected to one end of the positive conductive sheet 351 by wire bonding, and the other end of the negative conductive sheet 352 and the other end of the positive conductive sheet 351 are used for wire bonding to other devices, providing sufficient space for wire bonding to other devices with the other end of the negative conductive sheet 352 and the other end of the positive conductive sheet 351.

[0093] In some embodiments of the present disclosure, the minimum vertical distance between the top surface of the positive pin 312 and the base 330 is less than the thickness of the metal-ceramic substrate 350. In other words, the minimum distance between the top surface of the positive pin 312 and the support plane of the base 330 is less than the distance between the side surface of the metal-ceramic substrate 350 and the support plane of the base. The metal-ceramic substrate 350 cannot be embedded in the gap between the positive pin 312 and the base, but rather overlaps the top surface of the positive pin 312. To achieve a conductive connection between the positive pin 312 and the base, the maximum vertical distance between the top surface of the positive pin 312 and the base during wire bonding is greater than the thickness of the metal-ceramic substrate 350. In other words, the maximum distance between the top surface of the positive pin 312 and the support plane of the base is greater than the distance between the other side surface of the metal-ceramic substrate 350 and the support plane of the base. The top surface of the positive pin 312 is partially exposed outside the coverage area of ​​the metal-ceramic substrate 350, allowing for the installation of metal wires.

[0094] Similarly, the minimum vertical distance between the top surface of the negative electrode pin 313 and the base is less than the thickness of the metal-ceramic substrate 350. In other words, the minimum distance between the top surface of the negative electrode pin 313 and the base's support plane is less than the distance between the side surface of the metal-ceramic substrate 350 and the base's support plane. The metal-ceramic substrate 350 cannot be embedded in the gap between the negative electrode pin 313 and the base, but rather overlaps the top surface of the negative electrode pin 313. To achieve a conductive connection between the negative electrode pin 313 and the metal-ceramic substrate 350 and the base during wire bonding, the maximum vertical distance between the top surface of the negative electrode pin 313 and the base is greater than the thickness of the metal-ceramic substrate 350. In other words, the maximum distance between the top surface of the negative electrode pin 313 and the base's support plane is greater than the distance between the other side surface of the metal-ceramic substrate 350 and the base's support plane. The top surface of the negative electrode pin 313 is partially exposed outside the coverage of the metal-ceramic substrate, allowing for the installation of metal wires.

[0095] To facilitate alignment of the laser chip 340 with the collimating lens on the tube cap, the top surfaces of the positive pin 312 and the negative pin 313 are coplanar. In other words, the distance between the top surface of the positive pin 312 and the top surface of the tube base is equal to the distance between the top surface of the negative pin 313 and the top surface of the tube base. Furthermore, the bottom surface of the metal-ceramic substrate 350 is parallel to the top surface of the tube base, facilitating alignment of the optical axis.

[0096] Figure 9 is a schematic diagram of the structure of the socket and base in an optical module provided according to an embodiment of the present disclosure. As shown in Figure 9, in some embodiments of the present disclosure, to prevent the base from affecting the installation of the pins, the through-holes include a positive through-hole 3120 and a negative through-hole 3130, and the projection of the base on the socket is located outside the area of ​​the positive through-hole and the negative through-hole. When the positive pin 312 passes through the positive through-hole, it will not contact the base 330, thus preventing damage. When the negative pin 313 passes through the negative through-hole, it will also not contact the base, thus preventing damage.

[0097] Figure 10 is a schematic diagram of a metal-ceramic substrate structure in an optical module according to an embodiment of the present disclosure. As shown in Figure 10, in the optical emitting device provided in this embodiment, a laser chip 340 is disposed on the side of a metal-ceramic substrate 350 facing away from the base 330, and signal wiring is provided on the metal-ceramic substrate 350. The anode of the laser chip 340 is located at the top of the laser chip 340 and is connected to the metal-ceramic substrate 350 via wire bonding. High-frequency signals are received through the metal-ceramic substrate 350.

[0098] Continuing with the previous embodiments of the present disclosure, in some examples, the positive conductive sheet 351 is located on one side of the metal ceramic substrate 350 facing away from the base 330, and the negative conductive sheet 352 is located on the other side of the metal ceramic substrate 350 opposite the positive conductive sheet 351. A spacer 354 is provided between the positive conductive sheet 351 and the negative conductive sheet 352 to isolate the positive conductive sheet 351 from the negative conductive sheet 352. The laser chip 340 is mounted on the negative conductive sheet 352, with the negative electrode of the laser chip 340 located on the back side of the laser chip 340. When the laser chip 340 is mounted on the negative conductive sheet 352, the negative electrode of the laser chip 340 is electrically connected to the negative conductive sheet 352. The positive electrode of the laser chip 340 is connected to the positive conductive sheet by wire bonding.

[0099] In some embodiments of the present application, the cathode of the laser chip may be connected to the metal-ceramic substrate, and the anode may be mounted on the surface of the metal-ceramic substrate.

[0100] Figure 11 is an exploded schematic diagram of a metal-ceramic substrate in an optical module according to an embodiment of the present disclosure. As shown in Figure 11, a reference ground layer 357 is provided on the side of the substrate 353 facing the base 330. Reference ground layer 357 serves as a return ground for the laser assembly. The positive conductive sheet 351, the negative conductive sheet 352, and the reference ground layer 357 can be fabricated on the surface of the substrate 353 using a metal thin film process.

[0101] Figure 12 is a schematic diagram of another structure of a metal-ceramic substrate in an optical module according to an embodiment of the present disclosure. As shown in Figure 12, in the light-emitting device provided in this embodiment, one end of the positive conductive sheet 351 extends to the bottom surface of the metal-ceramic substrate 350, which is in contact with the positive pin 312. Electrical connection can be achieved through direct contact between the positive conductive sheet 351 and the positive pin 312. One end of the negative conductive sheet 352 extends to the bottom surface of the metal-ceramic substrate, which is in contact with the negative pin. Electrical connection can be achieved through direct contact between the negative conductive sheet 352 and the negative pin 313.

[0102] As shown in Figure 12, a positive extension portion 3512 is provided on the side of the substrate 353 that contacts the pins. This portion is connected to the positive conductive sheet 351. To facilitate manufacturing and reduce process steps, the positive extension portion 3512 and the positive conductive sheet 351 are integrally formed. To prevent a short circuit caused by the positive extension portion 3512 connecting to the reference ground layer 357, the positive extension portion 3512 cannot penetrate the side of the substrate 353 facing the base 330. In other words, a gap exists between the positive extension portion 3512 and the side of the substrate 353 closest to the reference ground layer.

[0103] To prevent the reference ground layer from being electrically connected to the positive extension portion 3512 , the area of ​​the reference ground layer is smaller than the area of ​​the adjacent side surface of the substrate 353 .

[0104] Similarly, a negative extension 3522 is provided on the side of the substrate 353 that contacts the pins. This negative extension 3522 is connected to the negative conductive sheet 352. To facilitate manufacturing and reduce process steps, the negative extension 3522 and the negative conductive sheet 352 are integrally formed. To prevent a short circuit caused by the negative extension 3522 connecting to the reference ground layer 357, the negative extension 3522 cannot penetrate the side of the substrate 353 facing the base 330. In other words, a gap exists between the negative extension 3522 and the side of the substrate 353 near the reference ground layer.

[0105] To prevent the reference ground layer from being electrically connected to the negative extension portion 3522 , the area of ​​the reference ground layer is smaller than the area of ​​the adjacent side surface of the substrate body.

[0106] In some embodiments of the present application, the substrate may be a ceramic substrate, such as AlN ceramic, but is not limited to a ceramic substrate.

[0107] The optical module provided by the present disclosure, wherein the light emitting device includes: a tube seat, which is provided with a through hole. A tube cap, which is snap-fitted and connected to the tube seat to form a light emitting space. A base, which is provided on one side of the tube seat and is located in the light emitting space. A pin, which is provided in the through hole, has one end passing through and protruding from the tube seat; a metal ceramic substrate, which is provided on one side of the base, has one side resting on the top of the pin; the maximum distance between the metal ceramic substrate and the base is greater than the minimum distance between the pin and the base. In the present application, one side of the metal ceramic substrate is resting on the top of the pin. Compared with the design provided between the pin and the base, the preparation process of the present disclosure is simple and reduces energy consumption.

[0108] FIG13 is another structural schematic diagram of a metal ceramic substrate in an optical module provided according to an embodiment of the present disclosure. As shown in FIG13 , compared to common solutions, the metal ceramic substrate of this embodiment is thicker, and the distance between the reference ground layer and the positive conductive sheet, as well as the distance between the reference ground layer and the negative conductive sheet, increases, resulting in an increase in the impedance of the optical emission component. As a result, high signal transmission at the connection between the optical emission device and the flexible circuit board will cause impedance mismatch, which will in turn degrade the quality of the high-speed signal of the optical emission device, resulting in a reduction in the 3dB bandwidth of the optical emission device. In particular, when the operating temperature of the optical emission device is high, such as 85°C, the loss of the high-speed signal quality of the optical emission device is more serious.

[0109] To ensure the high-frequency performance of the laser assembly, in some embodiments of the present disclosure, as shown in FIG. 13 , a plurality of first metal layers 3511 and a plurality of second metal layers 3521 are arranged in the interval 354. One end of the first metal layer 3511 is electrically connected to the positive conductive sheet 351, and the other end extends toward the negative conductive sheet 352 but is not connected to the negative conductive sheet 352. The second metal layer 3521 is electrically connected to the negative conductive sheet 352, and the other end extends toward the positive conductive sheet 351 but is not connected to the positive conductive sheet 351. The first metal layer 3511 and the second metal layer 3521 are alternately arranged.

[0110] In some embodiments of the present disclosure, the first metal layer 3511 is not connected to the second metal layer 3521. For example, the second metal layer 3521 is disposed between adjacent first metal layers 3511, and the first metal layer 3511 is disposed between adjacent second metal layers 3521. That is, the first metal layers 3511 and the second metal layers 3521 are alternately arranged in interdigitated fashion, such that there is a vertically facing region between the first metal layers 3511 and the second metal layers 3521 as shown in Figures 8 and 9. In some embodiments, several first metal layers 3511 and several second metal layers 3521 are parallel to each other, that is, each first metal layer 3511 is parallel to each second metal layer 3521.

[0111] Therefore, the alternating interdigitated first metal layer 3511 and second metal layer 3521 form an equivalent capacitor, which is connected in parallel with the laser chip 340. The positive electrode of the laser chip 340 and the bonding wire of the positive conductive sheet 351 form a parasitic inductance. This equivalent capacitor and parasitic inductance can form an LC resonance with an appropriate amplitude, thereby improving the bandwidth of the light emitting device within a suitable frequency range and ensuring the flatness of the bandwidth curve. Furthermore, when the light emitting device 300 is connected to the circuit board 206 via the flexible circuit board, the LC resonance effect within the light emitting device 300 can match the resonance effect at the connection between the light emitting device 300 and the flexible circuit board, effectively ensuring the high-frequency performance of the light emitting device 300 when used in an optical module.

[0112] In some embodiments, the staggered arrangement of the first metal layer 3511 and the second metal layer 3521 can equivalently form a capacitor of 0.05-0.2pF. Of course, the shapes of the first metal layer 3511 and the second metal layer 3521 can be changed as needed to obtain capacitors of other capacitance values, such as a capacitor of 0.12-0.18pF. Specifically, the shapes of the first metal layer 3511 and the second metal layer 3521 can be simulated and set as needed.

[0113] In some embodiments of the present disclosure, the width of the first metal layer 3511 is 10-70 μm, the width of the second metal layer 3521 is 10-70 μm, and the spacing between the first metal layer 3511 and the second metal layer 3521 is 10-70 μm. The lengths of the first metal layer 3511 and the second metal layer 3521 can be selected in combination with the width of the spacing 354. In some optional examples, the width of the first metal layer 3511 is 20-60 μm, the width of the second metal layer 3521 is 20-60 μm, and the spacing between the first metal layer 3511 and the second metal layer 3521 is 20-60 μm.

[0114] The positive electrode conductive sheet 351 , the negative electrode conductive sheet 352 , the first metal layer 3511 and the second metal layer 3521 can be formed on the main body of the metal ceramic substrate 350 by a metal thin film process.

[0115] In some embodiments, the transmission performance of high-frequency signals on the metal ceramic substrate 350 is improved, such as reducing the loss caused by the radiation of high-frequency signals on the positive conductive sheet 351 and the negative conductive sheet 352, and a notched area is provided on the positive conductive sheet 351 and the negative conductive sheet 352 to perform notched processing on the positive conductive sheet 351 and the negative conductive sheet 352.

[0116] In some embodiments, the width of the gap 354 may vary from the top to the bottom of the metal ceramic substrate, or may be the same. In some embodiments of the present application, the width of the gap 354 is larger on the side near the tube seat to facilitate the installation of other electrical components. To facilitate the installation of the laser chip 340 and reduce the length of the positive electrode bonding wire, the positive conductive sheet 351 has a corner that is arranged toward the negative conductive sheet 352; the negative conductive sheet 352 has a corner that is arranged toward the positive conductive sheet 351, so that the gap 354 between the positive conductive sheet 351 and the negative conductive sheet 352 near the top of the metal ceramic substrate 350 is sufficiently small.

[0117] In some embodiments, a first notched area 355 is further provided on the negative conductive sheet 352. The first notched area 355 is provided on one end of the negative conductive sheet 352 where the laser chip 340 is provided and on a side away from the positive conductive sheet 351. The first notched area 355 makes the corners formed by the negative conductive sheet 352 at this position obtuse angles, thereby effectively reducing the radiation loss of high-frequency signals generated in this area on the negative conductive sheet 352.

[0118] In some embodiments, a second notched area 356 is provided on the positive conductive sheet 351. The second notched area 356 is located on the other side of the positive conductive sheet 351 where the wires are connected to the laser chip 340. The second notched area 356 makes the corners formed by the positive conductive sheet 351 at this position obtuse angles, thereby effectively reducing the radiation loss of high-frequency signals generated in this area on the positive conductive sheet 351.

[0119] In some embodiments of the present application, in order to effectively control the bonding length from the laser chip 340 to the positive conductive sheet 351, the width of the gap 354 between the positive conductive sheet 351 and the negative conductive sheet 352 is usually relatively small. In order to facilitate the arrangement of the first metal layer 3511 and the second metal layer 3521, the first metal layer 3511 and the second metal layer 3521 are arranged at a position close to the other end of the positive conductive sheet 351. As a result, the first metal layer 3511 and the second metal layer 3521 can be within the gap 354, which can easily leave sufficient space for the first metal layer 3511 and the second metal layer 3521.

[0120] In some embodiments of the present disclosure, the number of strips in the first and second metal layers can be the same or different. To ensure the high-frequency performance of the laser assembly, the combination of the first and second metal layers 3511, 3521 must be based on the parameters and connection parameters of the laser chip 340 and substrate 353, and must be verified through extensive simulation experiments. The combination of the first and second metal layers 3511, 3521 and the electrical characteristics of the laser assembly cannot be achieved through random combinations.

[0121] As shown in the figure, the number of strips of the first metal layer and the second metal layer is the same, including 3 first metal layers 3511 and 3 second metal layers 3521. The lengths of different first metal layers 3511 are the same, and the lengths of different second metal layers are the same.

[0122] In some embodiments of the present disclosure, different first metal layers may have different lengths. Different second metal layers may have the same length. The lengths of the first metal layer and the second metal layer may be the same or different.

[0123] In some embodiments of the present disclosure, the parasitic inductance of the bonding wires between the laser chip 340 and the positive conductive sheet 351 can be calculated through simulation. The capacitance of the capacitor can then be calculated using the LC resonance formula. Simulation can then be used to design the combination of the first metal layer 3511 and the second metal layer 3521 to form a capacitor of a corresponding capacitance. Finally, experimental verification can be performed to determine whether the combination of the first metal layer 3511 and the second metal layer 3521 improves the bandwidth of the light emitting device and improves the flatness of the bandwidth curve. In some embodiments of the present disclosure, multiple first metal layers 3511 and multiple second metal layers 3521 are provided on the substrate 353. These multiple first metal layers 3511 and multiple second metal layers 3521 are staggered to form an interdigitated structure, fully utilizing the space between them to provide an equivalent capacitor with a matching capacitance value for the laser chip 340.

[0124] The connection relationship between the optical module's light emitting device and the circuit board will be described in detail below in conjunction with the accompanying drawings of this disclosure.

[0125] Figure 14 is a schematic diagram of the connection structure between the light emitting device and the circuit board in an optical module according to an embodiment of the present disclosure, and Figure 15 is a schematic diagram of the exploded structure of the light emitting device and the circuit board in an optical module according to an embodiment of the present disclosure. In some embodiments of the present disclosure, the light emitting device 300 and the light receiving device 410 can be coaxial TO packages. The light emitting device 300 and the circuit board 206 are connected via a first flexible circuit board 520, and the light receiving device 410 and the circuit board 206 are connected via a second flexible circuit board 510.

[0126] In the embodiment of the present disclosure, the optical transceiver assembly 400 can be a BOSA structure, including a tube shell 401, one end of which is provided with an optical fiber adapter 402 for connecting to an external optical fiber, the optical emitting device 300 is arranged on the adjacent side of the optical fiber adapter 402, and the optical receiving device 410 is arranged on the opposite side of the optical fiber adapter 402.

[0127] A notch is provided at one corner of the circuit board 206300 , which serves as an installation avoidance portion. The optical transceiver assembly is disposed in the installation avoidance portion, with the pins of the optical emitting device 300 and the optical receiving device 410 disposed toward the circuit board 206 .

[0128] Continuing with the previous embodiments of the present disclosure, light emitting device 300 includes a socket 310 (in some examples, also referred to as socket 310) and a plurality of pins. The pins extend through socket 310 and protrude from the outside of socket 310. In other words, as shown in Figures 5 and 6, the other ends of the pins can be located within the light emitting space. One end of a first flexible circuit board 520 is soldered to the pins.

[0129] In some examples, the pins include a first signal pin 424, a second signal pin 425, and a ground pin. A first TO connector is provided at a first end of the first flexible printed circuit board and connected to the bottom of the socket. The first TO connector is provided with a plurality of pin through-holes, and the inner walls of the through-holes are provided with a metal coating to connect to the pins.

[0130] The laser chip 340 on the circuit board 206 inherently has a certain impedance. However, due to individual variations, the resistance of the laser chip 340 fluctuates within a certain range. This impedance is determined by the rated impedance output by the laser driver chip, referred to herein as the characteristic impedance. When the impedance output by the laser chip 340 does not match this characteristic impedance, signal transmission between the laser driver chip and the laser chip will be lost, reducing signal integrity. Therefore, to ensure signal integrity, it is necessary to ensure that the impedance output by the laser chip 340 matches this characteristic impedance. It should be noted that matching here means ensuring that the impedance output by the laser detector 503 matches the characteristic impedance value. In other words, the impedance output by the corresponding pin of the laser chip 340 is consistent with the characteristic impedance value.

[0131] In order to reduce the loss between the laser chip and the laser driver chip, the output impedance value of the laser chip 340 is matched with the characteristic impedance. At least one resistor is set on the flexible circuit board. At this time, the resistor has an impedance matching function, and ultimately makes the impedance output by the laser consistent with the characteristic impedance. Therefore, the resistor on the flexible circuit board can be called a matching resistor.

[0132] Figure 16 is a schematic diagram of the structure of the first flexible circuit board in an optical module according to an embodiment of the present disclosure. As shown in Figure 16, a gold finger area 521 is provided at one end of the first flexible circuit board 520. To facilitate connection, the gold finger area is rectangular and exposes multiple gold fingers, including a first gold finger 5211, a second gold finger 5212, a first grounding gold finger 5213, a second grounding gold finger 5214, a first high-speed gold finger 5215, and a second high-speed gold finger 5216. The first grounding gold finger 5213 is positioned between the first high-speed gold finger 5215 and the first gold finger, and the second grounding gold finger 5214 is positioned between the second high-speed gold finger 5216 and the second gold finger. The sides of the first flexible circuit board 520 are provided with first and second avoidance holes 522 and 523 for connection to the circuit board. To facilitate connection between the flexible circuit board and the circuit board, the gold fingers are provided with connection holes to facilitate the passage of solder and enhance connection stability.

[0133] The other end of the first flexible printed circuit board 520 is a flexible connection area. This area is circular, but can also be polygonal, elliptical, or other shapes, matching the shape of the bottom surface of the socket, facilitating easy connection. Multiple through-holes are provided within the flexible connection area for pin insertion, including a first signal through-hole 5241, a first high-speed through-hole 5242, a ground through-hole 5247, a second signal through-hole 5244, and a second high-speed through-hole 5245. These through-holes 5241, 5242, 5247, 5244, and 5245 extend through the top and bottom surfaces of the first flexible printed circuit board.

[0134] One end of the first signal pin 424 passes through the first signal through hole and is connected to the first signal line on the first flexible circuit board. The other end of the first signal line 5243 is connected to the first signal gold finger.

[0135] One end of the first high-speed signal pin 422 extends through the first high-speed through-hole and connects to the first high-speed signal line on the first flexible printed circuit board. The other end of the first signal line 5243 connects to the first high-speed gold finger 5215. A first resistor 530 is provided between the first high-speed gold finger 5215 and the first high-speed signal pin 422 to match the characteristic impedance.

[0136] One end of the second signal pin 425 passes through the second signal through hole and is connected to the second signal line on the first flexible circuit board. The other end of the second signal line 5246 is connected to the second signal gold finger.

[0137] One end of the second high-speed signal pin 423 extends through the second high-speed through-hole and connects to the second high-speed signal line on the second flexible printed circuit board. The other end of the second signal line 5246 is connected to the second high-speed gold finger 5216. A second resistor 540 is provided between the second high-speed gold finger 5216 and the second high-speed signal pin 423. This second resistor is a matching resistor for matching the characteristic impedance. The first resistor is the first matching resistor, and the second resistor is the second matching resistor.

[0138] The ground pin passes through the grounding through hole 5247 and is connected to the grounding gold finger. In some embodiments of the present disclosure, there is no matching resistor inside the light emitting device, and the first resistor and the second resistor are set on the surface of the first flexible circuit board for matching the characteristic resistance.

[0139] For the convenience of introduction, the hierarchy of the first flexible circuit board is analyzed and introduced layer by layer below.

[0140] Figure 17 is a schematic cross-sectional view of the first flexible circuit board in an optical module according to an embodiment of the present disclosure. As shown in Figure 17, the first flexible circuit board 520 is divided into five layers: a first insulating film layer 551, a signal layer 552, a second insulating film layer 553, a ground layer 554, and a third insulating film layer 555. For ease of illustration, the first insulating film layer 551 represents the top surface of the first flexible circuit board, and the third insulating film layer 555 represents the bottom surface. From the top surface to the bottom surface, the following layers are arranged in order: the first insulating film layer 551, the signal layer 552, the second insulating film layer 553, the ground layer 554, and the third insulating film layer 555. The first insulating film layer 551, the second insulating film layer 553, and the third insulating film layer 555 are thin insulating film layers, while the signal layer 552 and the ground layer 554 are conductive metal layers.

[0141] Figure 18 is a schematic diagram of the first insulating film layer of the first flexible circuit board in an optical module according to an embodiment of the present disclosure. Figure 19 is a schematic diagram of the signal layer of the first flexible circuit board in an optical module according to an embodiment of the present disclosure. As shown in Figures 18 and 19, the shaded area in Figure 18 represents the location covered by the insulating film. The first insulating film layer 551 is located on the upper surface of the first flexible circuit board. The signal layer 552 is located below the first insulating film layer 551 and covers the signal lines on the signal layer. The signal layer 552 is primarily used to accommodate electrical signal lines other than the ground signal. The signal layer 552 is provided with multiple gold finger areas, including a first gold finger 5211, a second gold finger 5212, a first grounding gold finger 5213, a second grounding gold finger 5214, a first high-speed gold finger 5215, and a second high-speed gold finger 5216. The first grounding gold finger 5213 is located between the first high-speed gold finger 5215 and the first gold finger, and the second grounding gold finger 5214 is located between the second high-speed gold finger 5216 and the second gold finger.

[0142] To facilitate soldering, the soldering points need to be exposed outside the first insulating film layer. Specifically, the gold finger, first signal via 5241, first high-speed via 5242, ground via 5247, second signal via 5244, and second high-speed via 5245 are exposed outside the first insulating film layer. The first insulating film layer does not cover the gold finger area, leaving the first gold finger 5211, second gold finger 5212, first ground gold finger 5213, second ground gold finger 5214, first high-speed gold finger 5215, and second high-speed gold finger 5216 exposed outside the first insulating film layer, facilitating soldering.

[0143] The first signal via 5241, the first high-speed via 5242, the ground via 5247, the second signal via 5244, and the second high-speed via 5245 extend through the signal layer 552 of the first flexible printed circuit board. The first insulating film layer is provided with a first signal avoidance hole 5511, a second signal avoidance hole 5512, a third signal avoidance hole 5513, a first resistor avoidance portion 5514, and a second resistor avoidance portion for the passage of surface solder. The first signal via 5241 and the first high-speed via 5242 are disposed within the first signal avoidance hole. The opening area of ​​the first signal avoidance hole is larger than the combined area of ​​the first signal via 5241 and the first high-speed via 5242. The projection of the first signal avoidance hole on the signal layer covers the first signal via 5241 and the first high-speed via 5242, leaving the first signal via 5241 and the first high-speed via 5242 exposed on the top surface of the first flexible printed circuit board, facilitating soldering.

[0144] The second signal via 5244 and the second high-speed via 5245 are disposed within the second signal avoidance hole 5512. The opening area of ​​the second signal avoidance hole is larger than the sum of the areas of the second signal via 5244 and the second high-speed via 5245. The projection of the second signal avoidance hole on the signal layer covers the second signal via 5244 and the second high-speed via 5245, leaving them exposed on the top surface of the first flexible printed circuit board, facilitating soldering.

[0145] The signal layer 552 is also provided with a first signal line 5243, one end of which is connected to the first signal via, and the other end is connected to the first high-speed gold finger 5215. To facilitate the installation of the first resistor 530, the first signal line includes two disconnected sub-signal lines, and the first resistor is connected across the two sub-signal lines. The first resistor 530 is arranged between the first high-speed gold finger 5215 and the first high-speed signal pin 422, which is used for impedance matching between the laser chip and the laser driver chip.

[0146] The first resistor 530 passes through a first resistor relief portion 5514 and is exposed on the top surface of the first flexible printed circuit board. The opening area of ​​the first resistor relief portion 5514 is larger than the area of ​​the first resistor. The second resistor 540 passes through a second resistor relief portion 5515 and is exposed on the top surface of the first flexible printed circuit board. The opening area of ​​the second resistor relief portion 5515 is larger than the area of ​​the first resistor.

[0147] The ground signal through hole is disposed in the third signal avoidance hole 5513 , and the area of ​​the third signal avoidance hole 5513 is larger than that of the ground signal through hole, so as to facilitate welding.

[0148] The second insulating film layer 553 is located below the signal layer 552 and serves to isolate the signal layer from the ground layer 554. To facilitate soldering, the soldering points must be exposed outside the first insulating film layer. This means that the gold finger, first signal via 5241, first high-speed via 5242, ground via 5247, second signal via 5244, and second high-speed via 5245 are exposed on the outside of the first flexible circuit board. The second insulating film layer does not cover the gold finger area, leaving the first gold finger 5211, second gold finger 5212, first ground gold finger 5213, second ground gold finger 5214, first high-speed gold finger 5215, and second high-speed gold finger 5216 exposed on the outside of the first flexible circuit board, facilitating soldering.

[0149] The first signal via 5241, the first high-speed via 5242, the ground via 5247, the second signal via 5244, and the second high-speed via 5245 extend through the second insulating film layer. The second insulating film layer is provided with a fourth signal avoidance hole 5531, a fifth signal avoidance hole 5532, and a sixth signal avoidance hole 5533 for the passage of surface solder. The first signal via 5241 and the first high-speed via 5242 are disposed within the fourth signal avoidance hole. The opening area of ​​the fourth signal avoidance hole is larger than the combined area of ​​the first signal via 5241 and the first high-speed via 5242. The projection of the fourth signal avoidance hole on the signal layer covers the first signal via 5241 and the first high-speed via 5242, leaving the first signal via 5241 and the first high-speed via 5242 exposed on the top surface of the first flexible printed circuit board, facilitating soldering.

[0150] The second signal via 5244 and the second high-speed via 5245 are disposed within the fifth signal avoidance hole 5532. The opening area of ​​the second signal avoidance hole is larger than the sum of the areas of the second signal via 5244 and the second high-speed via 5245. The projection of the second signal avoidance hole on the signal layer covers the second signal via 5244 and the second high-speed via 5245, leaving them exposed on the top surface of the first flexible printed circuit board, facilitating soldering.

[0151] Figure 20 is a schematic diagram of the ground layer of the first flexible circuit board in an optical module according to an embodiment of the present disclosure. As shown in Figure 20, the ground layer 554 is disposed between the second insulating film layer 553 and the third insulating film layer 555. The shaded area in Figure 22 represents the location where the ground signal area is covered. One end of the ground signal area is a circular ground connection portion that aligns with the bottom surface of the tube holder. The ground connection portion is located within the projection of the flexible connection area and is smaller than the area of ​​the flexible connection area. The other end of the ground signal area is connected to the ground finger in the secondary finger area.

[0152] A relief hole is provided in the ground connection portion for the passage of the pins and to prevent short circuits between the ground layer and the signal line. The area of ​​the relief hole is larger than the cross-sectional area of ​​the pins. In the example of the present application, a first insulating relief hole 5541, a second insulating relief hole 5542, and a third insulating relief hole 5543 are provided in the ground connection portion. Among them, the first signal via 5241 and the first high-speed via 5242 are provided in the first insulating relief hole 5541. The opening area of ​​the first insulating relief hole 5541 is larger than the sum of the areas of the first signal via 5241 and the first high-speed via 5242. The projection of the second insulating relief hole 5542 on the signal layer covers the first signal via 5241 and the first high-speed via 5242, so that the first signal via 5241 and the first high-speed via 5242 are exposed on the upper surface of the first flexible circuit board, which is convenient for welding.

[0153] The ground signal through hole is arranged in the third insulation avoidance hole 5543 , and the area of ​​the third insulation avoidance hole 5543 is larger than that of the ground signal through hole, which facilitates welding.

[0154] In some examples of the present application, the opening areas of the corresponding avoidance holes decrease from top to bottom. That is, the first signal avoidance hole 5511, the fourth signal avoidance hole 5531, and the first insulation avoidance hole 5541 are aligned in center, and the area of ​​the first signal avoidance hole 5511 is larger than the area of ​​the fourth signal avoidance hole 5531, and the area of ​​the fourth signal avoidance hole 5531 is larger than the area of ​​the first insulation avoidance hole 5541. The second signal avoidance hole, the fifth signal avoidance hole, and the second insulation avoidance hole are aligned in center, and the area of ​​the second signal avoidance hole is larger than the area of ​​the fifth signal avoidance hole, and the area of ​​the fifth signal avoidance hole is larger than the area of ​​the second insulation avoidance hole. The third signal avoidance hole, the sixth signal avoidance hole, and the third insulation avoidance hole are aligned in center, and the area of ​​the third signal avoidance hole is larger than the area of ​​the sixth signal avoidance hole, and the area of ​​the sixth signal avoidance hole is larger than the area of ​​the third insulation avoidance hole.

[0155] One end of the first flexible circuit board 520 is provided with a secondary gold finger area. To facilitate connection, the secondary gold finger area is rectangular and features multiple gold fingers, including a third gold finger 5501, a fourth gold finger 5502, a third grounding gold finger 5503, a fourth grounding gold finger 5504, a third high-speed gold finger 5505, and a fourth high-speed gold finger 5506. The third grounding gold finger 5503 is positioned between the third high-speed gold finger 5505 and the third gold finger, while the fourth grounding gold finger 5504 is positioned between the fourth high-speed gold finger 5506 and the second gold finger. To facilitate connection between the flexible circuit board and the circuit board, the gold fingers are provided with connecting holes to facilitate solder passage and enhance connection stability. A base connection portion is provided at the other end of the first flexible circuit board 520, which connects to the base.

[0156] The other end of the ground signal region is connected to the third ground golden finger 5503 and the fourth ground golden finger 5504 of the secondary golden finger region.

[0157] The first gold finger 5211 corresponds to the position of the third gold finger 5501, and the projection of the first gold finger 5211 covers the third gold finger 5501. The second gold finger 5212 corresponds to the position of the fourth gold finger 5502, the first grounding gold finger 5213 corresponds to the position of the third grounding gold finger 5503, the second grounding gold finger 5214 corresponds to the position of the fourth grounding gold finger, the first high-speed gold finger 5215 corresponds to the position of the third high-speed gold finger 5505, and the second high-speed gold finger 5216 corresponds to the position of the fourth high-speed gold finger.

[0158] Figure 21 is a schematic diagram of the third insulating film layer of the first flexible circuit board in an optical module according to an embodiment of the present disclosure. As shown in Figure 21, the third insulating film layer 555 is located on the lower surface of the first flexible circuit board, and the ground layer 554 is located between the second insulating film layer 553 and the third insulating film layer. It covers the ground layer and serves as a reinforcement to improve the tensile strength of the first flexible circuit board.

[0159] To facilitate soldering, the soldering points need to be exposed outside the third insulating film layer. Specifically, the gold finger, first signal via 5241, first high-speed via 5242, ground via 5247, second signal via 5244, and second high-speed via 5245 are exposed outside the third insulating film layer. The third insulating film layer does not cover the gold finger area, leaving the third gold finger 5501, fourth gold finger 5502, third ground gold finger 5503, fourth ground gold finger 5504, third high-speed gold finger 5505, and fourth high-speed gold finger 5506 exposed outside the third insulating film layer, facilitating soldering.

[0160] The third insulating film layer is provided with a circular grounding avoidance portion 5551, which is used to expose the base connection portion outside the first flexible circuit board. The lower surface of the base connection portion is connected to the base, so that the base is connected to the ground layer, and then connected to the circuit board through the grounding gold finger.

[0161] To improve the stability of the flexible circuit board, the grounding avoidance portion 5551 is arranged in a multi-segment broken line pattern near the gold finger. The connection boundary between the flexible circuit board and the tube holder is increased, thereby enhancing the connection stress between the flexible circuit board and the tube holder.

[0162] The optical module provided herein includes a light-emitting device equipped with a laser chip, the light-emitting device being provided with multiple pins connected to the bottom surface of a first flexible printed circuit board. The other end of the first flexible printed circuit board is also connected to the printed circuit board. A laser driver chip is provided on the printed circuit board. To achieve impedance matching between the laser driver chip and the laser chip and reduce signal loss, a matching resistor is provided on the first flexible printed circuit board. Because the matching resistor is provided on the flexible printed circuit board, rather than within the package of the light-emitting device, it facilitates changing the matching resistor value during testing.

[0163] The light receiving component of the optical module is described in detail below with reference to the accompanying drawings of the present disclosure.

[0164] Figure 22 is an internal structure diagram of the optical receiving component in the optical module provided according to an embodiment of the present disclosure; Figure 23 is a circuit structure diagram of the optical receiving component in the optical module provided according to an embodiment of the present disclosure. As shown in Figures 22 and 23, the optical receiving component 500 includes a photodetector 620, a transimpedance amplifier 640, a high-impedance electrical device 660, and a voltage detection unit 650. The output end of the photodetector 620 is electrically connected to the input end of the transimpedance amplifier 640; the output end of the transimpedance amplifier 640 is electrically connected to the input end of the high-impedance electrical device 660; the output end of the high-impedance electrical device 660 is electrically connected to the input end of the voltage detection unit 650; and the output end of the voltage detection unit 650 is electrically connected to the MCU 302. Among them, the high-impedance electrical device 660 has a high-impedance characteristic, that is, the input impedance of the high-impedance electrical device 660 is greater than the output impedance of the high-impedance electrical device. The embodiment of the present application utilizes its high-impedance characteristic to avoid shunting the signal on the signal link from the transimpedance amplifier 640 to the limiting amplifier while performing voltage replication, thereby avoiding energy loss in the digital service channel.

[0165] The photodetector 620 is used to convert the received optical signal into a current signal. The transimpedance amplifier 640 is electrically connected to the photodetector 620 and is used to convert the current signal output by the photodetector 620 into a voltage signal. The high-impedance electrical device 530 is electrically connected to the transimpedance amplifier 640 and is used to copy and transmit the voltage signal output by the transimpedance amplifier 640. The voltage detection unit 650 is electrically connected to the high-impedance electrical device 660 and is used to collect the voltage signal output by the high-impedance electrical device 660 according to the trigger signal; the controller reads the voltage signal detected by the voltage detection unit 650 according to the received trigger signal and obtains the received optical power based on the voltage signal.

[0166] In some examples of the present disclosure, the controller can be any one of a central processing unit (CPU), a microcontroller unit (MCU), a field programmable gate array (FPGA) or a programmable logic controller (PLC). The controller is shown as MCU302 as an example in the drawings of the present disclosure.

[0167] Photodetector 620 is used to convert received light signals into photocurrent signals. This application does not limit the specific form of the photodetector. For example, an avalanche photodiode (APD) is a common type of photodetector. When a reverse bias voltage is applied to the PN junction of the APD, received photons are absorbed by the PN junction to form a photocurrent. Increasing the reverse bias voltage increases the photocurrent exponentially, producing an "avalanche" phenomenon.

[0168] The APD requires a relatively high bias voltage during operation; to achieve this, a boost circuit is used to provide the APD with the required higher bias voltage. Because the APD needs to be reverse-biased, the positive terminal of the boost circuit is electrically connected to the negative terminal of the APD, and the negative terminal of the boost circuit is grounded. The positive terminal of the APD is electrically connected to the positive terminal of the transimpedance amplifier 640, which is also grounded. The ground of the transimpedance amplifier 640 is then connected to the ground of the boost circuit to increase the reverse bias voltage for the APD. Under the action of the reverse bias voltage, the APD converts the received optical signal into a current signal.

[0169] In some embodiments, the boost circuit is electrically connected to a filter capacitor CH. Since the APD uses a boost switch circuit to boost the voltage, switching the switch back and forth will bring about a large noise, so a filter capacitor CH with a higher voltage resistance is required for filtering. In the embodiment of the present application, since the response rate of the trigger signal is relatively large, the value of the filter capacitor CH can be set to be relatively large to ensure that the APD obtains a larger signal-to-noise ratio and sensitivity. Exemplarily, the filter capacitor is greater than 1NF, for example, the filter capacitor can be 1.1NF, 1.3NF, 1.5NF, 1.7NF or 2.0NF, etc. In some embodiments, by collecting the response current of the photodetector and monitoring the received optical power, since the filter capacitor has a charge accumulation effect, if the light intensity of the current light packet is relatively large, it is easy for the charge accumulation effect to occur at the filter capacitor, resulting in tailing, which has a certain impact on the optical power monitoring result of the next light packet; especially when the light fluctuation before and after the current light packet is large, it is more likely to have a certain impact on the optical power monitoring result of the subsequent light packet.

[0170] The transimpedance amplifier 640 converts the current signal output by the photodetector into a voltage signal and amplifies the voltage signal. The voltage signal output by the transimpedance amplifier 640 is transmitted to the limiting amplifier, which then processes it and transmits it to the host computer. The voltage signal output by the transimpedance amplifier 640 forms a digital service channel with the signal link of the limiting amplifier.

[0171] In some embodiments, the voltage output by the transimpedance amplifier 640 is replicated by the high-impedance electrical device 660 , thereby collecting the voltage output by the transimpedance amplifier 640 . The output voltage of the high-impedance electrical device 660 is the output voltage of the transimpedance amplifier 640 .

[0172] Since the input impedance of the high-impedance electrical device 660 is higher than the output impedance and has a high-impedance characteristic, when it copies the voltage signal, the current extracted from the signal link from the transimpedance amplifier 640 to the limiting amplifier is very small, which hardly affects the signal amplitude of the signal link from the transimpedance amplifier 640 to the limiting amplifier.

[0173] The voltage output by the transimpedance amplifier 640 is copied and collected by the high-resistance electrical device 660 , and the burst received optical power is monitored based on the relationship between the output voltage of the transimpedance amplifier 640 and the received optical power.

[0174] In some embodiments, as described above, when monitoring the burst received optical power by collecting the response current of the photodetector 620, it is easily affected by the fluctuation of the light intensity of the front and rear light packets. The fluctuation of the light intensity of the front and rear light packets refers to the large difference between the light intensity of the front light packet and the light intensity of the rear light packet. For example, when the light intensity of the front light packet is large, charge accumulation will form at the filter capacitor, causing tailing. After the rear light packet with smaller light intensity arrives, due to the superposition effect of current, the current will be superimposed on the tail of the front light packet when collecting the current, causing the monitored optical power to be too large. At the same time, it is generally necessary to mirror the response current of the photodetector 620 through a mirror circuit, and the mirror circuit causes certain interference to the current, thereby reducing the current monitoring accuracy. At the same time, if the input light intensity changes transiently, the input light intensity is highly dependent on the current.

[0175] In the embodiment of the present application, by replicating and collecting the voltage output by the transimpedance amplifier 640, the voltage does not have a superposition effect. Therefore, when collecting the voltage, it is not superimposed on the tail of the preceding light packet, thereby avoiding the influence of the light intensity fluctuations of the preceding and following light packets. By collecting the voltage, the dependence on the current is reduced, thus avoiding the disadvantages of collecting the current. At the same time, the transimpedance amplifier 640 can amplify the voltage, thereby compensating for the influence of some interference factors on the voltage.

[0176] In some embodiments, the input impedance of high-impedance electrical device 660 is greater than its output impedance, that is, high-impedance electrical device 660 has a high-impedance characteristic. The high-impedance characteristic of high-impedance electrical device 660 ensures that a smaller current is extracted from the voltage output by transimpedance amplifier 640, thereby reducing the loss of digital service signal amplitude in the signal branch where high-impedance electrical device 660 is located, thereby ensuring the energy and sensitivity of the digital service channel.

[0177] The high-impedance electrical device 660 replicates the voltage output by the transimpedance amplifier 640, so that the voltages inputted by the transimpedance amplifier 640 to the limiting amplifier and the high-impedance electrical device 660 are the same. The high-impedance electrical device 660 can output the voltage inputted thereto in real time, thereby outputting the voltage outputted by the transimpedance amplifier 640.

[0178] In some embodiments, the high-impedance electrical device 660 includes a transistor, the base of which is electrically connected to the output of the transimpedance amplifier 640; the collector of which is electrically connected to a power supply 660a to receive energy from the power supply 660a. Under the action of the power supply 660a, the collector amplifies the current input to the base; and the emitter of the transistor is electrically connected to the voltage detection unit 650. Exemplarily, the base of the transistor is electrically connected to the output of the transimpedance amplifier 640 to collect the voltage output by the transimpedance amplifier 640; the collector is electrically connected to the power supply 660a; and the emitter is electrically connected to the voltage detection unit 650 to transmit the voltage output by the transimpedance amplifier 640 to the voltage detection unit 650.

[0179] In some embodiments, the high-resistance electrical device 660 includes an emitter follower, or other voltage mirror devices. An emitter follower is a negative feedback amplifier whose output voltage closely follows the input voltage. The amplitude of the input voltage and the amplitude of the output voltage of the emitter follower are equal.

[0180] Since the emitter follower has a high impedance characteristic, it satisfies the high impedance characteristic of the high-impedance electrical device 660. Furthermore, the emitter follower has a current amplification characteristic. When the emitter follower extracts a small current from the voltage output by the transimpedance amplifier 640, based on its current amplification characteristic, it can also effectively extract a signal from the branch flowing from the transimpedance amplifier 640 to the emitter follower, thereby improving the load carrying capacity.

[0181] Figure 24 is a block diagram of a sampling circuit in an optical module according to an embodiment of the present disclosure. As shown in Figure 24, in some embodiments, a voltage detection unit 650 is electrically connected to a high-impedance electrical device 660. In response to a received trigger signal, the voltage detection unit 650 can sample the voltage output by the high-impedance electrical device 660, and further sample the voltage output by the transimpedance amplifier 640.

[0182] Due to the linear effect of the transimpedance amplifier 640, the output voltage thereof is positively correlated with the input light intensity. Therefore, by collecting the output voltage of the transimpedance amplifier 640, the light intensity can be detected, thereby realizing burst monitoring of the received optical power.

[0183] In some embodiments, the voltage detection unit 650 includes a first sampling switch 651 and a first sampling capacitor 652 .

[0184] In some embodiments, the voltage detection unit 650 has a trigger signal input pin that receives a trigger signal, MAC_Triger, from the host computer's MAC chip. The host computer's MAC chip issues the MAC_Triger signal to specify the monitoring of the received optical power of a specific ONU optical module arriving at the OLT. When the host computer needs to monitor the received optical power of a particular optical packet, the host computer's MAC chip sends the trigger signal, MAC_Triger, to the voltage detection unit 650 via a gold finger.

[0185] The first sampling switch 651 is configured to connect or disconnect the high-resistance electrical device 660 and the first sampling capacitor 652 according to the level of a trigger signal (e.g., a MAC_Triger signal), thereby responding to or interrupting the charging of the first sampling capacitor 652. For example, when the level of the MAC_Triger signal is low, no action is triggered. When the MAC_Triger signal is at a high level, the first sampling switch 651 connects the high-impedance electrical device 660 to the first sampling capacitor 652, and the first sampling capacitor 652 begins to charge. The voltage output by the high-impedance electrical device 660 charges the first sampling capacitor 652, and the voltage is converted into an average voltage during the charging process. When the MAC_Triger signal reaches a falling edge, that is, when the MAC_Triger signal changes from a high level to a low level, the first sampling switch 651 disconnects the high-impedance electrical device 660 from the first sampling capacitor 652, thereby interrupting the charging of the first sampling capacitor 652.

[0186] The voltage output by high-impedance device 660 charges first sampling capacitor 652. During the charging process, first sampling capacitor 652 has an averaging effect, converting the voltage output by high-impedance device 660 into an average voltage. This average voltage represents the average effect of the transimpedance amplifier's output voltage, further eliminating voltage interference and increasing measurement accuracy.

[0187] Figure 25 is a schematic diagram illustrating an application of a sampling circuit in an optical module according to an embodiment of the present disclosure. As shown in Figure 25 , when the MAC_Triger signal is high, terminal A of the sampling switch 541 is closed, establishing an electrical connection between the high-impedance electrical device 660 and the first sampling capacitor 652. During the high-level period of the MAC_Triger signal, the voltage output by the transimpedance amplifier 640 charges the first sampling capacitor 652. Figure 26 is another schematic diagram illustrating an application of a sampling circuit in an optical module according to an embodiment of the present disclosure. As shown in Figure 26 , when the high-level period of the MAC_Triger signal ends and reaches a falling edge, terminal A of the sampling switch 541 is disconnected and terminal B is connected. The electrical connection between the high-impedance electrical device 660 and the first sampling capacitor 652 is disconnected, thereby interrupting the charging of the first sampling capacitor 652.

[0188] Sampling switch 541, consisting of two ports, A and B, switches A on or off, and B on or off, depending on the high or low level of the trigger signal. When the trigger signal is high, A switches on and B switches off, sampling the voltage corresponding to the current optical packet. When the trigger signal switches from high to low, A switches off and B switches on, maintaining the voltage corresponding to the current optical packet.

[0189] In some embodiments, the voltage detection unit 650 may be a voltage detector. For example, the voltage detection unit 650 may be an average voltage detector. The voltage detector may detect the average voltage output by the high-resistance electrical device 660 and further detect the average voltage output by the transimpedance amplifier 640 .

[0190] For example, the voltage detector can obtain the average voltage of the transimpedance amplifier 640 by collecting the peak value of the output voltage of the transimpedance amplifier 640. Since the peak value has a certain multiple relationship with the average voltage value, the average voltage of the transimpedance amplifier 640 can be obtained. The output voltage of the transimpedance amplifier 640 is an alternating voltage, and its peak value is also the amplitude. Therefore, an amplitude detection chip can be provided inside the voltage detector to obtain the average voltage of the transimpedance amplifier 640 through the amplitude detection chip. When the high-impedance electrical device 660 includes an emitter follower, due to the following characteristics of the emitter follower, the amplitude of its output voltage is the same as the amplitude of the input voltage. In this case, the amplitude of the emitter follower output voltage is collected, which is the amplitude of the output voltage of the transimpedance amplifier 640. This detection method is simpler and faster. It is understandable that the amplitude of the output voltage of the high-impedance electrical device 660 can also be different from the amplitude of the input voltage. This is not limited in the embodiment of the present application. For example, the amplitude of the output voltage of the high-impedance electrical device 660 is gain-amplified relative to the amplitude of the input voltage.

[0191] For example, the voltage detection unit 650 can obtain the average output voltage of the transimpedance amplifier 640 by collecting the instantaneous maximum value of the output voltage of the transimpedance amplifier 640. The embodiment of the present application does not limit the method for obtaining the average output voltage of the transimpedance amplifier 640.

[0192] In some embodiments, the optical modules may have different interrupt priorities for the MAC_Triger signal. Consequently, the timing of triggering the interrupt when MCU 302 receives the MAC_Triger signal is not fixed, resulting in time deviations in the MCU 302's readings. This may result in different voltage values ​​being read at different times, reducing reading accuracy. Furthermore, because the ADC conversion module of MCU 302 requires a certain amount of time to perform signal conversion, when the MAC_Triger signal has a falling edge, the voltage across first sampling capacitor 652 is maintained by first holding circuit 670, ensuring relative voltage stability and guaranteeing accurate readings by MCU 302.

[0193] Since the input impedance of the first holding circuit 670 is greater than the output impedance and has a high impedance characteristic, the discharge rate of the first sampling capacitor 652 can be reduced, thereby maintaining the voltage signal for a period of time.

[0194] In some embodiments, the first holding circuit 670 includes a sampling resistor, through which the voltage across the first sampling capacitor 652 can be collected and maintained for a preset time to ensure accuracy of readings by the MCU 302. For example, the preset time can be 500 μs. In some examples, the preset time can also be 400 μs, 450 μs, 550 μs, or 600 μs. It will be understood that the preset time in the embodiments of the present disclosure is merely provided as some specific examples and is not intended to limit the preset time.

[0195] In some embodiments, the first holding circuit 670 includes an operational amplifier, and the input impedance of the operational amplifier is greater than the output impedance, thereby slowing down the discharge rate of the first sampling capacitor 652 .

[0196] In some embodiments, the first holding circuit 670 has an I / O port, and the MCU 302 reads the voltage held by the first holding circuit 670 through the I / O port.

[0197] In some embodiments, to prevent the current sampling from affecting the next sampling, when the time held by the first holding circuit 670 reaches a preset time, it means that the MCU 302 has completed signal reading and conversion. At this time, the first sampling capacitor 652 should be quickly discharged to promptly release the charge held by the holding circuit 550, thereby quickly clearing the voltage held by the first holding circuit 670. For example, when the time held by the first holding circuit 670 reaches a preset time, the MCU 302 sends a control signal to the I / O port to set the voltage level of the I / O port to a low level, for example, to set the voltage level of the I / O port to 0V, thereby promptly releasing the charge held by the holding circuit 550 and quickly clearing the voltage held by the first holding circuit 670.

[0198] In some embodiments, the MCU 302 determines the conduction state of terminal B of the sampling switch 541 based on the level of the received MAC_Triger signal, thereby sending a corresponding control signal to the first holding circuit 670. When the MAC_Triger signal level received by the MCU 302 is high, it means that terminal A of the sampling switch 541 is on and terminal B is off. When the MAC_Triger signal received by the MCU 302 has a falling edge, it means that terminal A of the sampling switch 541 is off and terminal B is on. When the MAC_Triger signal level received by the MCU 302 is high, the B terminal of the sampling switch 541 is in the on state. At this time, a first control signal is sent to the first holding circuit 670 to put the first holding circuit 670 in the holding state. When the MAC_Triger signal received by the MCU 302 has a falling edge, the B terminal of the sampling switch 541 is in the off state, indicating that the A terminal is now on. Before collecting the next optical packet, it is determined whether the current holding time of the first holding circuit 670 is greater than or equal to the preset time. If the current holding time is greater than or equal to the preset time, the MCU 302 sends a second control signal to the first holding circuit 670 to exit the holding state and wait for the voltage of the next optical packet to be held. If the current holding time is less than the preset time, the MCU 302 controls the A terminal of the sampling switch 541 to extend the on-time of the A terminal. As a result, the voltage corresponding to the next optical packet does not enter the first holding circuit 670 and does not affect the current voltage held by the first holding circuit 670.

[0199] For example, when MCU302 controls the A terminal of the sampling switch 541 to extend the conduction time of the A terminal, if the charging time corresponding to the next light packet is relatively long, so that the current holding time can reach the preset time during the charging period, the MCU302 does not need to extend the conduction time of the A terminal, and the extended conduction time of the A terminal is 0 at this time; if the charging time corresponding to the next light packet is relatively short, so that the current holding time cannot reach the preset time during the charging period, the MCU302 needs to extend the conduction time of the A terminal so that the A terminal is always in the on state during the period when the current holding time reaches the preset time.

[0200] For example, the preset time can be set based on the charging time of the first sampling capacitor 652 corresponding to the current optical packet and the reading time of the MCU 302. The preset time should ensure that the current optical packet can be discharged and maintained for a period of time after discharge, while also meeting the reading time required by the MCU 302. The discharge time of the current optical packet can refer to the charging time of the first sampling capacitor 652.

[0201] In some embodiments, MCU 302 reads the voltage held by first holding circuit 670 in response to a received trigger signal. The ADC conversion module within MCU 302 converts the average voltage value, converting the analog signal into a digital signal. The converted received optical power is then converted and stored in a register. In some embodiments, the converted received optical power is calibrated and compensated to obtain a reported received optical power value, which is then stored in a register, thereby enabling burst monitoring of the received optical power.

[0202] Figure 27 is an internal structure diagram of the controller in the optical module provided according to an embodiment of the present disclosure. As shown in Figure 27, MCU302 includes a trigger signal input pin, an ADC conversion module and a register. MCU302 receives the trigger signal MAC_Triger signal transmitted from the host computer MAC chip through its trigger signal input pin; when MCU302 receives the MAC_Triger signal, the ADC conversion module reads the voltage maintained by the first holding circuit 670, and the ADC conversion module converts the voltage value, converts the analog signal into a digital signal, and then obtains the converted received optical power after conversion; and stores the converted received optical power value in the register. In some embodiments, the converted received optical power is calibrated and compensated to obtain the received optical power reporting value, and the received optical power reporting value is stored in the register, thereby realizing burst monitoring of the received optical power.

[0203] In some embodiments, the host MAC chip sends a trigger signal to the voltage detection unit 650 and the MCU 302 through the same pin on the gold finger. For example, the host MAC chip sends a trigger signal MAC_Triger signal to the voltage detection unit 650 and the MCU 302 through the same pin on the gold finger.

[0204] In some embodiments of the present disclosure, the voltage detection unit 650 responds to the trigger signal MAC_Triger to collect the output voltage of the transimpedance amplifier 640; the MCU 302 reads the average voltage detected by the voltage detection unit 650 in response to the MAC_Triger signal; the speed of responding to the trigger signal in the present application is faster than the speed of responding to the current in some embodiments, and the average voltage output by the transimpedance amplifier can be detected in a shorter time, breaking away from the time limit of charging the sampling capacitor, thereby improving the detection rate of the received power intensity of the burst optical receiver.

[0205] By collecting the voltage signal output by a transimpedance amplifier, the present invention can avoid the influence of the current optical packet on the optical power of the next optical packet, thereby improving the accuracy of received optical power monitoring and enabling burst monitoring of received optical power. Furthermore, since current is typically collected through a current mirror source, which can cause some interference to the collected current results, the present invention avoids this interference by collecting the voltage output by the transimpedance amplifier, improving the accuracy of received optical power monitoring and thus enabling burst monitoring of received optical power.

[0206] In other examples of the present disclosure, the response current of the photodetector may also be monitored to implement burst monitoring of the received optical power.

[0207] Figure 28 is a diagram illustrating the internal structure of a light receiving component in an optical module according to an embodiment of the present disclosure; Figure 29 is a diagram illustrating a circuit structure of a light receiving component in an optical module according to an embodiment of the present disclosure. As shown in Figures 28 and 29, the light receiving component 500 includes a boost circuit 610, a mirror current source 630, a photodetector 620, a transimpedance amplifier 680, a limiting amplifier, a sampling circuit 700, a second holding circuit 690, and a controller.

[0208] The output end of the boost circuit 610 is electrically connected to the input end of the mirror current source 630; the mirror current source 630 includes a first output end and a second output end, the first output end is electrically connected to the photodetector 620, and the second output end is electrically connected to the sampling circuit 700; the photodetector 620 is electrically connected to the transimpedance amplifier 680 and the limiting amplifier in sequence; the sampling circuit 700 is electrically connected to the second holding circuit 690.

[0209] The present invention uses a mirror current source 630 to mirror the current flowing to the photodetector 620, collects the mirrored current through a sampling circuit 700, and converts the mirrored current into a voltage. Simultaneously, a second holding circuit 690 maintains the voltage across the sampling capacitor for a preset time, ensuring relative voltage stability. A controller monitors the burst received optical power by reading the voltage maintained by the second holding circuit 690, while ensuring monitoring accuracy.

[0210] In some embodiments, the host computer MAC chip sends a trigger signal MAC_Triger to specify the monitoring of the received optical power corresponding to a certain ONU optical module arriving at the OLT. For example, when the host computer needs to monitor the received optical power of a certain optical packet, the host computer MAC chip sends the trigger signal MAC_Triger via the gold finger.

[0211] Since the photodetector 620, such as APD, has different response currents under different light intensities, the received light signal can be collected and monitored based on this characteristic.

[0212] In some embodiments, the current flowing to the photodetector 620 is mirrored by the mirror current source 630. The current flowing to the photodetector can directly reflect the magnitude of the received optical power. Therefore, the burst received optical power can be monitored by collecting the current flowing to the photodetector.

[0213] The input terminal of the mirror current source 630 is electrically connected to the output terminal of the boost circuit 610 to provide the bias voltage generated by the boost circuit 610 to the photodetector 620. The mirror current source 630 includes a first output terminal and a second output terminal, the first output terminal outputting a first current, and the second output terminal outputting a second current.

[0214] Exemplarily, the first current and the second current have a certain current ratio. Exemplarily, the first current:second current ratio is 10:5. In some examples, the first current:second current ratio is 2:1; or, in some examples, the first current:second current ratio is 3:1; or, the first current:second current ratio is 4:2; the first current:second current ratio is 6:3; or the first current:second current ratio is 8:4.

[0215] The first output end of the mirror current source 630 is electrically connected to the photodetector 620 to provide a first current to the photodetector 620; the second output end is electrically connected to the mirror current source 630 to mirror the current flowing to the photodetector 620, that is, to guide the second current out to realize the monitoring of the burst received optical power.

[0216] In some embodiments, the mirror current source 630 includes a first transistor and a second transistor that are symmetrically arranged. The first transistor and the second transistor are PNP transistors, or other types of transistors.

[0217] The emitter of the first transistor is electrically connected to the input end of the mirror current source 630, that is, the output end of the boost circuit 610; the collector of the first transistor is electrically connected to the photodetector 620; and the base of the first transistor is electrically connected to the base of the second transistor.

[0218] The emitter of the second transistor is electrically connected to the input end of the mirror current source 630 , that is, the output end of the boost circuit 610 ; the collector of the second transistor is electrically connected to the sampling circuit 700 .

[0219] Exemplarily, a first resistor R1 is provided between the first transistor and the photodetector 620 , and a second resistor R2 is provided between the second transistor and the sampling circuit 700 . Then, the first current source*R1=the second current source*R2, and further, the first current source:the second current source=R2:R1.

[0220] The current flowing to the photodetector 620 is mirrored through the second output terminal of the mirror current source 630. The second current source drawn from the second output terminal of the mirror current source 630 is called the mirror current. The magnitude of this mirror current is the same as the magnitude of the current flowing to the photodetector 620. By collecting this mirror current, the burst received optical power can be monitored.

[0221] Figure 30 is a block diagram of a sampling circuit in an optical module according to an embodiment of the present disclosure. As shown in Figure 30 , in some embodiments, sampling circuit 700 collects mirror current to monitor burst received optical power. Sampling circuit 700 includes a second sampling switch 701 and a second sampling capacitor 702.

[0222] In some embodiments, the sampling circuit 700 has a trigger signal input pin that receives a trigger signal MAC_Triger transmitted from a host computer MAC chip. The second sampling switch 701 is configured to open or close the connection between the second output terminal and the second sampling capacitor 702 based on the high or low level of the trigger signal (e.g., the MAC_Triger signal), thereby responding to or interrupting the charging of the second sampling capacitor 702.

[0223] Exemplarily, when the received MAC_Triger signal is at a low level, no action is triggered. When the MAC_Triger signal is at a high level, the second sampling switch 701 connects the second output terminal to the second sampling capacitor 702, and the sampling capacitor 562 begins charging. The current output from the second output terminal charges the second sampling capacitor 702, and the current is converted into an average voltage during the charging process. When the MAC_Triger signal reaches a falling edge, that is, when the MAC_Triger signal transitions from a high level to a low level, the first sampling switch 561 disconnects the second output terminal from the second sampling capacitor 702, thereby interrupting the charging of the sampling capacitor 562.

[0224] In some embodiments, the current output from the second output terminal charges the second sampling capacitor 702. During the charging process, the second sampling capacitor 702 has an averaging effect, converting the current output from the second output terminal into an average voltage. The average voltage represents the average effect of the transimpedance amplifier output voltage, eliminating unstable factors such as optical packet jitter, minimizing errors, and increasing measurement accuracy.

[0225] In some embodiments, optical modules may have different interrupt priorities for MAC_Triger signals. This means that the timing of triggering an interrupt when MCU 302 receives a MAC_Triger signal is not fixed, resulting in time deviations in MCU 302 readings. This may result in different voltage values ​​being read at different times, reducing reading accuracy. Furthermore, because the ADC conversion module of MCU 302 requires a certain amount of time to perform signal conversion, when the MAC_Triger signal shows a falling edge, the voltage across the second sampling capacitor 702 is maintained by the second holding circuit 690, ensuring relative voltage stability and ensuring accurate readings by MCU 302.

[0226] Since the input impedance of the second holding circuit 690 is greater than the output impedance and has a high impedance characteristic, the discharge rate of the sampling capacitor 562 can be reduced, thereby maintaining the voltage signal for a preset time.

[0227] In some embodiments, the second holding circuit 690 has a sampling resistor, through which the voltage across the second sampling capacitor 702 can be collected, and the voltage is maintained for a preset time to ensure the accuracy of the reading by the MCU 302. Exemplarily, the preset time can be 500 μs. It can be understood that the holding time of the second holding circuit 690 can be the same as or similar to that of the first holding circuit. Reference can be made to the detailed description of the first holding circuit in the aforementioned embodiment of the present disclosure.

[0228] In some embodiments, the second holding circuit 690 includes an operational amplifier having an input impedance greater than an output impedance, thereby slowing down the discharge rate of the sampling capacitor 562 .

[0229] In some embodiments, the second holding circuit 690 has an I / O port, and the MCU 302 reads the voltage held by the first holding circuit 570 through the I / O port.

[0230] In some embodiments, to prevent the current sampling from affecting the next sampling, when the time held by the second holding circuit 690 reaches a preset time, it means that the MCU 302 has completed signal reading and conversion. At this time, the second sampling capacitor 702 should be quickly discharged to promptly release the charge held by the second holding circuit 690, thereby quickly clearing the voltage held by the second holding circuit 690. For example, when the time held by the second holding circuit 690 reaches a preset time, the MCU 302 sends a control signal to the I / O port to set the voltage level of the I / O port to a low level, for example, to set the voltage level of the I / O port to 0V, thereby promptly releasing the charge held by the second holding circuit 690, thereby quickly clearing the voltage held by the second holding circuit 690.

[0231] In some embodiments, the MCU 302 determines the conduction state of terminal B of the sampling switch 561 based on the level of the received MAC_Triger signal, thereby sending a corresponding control signal to the second holding circuit 690. When the MAC_Triger signal level received by the MCU 302 is high, it means that terminal A of the sampling switch 561 is on and terminal B is off. When the MAC_Triger signal received by the MCU 302 has a falling edge, it means that terminal A of the sampling switch 561 is off and terminal B is on. When the MAC_Triger signal level received by the MCU 302 is high, the B terminal of the sampling switch 561 is in the on state. At this time, a first control signal is sent to the second holding circuit 690 to put the second holding circuit 690 in the holding state. When the MAC_Triger signal received by the MCU 302 has a falling edge, the B terminal of the sampling switch 561 is in the off state, indicating that the A terminal is now on. Before collecting the next optical packet, it is determined whether the current holding time of the second holding circuit 690 is greater than or equal to the preset time. If the current holding time is greater than or equal to the preset time, the MCU 302 sends a second control signal to the second holding circuit 690 to cause the second holding circuit 690 to exit the holding state and wait for the voltage of the next optical packet to be held. If the current holding time is less than the preset time, the MCU 302 controls the A terminal of the sampling switch 561 to extend the on-time of the A terminal. As a result, the voltage corresponding to the next optical packet does not enter the second holding circuit 690 and does not affect the current voltage held by the second holding circuit 690.

[0232] For example, when MCU302 controls terminal A of sampling switch 561 to extend the on-time of terminal A, if the charging time corresponding to the next light packet is relatively long, so that the current holding time can reach the preset time during the charging period, then MCU302 does not need to extend the on-time of terminal A, and the extended on-time of terminal A is 0 at this time; if the charging time corresponding to the next light packet is relatively short, so that the current holding time cannot reach the preset time during the charging period, then MCU302 needs to extend the on-time of terminal A so that terminal A is always in the on state during the period when the current holding time reaches the preset time.

[0233] For example, the preset time can be set based on the charging time of the sampling capacitor 562 corresponding to the current optical packet and the reading time of the MCU 302. The preset time should ensure that the current optical packet can be discharged and maintained for a period of time after discharge, while also meeting the reading time required by the MCU 302. The discharge time of the current optical packet can refer to the charging time of the sampling capacitor 562.

[0234] FIG31 is a schematic diagram showing an application principle of a sampling circuit in an optical module according to an embodiment of the present disclosure.

[0235] Exemplarily, the first port of the first sampling switch 561 is terminal A in Figures 30 and 31, and the second port is terminal B indicated in Figures 24 and 25. When the MAC_Triger signal is at a high level, terminal A of the first sampling switch 561 is closed, connecting the second output terminal and the first sampling capacitor 562 via terminal A. During the high level period of the MAC_Triger signal, the current output by the second output terminal charges the first sampling capacitor 562.

[0236] Figure 32 is another schematic diagram of a sampling circuit in an optical module according to an embodiment of the present disclosure. As shown in Figure 32, when the MAC_Triger signal ends its high level and reaches its falling edge, terminal A of the first sampling switch 561 is disconnected, disconnecting the second output terminal from the first sampling capacitor 562, thereby interrupting charging of the first sampling capacitor 562. A first holding circuit 570 maintains the voltage across the first sampling capacitor 562 for a predetermined period of time, ensuring relative voltage stability.

[0237] The MCU 302 reads the voltage held by the first holding circuit 570 in response to the MAC_Triger signal, thereby obtaining the monitored optical power and implementing burst monitoring of the received optical power.

[0238] In response to the received trigger signal, MCU 302 reads the voltage held by first holding circuit 570. The ADC conversion module within MCU 302 converts the average voltage value, converting the analog signal into a digital signal. The converted received optical power is then converted and stored in a register. In some embodiments, the converted received optical power is calibrated and compensated to obtain a reported received optical power value, which is then stored in a register, thereby enabling burst monitoring of the received optical power.

[0239] In some examples, when MCU 302 receives the MAC_Triger signal, the ADC conversion module reads the voltage held by the second holding circuit 690. The ADC conversion module converts the voltage value, converting the analog signal into a digital signal, and then converts the converted received optical power to obtain the converted received optical power. The converted received optical power value is stored in a register. In some embodiments, the converted received optical power is calibrated and compensated to obtain a reported received optical power value, which is then stored in a register, thereby implementing burst monitoring of the received optical power.

[0240] In some embodiments, the host computer MAC chip sends a trigger signal to the sampling circuit 700 and the MCU 302 through the same pin on the gold finger. For example, the host computer MAC chip sends a trigger signal MAC_Triger signal to the sampling circuit 700 and the MCU 302 through the same pin on the gold finger.

[0241] This disclosure uses a mirrored current source to mirror the current flowing to the photodetector, collects the mirrored current through a sampling circuit, and converts the mirrored current into a voltage. Simultaneously, a holding circuit maintains the voltage across the sampling capacitor for a preset time, ensuring relative voltage stability. The MCU monitors the burst received optical power by reading the voltage maintained in the holding circuit, while ensuring monitoring accuracy.

[0242] The above description is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any changes or substitutions that a person skilled in the art can conceive within the technical scope disclosed in the present disclosure should be covered by the protection scope of the present disclosure.

Claims

1. An optical module, comprising: A circuit board, on which a laser driver chip is provided; An optical emission device, electrically connected to the circuit board and used for emitting optical signals, the optical emission device comprising: A header; A cap, snap-fitted to the header to form an optical emission space; A base, provided on one side of the header and located within the optical emission space; Pins, one end of which passes through and protrudes from the header; A metal-ceramic substrate, provided on one side of the base, and its bottom surface abuts against the top of the pin; The maximum distance between the metal-ceramic substrate and the base is greater than the minimum distance between the pin and the base; The other end of the pin passes through the header and protrudes outside the optical emission space; The optical emission device further comprises: A laser chip, connected to the pin; A flexible circuit board, one end of which is sleeved on the pin and the other end is connected to the circuit board; a matching resistor is provided on the flexible circuit board, and the sum of the impedance of the matching resistor and the laser driver chip matches the impedance of the laser chip.

2. The optical module according to claim 1, wherein, Positive and negative conductive sheets are provided on the surface of the metal-ceramic substrate; the pins include positive pins and negative pins; The positive conductive sheet is wire-bonded to the positive pin; The negative conductive sheet is wire-bonded to the negative pin; There is a gap between the positive conductive sheet and the negative conductive sheet; 3. The optical module according to claim 2, wherein, A plurality of first metal layers and a plurality of second metal layers are provided within the gap, one end of the first metal layer is electrically connected to the positive conductive sheet, and the other end of the first metal layer extends towards the negative layer, the second metal layer is electrically connected to the negative conductive sheet, and the other end of the second metal layer extends towards the positive layer, and the first metal layer and the second metal layer are arranged alternately; 4. The optical module according to claim 3, wherein, The first metal layer and the second metal layer are arranged in a finger-like and alternating manner, the gap between the first metal layer and the adjacent second metal layer is 10 - 70 μm, the width of the first metal layer is 10 - 70 μm, and the width of the second metal layer is 10 - 70 μm; 5. The optical module according to claim 3, wherein, The number of first metal layers within the gap is the same as the number of second metal layers; the length of the first metal layer within the gap is the same as the length of the second metal layer; 6. The optical module according to claim 2, wherein, The laser chip is mounted on the negative conductive sheet, and the positive electrode of the laser chip is wire-bonded to the positive conductive sheet; 7. The optical module according to claim 1, wherein, The maximum distance between the metal-ceramic substrate and the base is less than the maximum distance between the pin and the base; 8. The optical module according to claim 1, wherein, The pins include a plurality of them, and the tops of the plurality of pins are flush; 9. The optical module according to claim 1, wherein, Pin through-holes are provided on the header, the pins pass through the pin through-holes, and the pin through-holes are located outside the projection range of the base on the header; 10. The optical module according to claim 1, wherein, The pins further include: a first high-speed signal pin 422 and a second high-speed signal pin 423; The first high-speed signal pin 422 is connected to the positive electrode of the laser chip; The second high-speed signal pin 423 is connected to the negative electrode of the laser chip; One end of the flexible circuit board is provided with a first high-speed through-hole and a second high-speed through-hole, and the other end of the flexible circuit board is provided with a first high-speed gold finger and a second high-speed gold finger; The first high-speed signal pin 422 is disposed within the first high-speed through hole; the second high-speed signal pin 423 is disposed within the second high-speed through hole; A first matching resistor is disposed between the first high-speed finger and the first high-speed through hole; A second matching resistor is disposed between the second high-speed finger and the second high-speed through hole.

11. The optical module according to claim 10, wherein, One end of the flexible circuit board is provided with a first signal through hole and a second signal through hole, and the other end of the flexible circuit board is provided with a first signal finger, a second signal finger, a first ground finger, and a second ground finger; The first signal through hole is connected to the first signal finger; the second signal through hole is connected to the second signal finger; The first ground finger is disposed between the first high-speed finger and the first signal finger; the second ground finger is disposed between the second high-speed finger and the second signal finger.

12. The optical module according to claim 10, wherein, The flexible circuit board includes a first insulating film layer, a signal layer, a second insulating film layer, a ground layer, and a third insulating film layer arranged in sequence; The signal layer is provided with a first high-speed signal line, a second high-speed signal line, a first high-speed finger, and a second high-speed finger; The first insulating film layer, the second insulating film layer, and the third insulating film layer do not cover the first high-speed finger and the second high-speed finger.

13. The optical module according to claim 12, wherein, The first insulating film layer is provided with a first signal avoidance hole and a second signal avoidance hole, and the first high-speed signal pin 422 is disposed within the first signal avoidance hole; The second high-speed signal pin 423 is disposed within the second signal avoidance hole.

14. The optical module according to claim 13, wherein, The second insulating film layer is provided with a third signal avoidance hole and a fourth signal avoidance hole; the first high-speed signal pin 422 is disposed within the third signal avoidance hole; The second high-speed signal pin 423 is disposed within the fourth signal avoidance hole.

15. The optical module according to claim 14, wherein, The third signal avoidance hole is located below the first signal avoidance hole, and the area of the third signal avoidance hole is smaller than the area of the first signal avoidance hole; The fourth signal avoidance hole is located below the second signal avoidance hole, and the area of the fourth signal avoidance hole is smaller than the area of the second signal avoidance hole.

16. The optical module according to claim 14, wherein, The ground layer is provided with a first insulating avoidance hole, and the first insulating avoidance hole is located between the first signal avoidance hole and the third signal avoidance hole, and the area of the first insulating avoidance hole is smaller than the area of the first signal avoidance hole; And the area of the first insulating avoidance hole is larger than the area of the third signal avoidance hole.

17. The optical module according to claim 13, wherein, The first insulating film layer is provided with a first resistor avoidance portion and a second resistor avoidance portion, the first matching resistor is located within the first resistor avoidance portion, and the first matching resistor is exposed on the surface of the flexible circuit board; the second matching resistor is located within the second resistor avoidance portion, and the second matching resistor is exposed on the surface of the flexible circuit board.

18. The optical module according to claim 12, wherein, The signal layer is provided with a first ground finger and a second ground finger; The ground layer is provided with a third ground finger and a fourth ground finger; The first ground finger is disposed above the third ground finger; the second ground finger is disposed above the fourth ground finger; The third insulating film layer is provided with a ground avoidance portion 5551, and the ground layer is connected to the socket through the ground avoidance portion 5551.

19. The optical module according to claim 1, wherein, The optical module further includes: An optical receiving component, electrically connected to the circuit board, including: A photodetector for converting a received optical signal into a current signal; A transimpedance amplifier, electrically connected to the photodetector, for converting the current signal into a voltage signal and amplifying the voltage signal; A high-impedance state electrical component, electrically connected to the transimpedance amplifier, for replicating the voltage signal output by the transimpedance amplifier; the input impedance of the high-impedance state electrical component is greater than the output impedance; A voltage detection unit, electrically connected to the high-impedance state electrical component, including a first sampling capacitor, and the first sampling capacitor is used for collecting the voltage signal output by the high-impedance state electrical component according to a received trigger signal; A first holding circuit, electrically connected to the voltage detection unit, for collecting the voltage signal across the first sampling capacitor and holding the voltage signal for a preset time; the input impedance of the holding circuit is greater than the output impedance; A controller, electrically connected to the first holding circuit, for reading the voltage signal held by the holding circuit according to a received trigger signal and obtaining the received optical power.

20. The optical module according to claim 19, wherein, The optical receiving component further includes a boost circuit, and the boost circuit is electrically connected to the photodetector; The positive pole of the boost circuit is electrically connected to the negative pole of the photodetector, and the negative pole of the boost circuit is grounded; The positive pole of the photodetector is electrically connected to the positive pole of the transimpedance amplifier; The negative pole of the boost circuit is electrically connected to the negative pole of the transimpedance amplifier.

21. The optical module according to claim 20, wherein, One end of the boost circuit is connected with a filter capacitor; The filter capacitor is greater than 1NF.

22. The optical module according to claim 19, wherein, The base of the high-impedance state electrical component is electrically connected to the output terminal of the transimpedance amplifier; the collector of the high-impedance state electrical component is electrically connected to the power supply; the emitter of the high-impedance state electrical component is electrically connected to the voltage detector.

23. The optical module according to claim 22, wherein, The high-impedance state electrical component includes an emitter follower.

24. The optical module according to claim 19, wherein, The voltage detection unit is used for converting the collected voltage signal into an average voltage signal; The voltage detection unit includes a first sampling switch and the first sampling capacitor; The sampling switch is used for conducting the connection between the high-impedance state electrical component and the first sampling capacitor according to the trigger signal to respond to charging the first sampling capacitor; or disconnecting the connection between the high-impedance state electrical component and the first sampling capacitor to interrupt charging the first sampling capacitor; The first sampling capacitor is used for converting the voltage signal output by the high-impedance state electrical component into an average voltage signal.

25. The optical module according to claim 19, wherein, The holding circuit includes: A sampling resistor for collecting the voltage across the sampling capacitor; An operational amplifier, the input impedance of which is greater than the output impedance to reduce the discharge rate of the first sampling capacitor.

26. The optical module according to claim 1, wherein, The optical module further includes: An optical receiving component, electrically connected to the circuit board, including: A mirror current source for respectively outputting a first current and a second current; A photodetector, electrically connected to the first output terminal of the mirror current source to receive the first current; A sampling circuit, electrically connected to the second output terminal of the mirror current source to receive the second current; the sampling circuit includes a second sampling switch and a second sampling capacitor, and the second sampling switch is configured to conduct the connection between the second output terminal and the second sampling capacitor according to the received trigger signal to charge the sampling capacitor; or, the second sampling switch is configured to disconnect the connection between the second current source and the second sampling capacitor according to the received trigger signal to interrupt the charging of the sampling capacitor; A second holding circuit, electrically connected to the second sampling circuit, configured to collect the voltage across the sampling capacitor and hold the collected voltage for a preset time when the charging of the sampling capacitor is interrupted; A controller, electrically connected to the holding circuit, configured to read the voltage held by the holding circuit according to the received trigger signal.

27. The optical module according to claim 26, wherein, The sampling switch includes a first port and a second port; The sampling switch is configured to: when the trigger signal is at a high level, conduct the connection between the second output terminal and the sampling capacitor through the first port to conduct the charging of the second sampling capacitor; when the trigger signal switches from the high level to the low level, disconnect the connection between the second output terminal and the sampling capacitor through the second port to interrupt the charging of the sampling capacitor.

28. The optical module according to claim 26, wherein, The mirror current source includes a first triode and a second triode symmetrically arranged; a first resistor is provided between the first triode and the photodetector, and a second resistor is provided between the second triode and the sampling circuit; The emitter of the first triode is electrically connected to the input terminal of the mirror current source, and the collector of the first triode is electrically connected to the photodetector, The base of the first triode is electrically connected to the base of the second triode; The emitter of the second triode is electrically connected to the input terminal of the mirror current source, and the collector of the second triode is electrically connected to the sampling circuit.

29. The optical module according to claim 28, wherein, The optical receiving component further includes: A boost circuit, the output terminal of which is electrically connected to the input terminal of the mirror current source, and is configured to provide a bias voltage for the photodetector.

30. The optical module according to claim 29, wherein, The emitter of the first triode and the emitter of the second triode are both electrically connected to the output terminal of the boost circuit.

31. An optical module, including: A circuit board; An optical receiving component, electrically connected to the circuit board, including: A photodetector, configured to convert the received optical signal into an electrical signal; A transimpedance amplifier, electrically connected to the photodetector, configured to convert the electrical signal into a voltage signal and amplify the voltage signal; A high-impedance electrical component, electrically connected to the transimpedance amplifier, configured to copy the voltage signal output by the transimpedance amplifier; the input impedance of the high-impedance electrical component is greater than the output impedance; A voltage detection unit, electrically connected to the high-impedance electrical component, including a first sampling capacitor, configured to collect the voltage signal output by the high-impedance electrical component through the first sampling capacitor according to the received trigger signal; A first holding circuit, electrically connected to the voltage detection unit, for collecting the voltage signal across the first sampling capacitor and holding the voltage signal for a preset time; the input impedance of the holding circuit is greater than the output impedance; A controller, electrically connected to the first holding circuit, for reading the voltage signal held by the holding circuit according to the received trigger signal and obtaining the received optical power.

32. The optical module according to claim 31, wherein, The optical receiving component further includes a boost circuit, and the boost circuit is electrically connected to the photodetector; The positive electrode of the boost circuit is electrically connected to the negative electrode of the photodetector, and the negative electrode of the boost circuit is grounded; The positive electrode of the photodetector is electrically connected to the positive electrode of the transimpedance amplifier; The negative electrode of the boost circuit is electrically connected to the negative electrode of the transimpedance amplifier.

33. The optical module according to claim 32, wherein, One end of the boost circuit is connected with a filter capacitor; The filter capacitor is greater than 1NF.

34. The optical module according to claim 31, wherein, The base of the high-impedance electrical device is electrically connected to the output end of the transimpedance amplifier; the collector of the high-impedance electrical device is electrically connected to the power supply; the emitter of the high-impedance electrical device is electrically connected to the voltage detector.

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