Operator offloading method and system of vector execution engine based on DPU heterogeneous architecture

By offloading computationally intensive tasks to the DPU network interface card in the DPU heterogeneous architecture, the problems of CPU interruption and memory copying are solved, and efficient data processing and query performance are improved.

CN119781850BActive Publication Date: 2026-01-13YUSUR TECH CO LTD
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Patent Information

Application Number
CN202411584927.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-11-07
Publication Date
2026-01-13
Estimated Expiration
2044-11-07

AI Technical Summary

Technical Problem

In existing technologies, vectorized execution engines rely on the CPU's SIMD instructions to process data, which leads to frequent CPU interrupts and memory copies in computationally intensive tasks, affecting the performance of query tasks.

Method used

A vectorized execution engine based on a DPU heterogeneous architecture is adopted. The physical execution plan is intercepted by the Spark plugin and transformed into a query plan that meets the cross-language serialization protocol of relational algebra. Operators with higher computational resource consumption than the preset standard are offloaded to the DPU network card for processing, taking advantage of the high-performance computing capabilities of the DPU network card.

Benefits of technology

It improves the execution efficiency of query tasks, solves the CPU performance bottleneck, enhances performance under large data volumes and I/O-intensive computing, and improves data processing efficiency and throughput through parallel processing.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application provides an operator offloading method and system of a vector execution engine based on a DPU heterogeneous architecture, the DPU heterogeneous architecture comprising a CPU and a DPU network card, and the DPU heterogeneous architecture being applied to an open-source distributed computing system; the open-source distributed computing system performs syntax analysis on a query language input by a user and adds a physical execution stage operation to obtain a physical execution plan, a Spark plug-in intercepts the physical execution plan and converts the physical execution plan into a query plan based on a set rule, the query plan is transmitted to a vector engine execution path and a vector execution engine is called to perform data processing on a plurality of operators in the query plan; a function function of a DPU heterogeneous computing version in a function system of the vector execution engine is called to calculate the computing resource consumption of the plurality of vector execution engine processable operators in the query plan, and an operator higher than a preset standard is offloaded from an original CPU to the DPU network card, so that the data processing performance of a query task is improved through operator offloading.
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Description

Technical Field

[0001] This invention relates to the field of operator unloading technology, and in particular to an operator unloading method and system for a vectorized execution engine based on a DPU heterogeneous architecture. Background Technology

[0002] Apache Spark is an open-source distributed computing system that can be used for batch processing, interactive queries (Spark SQL), real-time stream processing (Spark Streaming), machine learning (Spark MLlib), and graph computing (GraphX). Spark uses in-memory loading to store data and performs iterative computations, reducing disk spills. It also supports multiple high-level programming languages ​​such as Java, Scala, Python, and R, which allows this open-source distributed computing system to handle a variety of complex big data application scenarios.

[0003] In existing technologies, vectorized execution engines rely on the CPU's (Central Processing Unit) SIMD instructions (Single Instruction, Multiple Data) to process data in batches. For certain computationally intensive tasks, such as complex aggregation or join operations, a large number of virtual function calls are generated, causing CPU interrupts and resulting in computation and scheduling competing for CPU resources, leading to performance loss. Vectorized execution engines still need to perform memory copy operations through the CPU, and frequent copying increases memory overhead, thus affecting the performance of the entire interactive query execution task. Summary of the Invention

[0004] In view of this, embodiments of the present invention provide an operator unloading method and system for a vectorized execution engine based on a DPU heterogeneous architecture, in order to eliminate or improve one or more defects existing in the prior art, and solve the problem of low data processing performance of query tasks in the prior art.

[0005] One aspect of the present invention provides an operator offloading method for a vectorized execution engine based on a DPU heterogeneous architecture, wherein the DPU heterogeneous architecture is applied to an open-source distributed computing system, and the DPU heterogeneous architecture includes a CPU and a DPU network interface card; the method includes the following steps:

[0006] The system obtains the query language input by the user, performs syntax parsing on the query language to obtain a query task logic execution plan, and adds physical execution phase operations to the query task logic execution plan to obtain a physical execution plan; the physical execution plan is the strategy of the open-source distributed computing system when executing the query task.

[0007] The physical execution plan is intercepted by a Spark plugin, and based on set rules, it is transformed into a query plan that satisfies the cross-language serialization protocol of relational algebra and transmitted to the vectorized engine execution path. The vectorized execution engine is then invoked to process data from multiple operators in the query plan. The vectorized engine execution path is the path through which data processing is performed by invoking the vectorized execution engine. The initial execution path is the path through which data processing is performed by the original execution engine in the open-source distributed computing system.

[0008] The function of the DPU heterogeneous computing version in the function system of the vectorized execution engine is called. The function calculates the computational resource consumption of multiple vectorized execution engines in the query plan and offloads operators with computational resource consumption higher than the preset standard from the original CPU of the open source distributed computing system to the DPU network card, thereby realizing the offloading of operators of the vectorized execution engine and data processing.

[0009] In some embodiments, the method further includes:

[0010] The data processed by the DPU network card and the CPU is represented by column vectors and transmitted in the open-source distributed computing system.

[0011] In some embodiments, the vectorized execution engine includes Velox, ClickHouse, and Apache Arrow.

[0012] In some embodiments, constructing a DPU heterogeneous computing version of the function and registering it with the function system of the vectorized execution engine includes:

[0013] Develop task-specific DPU heterogeneous computing versions of functionalities using a programming language suitable for the DPU network interface card;

[0014] Construct a description function that describes the function call method and execution method; the description includes, but is not limited to, the entry point, parameter types, and return type of the function.

[0015] The functional function and the descriptive function are registered to the function system of the vectorized execution engine through the application programming interface of the vectorized execution engine.

[0016] In some embodiments, the computational resource consumption of multiple vectorized execution engines in the query plan is calculated through the function, and operators with computational resource consumption exceeding a preset standard are offloaded from the original CPU of the open-source distributed computing system to the DPU network card. This realizes the unloading of operators by the vectorized execution engines and the processing of data. The process of the DPU network card processing data in the query plan includes:

[0017] The vectorized execution engine converts the query plan into a plan tree consisting of multiple plan nodes.

[0018] The multiple plan nodes in the plan tree are converted into multiple operation operators, and the multiple operation operators are combined according to the operation type to obtain the operation task;

[0019] The operation task is performed by the driver and the data is transferred to the DPU network card via the application programming interface for data processing.

[0020] In some embodiments, the operator unloading method of the vectorized execution engine based on the DPU heterogeneous architecture is implemented using C or C++ language to support multi-threading and heterogeneous operations between the CPU and the DPU network card.

[0021] In some embodiments, the method further includes:

[0022] When the vectorized execution engine is invoked to process data for multiple operators in the query plan, if there are operators in the query plan that the vectorized execution engine cannot process, the process will fall back to the initial execution path to process the data.

[0023] When the DPU network card executes the operator unloading of the vectorized execution engine and performs data processing, if there is an operator in the vectorized execution engine that does not support the processing of the DPU network card, it falls back to the CPU for data processing.

[0024] On the other hand, the present invention also provides an operator offloading system based on a vectorized execution engine with a DPU heterogeneous architecture, including a processor, a memory, and a computer program / instructions stored in the memory, characterized in that the processor is used to execute the computer program / instructions, and when the computer program / instructions are executed, the system implements the steps of any of the above methods.

[0025] On the other hand, the present invention also provides a computer-readable storage medium having a computer program stored thereon, characterized in that the program, when executed by a processor, implements the steps of any of the above methods.

[0026] On the other hand, the present invention also provides a computer program product, including a computer program / instructions, characterized in that the computer program / instructions, when executed by a processor, implement the steps of any of the methods described above.

[0027] The beneficial effects of the present invention are at least as follows:

[0028] In the operator offloading method and system of the vectorized execution engine based on DPU heterogeneous architecture described in this invention, the open-source distributed computing system obtains a physical execution plan representing the query task execution strategy through the query language input by the user. After the Spark plugin intercepts the physical execution plan, it is transformed into a query plan that satisfies the cross-language serialization protocol of relational algebra based on set rules. This plan is then transmitted to the vectorized engine execution path, and the vectorized execution engine is invoked to process multiple operators in the query plan. When there are operators in the query plan that the vectorized execution engine cannot process, the process falls back to the initial execution path for data processing, thus rationally allocating multiple operators in the physical execution plan and improving the execution efficiency of the query task. The vectorized engine execution path inputs the vectorized execution engine-processable operators in the query plan into the vectorized execution engine. Based on the function system that has registered the function of the DPU heterogeneous computing version, the computational resources of the vectorized execution engine-processable operators are calculated. Operators exceeding the preset standard are offloaded from the original CPU to the DPU network card. This operator offloading solves the CPU performance bottleneck under large data volume and I / O intensive computing, and utilizes the DPU network card to provide high-performance computing capabilities support for the CPU.

[0029] Furthermore, this invention employs C or C++ language to develop a vectorized execution engine to support multithreading and heterogeneous operations between the CPU and DPU network card, thereby improving data processing efficiency and throughput through parallel processing.

[0030] Additional advantages, objects, and features of the invention will be set forth in part in the description which follows, and will also become apparent in part to those skilled in the art upon studying the description, or may be learned by practice of the invention. The objects and other advantages of the invention can be realized and obtained by means of the structures specifically pointed out in the description and drawings.

[0031] Those skilled in the art will understand that the objectives and advantages achievable with the present invention are not limited to those specifically described above, and that the above and other objectives achievable with the present invention will become clearer from the following detailed description. Attached Figure Description

[0032] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this application, are not intended to limit the scope of the invention. In the drawings:

[0033] Figure 1 This is a schematic diagram of the operator unloading method of a vectorized execution engine based on a DPU heterogeneous architecture according to an embodiment of the present invention.

[0034] Figure 2 This is a schematic diagram of the operator unloading method of a vectorized execution engine based on a DPU heterogeneous architecture according to an embodiment of the present invention. Detailed Implementation

[0035] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the embodiments and accompanying drawings. Here, the illustrative embodiments and descriptions of this invention are used to explain the invention, but are not intended to limit the invention.

[0036] It should also be noted that, in order to avoid obscuring the invention with unnecessary details, only the structures and / or processing steps closely related to the solution according to the invention are shown in the accompanying drawings, while other details that are not closely related to the invention are omitted.

[0037] It should be emphasized that the term "including / comprises" as used herein refers to the presence of a feature, element, step, or component, but does not exclude the presence or addition of one or more other features, elements, steps, or components.

[0038] It should also be noted that, unless otherwise specified, the term "connection" in this article can refer not only to a direct connection, but also to an indirect connection involving an intermediary.

[0039] In the following description, embodiments of the invention will be illustrated with reference to the accompanying drawings. In the drawings, the same reference numerals represent the same or similar parts, or the same or similar steps.

[0040] In existing technologies, vectorized execution relies on the CPU's Single Instruction Multiple Data (SID) to process data in batches. For certain computationally intensive tasks, such as complex aggregation or join operations, a large number of virtual function calls are generated, causing CPU interrupts and leading to CPU resource contention between computation and scheduling, resulting in performance loss. Furthermore, vectorized execution engines still require memory copying operations via the CPU; frequent copying increases memory overhead, thus affecting the performance of the entire interactive query execution task. This invention proposes an operator offloading method and system for a vectorized execution engine based on a DPU heterogeneous architecture. It obtains the physical execution plan based on the user-input query language, intercepts the physical execution plan through a Spark plugin, and transforms the physical execution plan into a query plan that satisfies the cross-language serialization protocol of relational algebra based on predefined rules, and then transmits it to... The vectorized engine execution path calls the vectorized execution engine to process multiple operators in the query plan. When there are operators in the query plan that the vectorized execution engine cannot process, it falls back to the initial execution path for data processing. It calls the function functions of the DPU heterogeneous computing version in the function system of the vectorized execution engine, calculates the computational resource consumption of multiple operators that the vectorized execution engine can process in the query plan, and offloads operators with computational resource consumption higher than the preset standard from the original CPU of the open source distributed computing system to the DPU network card. When there are operators that the vectorized execution engine can process that do not support the processing of the DPU network card, it falls back to the CPU for data processing.

[0041] Figure 1 This is a schematic flowchart of an operator offloading method for a vectorized execution engine based on a DPU heterogeneous architecture, according to an embodiment of the present invention. Specifically, this application provides an operator offloading method for a vectorized execution engine based on a DPU heterogeneous architecture. The DPU heterogeneous architecture is applied to an open-source distributed computing system, and the DPU heterogeneous architecture includes a CPU and a DPU network interface card. The method includes the following steps S101 to S103:

[0042] Step S101: Obtain the query language input by the user, perform syntax parsing on the query language and obtain the query task logic execution plan, add physical execution stage operations to the query task logic execution plan to obtain the physical execution plan; the physical execution plan is the strategy of the open source distributed computing system when executing the query task.

[0043] Step S102: Intercept the physical execution plan through the Spark plugin, transform the physical execution plan into a query plan that satisfies the cross-language serialization protocol of relational algebra based on the set rules, and transmit it to the vectorized engine execution path. Call the vectorized execution engine to process the data of multiple operators in the query plan. The vectorized engine execution path is the path of data processing by calling the vectorized execution engine. The initial execution path is the path of data processing by the original execution engine in the open source distributed computing system.

[0044] Step S103: Call the function function of the DPU heterogeneous computing version in the function system of the vectorized execution engine. The function calculates the computational resource consumption of multiple vectorized execution engine operators in the query plan and offloads operators with computational resource consumption higher than the preset standard from the original CPU of the open source distributed computing system to the DPU network card, thereby realizing the offloading of operators of the vectorized execution engine and data processing.

[0045] In step S101, after obtaining the query language, the open-source distributed computing system first parses the query language into a syntax tree and generates a logical plan tree according to set rules. Finally, it generates a query task logical execution plan. Specifically, the parser converts the user-input query language into a syntax tree. Each node in the syntax tree represents an element in the query language, including table names, column names, and operators. The open-source distributed computing system generates a logical plan tree based on the syntax tree. The logical plan tree is an abstract representation of the query language. The query task logical execution plan is obtained through processing operations, including but not limited to eliminating unnecessary calculations, selecting lower-cost operators, and rewriting the query to improve efficiency. One or more physical execution stage operations are added to the query task logical execution plan to obtain a physical execution plan. Physical execution stage operations include but are not limited to data aggregation, data shuffling, and full table scans.

[0046] In step S102, the Spark plugin includes a Query Plan Conversation component, a Memory Manager component, a Columnar Shuffle component, an Adaptor layer component, a Fallback component, and a Metric component. Specifically, the Query Plan Conversation component transforms the physical execution plan into a query plan according to set rules and transmits it to the vectorized execution engine for data processing. The Memory Manager component manages the memory of the vectorized execution engine to prevent memory overflow. The Columnar Shuffle component is responsible for shuffling the data and ensuring that columnar vectors are used during data flow. The Adaptor layer component acts as an intermediary between different components, providing a compatibility interface with different computing systems and interacting with different computing systems without modifying the upper layer of the open-source distributed computing system. In some embodiments, the method further includes: when calling the vectorized execution engine to process multiple operators in the query plan, if there are operators in the query plan that the vectorized execution engine cannot process, falling back to the initial execution path for data processing. The rollback component is used to roll back to the initial execution path for data processing when there are operators that the vectorized execution engine cannot handle, and to roll back to the CPU for processing when there are operators that the DPU network interface card (data processing unit) cannot handle. The metrics component uploads metric statistics to the open-source distributed computing system via the Spark plugin for display or application programming interface (API) calls. The Spark plugin intercepts the physical execution plan to obtain efficient execution strategies, improving the efficiency of query task execution. The open-source distributed computing system injects the vectorized execution engine to improve execution efficiency and save computing resources. In some embodiments, the vectorized execution engine includes Velox, ClickHouse, and Apache Arrow. Specifically, the vectorized execution engine improves CPU performance by processing multiple data entries at once or by using C or C++ to modulate a more advanced system kernel. In some embodiments, the operator offloading method of the vectorized execution engine is written in C or C++ to support multithreading and heterogeneous operations between the CPU and the DPU network interface card, utilizing parallel processing to improve data processing efficiency and throughput.

[0047] Furthermore, the query plan that satisfies the cross-language serialization protocol of relational algebra is designed to support cross-language and cross-execution engine operations by converting the physical execution plan into a language-independent representation. The query plan is then sent to the vectorized engine execution path and executed by the vectorized engine, skipping the initial execution path where the original execution engine performs data processing. For operators that the vectorized execution engine cannot handle, the process will fall back to the initial execution path and skip the original execution engine for data processing, ensuring the stability of the query task execution in the open-source distributed computing system. High-performance computing capabilities are obtained by utilizing the vectorized execution engine, while the original execution engine can be the Java Virtual Machine engine.

[0048] In step S103, after obtaining the query plan, a function of a DPU heterogeneous computing version is registered with the function system of the vectorized execution engine. Operators with computing resources exceeding the preset standard are offloaded from the original CPU of the open-source distributed computing system to the newly deployed DPU network card, thereby improving query performance. The data processing chip in the DPU network card is based on the KPU architecture (core processor architecture). As a professional data processing chip, the DPU network card chip based on the KPU architecture improves performance when processing complex data calculations. By offloading data processing from the CPU to the DPU network card, the CPU performs data operation scheduling, while the DPU network card performs data processing for query tasks, thereby improving the computing capabilities of interactive queries in big data scenarios.

[0049] In some embodiments, constructing a function of a DPU heterogeneous computing version and registering it to the function system of the vectorized execution engine includes steps S1031 to S1033:

[0050] Step S1031: Develop task-specific DPU heterogeneous computing version function using a programming language suitable for the DPU network card.

[0051] Step S1032: Construct a description function that describes the function call method and execution method; the description includes, but is not limited to, the entry point, parameter types and return type of the function.

[0052] Step S1033: Register the function and description function to the function system of the vectorized execution engine through the application programming interface of the vectorized execution engine.

[0053] Specifically, the function of the heterogeneous computing version of DPU can effectively utilize the hardware characteristics of the DPU network card, and the hardware features include single instruction set data processing and multi-threaded data processing.

[0054] Furthermore, in some embodiments, the method further includes: when the DPU network card performs operator offloading and data processing of the vectorized execution engine, if there are operators among the operators that the vectorized execution engine can handle that do not support DPU network card processing, the data processing is rolled back to the CPU. For operators that do not support DPU network card processing, a fallback mechanism is used to roll back the data processing to the CPU; the vectorized execution engine offloading operators from the CPU to the DPU network card does not affect the generation of the physical execution plan and query plan, and a common external interface is used to integrate the high-performance computing capabilities of the DPU network card into the data processing architecture of the open-source distributed computing system. In some embodiments, the operator offloading method of the vectorized execution engine based on the DPU heterogeneous architecture further includes:

[0055] Data processed by the DPU network interface card and CPU is represented by column vectors and transmitted within the open-source distributed computing system. Specifically, data computed by both the vectorized execution engine and the original execution engine is returned to the open-source distributed computing system as column vectors, providing efficient data access and computation.

[0056] In some embodiments, the computational resource consumption of multiple vectorized execution engine operators in the query plan is calculated through function calculation, and operators with computational resource consumption exceeding a preset standard are offloaded from the original CPU of the open-source distributed computing system to the DPU network card. This realizes the unloading of operators from the vectorized execution engine and the processing of data. The process of the DPU network card processing data in the query plan includes steps S201 to S203:

[0057] Step S201: Transform the query plan into a plan tree consisting of multiple plan nodes using a vectorized execution engine.

[0058] Step S202: Convert multiple plan nodes in the plan tree into multiple operation operators and combine the multiple operation operators according to the operation type to obtain the operation task.

[0059] Step S203: Perform the operation task through the driver and transfer the data to the DPU network card through the application programming interface for data processing.

[0060] Specifically, an operation operator contains one or more expressions to implement a computational logic. The expressions contain functional functions. The operation operators transformed from the plan node will be traversed recursively starting from the root node. After traversing all the expressions in the operation operators, an expression tree describing the logical process of data processing operations will be obtained.

[0061] On the other hand, the present invention also provides an operator offloading system based on a vectorized execution engine with a DPU heterogeneous architecture, including a processor, a memory, and a computer program / instructions stored in the memory, characterized in that the processor is used to execute the computer program / instructions, and when the computer program / instructions are executed, the system implements the steps of any of the above methods.

[0062] On the other hand, the present invention also provides a computer-readable storage medium having a computer program stored thereon, characterized in that the program, when executed by a processor, implements the steps of any of the above methods.

[0063] On the other hand, the present invention also provides a computer program product, including a computer program / instructions, characterized in that the computer program / instructions, when executed by a processor, implement the steps of any of the above methods.

[0064] The present invention will now be described with reference to a specific embodiment:

[0065] Figure 2This is a schematic diagram of the operator unloading method of a vectorized execution engine based on a DPU heterogeneous architecture according to an embodiment of the present invention. The physical execution plan is the plan of how an open-source distributed computing system executes query steps after receiving a user-input SQL (Structured Query Language) statement. The open-source distributed computing system first parses the Structured Query Language statement into a syntax tree, then generates a logical plan tree according to certain rules, and finally generates an optimized query task logical execution plan based on optimization strategies. Subsequently, according to the optimized query task logical execution plan, the open-source distributed computing system inserts a series of physical execution stages, including data aggregation, data shuffling, and full table scans, ultimately generating the physical execution plan. The core capability of the Gluten plugin is through the Spark plugin (Spark... The Gluten Plugin mechanism intercepts the physical execution plan, adds some extended rules, and generates a language-independent query plan (Substrait plan) that satisfies the cross-language serialization protocol of relational algebra. This plan is then sent to the vectorized execution engine (Native execution engine) for execution, bypassing the inefficient execution paths of the native open-source distributed computing system. The overall execution framework still uses the existing implementation of the open-source distributed computing system. For operators that the vectorized execution engine cannot handle, Gluten arranges a fallback to the normal execution path of the open-source distributed computing system for computation, thereby ensuring the stability of the open-source distributed computing system's task execution. This allows the open-source distributed computing system to utilize the vectorized execution engine to obtain high-performance computing capabilities. Velox is a novel C++ data acceleration library that integrates optimizations of various existing computing engines. It redesigns the data model to support efficient computation of complex data types and provides reusable, scalable, high-performance, and language-independent data processing components for building execution engines and enhancing data management systems. Because Velox only accepts fully optimized query plans as input and does not provide a Structured Query Language parser, dataframe layer, other domain-specific languages ​​(DSLs), or a global query optimizer, it focuses on being the execution engine for big data computing. This allows the Gluten+Velox architecture to achieve modularity of big data components. The DPU network interface card (NIC) chip, based on the KPU architecture, serves as a dedicated data processing chip, offering significantly higher performance compared to the CPU when handling complex data computations. Therefore, offloading the data computation for interactive queries from the CPU to the DPU NIC greatly improves the performance of interactive queries, accelerating their computational capabilities in big data scenarios. This allows the CPU to focus on the computational scheduling of open-source distributed computing systems, while the DPU NIC focuses on data computation within interactive queries.

[0066] This invention supports vectorized execution engines implementing their algorithms using DPU network cards. Vectorized execution engines include Velox, ClickHouse, and Apache Arrow. Since there is no difference in usage between calling algorithm functions on the DPU network card and calling algorithm functions on the CPU, for the vectorized execution engine layer, it's simply a change in the actual computing hardware. As for the Spark and Gluten layers, they only interact with the vectorized execution engine layer, so Spark and Gluten can seamlessly utilize the high-performance computing capabilities provided by the DPU network card.

[0067] The vectorized execution engine transforms the query plan from the upper-layer Gluten layer, which satisfies the cross-language serialization protocol of relational algebra, into a tree composed of plan nodes. Then, the plan nodes are converted into operators. Multiple operators are encapsulated into a task, which is then executed by the driver. Operators, as fundamental operators, form the logical framework for the actual algorithm execution, carrying abstractions of various expressions. Each operator contains one or more expressions to implement a complex and complete computational logic block. The underlying implementation of these expressions is carried out by functions. This invention implements a DPU heterogeneous computing version of the function and registers this function in the vectorized execution engine's function system, thereby offloading the computational task to the DPU network interface card for big data computing acceleration.

[0068] The operation operator, which is transformed from the planned node, will be traversed recursively starting from the root node, traversing the expressions in the operation operator to generate an expression tree. Taking the Filter operator as an example, for the specific expression cast(Aas bigint)>1, the Filter operator's operation operator will use std::unique_ptr. <exprset>The `exprs_` variable is used to perform filtering and projection calculations. When it is located at a leaf node, the application function of that leaf node is executed, which calls the data processing logic vector function, which is the actual algorithm function. In the algorithm function, the computing kernel is replaced with the DPU network card to achieve operator offloading.

[0069] In summary, this invention provides an operator offloading method and system for a vectorized execution engine based on a DPU heterogeneous architecture. The method obtains a physical execution plan based on the user-input query language, intercepts the physical execution plan using a Spark plugin, and transforms the physical execution plan into a query plan that satisfies the cross-language serialization protocol of relational algebra based on predefined rules. This query plan is then transmitted to the vectorized engine execution path. The vectorized execution engine is invoked to process multiple operators in the query plan. If any operator in the query plan cannot be processed by the vectorized execution engine, the process reverts to the initial execution path for further data processing. The method also calls the DPU heterogeneous computing version's function functions within the vectorized execution engine's function system to calculate the computational resource consumption of multiple vectorized execution engine-processable operators in the query plan. Operators with computational resource consumption exceeding a preset standard are offloaded from the original CPU of the open-source distributed computing system to the newly deployed DPU network interface card. If any operator in the vectorized execution engine's processable operators does not support processing by the DPU network interface card, the process reverts to the CPU for further data processing.

[0070] Furthermore, this invention employs C or C++ language to develop a vectorized execution engine to support multithreading and heterogeneous operations between the CPU and DPU network card, thereby improving data processing efficiency and throughput through parallel processing.

[0071] This invention also provides a computer device, which may include a processor and a memory, wherein the processor and the memory may be connected via a bus or other means.

[0072] The processor can be a CPU (Central Processing Unit). The processor can also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or combinations of the above types of chips.

[0073] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs, non-transitory computer-executable programs, and modules, such as the program instructions / modules corresponding to the button blocking method of the vehicle display device in this embodiment of the invention. The processor executes various functional applications and data processing by running the non-transitory software programs, instructions, and modules stored in the memory.

[0074] The memory may include a program storage area and a data storage area. The program storage area may store the operating system and applications required for at least one function; the data storage area may store data created by the processor, etc. Furthermore, the memory may include high-speed random access memory and non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, the memory may optionally include memory remotely located relative to the processor, which can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0075] The one or more modules are stored in the memory, and when executed by the processor, they perform the method described in this embodiment.

[0076] This invention also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the steps of the aforementioned edge computing server deployment method. The computer-readable storage medium can be a tangible storage medium, such as random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, floppy disks, hard disks, removable storage disks, CD-ROMs, or any other form of storage medium known in the art.

[0077] Those skilled in the art will understand that the exemplary components, systems, and methods described in conjunction with the embodiments disclosed herein can be implemented in hardware, software, or a combination of both. Whether implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this invention. When implemented in hardware, it can be, for example, electronic circuits, application-specific integrated circuits (ASICs), appropriate firmware, plug-ins, function cards, etc. When implemented in software, the elements of this invention are programs or code segments used to perform the desired tasks. The programs or code segments can be stored in a machine-readable medium or transmitted over a transmission medium or communication link via data signals carried in a carrier wave.

[0078] It should be clarified that the present invention is not limited to the specific configurations and processes described above and shown in the figures. For the sake of brevity, detailed descriptions of known methods are omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of the present invention is not limited to the specific steps described and shown. Those skilled in the art can make various changes, modifications, and additions, or change the order of steps, after understanding the spirit of the present invention.

[0079] In this invention, features described and / or illustrated for one embodiment may be used in the same or similar manner in one or more other embodiments, and / or combined with or in place of features of other embodiments.

[0080] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. For those skilled in the art, various modifications and variations can be made to the embodiments of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.< / exprset>

Claims

1. An operator offloading method for a vectorized execution engine based on a DPU heterogeneous architecture, characterized in that, The DPU heterogeneous architecture is applied to an open-source distributed computing system, and the DPU heterogeneous architecture includes a CPU and a DPU network interface card; the method includes the following steps: The system obtains the query language input by the user, performs syntax parsing on the query language to obtain a query task logic execution plan, and adds physical execution phase operations to the query task logic execution plan to obtain a physical execution plan; the physical execution plan is the strategy of the open-source distributed computing system when executing the query task. The physical execution plan is intercepted by a Spark plugin, and based on set rules, it is transformed into a query plan that satisfies the cross-language serialization protocol of relational algebra and transmitted to the vectorized engine execution path. The vectorized execution engine is then invoked to process data from multiple operators in the query plan. The vectorized engine execution path is the path through which data processing is performed by invoking the vectorized execution engine. The initial execution path is the path through which data processing is performed by the original execution engine in the open-source distributed computing system. The function of the DPU heterogeneous computing version in the function system of the vectorized execution engine is called. The function calculates the computational resource consumption of multiple vectorized execution engines in the query plan and offloads operators with computational resource consumption higher than the preset standard from the original CPU of the open source distributed computing system to the DPU network card, thereby realizing the unloading of operators of the vectorized execution engine and data processing. The function calculates the computational resource consumption of multiple vectorized execution engines in the query plan and offloads operators with computational resource consumption exceeding a preset standard from the original CPU of the open-source distributed computing system to the DPU network card. This achieves operator offloading and data processing by the vectorized execution engine. The process of the DPU network card processing the query plan includes: converting the query plan into a plan tree composed of multiple plan nodes through the vectorized execution engine; converting the multiple plan nodes in the plan tree into multiple operation operators and combining the multiple operation operators according to the operation type to obtain operation tasks; executing the operation tasks through the driver and transferring the data to the DPU network card through the application programming interface for data processing.

2. The operator offloading method for a vectorized execution engine based on a DPU heterogeneous architecture according to claim 1, characterized in that, The method further includes: The data processed by the DPU network card and the CPU is represented by column vectors and transmitted in the open-source distributed computing system.

3. The operator offloading method for a vectorized execution engine based on a DPU heterogeneous architecture according to claim 1, characterized in that, The vectorized execution engines include Velox, ClickHouse, and Apache Arrow.

4. The operator unloading method for a vectorized execution engine based on a DPU heterogeneous architecture according to claim 1, characterized in that, Constructing the functionalities for the heterogeneous computing version of the DPU and registering them in the function system of the vectorized execution engine includes: Develop task-specific DPU heterogeneous computing versions of functionalities using a programming language suitable for the DPU network interface card; Construct a description function that describes the function call method and execution method; the description includes the entry point, parameter types and return type of the function. The functional function and the descriptive function are registered to the function system of the vectorized execution engine through the application programming interface of the vectorized execution engine.

5. The operator offloading method for a vectorized execution engine based on a DPU heterogeneous architecture according to claim 1, characterized in that, The operator unloading method of the vectorized execution engine is implemented in C or C++ to support multi-threading and heterogeneous operations between the CPU and the DPU network card.

6. The operator offloading method for a vectorized execution engine based on a DPU heterogeneous architecture according to claim 1, characterized in that, The method further includes: When the vectorized execution engine is invoked to process data for multiple operators in the query plan, if there are operators in the query plan that the vectorized execution engine cannot process, the process will fall back to the initial execution path to process the data. When the DPU network card executes the operator unloading of the vectorized execution engine and performs data processing, if there is an operator in the vectorized execution engine that does not support the processing of the DPU network card, it falls back to the CPU for data processing.

7. An operator offloading system based on a vectorized execution engine with a DPU heterogeneous architecture, comprising a processor, a memory, and computer programs / instructions stored in the memory, characterized in that, The processor is used to execute the computer program / instructions, and when the computer program / instructions are executed, the system implements the steps of the method as described in any one of claims 1 to 6.

8. A computer-readable storage medium having a computer program / instructions stored thereon, characterized in that, When the computer program / instructions are executed by the processor, they implement the steps of the method as described in any one of claims 1 to 6.

9. A computer program product comprising a computer program / instructions, characterized in that, When the computer program / instructions are executed by the processor, they implement the steps of the method described in any one of claims 1 to 6.

Citation Information

Patent Citations

  • Memory hierarchy to transfer vector data for operators of a directed acyclic graph

    US10437600B1

  • Programmable Logic Device-Based Software-Defined Vector Engines

    US20240152357A1