Processor verification method, device, equipment and medium
Through instruction generation components and instruction simulator components, automatically generate and execute processor verification test cases, collect coverage data for value evaluation, solving the high cost and inefficiency problems caused by manual writing of test cases in the prior art, and achieving an efficient and reliable processor verification process.
Patent Information
- Application Number
- CN202411887344.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-20
- Publication Date
- 2025-04-08
AI Technical Summary
Existing processor verification solutions require technicians to manually write verification test cases, resulting in high labor and time costs, low efficiency, and the inability to automatically evaluate the value of test cases, affecting the reliability of the verification process.
The instruction generation component generates corresponding verification test cases based on the verification parameters of the processor to be verified, and sends test cases to the processor for execution through the instruction simulator component, collects coverage data for value evaluation, updates verification parameters, and finally provides coverage, value evaluation results and new verification parameters.
It realizes the generation and execution of automated processor verification test cases, reduces labor and time costs, improves verification efficiency and reliability, and can automatically evaluate the value of test cases.
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Figure CN119782171A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of computer technology, and in particular to a processor verification method, device, equipment and medium. Background Art
[0002] During the development and testing of the processor, it is necessary to verify the processor and analyze whether the various core functions of the processor are normal. The verification test case corresponding to the processor is usually composed of multiple instructions for testing whether the various core functions of the processor are normal. After obtaining the verification test case, the processor will sequentially obtain each instruction in the verification test case, execute each instruction, obtain the execution result of each instruction, and feedback the execution result of each instruction. The execution results of each instruction in the verification test case can be used to characterize whether the various core functions of the processor are normal. During the verification process of the processor, it is necessary to generate a verification test case corresponding to the processor, send the verification test case corresponding to the processor to the processor, and obtain the execution results of each instruction in the verification test case fed back by the processor.
[0003] In the related art, the commonly used processor verification scheme is: the technician writes the verification test case corresponding to the processor to be verified, sends the verification test case corresponding to the processor to the processor, and obtains the execution results of each instruction in the verification test case fed back by the processor. The processor verification scheme in the related art requires the technician to write the verification test case corresponding to the processor to be verified, which will consume a lot of manpower and time costs, resulting in a relatively low efficiency of the verification process, and it is impossible to automatically evaluate the value of the verification test case to determine whether the verification test case is a high-value verification test case with a good verification effect, resulting in a relatively low reliability of the verification process. Summary of the invention
[0004] The present invention provides a processor verification method, apparatus, equipment and medium to solve the problem that the processor verification scheme in the related art requires technicians to write verification test cases corresponding to the processor to be verified, which consumes a lot of manpower and time costs, resulting in a relatively low efficiency of the verification process, and it is impossible to automatically evaluate the value of the verification test cases to determine whether the verification test cases are high-value verification test cases with good verification effects, resulting in a relatively low reliability of the verification process.
[0005] According to one aspect of the present invention, there is provided a processor verification method, comprising:
[0006] Generate a verification test case corresponding to the processor to be verified according to the verification parameters of the processor to be verified through an instruction generation component; wherein the verification test case is an instruction sequence composed of multiple instructions for testing whether each core function of the processor to be verified is normal;
[0007] The verification test case is sent to the processor to be verified through the instruction simulator component, so that the processor to be verified executes each instruction in the verification test case in sequence and feeds back the execution result of each instruction;
[0008] The coverage data of the verification test case is collected through a coverage collection component, and the coverage of the verification test case is determined according to the coverage data, and whether the verification test case is a high-value verification test case is determined according to the coverage of the verification test case, so as to obtain a value assessment result of the verification test case; wherein the coverage includes instruction coverage, code coverage and function coverage;
[0009] By means of a feedback adjustment component, the verification parameters of the processor to be verified are updated according to the value evaluation result and coverage of the verification test case to obtain new verification parameters of the processor to be verified;
[0010] The coverage rate of the verification test case, the value assessment result and the new verification parameter are provided to the target user through the output component.
[0011] According to another aspect of the present invention, there is provided a processor verification device, comprising:
[0012] An instruction generation module, used to generate a verification test case corresponding to the processor to be verified according to the verification parameters of the processor to be verified through an instruction generation component; wherein the verification test case is an instruction sequence composed of multiple instructions for testing whether each core function of the processor to be verified is normal;
[0013] An instruction execution module, used to send the verification test case to the processor to be verified through an instruction simulator component, so that the processor to be verified sequentially executes each instruction in the verification test case and feeds back the execution result of each instruction;
[0014] A value assessment module, used to collect coverage data of the verification test case through a coverage collection component, determine the coverage of the verification test case according to the coverage data, and determine whether the verification test case is a high-value verification test case according to the coverage of the verification test case, and obtain a value assessment result of the verification test case; wherein the coverage includes instruction coverage, code coverage and function coverage;
[0015] A parameter updating module, configured to update the verification parameters of the processor to be verified according to the value evaluation result and coverage of the verification test case through a feedback adjustment component, so as to obtain new verification parameters of the processor to be verified;
[0016] The information output module is used to provide the coverage rate, value assessment results and new verification parameters of the verification test case to the target user through the output component.
[0017] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising:
[0018] at least one processor;
[0019] and a memory communicatively coupled to the at least one processor;
[0020] The memory stores a computer program executed by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the processor verification method described in any embodiment of the present invention.
[0021] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the processor verification method described in any embodiment of the present invention when executed.
[0022] The technical solution of the embodiment of the present invention generates a verification test case corresponding to the processor to be verified according to the verification parameters of the processor to be verified through an instruction generation component; wherein the verification test case is an instruction sequence composed of multiple instructions for testing whether each core function of the processor to be verified is normal; then, the verification test case is sent to the processor to be verified through an instruction simulator component, so that the processor to be verified executes each instruction in the verification test case in turn, and feeds back the execution result of each instruction; the coverage data of the verification test case is collected through a coverage collection component, and the coverage of the verification test case is determined according to the coverage data, and the coverage of the verification test case is determined according to the coverage of the verification test case. The verification test case is determined by the feedback component to determine whether it is a high-value verification test case, and the value evaluation result of the verification test case is obtained; wherein, the coverage includes instruction coverage, code coverage and function coverage; through the feedback adjustment component, according to the value evaluation result and coverage of the verification test case, the verification parameters of the processor to be verified are updated to obtain new verification parameters of the processor to be verified; finally, through the output component, the coverage, value evaluation result and new verification parameters of the verification test case are provided to the target user, which solves the problem that the processor verification scheme in the related technology requires technicians to write verification test cases corresponding to the processor to be verified, which will consume a lot of manpower costs. The time cost leads to low efficiency of the verification process, and it is impossible to automatically evaluate the value of the verification test cases to determine whether the verification test cases are high-value verification test cases with good verification effects, which leads to low reliability of the verification process. Based on the instruction generation component and the instruction simulator component, the verification test cases corresponding to the processor to be verified can be automatically generated according to the verification parameters of the processor to be verified, and the verification test cases can be sent to the processor to be verified, so that the processor to be verified can execute each instruction in the verification test case in turn, and feedback the execution result of each instruction. Based on the coverage collection component, the coverage data of the verification test cases can be collected, and the coverage data of the collected The coverage data of the set is used to determine the instruction coverage, code coverage and function coverage of the verification test case, and the verification test case is valued according to the instruction coverage, code coverage and function coverage of the verification test case to determine whether the verification test case is a high-value verification test case with good verification effect. The value evaluation result of the verification test case is obtained, and the verification parameters of the processor to be verified can be updated based on the feedback adjustment component. The coverage, value evaluation result and new verification parameters of the determined verification test case can be provided to the user based on the output component, thereby reducing the manpower and time costs of the verification process and improving the efficiency and reliability of the verification process.
[0023] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0025] Figure 1 A flowchart of a processor verification method provided in Embodiment 1 of the present invention.
[0026] Figure 2 This is a flowchart of a processor verification method provided in Embodiment 2 of the present invention.
[0027] Figure 3 A schematic diagram of the structure of a processor verification device provided in Embodiment 3 of the present invention.
[0028] Figure 4 A schematic diagram of the structure of an electronic device for implementing the processor verification method according to an embodiment of the present invention. DETAILED DESCRIPTION
[0029] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.
[0030] It should be noted that the terms "target", "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "comprise", "include" and "have" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.
[0031] Embodiment 1
[0032] Figure 1This is a flowchart of a processor verification method provided in Embodiment 1 of the present invention. This embodiment is applicable to the case of verifying a processor. The method can be executed by a processor verification device, which can be implemented in the form of hardware and / or software, and the processor verification device can be configured in an electronic device. The electronic device is an electronic device for verifying a processor. Figure 1 As shown, the method includes:
[0033] Step 101: Generate a verification test case corresponding to the processor to be verified according to the verification parameters of the processor to be verified through an instruction generation component.
[0034] The verification test case is an instruction sequence composed of multiple instructions for testing whether each core function of the processor to be verified is normal.
[0035] Optionally, the various core functions of the processor may be a plurality of key functions that the processor needs to use during operation. Exemplarily, the various core functions of the processor include, but are not limited to, various arithmetic operation functions, various logical operation functions, and multi-thread processing functions. Various arithmetic operation functions may refer to functions for performing various arithmetic operations. Various logical operation functions may refer to functions for performing various logical operation functions. Multi-thread processing functions may refer to functions for performing multi-thread processing.
[0036] Optionally, the verification test case corresponding to the processor is an instruction sequence consisting of multiple instructions for testing whether the various core functions of the processor are normal. After obtaining the verification test case corresponding to the processor, the processor will sequentially obtain each instruction in the verification test case corresponding to the processor, execute each instruction, obtain the execution result of each instruction, and feedback the execution result of each instruction. The execution result of the instruction is success or failure. If the instruction is executed successfully, the execution result of the instruction is determined to be success. If the instruction fails to execute, the execution result of the instruction is determined to be failure. Generally, if the execution results of each instruction in the verification test case corresponding to the processor are all successful, it can be determined that the various core functions of the processor are normal. If there is an execution result of failure in the execution results of each instruction in the verification test case corresponding to the processor, it can be determined that there is an abnormal core function in the various core functions of the processor.
[0037] Optionally, the verification parameters of the processor may be a plurality of parameters related to the process of testing whether each core function of the processor is normal. The instruction generation component may be a component provided in the electronic device for generating a verification test case corresponding to the processor according to the verification parameters of the input processor, and outputting the verification test case corresponding to the processor. The electronic device may input the verification parameters of the processor into the instruction generation component. The instruction generation component analyzes and detects the verification parameters of the input processor, generates a verification test case corresponding to the processor, and outputs the verification test case corresponding to the processor.
[0038] Optionally, the processor to be verified may be a processor that needs to be verified. The verification parameters of the processor to be verified may be stored in a parameter file of the processor to be verified. The parameter file of the processor to be verified may be a file for storing the verification parameters of the processor to be verified and other data related to the verification process of the processor to be verified. The parameter file of the processor to be verified may be sent to the electronic device by the target user through a terminal device. The target user may be a technician responsible for managing the processor to be verified. After receiving the parameter file of the processor to be verified sent by the target user, the electronic device extracts the verification parameters of the processor to be verified from the parameter file of the processor to be verified, and generates a verification test case corresponding to the processor to be verified according to the verification parameters of the processor to be verified through an instruction generation component.
[0039] Optionally, a verification test case corresponding to the processor to be verified is generated according to the verification parameters of the processor to be verified by an instruction generation component, including: inputting the verification parameters of the processor to be verified into the instruction generation component, and obtaining the verification test case corresponding to the processor to be verified output by the instruction generation component. The electronic device can input the verification parameters of the processor to be verified into the instruction generation component. The instruction generation component analyzes and detects the input verification parameters of the processor to be verified, generates a verification test case corresponding to the processor to be verified, and outputs the verification test case corresponding to the processor to be verified. The electronic device can obtain the verification test case corresponding to the processor to be verified output by the instruction generation component.
[0040] Optionally, the instruction generation component includes an input control, a generator, and an output control. The input control may be a software module for obtaining the verification parameters of the input processor. The input control may be written based on the python scripting language. The verification parameters of the processor may include parameters for describing the quantitative proportion of each instruction in the verification test case corresponding to the processor, parameters for describing the functions of each instruction in the verification test case corresponding to the processor, and parameters for describing the architectural configuration of the processor. The overall proportion of instructions in the verification test case = the quantitative proportion of instructions / the sum of the quantitative proportions of all instructions. The generator may be a software module for analyzing and detecting the verification parameters of the processor and generating the verification test case corresponding to the processor. The generator may be written based on the SystemVerilog language. The output control may be a software module for outputting the verification test case corresponding to the processor. The output control may be written based on the python scripting language.
[0041] Step 102: Send the verification test case to the processor to be verified through the instruction simulator component, so that the processor to be verified executes each instruction in the verification test case in sequence and feeds back the execution result of each instruction.
[0042] Optionally, the instruction simulator component can be a component set in an electronic device for sending a verification test case corresponding to a processor to the processor, so that the processor executes each instruction in the verification test case corresponding to the processor in sequence and feeds back the execution result of each instruction.
[0043] Optionally, sending the verification test case to the processor to be verified through an instruction simulator component includes: inputting the verification test case corresponding to the processor to be verified output by the instruction generation component into the instruction simulator component, so that the instruction simulator component sends the verification test case to the processor to be verified. After obtaining the verification test case corresponding to the processor to be verified, the processor to be verified will sequentially obtain each instruction in the verification test case corresponding to the processor to be verified, execute each instruction, obtain the execution result of each instruction, and feed back the execution result of each instruction to the instruction simulator component.
[0044] Step 103: Collect the coverage data of the verification test case through the coverage collection component, determine the coverage of the verification test case based on the coverage data, and determine whether the verification test case is a high-value verification test case based on the coverage of the verification test case to obtain a value assessment result of the verification test case.
[0045] The coverage includes instruction coverage, code coverage and function coverage.
[0046] Optionally, the coverage collection component can be a component set in the electronic device for collecting coverage data of verification test cases, determining the coverage of the verification test cases according to the coverage data of the verification test cases, and determining whether the verification test cases are high-value verification test cases according to the coverage of the verification test cases, and obtaining the value evaluation result of the verification test cases. The coverage of the verification test cases includes instruction coverage, code coverage, and function coverage. The coverage data of the verification test cases includes instruction coverage data, code coverage data, and function coverage data. After the processor to be verified feeds back the execution results of each instruction to the instruction simulator component, the electronic device can call the coverage collection component, and perform the operation of collecting the coverage data of the verification test cases through the coverage collection component, determining the coverage of the verification test cases according to the coverage data, and determining whether the verification test cases are high-value verification test cases according to the coverage of the verification test cases, and obtaining the value evaluation result of the verification test cases.
[0047] Optionally, the instruction coverage of a verification test case may refer to the ratio of the number of instructions in the verification test case that have been executed to the total number of instructions contained in the verification test case. The instruction coverage data of a verification test case may refer to the number of instructions in the verification test case that have been executed and the total number of instructions contained in the verification test case.
[0048] Optionally, the code coverage of a verification test case may be the ratio of the amount of code executed in the process of executing the instructions in the verification test case to the total amount of code that needs to be executed in the process of executing the instructions in the verification test case. The code coverage data of a verification test case may refer to the amount of code executed in the process of executing the instructions in the verification test case and the total amount of code that needs to be executed in the process of executing the instructions in the verification test case.
[0049] Optionally, the functional coverage of a verification test case may be the ratio of the number of functions used in the process of executing the instructions in the verification test case to the total number of functions that need to be used in the process of executing the instructions in the verification test case. The functional coverage data of a verification test case may refer to the number of functions used in the process of executing the instructions in the verification test case and the total number of functions that need to be used in the process of executing the instructions in the verification test case.
[0050] Optionally, a high-value verification test case may refer to a verification test case that can comprehensively and reliably test whether each core function of the processor is normal. A verification test case to be adjusted may refer to a verification test case that cannot comprehensively and reliably test whether each core function of the processor is normal and needs to be adjusted. The value assessment result of the verification test case is a high-value verification test case or a verification test case to be adjusted.
[0051] Optionally, the coverage data of the verification test case is collected through a coverage collection component, the coverage of the verification test case is determined based on the coverage data, and whether the verification test case is a high-value verification test case based on the coverage of the verification test case is determined to obtain a value assessment result of the verification test case, including: performing the following operations through the coverage collection component: collecting instruction coverage data, code coverage data and function coverage data of the verification test case; determining the instruction coverage of the verification test case based on the instruction coverage data; determining the code coverage of the verification test case based on the code coverage data; determining the function coverage of the verification test case based on the function coverage data; determining whether the verification test case is a high-value verification test case based on the instruction coverage, code coverage and function coverage of the verification test case to obtain a value assessment result of the verification test case.
[0052] Optionally, collecting instruction coverage data of the verification test case includes: extracting the number of instructions that have been executed in the verification test case from a verification tracking file; extracting the total number of instructions contained in the verification test case from a parameter file of the processor to be verified. The verification tracking file may be a file set in the processor to be verified for storing data related to the verification process. The processor to be verified may count the number of instructions that have been executed in the verification test case and store the number of instructions that have been executed in the verification test case in the verification tracking file. The parameter file of the processor to be verified stores the total number of instructions contained in the verification test case. The coverage collection component may extract the number of instructions that have been executed in the verification test case from the verification tracking file, and extract the total number of instructions contained in the verification test case from the parameter file of the processor to be verified, thereby collecting instruction coverage data of the verification test case.
[0053] Optionally, collecting the code coverage data of the verification test case includes: extracting the number of codes executed in the process of executing the instructions in the verification test case from the verification tracking file; extracting the total number of codes that need to be executed in the process of executing the instructions in the verification test case from the parameter file of the processor to be verified. The processor to be verified can count the number of codes executed in the process of executing the instructions in the verification test case and store the number of codes executed in the process of executing the instructions in the verification test case in the verification tracking file. The parameter file of the processor to be verified stores the total number of codes that need to be executed in the process of executing the instructions in the verification test case. The coverage collection component can extract the number of codes executed in the process of executing the instructions in the verification test case from the verification tracking file, and extract the total number of codes that need to be executed in the process of executing the instructions in the verification test case from the parameter file of the processor to be verified, thereby collecting the code coverage data of the verification test case.
[0054] Optionally, collecting functional coverage data of the verification test case includes: extracting the number of functions used in the process of executing the instructions in the verification test case from the verification tracking file; extracting the total number of functions that need to be used in the process of executing the instructions in the verification test case from the parameter file of the processor to be verified. The processor to be verified can count the number of functions used in the process of executing the instructions in the verification test case and store the number of functions used in the process of executing the instructions in the verification test case in the verification tracking file. The parameter file of the processor to be verified stores the total number of functions that need to be used in the process of executing the instructions in the verification test case. The coverage collection component can extract the number of functions used in the process of executing the instructions in the verification test case from the verification tracking file, and extract the total number of functions that need to be used in the process of executing the instructions in the verification test case from the parameter file of the processor to be verified, thereby collecting the functional coverage data of the verification test case.
[0055] Optionally, determining the instruction coverage of the verification test case based on the instruction coverage data includes: calculating the ratio of the number of instructions that have been executed in the verification test case to the total number of instructions contained in the verification test case to obtain the instruction coverage of the verification test case.
[0056] Optionally, the code coverage of the verification test case is determined based on the code coverage data, including: calculating the ratio of the number of codes executed in the process of executing the instructions in the verification test case to the total number of codes that need to be executed in the process of executing the instructions in the verification test case, to obtain the code coverage of the verification test case.
[0057] Optionally, the functional coverage of the verification test case is determined based on the functional coverage data, including: calculating the ratio of the number of functions used in the process of executing the instructions in the verification test case to the total number of functions that need to be used in the process of executing the instructions in the verification test case, to obtain the functional coverage of the verification test case.
[0058] Optionally, based on the instruction coverage, code coverage and function coverage of the verification test case, determine whether the verification test case is a high-value verification test case, and obtain a value assessment result of the verification test case, including: if the instruction coverage, code coverage and function coverage of the verification test case are greater than a preset coverage threshold, then determine that the verification test case is a high-value verification test case, and determine that the value assessment result of the verification test case is a high-value verification test case.
[0059] Optionally, the preset coverage threshold can be a preset value. The preset coverage threshold is a value between 0 and 1. Exemplarily, the preset coverage threshold is 0.9. Normally, if the instruction coverage, code coverage, and function coverage of the verification test case are greater than the preset coverage threshold, it indicates that the verification test case is a verification test case that can comprehensively and reliably test whether the various core functions of the processor are normal. It can be determined that the verification test case is a high-value verification test case, and the value assessment result of the verification test case is determined to be a high-value verification test case. If the instruction coverage, code coverage, or function coverage of the verification test case is less than or equal to the preset coverage threshold, it indicates that the verification test case is a verification test case that cannot comprehensively and reliably test whether the various core functions of the processor are normal, and needs to be adjusted. It can be determined that the verification test case is a verification test case to be adjusted, and the value assessment result of the verification test case is determined to be a verification test case to be adjusted.
[0060] Optionally, after determining the instruction coverage, code coverage, and function coverage of the verification test case, determine whether the instruction coverage, code coverage, and function coverage of the verification test case are greater than a preset coverage threshold. If the instruction coverage, code coverage, and function coverage of the verification test case are greater than the preset coverage threshold, determine that the verification test case is a high-value verification test case, and determine that the value assessment result of the verification test case is a high-value verification test case. If the instruction coverage, code coverage, or function coverage of the verification test case is less than or equal to the preset coverage threshold, determine that the verification test case is a verification test case to be adjusted, and determine that the value assessment result of the verification test case is a verification test case to be adjusted.
[0061] Step 104: Update the verification parameters of the processor to be verified according to the value evaluation result and coverage of the verification test case through the feedback adjustment component to obtain new verification parameters of the processor to be verified.
[0062] Optionally, the feedback adjustment component can be a component set in the electronic device for analyzing and detecting the coverage of the input verification parameters and the high-value verification test cases generated based on the verification parameters through a preset parameter update algorithm, optimizing and updating the verification parameters, obtaining new verification parameters, and outputting new verification parameters. The preset parameter update algorithm can be a random algorithm, genetic algorithm, or fuzzy algorithm pre-set for analyzing and detecting the coverage of the verification parameters and the high-value verification test cases generated based on the verification parameters, optimizing and updating the verification parameters, and obtaining new verification parameters. The electronic device can input the verification parameters of the processor and the coverage of the high-value verification test cases generated based on the verification parameters into the feedback adjustment component. The feedback adjustment component will analyze and detect the coverage of the input verification parameters and the high-value verification test cases generated based on the verification parameters through a preset parameter update algorithm, optimize and update the verification parameters, obtain new verification parameters, and output new verification parameters.
[0063] Optionally, through the feedback adjustment component, the verification parameters of the processor to be verified are updated according to the value assessment result and coverage of the verification test case to obtain new verification parameters of the processor to be verified, including: if the value assessment result of the verification test case is a high-value verification test case, then the verification parameters of the processor to be verified and the coverage of the verification test case are input into the feedback adjustment component to obtain the new verification parameters of the processor to be verified output by the feedback adjustment component.
[0064] Optionally, if the value assessment result of the verification test case is a high-value verification test case, the electronic device inputs the verification parameters of the processor to be verified and the coverage of the verification test case into the feedback adjustment component. The feedback adjustment component analyzes and detects the input verification parameters of the processor to be verified and the coverage of the verification test case through a preset parameter update algorithm, optimizes and updates the verification parameters of the processor to be verified, obtains new verification parameters of the processor to be verified, and outputs the new verification parameters of the processor to be verified. The electronic device can obtain the new verification parameters of the processor to be verified output by the feedback adjustment component. The new verification parameters of the processor to be verified are the optimized and updated verification parameters of the processor to be verified.
[0065] Step 105: Provide the coverage of the verification test case, the value assessment result and the new verification parameter to the target user through the output component.
[0066] Optionally, the output component can be a component set in the electronic device for visually displaying the coverage, value assessment results and new verification parameters of the verification test cases, thereby providing the coverage, value assessment results and new verification parameters of the verification test cases to the target user.
[0067] Optionally, the coverage rate, value assessment results and new verification parameters of the verification test cases are provided to the target user through an output component, including: displaying the coverage rate, value assessment results and new verification parameters of the verification test cases on a user interaction page through the output component. The user interaction page can be a page set in the electronic device for interacting with the user, obtaining information input by the user or providing information to the user. After obtaining the new verification parameters of the processor to be verified, the electronic device can call the output component, and perform the operation of displaying the coverage rate, value assessment results and new verification parameters of the verification test cases on the user interaction page through the output component.
[0068] Optionally, if the value assessment result of the verification test case is a verification test case to be adjusted, the electronic device directly provides the coverage and value assessment result of the verification test case to the target user through the output component. The electronic device can call the output component to perform an operation of displaying the coverage and value assessment result of the verification test case on the user interaction page through the output component.
[0069] The technical solution of the embodiment of the present invention generates a verification test case corresponding to the processor to be verified according to the verification parameters of the processor to be verified through an instruction generation component; wherein the verification test case is an instruction sequence composed of multiple instructions for testing whether each core function of the processor to be verified is normal; then, the verification test case is sent to the processor to be verified through an instruction simulator component, so that the processor to be verified executes each instruction in the verification test case in turn, and feeds back the execution result of each instruction; the coverage data of the verification test case is collected through a coverage collection component, and the coverage of the verification test case is determined according to the coverage data, and the coverage of the verification test case is determined according to the coverage of the verification test case. The verification test case is determined by the feedback component to determine whether it is a high-value verification test case, and the value evaluation result of the verification test case is obtained; wherein, the coverage includes instruction coverage, code coverage and function coverage; through the feedback adjustment component, according to the value evaluation result and coverage of the verification test case, the verification parameters of the processor to be verified are updated to obtain new verification parameters of the processor to be verified; finally, through the output component, the coverage, value evaluation result and new verification parameters of the verification test case are provided to the target user, which solves the problem that the processor verification scheme in the related technology requires technicians to write verification test cases corresponding to the processor to be verified, which will consume a lot of manpower costs. The time cost leads to low efficiency of the verification process, and it is impossible to automatically evaluate the value of the verification test cases to determine whether the verification test cases are high-value verification test cases with good verification effects, which leads to low reliability of the verification process. Based on the instruction generation component and the instruction simulator component, the verification test cases corresponding to the processor to be verified can be automatically generated according to the verification parameters of the processor to be verified, and the verification test cases can be sent to the processor to be verified, so that the processor to be verified can execute each instruction in the verification test case in turn, and feedback the execution result of each instruction. Based on the coverage collection component, the coverage data of the verification test cases can be collected, and the coverage data of the collected The coverage data of the set is used to determine the instruction coverage, code coverage and function coverage of the verification test case, and the verification test case is valued according to the instruction coverage, code coverage and function coverage of the verification test case to determine whether the verification test case is a high-value verification test case with good verification effect. The value evaluation result of the verification test case is obtained, and the verification parameters of the processor to be verified can be updated based on the feedback adjustment component. The coverage, value evaluation result and new verification parameters of the determined verification test case can be provided to the user based on the output component, thereby reducing the manpower and time costs of the verification process and improving the efficiency and reliability of the verification process.
[0070] Embodiment 2
[0071] Figure 2This is a flowchart of a processor verification method provided by Embodiment 2 of the present invention. This embodiment of the present invention can be combined with each optional solution in one or more of the above embodiments. Figure 2 As shown, the method includes:
[0072] Step 201: input the verification parameters of the processor to be verified into the instruction generation component, and obtain the verification test case corresponding to the processor to be verified output by the instruction generation component.
[0073] The verification test case is an instruction sequence composed of multiple instructions for testing whether each core function of the processor to be verified is normal.
[0074] Step 202: Send the verification test case to the processor to be verified through the instruction simulator component, so that the processor to be verified executes each instruction in the verification test case in sequence and feeds back the execution result of each instruction.
[0075] Step 203: Collect the coverage data of the verification test case through the coverage collection component, determine the coverage of the verification test case based on the coverage data, and determine whether the verification test case is a high-value verification test case based on the coverage of the verification test case to obtain a value assessment result of the verification test case.
[0076] The coverage includes instruction coverage, code coverage and function coverage.
[0077] Step 204: Update the verification parameters of the processor to be verified according to the value evaluation result and coverage of the verification test case through the feedback adjustment component to obtain new verification parameters of the processor to be verified.
[0078] Step 205: Display the coverage rate, value assessment results and new verification parameters of the verification test case on the user interaction page through the output component.
[0079] The technical solution of the embodiment of the present invention can generate verification test cases corresponding to the processor to be verified automatically based on the verification parameters of the processor to be verified based on the instruction generation component, and can visualize the coverage, value assessment results and new verification parameters of the verification test cases based on the output component, thereby providing the coverage, value assessment results and new verification parameters of the verification test cases to users.
[0080] Embodiment 3
[0081] Figure 3 This is a schematic diagram of the structure of a processor verification device provided by Embodiment 3 of the present invention. The device can be configured in an electronic device. Figure 3As shown, the device includes: an instruction generation module 301, an instruction execution module 302, a value evaluation module 303, a parameter updating module 304 and an information output module 305.
[0082] Among them, the instruction generation module 301 is used to generate a verification test case corresponding to the processor to be verified according to the verification parameters of the processor to be verified through the instruction generation component; wherein the verification test case is an instruction sequence composed of multiple instructions for testing whether the various core functions of the processor to be verified are normal; the instruction execution module 302 is used to send the verification test case to the processor to be verified through the instruction simulator component, so that the processor to be verified executes each instruction in the verification test case in turn and feeds back the execution result of each instruction; the value evaluation module 303 is used to collect the coverage data of the verification test case through the coverage collection component, and according to the coverage data, determine the coverage of the verification test case, and determine whether the verification test case is a high-value verification test case based on the coverage of the verification test case, and obtain the value evaluation result of the verification test case; wherein the coverage includes instruction coverage, code coverage and function coverage; a parameter update module 304 is used to update the verification parameters of the processor to be verified according to the value evaluation result and coverage of the verification test case through a feedback adjustment component, and obtain new verification parameters of the processor to be verified; an information output module 305 is used to provide the coverage, value evaluation result and new verification parameters of the verification test case to the target user through an output component.
[0083] The technical solution of the embodiment of the present invention generates a verification test case corresponding to the processor to be verified according to the verification parameters of the processor to be verified through an instruction generation component; wherein the verification test case is an instruction sequence composed of multiple instructions for testing whether each core function of the processor to be verified is normal; then, the verification test case is sent to the processor to be verified through an instruction simulator component, so that the processor to be verified executes each instruction in the verification test case in turn, and feeds back the execution result of each instruction; the coverage data of the verification test case is collected through a coverage collection component, and the coverage of the verification test case is determined according to the coverage data, and the coverage of the verification test case is determined according to the coverage of the verification test case. The verification test case is determined by the feedback component to determine whether it is a high-value verification test case, and the value evaluation result of the verification test case is obtained; wherein, the coverage includes instruction coverage, code coverage and function coverage; through the feedback adjustment component, according to the value evaluation result and coverage of the verification test case, the verification parameters of the processor to be verified are updated to obtain new verification parameters of the processor to be verified; finally, through the output component, the coverage, value evaluation result and new verification parameters of the verification test case are provided to the target user, which solves the problem that the processor verification scheme in the related technology requires technicians to write verification test cases corresponding to the processor to be verified, which will consume a lot of manpower costs. The time cost leads to low efficiency of the verification process, and it is impossible to automatically evaluate the value of the verification test cases to determine whether the verification test cases are high-value verification test cases with good verification effects, which leads to low reliability of the verification process. Based on the instruction generation component and the instruction simulator component, the verification test cases corresponding to the processor to be verified can be automatically generated according to the verification parameters of the processor to be verified, and the verification test cases can be sent to the processor to be verified, so that the processor to be verified can execute each instruction in the verification test case in turn, and feedback the execution result of each instruction. Based on the coverage collection component, the coverage data of the verification test cases can be collected, and the coverage data of the collected The coverage data of the set is used to determine the instruction coverage, code coverage and function coverage of the verification test case, and the verification test case is valued according to the instruction coverage, code coverage and function coverage of the verification test case to determine whether the verification test case is a high-value verification test case with good verification effect. The value evaluation result of the verification test case is obtained, and the verification parameters of the processor to be verified can be updated based on the feedback adjustment component. The coverage, value evaluation result and new verification parameters of the determined verification test case can be provided to the user based on the output component, thereby reducing the manpower and time costs of the verification process and improving the efficiency and reliability of the verification process.
[0084] In an optional implementation of the embodiment of the present invention, optionally, the instruction generation module 301 is specifically used to: input the verification parameters of the processor to be verified into the instruction generation component, and obtain the verification test case corresponding to the processor to be verified output by the instruction generation component.
[0085] In an optional implementation of an embodiment of the present invention, optionally, the instruction execution module 302 is specifically used to: input the verification test case corresponding to the processor to be verified output by the instruction generation component into the instruction simulator component, so that the instruction simulator component sends the verification test case to the processor to be verified.
[0086] In an optional implementation of an embodiment of the present invention, optionally, the value assessment module 303 is specifically used to: perform the following operations through a coverage collection component: collect instruction coverage data, code coverage data and function coverage data of the verification test case; determine the instruction coverage of the verification test case based on the instruction coverage data; determine the code coverage of the verification test case based on the code coverage data; determine the function coverage of the verification test case based on the function coverage data; determine whether the verification test case is a high-value verification test case based on the instruction coverage, code coverage and function coverage of the verification test case, and obtain a value assessment result of the verification test case.
[0087] In an optional implementation of an embodiment of the present invention, optionally, when the value assessment module 303 performs the operation of determining whether the verification test case is a high-value verification test case based on the instruction coverage, code coverage and function coverage of the verification test case and obtaining the value assessment result of the verification test case, it is specifically used to: if the instruction coverage, code coverage and function coverage of the verification test case are greater than a preset coverage threshold, then determine that the verification test case is a high-value verification test case, and determine that the value assessment result of the verification test case is a high-value verification test case.
[0088] In an optional implementation of an embodiment of the present invention, optionally, the parameter update module 304 is specifically used to: if the value assessment result of the verification test case is a high-value verification test case, then the verification parameters of the processor to be verified and the coverage of the verification test case are input into the feedback adjustment component to obtain new verification parameters of the processor to be verified output by the feedback adjustment component.
[0089] In an optional implementation of the embodiment of the present invention, optionally, the information output module 305 is specifically used to: display the coverage, value assessment results and new verification parameters of the verification test case on the user interaction page through the output component.
[0090] Regarding the device in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.
[0091] The processor verification device can execute the processor verification method provided by any embodiment of the present invention, and has the corresponding functional modules and beneficial effects for executing the processor verification method.
[0092] Embodiment 4
[0093] Figure 4 The schematic diagram of the structure of the electronic device 10 that can be used to implement the processor verification method of the embodiment of the present invention is shown. The components shown herein, their connections and relationships, and their functions are only for example, and are not intended to limit the implementation of the present invention described and / or required herein.
[0094] like Figure 4 As shown, the electronic device 10 includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program executed by at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program built from the storage unit 18 to the random access memory (RAM) 13. In the random access memory (RAM) 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the read-only memory (ROM) 12 and the random access memory (RAM) 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.
[0095] A number of components in the electronic device 10 are connected to an input / output (I / O) interface 15, including an input unit 16, such as a keyboard, a mouse, etc., an output unit 17, such as various types of displays, speakers, etc., a storage unit 18, such as a disk, an optical disk, etc., and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.
[0096] The processor 11 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 performs the various methods and processes described above, such as a processor verification method.
[0097] In some embodiments, the processor verification method may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 10 via a read-only memory (ROM) 12 and / or a communication unit 19. When the computer program is built into a random access memory (RAM) 13 and executed by the processor 11, one or more steps of the processor verification method described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform the processor verification method in any other appropriate manner (e.g., by means of firmware).
[0098] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.
[0099] The computer program for implementing the processor verification method of the present invention can be written in any combination of one or more programming languages. These computer programs can be provided to a processor of a general-purpose computer, a special-purpose computer or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program can be executed entirely on the machine, partially on the machine, partially on the machine as a stand-alone software package and partially on a remote machine, or entirely on a remote machine or server.
[0100] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
[0101] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).
[0102] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.
[0103] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.
[0104] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.
[0105] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims
1. A processor verification method, characterized in that: include: Generate a verification test case corresponding to the processor to be verified according to the verification parameters of the processor to be verified through an instruction generation component; wherein the verification test case is an instruction sequence composed of multiple instructions for testing whether each core function of the processor to be verified is normal; The verification test case is sent to the processor to be verified through the instruction simulator component, so that the processor to be verified executes each instruction in the verification test case in sequence and feeds back the execution result of each instruction; The coverage data of the verification test case is collected through a coverage collection component, and the coverage of the verification test case is determined according to the coverage data, and whether the verification test case is a high-value verification test case is determined according to the coverage of the verification test case, so as to obtain a value assessment result of the verification test case; wherein the coverage includes instruction coverage, code coverage and function coverage; By means of a feedback adjustment component, the verification parameters of the processor to be verified are updated according to the value evaluation result and coverage of the verification test case to obtain new verification parameters of the processor to be verified; The coverage rate of the verification test case, the value assessment result and the new verification parameter are provided to the target user through the output component.
2. The processor verification method according to claim 1, characterized in that: Generate a verification test case corresponding to the processor to be verified according to the verification parameters of the processor to be verified by the instruction generation component, including: The verification parameters of the processor to be verified are input into the instruction generation component, and a verification test case corresponding to the processor to be verified and output by the instruction generation component is obtained.
3. The processor verification method according to claim 2, characterized in that: The verification test case is sent to the processor to be verified through an instruction simulator component, including: The verification test case corresponding to the processor to be verified output by the instruction generation component is input to the instruction simulator component, so that the instruction simulator component sends the verification test case to the processor to be verified.
4. The processor verification method according to claim 1, characterized in that: The coverage data of the verification test case is collected by a coverage collection component, the coverage of the verification test case is determined according to the coverage data, and whether the verification test case is a high-value verification test case according to the coverage of the verification test case is determined, and a value assessment result of the verification test case is obtained, including: The coverage collection component performs the following operations: Collecting instruction coverage data, code coverage data and function coverage data of the verification test cases; Determining the instruction coverage of the verification test case according to the instruction coverage data; Determining the code coverage of the verification test case according to the code coverage data; Determining the functional coverage of the verification test case according to the functional coverage data; According to the instruction coverage, code coverage and function coverage of the verification test case, determine whether the verification test case is a high-value verification test case, and obtain a value assessment result of the verification test case.
5. The processor verification method according to claim 4, characterized in that: Determining whether the verification test case is a high-value verification test case according to the instruction coverage, code coverage, and function coverage of the verification test case, and obtaining a value assessment result of the verification test case, including: If the instruction coverage, code coverage and function coverage of the verification test case are greater than the preset coverage threshold, the verification test case is determined to be a high-value verification test case, and the value assessment result of the verification test case is determined to be a high-value verification test case.
6. The processor verification method according to claim 1, characterized in that: The verification parameters of the processor to be verified are updated according to the value evaluation result and coverage of the verification test case through the feedback adjustment component to obtain new verification parameters of the processor to be verified, including: If the value assessment result of the verification test case is a high-value verification test case, the verification parameters of the processor to be verified and the coverage of the verification test case are input into the feedback adjustment component to obtain new verification parameters of the processor to be verified output by the feedback adjustment component.
7. The processor verification method according to claim 1, characterized in that: The coverage of the verification test case, the value assessment result and the new verification parameter are provided to the target user through the output component, including: The coverage rate, value assessment results and new verification parameters of the verification test cases are displayed on the user interaction page through the output component.
8. A processor verification device, characterized in that: include: An instruction generation module, used to generate a verification test case corresponding to the processor to be verified according to the verification parameters of the processor to be verified through an instruction generation component; wherein the verification test case is an instruction sequence composed of multiple instructions for testing whether each core function of the processor to be verified is normal; An instruction execution module, used to send the verification test case to the processor to be verified through an instruction simulator component, so that the processor to be verified sequentially executes each instruction in the verification test case and feeds back the execution result of each instruction; A value assessment module, used to collect coverage data of the verification test case through a coverage collection component, determine the coverage of the verification test case according to the coverage data, and determine whether the verification test case is a high-value verification test case according to the coverage of the verification test case, and obtain a value assessment result of the verification test case; wherein the coverage includes instruction coverage, code coverage and function coverage; A parameter updating module, configured to update the verification parameters of the processor to be verified according to the value evaluation result and coverage of the verification test case through a feedback adjustment component, so as to obtain new verification parameters of the processor to be verified; The information output module is used to provide the coverage rate, value assessment results and new verification parameters of the verification test case to the target user through the output component.
9. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively coupled to the at least one processor; The memory stores a computer program executed by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the processor verification method according to any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the processor verification method according to any one of claims 1 to 7 when executed.