A method for improving film clamping in a PCB positive working process

Abstract

The application discloses a method for improving film clamping in a PCB positive film process, comprising: optimizing the layout of lines in a BAG area, a vacant area, a large substrate area and a board edge area, including the design of line width and line spacing in the BAG area, the design of conductor spacing in the vacant area, the design of conductor spacing in the large substrate area, the layout design of dense lines in the board edge, current-dividing conductors and slot hole isolation rings, so as to avoid too dense or uneven distribution of lines, ensure uniform current distribution, make the plating layer thickness consistent with the dry film thickness, and improve the film clamping phenomenon.

Description

Technical Field

[0001] This invention relates to the field of printed circuit board manufacturing technology, and specifically to a method for improving the lamination process of PCB positive film. Background Technology

[0002] In the PCB manufacturing process, it is necessary to lay out the outer layer circuitry. This is mainly done using positive film fabrication, where the areas covered by the cured dry film on the PCB are non-circuit areas. The PCB positive film process is as follows: First, a photosensitive dry film is applied to both sides of the circuit board. Through exposure and development, the areas to be retained are exposed. Then, thickened copper and tin are electroplated (the purpose of tin plating is to protect the areas to be retained during etching). After completion, the dry film is removed (exposing the unwanted areas), etched (cleaning the exposed areas, while the required areas are protected by the tin layer), and finally stripped of the tin layer, exposing the areas protected by the tin layer.

[0003] In actual production, due to the edge effect of electroplating, the plating thickness near the edge of the board is 3-5mm thicker than that in the middle of the board. This creates an electroplating protrusion above the lines that need to be electroplated, and the dry film is embedded between the lines, forming a film sandwich. This makes it difficult to remove the film completely, and short circuit defects are easily formed between the lines.

[0004] The purpose of this invention is to provide a method for improving the film lamination process in PCB positive film manufacturing. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a method for improving the film-laden process of PCB positive film. By rationally designing the circuit board pattern, avoiding excessively dense or unevenly distributed lines, and ensuring uniform current distribution, the coating thickness is consistent with the dry film thickness, thereby improving the film-laden phenomenon.

[0006] The technical solution of the present invention is as follows:

[0007] A method for improving the lamination process in PCB positive film manufacturing includes:

[0008] BAG area design: Reduce line width compensation. When the line width is ≥6.0mil, compensate by adding 0.4mil to the original. If the spacing is still not met, cut the PAD on one side. The minimum design of the single-side hole ring of the via is 2.2mil.

[0009] When the line spacing is ≤3.05mil, BAG clamps are used, with 0.8mil compensation on one side of the BAG and 0.4mil compensation on one side of the clamp. The minimum distance between the BAG and the clamp is 1.75mil, the solder mask opening is 0.5mil, and the cover wire is 1.25mil.

[0010] Open area design: the line moves 3mil, the minimum design for via ring is 3.5mil, and the minimum design for plug-in hole ring is 5mil, to ensure that the conductor-to-conductor spacing is ≥6.0mil;

[0011] Design of the large substrate area within the board: The area adjacent to the large substrate area is designed as an open area. Areas containing dense lines and PAD clamped lines are designed with a conductor spacing of ≥6.0mil. If the conductor spacing requirement of ≥6.0mil is not met, the PAD is cut off. If the spacing is still not met after cutting off the PAD, the line width is controlled at the lower limit.

[0012] Dense trace design at the board edge: Move the dense non-impedance traces at the board edge so that the spacing of the three rows of conductors at the board edge is 6mil, 5mil, and 4mil respectively, and the spacing gradually decreases towards the inside of the board. The spacing of the remaining traces is designed to be 3mil. Add current-blocking copper foil at the board edge.

[0013] The design of the current-shaping conductor at the board edge is as follows: the conductor at the board edge is 2.1mm away from the forming line and the conductor width is 1.2mm. When the conductor intersects with the alignment hole of the line, the conductor is cut off. The size of the conductive PAD in the copper-free area is 60mil and the spacing is 60mil. Long strips, long arcs, triangles, trapezoids, quadrilaterals or irregular shapes with board edge gaps ≤6mil are filled.

[0014] Plate edge slot isolation ring design: spacing is designed at 8mil.

[0015] Furthermore, in the design process of the large substrate area within the board, the maximum PAD cutting range is calculated as 10% of the original PAD size.

[0016] Compared with the prior art, the method for improving the PCB positive film process lamination provided by the present invention has the following advantages:

[0017] The present invention provides a method for improving the film sandwiching phenomenon in PCB positive film process. By optimizing the layout of the circuit in the BAG area, open area, large substrate area and edge area of ​​the circuit board, the method avoids the circuit being too dense or unevenly distributed, ensures uniform current distribution, and thus makes the coating thickness consistent with the dry film thickness, thereby improving the film sandwiching phenomenon. Detailed Implementation

[0018] To enable those skilled in the art to better understand the technical solutions in the embodiments of the present invention, and to make the above-mentioned objectives, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be further described below.

[0019] It should be noted that the descriptions of these embodiments are for the purpose of aiding understanding the present invention, but do not constitute a limitation thereof. Furthermore, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0020] A method for improving the lamination process in PCB positive film manufacturing includes:

[0021] BAG area design: Reduce line width compensation. When the line width is ≥6.0mil, compensate by adding 0.4mil to the original. If the spacing is still not met, cut the PAD on one side. The minimum design of the single-side hole ring of the via is 2.2mil.

[0022] When the line spacing is ≤3.05mil, BAG clamps are used, with 0.8mil compensation on one side of the BAG and 0.4mil compensation on one side of the clamp. The minimum distance between the BAG and the clamp is 1.75mil, the solder mask opening is 0.5mil, and the cover wire is 1.25mil.

[0023] Open area design: the line moves 3mil, the minimum design for via rings is 3.5mil, and the minimum design for plug-in hole rings is 5mil, ensuring that the conductor-to-conductor spacing is ≥6.0mil; it should be noted that the moving line is a non-impedance line;

[0024] Design of the large substrate area within the board: The area adjacent to the large substrate area is designed as an open area. Areas containing dense lines and PAD clamps are designed with a conductor spacing of ≥6.0mil. If the conductor spacing requirement of ≥6.0mil is not met, the PADs are cut off. If the spacing still does not meet the requirement after cutting off the PADs, the line width is controlled at the lower limit. The maximum PAD cutting range is calculated as 10% of the original PAD size. For example, if the PAD size is 10*10mil, the maximum PAD cutting amount is 10*10%=1mil. The line width is controlled at the lower limit. The specific implementation method is as follows: If the line width control value is 127um±10%, that is, the control range is 114.3um~139.7um, the lower limit control means that the line width control should be as close as possible to 114.3um, but not less than 114.3um, because 114.3um is the minimum limit value.

[0025] Dense Line Design at the Board Edge: The dense non-impedance lines at the board edge are moved so that the spacing of the three rows of conductors at the board edge is 6mil, 5mil, and 4mil respectively, with the spacing gradually decreasing towards the center of the board. The remaining lines are designed with a spacing of 3mil. During etching, the board edge may experience uneven copper thickness, leading to incomplete etching and insufficient spacing between etched lines, which can cause short circuits and other quality issues. Therefore, the line spacing at the board edge is designed to decrease from the edge towards the center to balance the impact of electroplating at the edge, thus achieving a consistent spacing between edge units and the center of the board.

[0026] The method for adding current-capturing copper strips to the board edge is as follows: during circuit film preparation, all areas along the board edge, except for tool hole positions and alignment PAD positions, are designed with copper reserves; corresponding copper reserves are also designed in the open areas near the board edge units or the forming router holes. The purpose of leaving copper reserves on the board edge is: during electroplating, the copper reserves will capture current, resulting in more copper plating, and these areas will be routered and discarded during forming.

[0027] The design of the current-shaping conductor at the board edge is as follows: the conductor at the board edge is 2.1mm away from the forming line and the conductor width is 1.2mm. When the conductor intersects with the alignment hole of the line, the conductor is cut off. The size of the conductive PAD in the copper-free area is 60mil and the spacing is 60mil. Long strips, long arcs, triangles, trapezoids, quadrilaterals or irregular shapes with board edge gaps ≤6mil are filled.

[0028] Plate edge slot isolation ring design: spacing is designed at 8mil.

[0029] Through the optimized design of this invention, excessively dense or unevenly distributed lines are avoided, ensuring uniform current distribution, thereby making the coating thickness consistent with the dry film thickness and improving the film trapping phenomenon.

[0030] The embodiments of the present invention have been described in detail above, but the present invention is not limited to the described embodiments. For those skilled in the art, various changes, modifications, substitutions, and variations made to these embodiments without departing from the principles and spirit of the present invention still fall within the protection scope of the present invention.

Claims

1. A method for improving the lamination process in PCB positive film manufacturing, characterized in that, include: BAG area design: Reduce line width compensation. When the line width is ≥6.0mil, compensate by adding 0.4mil to the original. If the spacing is still not met, cut the PAD on one side. The minimum design of the single-side hole ring of the via is 2.2mil. When the line spacing is ≤3.05mil, BAG clamps are used, with 0.8mil compensation on one side of the BAG and 0.4mil compensation on one side of the clamp. The minimum distance between the BAG and the clamp is 1.75mil, the solder mask opening is 0.5mil, and the cover wire is 1.25mil. Open area design: For line movement of 3mil, the minimum design for via ring is 3.5mil, and the minimum design for plug-in hole ring is 5mil, to ensure that the conductor-to-conductor spacing is ≥6.0mil; Design of the large substrate area within the board: The area adjacent to the large substrate area is designed as an open area. Areas containing dense lines and PAD clamped lines are designed with a conductor spacing of ≥6.0mil. If the conductor spacing requirement of ≥6.0mil is not met, the PAD is cut off. If the spacing is still not met after cutting off the PAD, the line width is controlled at the lower limit. Dense trace design at the board edge: Move the dense non-impedance traces at the board edge so that the spacing of the three rows of conductors at the board edge is 6mil, 5mil, and 4mil respectively, and the spacing gradually decreases towards the inside of the board. The spacing of the remaining traces is designed to be 3mil. Add current-blocking copper foil at the board edge. The design of the current-shaping conductor at the board edge is as follows: the conductor at the board edge is 2.1mm away from the forming line and the conductor width is 1.2mm. When the conductor intersects with the alignment hole of the line, the conductor is cut off. The size of the conductive PAD in the copper-free area is 60mil and the spacing is 60mil. Long strips, long arcs, triangles, trapezoids, quadrilaterals or irregular shapes with board edge gaps ≤6mil are filled. Plate edge slot isolation ring design: spacing is designed at 8mil.

2. The method for improving the film lamination process in PCB positive film manufacturing according to claim 1, characterized in that, In the design process of the large substrate area within the board, the maximum PAD cutting range is calculated as 10% of the original PAD size.